include/ChangeLog

   1 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
   4         hwcaps2.
   5
   6 2016-11-22  Alan Modra  <amodra@gmail.com>
   7
   8         PR 20744
   9         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  10
  11 2016-11-03  David Tolnay <dtolnay@gmail.com>
  12             Mark Wielaard  <mark@klomp.org>
  13
  14         * demangle.h (DMGL_RUST): New macro.
  15         (DMGL_STYLE_MASK): Add DMGL_RUST.
  16         (demangling_styles): Add dlang_rust.
  17         (RUST_DEMANGLING_STYLE_STRING): New macro.
  18         (RUST_DEMANGLING): New macro.
  19         (rust_demangle): New prototype.
  20         (rust_is_mangled): Likewise.
  21         (rust_demangle_sym): Likewise.
  22
  23 2016-11-07  Jason Merrill  <jason@redhat.com>
  24
  25         * demangle.h (enum demangle_component_type): Add
  26         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  27
  28 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  29
  30         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  31         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  32         (enum aarch64_op): Add OP_FCMLA_ELEM.
  33
  34 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  35
  36         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  37         (enum aarch64_insn_class): Add ldst_imm10.
  38
  39 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  40
  41         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  42
  43 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  44
  45         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  46         (AARCH64_ARCH_V8_3): Define.
  47         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  48
  49 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  50
  51         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  52         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  53         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  54
  55 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  56
  57         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  58
  59 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  60
  61         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  62         fields.
  63         (struct arc_long_opcode): Delete.
  64         (struct arc_operand): Change types for insert and extract
  65         handlers.
  66
  67 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  68
  69         * opcode/arc.h: Make macros 64-bit safe.
  70
  71 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  72
  73         * opcode/arc.h (arc_opcode_len): Declare.
  74         (ARC_SHORT): Delete.
  75
  76 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  77             Andrew Waterman <andrew@sifive.com>
  78
  79         Add support for RISC-V architecture.
  80         * dis-asm.h: Add prototypes for print_insn_riscv and
  81         print_riscv_disassembler_options.
  82         * elf/riscv.h: New file.
  83         * opcode/riscv-opc.h: New file.
  84         * opcode/riscv.h: New file.
  85
  86 2016-10-17  Nick Clifton  <nickc@redhat.com>
  87
  88         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  89         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  90         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  91         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  92         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  93         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  94         (ELFOSABI_OPENVOS): Define.
  95         (GRP_MASKOS, GRP_MASKPROC): Define.
  96
  97 2016-10-14  Pedro Alves  <palves@redhat.com>
  98
  99         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 100         OVERRIDE): Define as empty.
 101         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 102         __final.
 103         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 104         empty.
 105
 106 2016-10-14  Pedro Alves  <palves@redhat.com>
 107
 108         * ansidecl.h (GCC_FINAL): Delete.
 109         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 110
 111 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 112
 113         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 114
 115 2016-09-29  Alan Modra  <amodra@gmail.com>
 116
 117         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 118
 119 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 120
 121         * opcode/arc.h (insn_class_t): Add two new classes.
 122
 123 2016-09-26  Alan Modra  <amodra@gmail.com>
 124
 125         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 126
 127 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 128
 129         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 130
 131 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 132
 133         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 134         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 135         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 136         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 137
 138 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 139
 140         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 141         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 142         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 143         aarch64_insn_classes.
 144
 145 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 146
 147         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 148         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 149         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 150
 151 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 152
 153         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 154         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 155         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 156
 157 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 158
 159         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 160         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 161         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 162         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 163         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 164         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 165         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 166         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 167         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 168         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 169         (aarch64_sve_dupm_mov_immediate_p): Declare.
 170
 171 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 172
 173         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 174         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 175         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 176         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 177         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 178
 179 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 180
 181         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 182         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 183         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 184         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 185         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 186         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 187         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 188         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 189         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 190         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 191         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 192         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 193         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 194         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 195         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 196         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 197         Likewise.
 198
 199 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 200
 201         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 202         aarch64_opnd.
 203         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 204         (aarch64_opnd_info): Make shifter.amount an int64_t and
 205         rearrange the fields.
 206
 207 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 208
 209         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 210         (AARCH64_OPND_SVE_PRFOP): Likewise.
 211         (aarch64_sve_pattern_array): Declare.
 212         (aarch64_sve_prfop_array): Likewise.
 213
 214 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 215
 216         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 217         (AARCH64_OPND_QLF_P_M): Likewise.
 218
 219 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 220
 221         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 222         aarch64_operand_class.
 223         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 224         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 225         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 226         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 227         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 228         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 229         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 230         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 231
 232 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 233
 234         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 235         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 236
 237 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 238
 239         * opcode/aarch64.h (F_STRICT): New flag.
 240
 241 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 242
 243         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 244
 245 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 246         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 247         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 248         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 249         relocation.
 250
 251 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 252
 253         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 254         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 255
 256 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 257
 258         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 259
 260 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 261
 262         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 263
 264 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 265
 266         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 267         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 268         ARC_NUM_ADDRTYPES.
 269         * opcode/arc.h: Add BMU to insn_class_t enum.
 270         * opcode/arc.h: Add PMU to insn_class_t enum.
 271
 272 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 273
 274         * dis-asm.h: Declare print_arc_disassembler_options.
 275
 276 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 277
 278         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 279         out_implib_bfd fields.
 280
 281 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 282
 283         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 284
 285 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 286
 287         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 288         (SHF_ARM_PURECODE): ... this.
 289
 290 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 291
 292         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 293         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 294         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 295         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 296
 297 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 298
 299         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 300         of enabled FPU features.
 301
 302 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 303
 304         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 305         SPARC_OPCODE_ARCH_MAX into the enum.
 306
 307 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 308
 309         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 310
 311 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 312
 313         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 314
 315 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 316
 317         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 318
 319 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 320
 321         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 322         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 323         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 324         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 325
 326 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 327
 328         * opcode/arc.h: Make insn_class_t alphabetical again.
 329
 330 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 331
 332         * elf/dlx.h: Wrap in extern C.
 333         * elf/xtensa.h: Likewise.
 334         * opcode/arc.h: Likewise.
 335
 336 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 337
 338         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 339         tilegx_pipeline.
 340
 341 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 342
 343         * opcode/arc.h: Add nps400 extension and instruction
 344         subclass.
 345         Remove ARC_OPCODE_NPS400
 346         * elf/arc.h: Remove E_ARC_MACH_NPS400
 347
 348 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 349
 350         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 351         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 352         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 353         SPARC_OPCODE_ARCH_V9M.
 354
 355 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 356
 357         * opcode/msp430-decode.h (MSP430_Size): Remove.
 358         (Msp430_Opcode_Decoded): Change type of size to int.
 359
 360 2016-06-11  Alan Modra  <amodra@gmail.com>
 361
 362         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 363
 364 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 365
 366         * opcode/sparc.h: Add missing documentation for hyperprivileged
 367         registers in rd (%) and rs1 ($).
 368
 369 2016-06-07  Alan Modra  <amodra@gmail.com>
 370
 371         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 372         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 373         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 374         PPC_APUINFO_VLE: Define.
 375
 376 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 377
 378         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 379         entries.
 380         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 381
 382 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 383
 384         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 385         (struct arc_long_opcode): New structure.
 386         (arc_long_opcodes): Declare.
 387         (arc_num_long_opcodes): Declare.
 388
 389 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 390
 391         * elf/mips.h: Add extern "C".
 392         * elf/sh.h: Likewise.
 393         * opcode/d10v.h: Likewise.
 394         * opcode/d30v.h: Likewise.
 395         * opcode/ia64.h: Likewise.
 396         * opcode/mips.h: Likewise.
 397         * opcode/ppc.h: Likewise.
 398         * opcode/sparc.h: Likewise.
 399         * opcode/tic6x.h: Likewise.
 400         * opcode/v850.h: Likewise.
 401
 402 2016-05-28  Alan Modra  <amodra@gmail.com>
 403
 404         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 405         Return void from multiple_definition, multiple_common,
 406         add_to_set, constructor, warning, undefined_symbol,
 407         reloc_overflow, reloc_dangerous and unattached_reloc.
 408
 409 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 410
 411         * opcode/metag.h: wrap declarations in extern "C".
 412
 413 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 414
 415         * opcode/arc.h (insn_subclass_t): Add COND.
 416         (flag_class_t): Add F_CLASS_EXTEND.
 417
 418 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 419
 420         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 421         insn_class.
 422         (struct arc_flag_class): Renamed attribute class to flag_class.
 423
 424 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 425
 426         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 427         plain symbol.
 428
 429 2016-04-29  Tom Tromey  <tom@tromey.com>
 430
 431         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 432         DW_LANG_Rust_old>: New constants.
 433
 434 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 435
 436         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 437         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 438         * opcode/mips.h (ASE_DSPR3): New macro.
 439
 440 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 441             Nick Clifton  <nickc@redhat.com>
 442
 443         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 444         enumerator.
 445         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 446         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 447         (ARM_SYM_BRANCH_TYPE): Replace by ...
 448         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 449         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 450         BFD_ASSERT is defined or not.
 451
 452 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 453
 454         * elf/arm.h (Tag_DSP_extension): Define.
 455
 456 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 457
 458         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 459
 460 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 461
 462         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 463         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 464         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 465         for the high core bits.
 466
 467 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 468
 469         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 470         (ARC_SYNTAX_NOP): Likewsie.
 471         (ARC_OP1_MUST_BE_IMM): Update defined value.
 472         (ARC_OP1_IMM_IMPLIED): Likewise.
 473         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 474
 475 2016-04-28  Nick Clifton  <nickc@redhat.com>
 476
 477         PR target/19722
 478         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 479
 480 2016-04-27  Alan Modra  <amodra@gmail.com>
 481
 482         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 483         undef.  Formatting.
 484
 485 2016-04-21  Nick Clifton  <nickc@redhat.com>
 486
 487         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 488
 489 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 490
 491         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 492
 493 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 494
 495         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 496
 497 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 498
 499         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 500
 501 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 502
 503         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 504
 505 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 506
 507         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 508         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 509
 510 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 511
 512         * opcode/arc.h (flag_class_t): Update.
 513         (ARC_OPCODE_NONE): Define.
 514         (ARC_OPCODE_ARCALL): Likewise.
 515         (ARC_OPCODE_ARCFPX): Likewise.
 516         (ARC_REGISTER_READONLY): Likewise.
 517         (ARC_REGISTER_WRITEONLY): Likewise.
 518         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 519         (arc_aux_reg): Add cpu.
 520
 521 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 522
 523         * opcode/arc.h (arc_num_opcodes): Remove.
 524         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 525         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 526         (ARC_SUFFIX_FLAG): Define.
 527         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 528         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 529         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 530         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 531         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 532         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 533         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 534         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 535         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 536         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 537
 538 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 539
 540         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 541         (ARC_FPUDA): Define.
 542         (arc_aux_reg): Add new field.
 543
 544 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 545
 546         * opcode/arc-func.h (replace_bits24): Changed.
 547         (replace_bits24_be): Created.
 548
 549 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 550
 551         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 552         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 553         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 554         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 555         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 556         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 557         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 558         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 559         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 560         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 561         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 562         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 563         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 564         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 565
 566 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 567
 568         * opcode/i960.h: Add const qualifiers.
 569         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 570
 571 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 572
 573         * opcodes/arc.h (insn_class_t): Add BITOP type.
 574
 575 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 576
 577         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 578         new classes instead.
 579
 580 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 581
 582         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 583         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 584
 585 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 586
 587         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 588
 589 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 590
 591         * elf/arc.h (EF_ARC_MACH): Delete.
 592         (EF_ARC_MACH_MSK): Remove out of date comment.
 593
 594 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 595
 596         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 597
 598 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 599
 600         PR ld/19807
 601         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 602
 603 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 604             Andrew Burgess  <andrew.burgess@embecosm.com>
 605
 606         * elf/arc-reloc.def: Add a call to ME within the formula for each
 607         relocation that requires middle-endian correction.
 608
 609 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 610
 611         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 612         * opcode/h8300.h (struct h8_opcode): Likewise.
 613         * opcode/hppa.h (struct pa_opcode): Likewise.
 614         * opcode/msp430.h: Likewise.
 615         * opcode/spu.h (struct spu_opcode): Likewise.
 616         * opcode/tic30.h (struct _register): Likewise.
 617         * opcode/tic4x.h (struct tic4x_register): Likewise.
 618         (struct tic4x_cond): Likewise.
 619         (struct tic4x_indirect): Likewise.
 620         (struct tic4x_inst): Likewise.
 621         * opcode/visium.h (struct reg_entry): Likewise.
 622
 623 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 624
 625         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 626         (ARM_CPU_HAS_FEATURE): Add comment.
 627
 628 2016-03-03  Than McIntosh <thanm@google.com>
 629
 630         * plugin-api.h: Add new hooks to the plugin transfer vector to
 631         to support querying section alignment and section size.
 632         (ld_plugin_get_input_section_alignment): New hook.
 633         (ld_plugin_get_input_section_size): New hook.
 634         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 635         and LDPT_GET_INPUT_SECTION_SIZE.
 636         (ld_plugin_tv): Add tv_get_input_section_alignment and
 637         tv_get_input_section_size.
 638
 639 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 640
 641         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 642
 643 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 644
 645         PR ld/19645
 646         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 647         (bfd_link_info): Add elf_stt_common.
 648
 649 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         PR ld/19636
 652         PR ld/19704
 653         PR ld/19719
 654         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 655
 656 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 657             Jiong Wang  <jiong.wang@arm.com>
 658
 659         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 660
 661 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 662             Janek van Oirschot  <jvanoirs@synopsys.com>
 663
 664         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 665         (arc_num_relax_opcodes): Declare.
 666
 667 2016-02-09  Nick Clifton  <nickc@redhat.com>
 668
 669         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 670         * opcode/nds32.h (nds32_r45map): Likewise.
 671         (nds32_r54map): Likewise.
 672         * opcode/visium.h (gen_reg_table): Likewise.
 673         (fp_reg_table, cc_table, opcode_table): Likewise.
 674
 675 2016-02-09  Alan Modra  <amodra@gmail.com>
 676
 677         PR 16583
 678         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 679
 680 2016-02-04  Nick Clifton  <nickc@redhat.com>
 681
 682         PR target/19561
 683         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 684         (RRUX): Synthesise using case 2 rather than 7.
 685
 686 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 687
 688         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 689         (NT_FREEBSD_PROCSTAT_PROC): Define.
 690         (NT_FREEBSD_PROCSTAT_FILES): Define.
 691         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 692         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 693         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 694         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 695         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 696         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 697         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 698
 699 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 700             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 701
 702         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 703         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 704         (ARC_TLS_LE_32): Fixed formula.
 705         (ARC_TLS_GD_LD): Use new special function.
 706         * opcode/arc-func.h: Changed all the replacement
 707         functions to clear the patching bits before doing an or it with the value
 708         argument.
 709
 710 2016-01-18  Nick Clifton  <nickc@redhat.com>
 711
 712         PR ld/19440
 713         * coff/internal.h (internal_syment): Use int to hold section
 714         number.
 715         (N_UNDEF): Cast to int not short.
 716         (N_ABS): Likewise.
 717         (N_DEBUG): Likewise.
 718         (N_TV): Likewise.
 719         (P_TV): Likewise.
 720
 721 2016-01-11  Nick Clifton  <nickc@redhat.com>
 722
 723         Import this change from GCC mainline:
 724
 725         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 726
 727         * longlong.h: Change !__SHMEDIA__ to
 728         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 729         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 730
 731 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 732
 733         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 734
 735 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 736
 737         * libiberty.h (dupargv): Change arg to char * const *.
 738         (writeargv, countargv): Likewise.
 739
 740 2016-01-01  Alan Modra  <amodra@gmail.com>
 741
 742         Update year range in copyright notice of all files.
 743
 744 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 745 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 746 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 747 som/ChangeLog-1015, and vms/ChangeLog-1015
 748 \f
 749 Copyright (C) 2016 Free Software Foundation, Inc.
 750
 751 Copying and distribution of this file, with or without modification,
 752 are permitted in any medium without royalty provided the copyright
 753 notice and this notice are preserved.
 754
 755 Local Variables:
 756 mode: change-log
 757 left-margin: 8
 758 fill-column: 74
 759 version-control: never
 760 End: