include/ChangeLog

   1 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * elf/bpf.h: New file.
   4
   5 2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
   6
   7         * elf/arm.h (Tag_MVE_arch): Define new enum value.
   8         * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
   9
  10 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  11
  12         * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
  13         operand.
  14
  15 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  16
  17         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
  18         iclass.
  19
  20 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  21
  22         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
  23
  24 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  25
  26         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
  27         iclass.
  28
  29 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  30
  31         * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
  32         operand.
  33         (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
  34
  35 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  36
  37         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
  38
  39 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  40
  41         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
  42
  43 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  44
  45         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
  46
  47 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  48
  49         * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
  50
  51 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  52
  53         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
  54
  55 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  56
  57         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
  58
  59 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  60
  61         * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
  62
  63 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  64
  65         * opcode/aarch64.h (AARCH64_FEATURE_SVE2
  66         AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
  67         AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
  68         feature macros.
  69
  70 2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
  71             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  72
  73         * opcode/mips.h (ASE_EVA_R6): New macro.
  74         (M_LLWPE_AB, M_SCWPE_AB): New enum values.
  75
  76 2019-05-01  Sudakshina Das  <sudi.das@arm.com>
  77
  78         * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
  79         (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
  80
  81 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
  82             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  83
  84         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
  85         (M_SCWP_AB, M_SCDP_AB): Likewise.
  86
  87 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
  88
  89         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
  90
  91 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  92
  93         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
  94
  95 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  96
  97         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
  98
  99 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 100
 101         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
 102
 103 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 104
 105         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
 106         (MAX_TAG_CPU_ARCH): Set value to above macro.
 107         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
 108         (ARM_AEXT_V8_1M_MAIN): Likewise.
 109         (ARM_AEXT2_V8_1M_MAIN): Likewise.
 110         (ARM_ARCH_V8_1M_MAIN): Likewise.
 111
 112 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
 113
 114         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
 115
 116 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
 117
 118         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
 119
 120 2019-04-07  Alan Modra  <amodra@gmail.com>
 121
 122         Merge from gcc.
 123         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
 124         PR89877
 125         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
 126         (sub_ddmmss): Likewise.
 127
 128 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
 129
 130         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
 131
 132 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 133
 134         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
 135         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
 136         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
 137         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
 138         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
 139         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
 140         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
 141         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
 142
 143 2019-03-28  Alan Modra  <amodra@gmail.com>
 144
 145         PR 24390
 146         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 147
 148 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 149
 150         * dis-asm.h (struct disassemble_info): Add stop_offset.
 151
 152 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 153
 154         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 155
 156 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 157             Szabolcs Nagy  <szabolcs.nagy@arm.com>
 158
 159         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 160
 161 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 162
 163         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
 164         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
 165         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 166
 167 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 168
 169         * elf/common.h (NT_ARM_PAC_MASK): Add define.
 170
 171 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 172
 173         * mach-o/loader.h: Use new OS names in comments.
 174
 175 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 176
 177         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
 178         (splay_tree_delete_value_fn): Likewise.
 179
 180 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 181
 182         * opcode/s390.h (enum s390_opcode_cpu_val): Add
 183         S390_OPCODE_ARCH13.
 184
 185 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 186             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 187
 188         * opcode/aarch64.h (enum aarch64_opnd): Remove
 189         AARCH64_OPND_ADDR_SIMPLE_2.
 190         (enum aarch64_insn_class): Remove ldstgv_indexed.
 191
 192 2019-01-22  Tom Tromey  <tom@tromey.com>
 193
 194         * coff/ecoff.h: Include coff/sym.h.
 195
 196 2018-06-24  Nick Clifton  <nickc@redhat.com>
 197
 198         2.32 branch created.
 199
 200 2019-01-16  Kito Cheng  <kito@andestech.com>
 201
 202         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
 203         (Tag_RISCV_arch): Likewise.
 204         (Tag_RISCV_priv_spec): Likewise.
 205         (Tag_RISCV_priv_spec_minor): Likewise.
 206         (Tag_RISCV_priv_spec_revision): Likewise.
 207         (Tag_RISCV_unaligned_access): Likewise.
 208         (Tag_RISCV_stack_align): Likewise.
 209
 210 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 211
 212         * dis-asm.h: include <string.h>
 213
 214 2019-01-10  Nick Clifton  <nickc@redhat.com>
 215
 216         * Merge from GCC:
 217         2018-12-22  Jason Merrill  <jason@redhat.com>
 218
 219         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
 220         ARM, HP, and EDG demangling styles.
 221
 222 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 223
 224         Merge from GCC:
 225         PR other/16615
 226
 227         * libiberty.h: Mechanically replace "can not" with "cannot".
 228         * plugin-api.h: Likewise.
 229
 230 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 231
 232         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
 233         (E_FLAG_RX_V3): New RXv3 type.
 234         * opcode/rx.h (RX_Size): Add double size.
 235         (RX_Operand_Type): Add double FPU registers.
 236         (RX_Opcode_ID): Add new instuctions.
 237
 238 2019-01-01  Alan Modra  <amodra@gmail.com>
 239
 240         Update year range in copyright notice of all files.
 241
 242 For older changes see ChangeLog-2018
 243 \f
 244 Copyright (C) 2019 Free Software Foundation, Inc.
 245
 246 Copying and distribution of this file, with or without modification,
 247 are permitted in any medium without royalty provided the copyright
 248 notice and this notice are preserved.
 249
 250 Local Variables:
 251 mode: change-log
 252 left-margin: 8
 253 fill-column: 74
 254 version-control: never
 255 End: