include/ChangeLog

   1 2018-12-07  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * bfdlink.h (bfd_link_info): Add has_map_file.
   4
   5 2018-12-07  Nick Clifton  <nickc@redhat.com>
   6
   7         * demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
   8         (DEMANGLE_RECURSION_LIMIT): Define
   9
  10 2018-12-06  Alan Modra  <amodra@gmail.com>
  11
  12         * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
  13
  14 2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
  15
  16         * dis-asm.h (riscv_symbol_is_valid): Declare.
  17         * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
  18         (RISCV_FAKE_LABEL_CHAR): Define.
  19
  20 2018-12-03  Kito Cheng  <kito@andestech.com>
  21
  22         * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
  23         unsigned.
  24
  25 2018-11-27  Jim Wilson  <jimw@sifive.com>
  26
  27         * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
  28         (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
  29
  30 2018-11-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  31
  32         * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
  33         (ARM_ARCH_V6M_ONLY): Remove.
  34         (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
  35         ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
  36         ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
  37         ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
  38         ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
  39         ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
  40         ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
  41         ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
  42         ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
  43         ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
  44         ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
  45         ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
  46         FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
  47         FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
  48         FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
  49         FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
  50         FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
  51         FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
  52         ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
  53         ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
  54         ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
  55         ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
  56         ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
  57         ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
  58         ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
  59         ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
  60         ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
  61         ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
  62         ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
  63         ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
  64         ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
  65         FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
  66         FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
  67         FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
  68         FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
  69         FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
  70         FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
  71         FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
  72         FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
  73         FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
  74         FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
  75         FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
  76         FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
  77         FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
  78         ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
  79         ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
  80         ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
  81         ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
  82         ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
  83         ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
  84         ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
  85         ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
  86         ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
  87         ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
  88
  89 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  90
  91         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
  92         (aarch64_insn_class): Add ldstgv_indexed.
  93
  94 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
  95
  96         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
  97         and AARCH64_OPND_ADDR_SIMM13.
  98         (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
  99
 100 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 101
 102         * opcode/aarch64.h (aarch64_opnd): Add
 103         AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
 104
 105 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 106
 107         * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
 108
 109 2018-11-07  Roman Bolshakov <r.bolshakov@yadro.com>
 110             Saagar Jha  <saagar@saagarjha.com>
 111
 112         * mach-o/external.h (mach_o_nversion_min_command_external): Rename
 113         reserved to sdk.
 114         (mach_o_note_command_external): New.
 115         (mach_o_build_version_command_external): New.
 116         * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
 117         (BFD_MACH_O_LC_NOTE): Define.
 118
 119 2018-11-06  Romain Margheriti  <lilrom13@gmail.com>
 120
 121         PR 23742
 122         * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
 123
 124 2018-11-06  Sudakshina Das  <sudi.das@arm.com>
 125
 126         * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
 127         ARM_EXT2_SB to ...
 128         (ARM_AEXT2_V8_5A): Here.
 129
 130 2018-10-26  John Baldwin  <jhb@FreeBSD.org>
 131
 132         * elf/common.h (AT_FREEBSD_HWCAP2): Define.
 133
 134 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 135
 136         * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
 137         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
 138
 139 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 140
 141         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
 142         (AARCH64_FEATURE_ID_PFR2): New.
 143         (AARCH64_ARCH_V8_5): Add both by default.
 144
 145 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 146
 147         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
 148         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
 149         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
 150         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
 151         define HINT #imm values.
 152         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
 153
 154 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 155
 156         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
 157
 158 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 159
 160         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
 161
 162 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 163
 164         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
 165         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
 166         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
 167         (aarch64_sys_regs_sr): Declare new table.
 168
 169 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 170
 171         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
 172         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
 173
 174 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 175
 176         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
 177         (AARCH64_FEATURE_FRINTTS): New.
 178         (AARCH64_ARCH_V8_5): Add both by default.
 179
 180 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 181
 182         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
 183         (AARCH64_ARCH_V8_5): New.
 184
 185 2018-10-08  Alan Modra  <amodra@gmail.com>
 186
 187         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
 188
 189 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 190
 191         * opcode/arm.h (ARM_EXT2_PREDRES): New.
 192         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
 193
 194 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 195
 196         * opcode/arm.h (ARM_EXT2_SB): New.
 197         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
 198
 199 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 200
 201         * opcode/arm.h (ARM_EXT2_V8_5A): New.
 202         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 203
 204 2018-10-05  Richard Henderson  <rth@twiddle.net>
 205
 206         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
 207         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
 208         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
 209         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
 210         R_OR1K_SLO13, R_OR1K_PLTA26.
 211
 212 2018-10-05  Richard Henderson  <rth@twiddle.net>
 213
 214         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
 215         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
 216         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
 217
 218 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 219
 220         * opcode/aarch64.h (aarch64_inst): Remove.
 221         (enum err_type): Add ERR_VFI.
 222         (aarch64_is_destructive_by_operands): New.
 223         (init_insn_sequence): New.
 224         (aarch64_decode_insn): Remove param name.
 225
 226 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 227
 228         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
 229         more arguments.
 230
 231 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 232
 233         * opcode/aarch64.h (enum err_type): New.
 234         (aarch64_decode_insn): Use it.
 235
 236 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 237
 238         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 239         (aarch64_opcode_encode): Use it.
 240
 241 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 242
 243         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 244         extend flags field size.
 245         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 246
 247 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 248
 249         * dis-asm.h (print_insn_s12z): New declaration.
 250
 251 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 252
 253         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 254         (MASK_FENCE_TSO): Likewise.
 255
 256 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 257
 258         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 259
 260 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 261
 262         PR binutils/23694
 263         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 264         include zero size sections at start of PT_NOTE segment.
 265
 266 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 267
 268         * elf/nds32.h: Remove the unused target features.
 269         * dis-asm.h (disassemble_init_nds32): Declared.
 270         * elf/nds32.h (E_NDS32_NULL): Removed.
 271         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 272         * opcode/nds32.h: Ident.
 273         (N32_SUB6, INSN_LW): New macros.
 274         (enum n32_opcodes): Updated.
 275         * elf/nds32.h: Doc fixes.
 276         * elf/nds32.h: Add R_NDS32_LSI.
 277         * elf/nds32.h: Add new relocations for TLS.
 278
 279 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 280
 281         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 282         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 283         compatibility.
 284         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 285         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 286
 287 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 288
 289         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 290
 291 2018-08-31  Alan Modra  <amodra@gmail.com>
 292
 293         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 294         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 295         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 296         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 297
 298 2018-08-30  Kito Cheng  <kito@andestech.com>
 299
 300         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 301         (riscv_opcode): Add xlen_requirement field and change type of
 302         subset.
 303
 304 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 305
 306         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 307         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 308
 309 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 310
 311         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 312         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 313
 314 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 315
 316         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 317         E_MIPS_MACH_GS464.
 318         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 319         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 320         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 321         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 322
 323 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 324
 325         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 326         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 327         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 328
 329 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 330
 331          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 332          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 333          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 334
 335 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 336
 337         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 338         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 339         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 340
 341 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 342
 343         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 344         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 345         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 346         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 347         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 348         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 349         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 350         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 351         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 352         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 353         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 354         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 355         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 356         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 357         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 358         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 359         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 360         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 361         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 362         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 363         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 364         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 365         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 366         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 367         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 368         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 369         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 370         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 371         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 372         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 373         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 374         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 375         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 376         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 377         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 378         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 379         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 380         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 381         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 382         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 383         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 384         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 385         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 386         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 387         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 388         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 389         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 390         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 391         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 392         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 393         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 394         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 395         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 396         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 397         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 398         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 399
 400 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 401
 402         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 403
 404 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 405
 406         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 407
 408 2018-08-21  Alan Modra  <amodra@gmail.com>
 409
 410         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 411         Mention use of "extract" function to provide default value.
 412         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 413         (ppc_optional_operand_value): Rewrite to use extract function.
 414
 415 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 416
 417         * opcode/s12z.h: New file.
 418
 419 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 420
 421         * elf/arm.h: Updated comments for e_flags definitions.
 422
 423 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 424
 425         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 426
 427 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 428
 429         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 430
 431 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 432
 433         Copy over from GCC
 434         2018-07-26  Martin Liska  <mliska@suse.cz>
 435
 436         PR lto/86548
 437         * libiberty.h (make_temp_file_with_prefix): New function.
 438
 439 2018-07-30  Jim Wilson  <jimw@sifive.com>
 440
 441         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 442         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 443         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 444
 445 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 446
 447         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 448         * elf/csky.h: New file.
 449
 450 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 451             Maciej W. Rozycki  <macro@linux-mips.org>
 452
 453         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 454
 455 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 456
 457         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 458
 459 2018-07-26  Alan Modra  <amodra@gmail.com>
 460
 461         * elf/ppc64.h: Specify byte offset to local entry for values
 462         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 463         value for such functions when entering via global entry point.
 464         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 465
 466 2018-07-24  Alan Modra  <amodra@gmail.com>
 467
 468         PR 23430
 469         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 470
 471 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 472             Maciej W. Rozycki  <macro@mips.com>
 473
 474         * elf/mips.h (AFL_ASE_MMI): New macro.
 475         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 476         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 477
 478 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 479
 480         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 481
 482 2018-07-06  Alan Modra  <amodra@gmail.com>
 483
 484         * diagnostics.h: Comment on macro usage.
 485
 486 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 487
 488         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 489         Define for clang.
 490
 491 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 492
 493         PR tdep/8282
 494         * dis-asm.h (disasm_option_arg_t): New typedef.
 495         (disasm_options_and_args_t): Likewise.
 496         (disasm_options_t): Add `arg' member, document members.
 497         (disassembler_options_mips): New prototype.
 498         (disassembler_options_arm, disassembler_options_powerpc)
 499         (disassembler_options_s390): Update prototypes.
 500
 501 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 502
 503         PR binutils/23192
 504         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 505
 506 2018-06-26  Alan Modra  <amodra@gmail.com>
 507
 508         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 509
 510 2018-06-24  Nick Clifton  <nickc@redhat.com>
 511
 512         2.31 branch created.
 513
 514 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 515
 516         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 517         for non SHT_NOBITS.
 518
 519 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 520
 521         Sync with GCC
 522
 523         2018-05-24  Tom Rix  <trix@juniper.net>
 524
 525         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 526
 527         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 528
 529         * longlong.h [__riscv] (__umulsidi3): Define.
 530         [__riscv] (umul_ppmm): Likewise.
 531         [__riscv] (__muluw3): Likewise.
 532
 533 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 534
 535         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 536         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 537         * opcode/mips.h: Document "+\" operand format.
 538         (ASE_GINV): New macro.
 539
 540 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 541             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 542
 543         * elf/mips.h (AFL_ASE_CRC): New macro.
 544         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 545         * opcode/mips.h (ASE_CRC): New macro.
 546         * opcode/mips.h (ASE_CRC64): Likewise.
 547
 548 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 549
 550         * elf/xtensa.h (xtensa_read_table_entries)
 551         (xtensa_compute_fill_extra_space): New declarations.
 552
 553 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 554
 555         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 556         define for GCC.
 557
 558 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 561         (DIAGNOSTIC_STRINGIFY): Likewise.
 562         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 563         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 564         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 565         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 566         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 567         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 568
 569 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 572
 573 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 574
 575         * splay-tree.h (splay_tree_compare_strings,
 576         splay_tree_delete_pointers): Declare new utility functions.
 577
 578 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 579
 580         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 581
 582 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 583
 584         * elf/riscv.h (EF_RISCV_RVE): New define.
 585
 586 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 587
 588         * elf/s12z.h: New header.
 589
 590 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 591
 592         PR binutils/21446
 593         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 594
 595 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 596
 597         PR binutils/21446
 598         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 599         (aarch64_print_operand): Support notes.
 600
 601 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 602
 603         PR binutils/21446
 604         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 605         (aarch64_decode_insn): Accept error struct.
 606
 607 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 608
 609         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 610
 611 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 612
 613         * elf/common.h (EM_S12Z): New macro.
 614
 615 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 616
 617         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 618         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 619         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 620         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 621
 622 2018-05-08  Jim Wilson  <jimw@sifive.com>
 623
 624         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 625         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 626         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 627
 628 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 629
 630         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 631         (vle_num_opcodes): Likewise.
 632         (spe2_num_opcodes): Likewise.
 633
 634 2018-05-04  Alan Modra  <amodra@gmail.com>
 635
 636         * ansidecl.h: Import from gcc.
 637         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 638         to s_name.
 639         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 640
 641 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 642
 643         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 644         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 645         Generic System V Application Binary Interface.
 646         * elf/nfp.h: New, for NFP support.
 647         * opcode/nfp.h: New, for NFP support.
 648
 649 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 650         Mickaël Guêné  <mickael.guene@st.com>
 651
 652         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 653         R_ARM_TLS_IE32_FDPIC.
 654
 655 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 656         Mickaël Guêné  <mickael.guene@st.com>
 657
 658         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 659         (R_ARM_FUNCDESC)
 660         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 661
 662 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 663         Mickaël Guêné  <mickael.guene@st.com>
 664
 665         * elf/arm.h (EF_ARM_FDPIC): New.
 666
 667 2018-04-18  Alan Modra  <amodra@gmail.com>
 668
 669         * coff/mipspe.h: Delete.
 670
 671 2018-04-18  Alan Modra  <amodra@gmail.com>
 672
 673         * aout/dynix3.h: Delete.
 674
 675 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 676
 677         Microblaze Target: PIC data text relative
 678
 679         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 680         * elf/microblaze.h (Add 3 new relocations):
 681         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 682         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 683
 684 2018-04-17  Alan Modra  <amodra@gmail.com>
 685
 686         * elf/i370.h: Revert removal.
 687         * elf/i860.h: Likewise.
 688         * elf/i960.h: Likewise.
 689
 690 2018-04-16  Alan Modra  <amodra@gmail.com>
 691
 692         * coff/sparc.h: Delete.
 693
 694 2018-04-16  Alan Modra  <amodra@gmail.com>
 695
 696         * aout/host.h: Remove m68k-aout and m68k-coff support.
 697         * aout/hp300hpux.h: Delete.
 698         * coff/apollo.h: Delete.
 699         * coff/aux-coff.h: Delete.
 700         * coff/m68k.h: Delete.
 701
 702 2018-04-16  Alan Modra  <amodra@gmail.com>
 703
 704         * dis-asm.h: Remove sh5 and sh64 support.
 705
 706 2018-04-16  Alan Modra  <amodra@gmail.com>
 707
 708         * coff/internal.h: Remove w65 support.
 709         * coff/w65.h: Delete.
 710
 711 2018-04-16  Alan Modra  <amodra@gmail.com>
 712
 713         * coff/we32k.h: Delete.
 714
 715 2018-04-16  Alan Modra  <amodra@gmail.com>
 716
 717         * coff/internal.h: Remove m88k support.
 718         * coff/m88k.h: Delete.
 719         * opcode/m88k.h: Delete.
 720
 721 2018-04-16  Alan Modra  <amodra@gmail.com>
 722
 723         * elf/i370.h: Delete.
 724         * opcode/i370.h: Delete.
 725
 726 2018-04-16  Alan Modra  <amodra@gmail.com>
 727
 728         * coff/h8500.h: Delete.
 729         * coff/internal.h: Remove h8500 support.
 730
 731 2018-04-16  Alan Modra  <amodra@gmail.com>
 732
 733         * coff/h8300.h: Delete.
 734
 735 2018-04-16  Alan Modra  <amodra@gmail.com>
 736
 737         * ieee.h: Delete.
 738
 739 2018-04-16  Alan Modra  <amodra@gmail.com>
 740
 741         * aout/host.h: Remove newsos3 support.
 742
 743 2018-04-16  Alan Modra  <amodra@gmail.com>
 744
 745         * nlm/ChangeLog-9315: Delete.
 746         * nlm/alpha-ext.h: Delete.
 747         * nlm/common.h: Delete.
 748         * nlm/external.h: Delete.
 749         * nlm/i386-ext.h: Delete.
 750         * nlm/internal.h: Delete.
 751         * nlm/ppc-ext.h: Delete.
 752         * nlm/sparc32-ext.h: Delete.
 753
 754 2018-04-16  Alan Modra  <amodra@gmail.com>
 755
 756         * opcode/tahoe.h: Delete.
 757
 758 2018-04-11  Alan Modra  <amodra@gmail.com>
 759
 760         * aout/adobe.h: Delete.
 761         * aout/reloc.h: Delete.
 762         * coff/i860.h: Delete.
 763         * coff/i960.h: Delete.
 764         * elf/i860.h: Delete.
 765         * elf/i960.h: Delete.
 766         * opcode/i860.h: Delete.
 767         * opcode/i960.h: Delete.
 768         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 769         * aout/ar.h (ARMAGB): Remove.
 770         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 771         union internal_auxent): Remove i960 support.
 772
 773 2018-04-09  Alan Modra  <amodra@gmail.com>
 774
 775         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 776         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 777
 778 2018-03-28  Renlin Li  <renlin.li@arm.com>
 779
 780         PR ld/22970
 781         * elf/aarch64.h: Add relocation number for
 782         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 783         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 784         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 785         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 786         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 787         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 788         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 789         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 790
 791 2018-03-28  Nick Clifton  <nickc@redhat.com>
 792
 793         PR 22988
 794         * opcode/aarch64.h (enum aarch64_opnd): Add
 795         AARCH64_OPND_SVE_ADDR_R.
 796
 797 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 798
 799         * elf/common.h (DF_1_KMOD): New.
 800         (DF_1_WEAKFILTER): Likewise.
 801         (DF_1_NOCOMMON): Likewise.
 802
 803 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 804
 805         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 806         (OP_SH_FUNCT3): Likewise.
 807         (OP_MASK_FUNCT7): Likewise.
 808         (OP_SH_FUNCT7): Likewise.
 809         (OP_MASK_OP2): Likewise.
 810         (OP_SH_OP2): Likewise.
 811         (OP_MASK_CFUNCT4): Likewise.
 812         (OP_SH_CFUNCT4): Likewise.
 813         (OP_MASK_CFUNCT3): Likewise.
 814         (OP_SH_CFUNCT3): Likewise.
 815         (riscv_insn_types): Likewise.
 816
 817 2018-03-13  Nick Clifton  <nickc@redhat.com>
 818
 819         PR 22113
 820         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 821         field.
 822
 823 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * opcode/i386 (OLDGCC_COMPAT): Removed.
 826
 827 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 828
 829         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 830
 831 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 832
 833         * opcode/mips.h: Remove `M' operand code.
 834
 835 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 836
 837         * coff/msdos.h: New header.
 838         * coff/pe.h: Move common defines to msdos.h.
 839         * coff/powerpc.h: Likewise.
 840
 841 2018-01-13  Nick Clifton  <nickc@redhat.com>
 842
 843         2.30 branch created.
 844
 845 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 846
 847         PR ld/22393
 848         * bfdlink.h (bfd_link_info): Add separate_code.
 849
 850 2018-01-04  Jim Wilson  <jimw@sifive.com>
 851
 852         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 853         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 854         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 855         Add alias to map mbadaddr to CSR_MTVAL.
 856
 857 2018-01-03  Alan Modra  <amodra@gmail.com>
 858
 859         Update year range in copyright notice of all files.
 860
 861 For older changes see ChangeLog-2017
 862 \f
 863 Copyright (C) 2018 Free Software Foundation, Inc.
 864
 865 Copying and distribution of this file, with or without modification,
 866 are permitted in any medium without royalty provided the copyright
 867 notice and this notice are preserved.
 868
 869 Local Variables:
 870 mode: change-log
 871 left-margin: 8
 872 fill-column: 74
 873 version-control: never
 874 End: