[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM_BF16
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2019-04-15 Sudakshina Das <sudi.das@arm.com>
2
3 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
4
5 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
6
7 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
8 (MAX_TAG_CPU_ARCH): Set value to above macro.
9 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
10 (ARM_AEXT_V8_1M_MAIN): Likewise.
11 (ARM_AEXT2_V8_1M_MAIN): Likewise.
12 (ARM_ARCH_V8_1M_MAIN): Likewise.
13
14 2019-04-11 Sudakshina Das <sudi.das@arm.com>
15
16 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
17
18 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
19
20 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
21
22 2019-04-07 Alan Modra <amodra@gmail.com>
23
24 Merge from gcc.
25 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
26 PR89877
27 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
28 (sub_ddmmss): Likewise.
29
30 2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
31
32 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
33
34 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
35
36 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
37 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
38 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
39 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
40 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
41 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
42 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
43 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
44
45 2019-03-28 Alan Modra <amodra@gmail.com>
46
47 PR 24390
48 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
49
50 2019-03-25 Tamar Christina <tamar.christina@arm.com>
51
52 * dis-asm.h (struct disassemble_info): Add stop_offset.
53
54 2019-03-13 Sudakshina Das <sudi.das@arm.com>
55
56 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
57
58 2019-03-13 Sudakshina Das <sudi.das@arm.com>
59 Szabolcs Nagy <szabolcs.nagy@arm.com>
60
61 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
62
63 2019-03-13 Sudakshina Das <sudi.das@arm.com>
64
65 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
66 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
67 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
68
69 2019-02-20 Alan Hayward <alan.hayward@arm.com>
70
71 * elf/common.h (NT_ARM_PAC_MASK): Add define.
72
73 2019-02-15 Saagar Jha <saagar@saagarjha.com>
74
75 * mach-o/loader.h: Use new OS names in comments.
76
77 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
78
79 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
80 (splay_tree_delete_value_fn): Likewise.
81
82 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
83
84 * opcode/s390.h (enum s390_opcode_cpu_val): Add
85 S390_OPCODE_ARCH13.
86
87 2019-01-25 Sudakshina Das <sudi.das@arm.com>
88 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
89
90 * opcode/aarch64.h (enum aarch64_opnd): Remove
91 AARCH64_OPND_ADDR_SIMPLE_2.
92 (enum aarch64_insn_class): Remove ldstgv_indexed.
93
94 2019-01-22 Tom Tromey <tom@tromey.com>
95
96 * coff/ecoff.h: Include coff/sym.h.
97
98 2018-06-24 Nick Clifton <nickc@redhat.com>
99
100 2.32 branch created.
101
102 2019-01-16 Kito Cheng <kito@andestech.com>
103
104 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
105 (Tag_RISCV_arch): Likewise.
106 (Tag_RISCV_priv_spec): Likewise.
107 (Tag_RISCV_priv_spec_minor): Likewise.
108 (Tag_RISCV_priv_spec_revision): Likewise.
109 (Tag_RISCV_unaligned_access): Likewise.
110 (Tag_RISCV_stack_align): Likewise.
111
112 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
113
114 * dis-asm.h: include <string.h>
115
116 2019-01-10 Nick Clifton <nickc@redhat.com>
117
118 * Merge from GCC:
119 2018-12-22 Jason Merrill <jason@redhat.com>
120
121 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
122 ARM, HP, and EDG demangling styles.
123
124 2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
125
126 Merge from GCC:
127 PR other/16615
128
129 * libiberty.h: Mechanically replace "can not" with "cannot".
130 * plugin-api.h: Likewise.
131
132 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
133
134 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
135 (E_FLAG_RX_V3): New RXv3 type.
136 * opcode/rx.h (RX_Size): Add double size.
137 (RX_Operand_Type): Add double FPU registers.
138 (RX_Opcode_ID): Add new instuctions.
139
140 2019-01-01 Alan Modra <amodra@gmail.com>
141
142 Update year range in copyright notice of all files.
143
144 For older changes see ChangeLog-2018
145 \f
146 Copyright (C) 2019 Free Software Foundation, Inc.
147
148 Copying and distribution of this file, with or without modification,
149 are permitted in any medium without royalty provided the copyright
150 notice and this notice are preserved.
151
152 Local Variables:
153 mode: change-log
154 left-margin: 8
155 fill-column: 74
156 version-control: never
157 End:
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