[AArch64][SVE 27/32] Add SVE integer immediate operands
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
2
3 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
4 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
5 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
6 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
7 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
8 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
9 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
10 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
11 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
12 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
13 (aarch64_sve_dupm_mov_immediate_p): Declare.
14
15 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
16
17 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
18 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
19 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
20 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
21 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
22
23 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
24
25 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
26 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
27 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
28 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
29 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
30 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
31 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
32 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
33 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
34 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
35 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
36 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
37 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
38 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
39 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
40 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
41 Likewise.
42
43 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
44
45 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
46 aarch64_opnd.
47 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
48 (aarch64_opnd_info): Make shifter.amount an int64_t and
49 rearrange the fields.
50
51 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
52
53 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
54 (AARCH64_OPND_SVE_PRFOP): Likewise.
55 (aarch64_sve_pattern_array): Declare.
56 (aarch64_sve_prfop_array): Likewise.
57
58 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
59
60 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
61 (AARCH64_OPND_QLF_P_M): Likewise.
62
63 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
64
65 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
66 aarch64_operand_class.
67 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
68 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
69 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
70 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
71 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
72 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
73 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
74 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
75
76 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
77
78 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
79 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
80
81 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
82
83 * opcode/aarch64.h (F_STRICT): New flag.
84
85 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
86
87 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
88
89 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
90 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
91 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
92 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
93 relocation.
94
95 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
96
97 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
98 (ARM_SET_SYM_CMSE_SPCL): Likewise.
99
100 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
101
102 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
103
104 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
105
106 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
107
108 2016-07-27 Graham Markall <graham.markall@embecosm.com>
109
110 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
111 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
112 ARC_NUM_ADDRTYPES.
113 * opcode/arc.h: Add BMU to insn_class_t enum.
114 * opcode/arc.h: Add PMU to insn_class_t enum.
115
116 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
117
118 * dis-asm.h: Declare print_arc_disassembler_options.
119
120 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
121
122 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
123 out_implib_bfd fields.
124
125 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
126
127 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
128
129 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
130
131 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
132 (SHF_ARM_PURECODE): ... this.
133
134 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
135
136 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
137 (AARCH64_CPU_HAS_ANY_FEATURES): New.
138 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
139 (AARCH64_OPCODE_HAS_FEATURE): Remove.
140
141 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
142
143 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
144 of enabled FPU features.
145
146 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
147
148 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
149 SPARC_OPCODE_ARCH_MAX into the enum.
150
151 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
152
153 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
154
155 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
156
157 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
158
159 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
160
161 * elf/xtensa.h (xtensa_make_property_section): New prototype.
162
163 2016-06-24 John Baldwin <jhb@FreeBSD.org>
164
165 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
166 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
167 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
168 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
169
170 2016-06-23 Graham Markall <graham.markall@embecosm.com>
171
172 * opcode/arc.h: Make insn_class_t alphabetical again.
173
174 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
175
176 * elf/dlx.h: Wrap in extern C.
177 * elf/xtensa.h: Likewise.
178 * opcode/arc.h: Likewise.
179
180 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
181
182 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
183 tilegx_pipeline.
184
185 2016-06-21 Graham Markall <graham.markall@embecosm.com>
186
187 * opcode/arc.h: Add nps400 extension and instruction
188 subclass.
189 Remove ARC_OPCODE_NPS400
190 * elf/arc.h: Remove E_ARC_MACH_NPS400
191
192 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
193
194 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
195 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
196 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
197 SPARC_OPCODE_ARCH_V9M.
198
199 2016-06-14 John Baldwin <jhb@FreeBSD.org>
200
201 * opcode/msp430-decode.h (MSP430_Size): Remove.
202 (Msp430_Opcode_Decoded): Change type of size to int.
203
204 2016-06-11 Alan Modra <amodra@gmail.com>
205
206 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
207
208 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
209
210 * opcode/sparc.h: Add missing documentation for hyperprivileged
211 registers in rd (%) and rs1 ($).
212
213 2016-06-07 Alan Modra <amodra@gmail.com>
214
215 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
216 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
217 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
218 PPC_APUINFO_VLE: Define.
219
220 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
221
222 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
223 entries.
224 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
225
226 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
227
228 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
229 (struct arc_long_opcode): New structure.
230 (arc_long_opcodes): Declare.
231 (arc_num_long_opcodes): Declare.
232
233 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
234
235 * elf/mips.h: Add extern "C".
236 * elf/sh.h: Likewise.
237 * opcode/d10v.h: Likewise.
238 * opcode/d30v.h: Likewise.
239 * opcode/ia64.h: Likewise.
240 * opcode/mips.h: Likewise.
241 * opcode/ppc.h: Likewise.
242 * opcode/sparc.h: Likewise.
243 * opcode/tic6x.h: Likewise.
244 * opcode/v850.h: Likewise.
245
246 2016-05-28 Alan Modra <amodra@gmail.com>
247
248 * bfdlink.h (struct bfd_link_callbacks): Update comments.
249 Return void from multiple_definition, multiple_common,
250 add_to_set, constructor, warning, undefined_symbol,
251 reloc_overflow, reloc_dangerous and unattached_reloc.
252
253 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
254
255 * opcode/metag.h: wrap declarations in extern "C".
256
257 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
258
259 * opcode/arc.h (insn_subclass_t): Add COND.
260 (flag_class_t): Add F_CLASS_EXTEND.
261
262 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
263
264 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
265 insn_class.
266 (struct arc_flag_class): Renamed attribute class to flag_class.
267
268 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
269
270 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
271 plain symbol.
272
273 2016-04-29 Tom Tromey <tom@tromey.com>
274
275 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
276 DW_LANG_Rust_old>: New constants.
277
278 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
279
280 * elf/mips.h (AFL_ASE_DSPR3): New macro.
281 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
282 * opcode/mips.h (ASE_DSPR3): New macro.
283
284 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
285 Nick Clifton <nickc@redhat.com>
286
287 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
288 enumerator.
289 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
290 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
291 (ARM_SYM_BRANCH_TYPE): Replace by ...
292 (ARM_GET_SYM_BRANCH_TYPE): This and ...
293 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
294 BFD_ASSERT is defined or not.
295
296 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
297
298 * elf/arm.h (Tag_DSP_extension): Define.
299
300 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
301
302 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
303
304 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
305
306 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
307 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
308 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
309 for the high core bits.
310
311 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
312
313 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
314 (ARC_SYNTAX_NOP): Likewsie.
315 (ARC_OP1_MUST_BE_IMM): Update defined value.
316 (ARC_OP1_IMM_IMPLIED): Likewise.
317 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
318
319 2016-04-28 Nick Clifton <nickc@redhat.com>
320
321 PR target/19722
322 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
323
324 2016-04-27 Alan Modra <amodra@gmail.com>
325
326 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
327 undef. Formatting.
328
329 2016-04-21 Nick Clifton <nickc@redhat.com>
330
331 * bfdlink.h: Add prototype for bfd_link_check_relocs.
332
333 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
334
335 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
336
337 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
338
339 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
340
341 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
342
343 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
344
345 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
346
347 * opcode/arc.h (insn_class_t): Add NET and ACL class.
348
349 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
350
351 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
352 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
353
354 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
355
356 * opcode/arc.h (flag_class_t): Update.
357 (ARC_OPCODE_NONE): Define.
358 (ARC_OPCODE_ARCALL): Likewise.
359 (ARC_OPCODE_ARCFPX): Likewise.
360 (ARC_REGISTER_READONLY): Likewise.
361 (ARC_REGISTER_WRITEONLY): Likewise.
362 (ARC_REGISTER_NOSHORT_CUT): Likewise.
363 (arc_aux_reg): Add cpu.
364
365 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
366
367 * opcode/arc.h (arc_num_opcodes): Remove.
368 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
369 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
370 (ARC_SUFFIX_FLAG): Define.
371 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
372 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
373 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
374 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
375 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
376 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
377 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
378 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
379 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
380 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
381
382 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
383
384 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
385 (ARC_FPUDA): Define.
386 (arc_aux_reg): Add new field.
387
388 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
389
390 * opcode/arc-func.h (replace_bits24): Changed.
391 (replace_bits24_be): Created.
392
393 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
394
395 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
396 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
397 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
398 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
399 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
400 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
401 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
402 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
403 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
404 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
405 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
406 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
407 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
408 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
409
410 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
411
412 * opcode/i960.h: Add const qualifiers.
413 * opcode/tic4x.h (struct tic4x_inst): Likewise.
414
415 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
416
417 * opcodes/arc.h (insn_class_t): Add BITOP type.
418
419 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
420
421 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
422 new classes instead.
423
424 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
425
426 * elf/arc.h (E_ARC_MACH_NPS400): Define.
427 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
428
429 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
430
431 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
432
433 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
434
435 * elf/arc.h (EF_ARC_MACH): Delete.
436 (EF_ARC_MACH_MSK): Remove out of date comment.
437
438 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
439
440 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
441
442 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
443
444 PR ld/19807
445 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
446
447 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
448 Andrew Burgess <andrew.burgess@embecosm.com>
449
450 * elf/arc-reloc.def: Add a call to ME within the formula for each
451 relocation that requires middle-endian correction.
452
453 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
454
455 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
456 * opcode/h8300.h (struct h8_opcode): Likewise.
457 * opcode/hppa.h (struct pa_opcode): Likewise.
458 * opcode/msp430.h: Likewise.
459 * opcode/spu.h (struct spu_opcode): Likewise.
460 * opcode/tic30.h (struct _register): Likewise.
461 * opcode/tic4x.h (struct tic4x_register): Likewise.
462 (struct tic4x_cond): Likewise.
463 (struct tic4x_indirect): Likewise.
464 (struct tic4x_inst): Likewise.
465 * opcode/visium.h (struct reg_entry): Likewise.
466
467 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
468
469 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
470 (ARM_CPU_HAS_FEATURE): Add comment.
471
472 2016-03-03 Than McIntosh <thanm@google.com>
473
474 * plugin-api.h: Add new hooks to the plugin transfer vector to
475 to support querying section alignment and section size.
476 (ld_plugin_get_input_section_alignment): New hook.
477 (ld_plugin_get_input_section_size): New hook.
478 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
479 and LDPT_GET_INPUT_SECTION_SIZE.
480 (ld_plugin_tv): Add tv_get_input_section_alignment and
481 tv_get_input_section_size.
482
483 2016-03-03 Evgenii Stepanov <eugenis@google.com>
484
485 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
486
487 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
488
489 PR ld/19645
490 * bfdlink.h (bfd_link_elf_stt_common): New enum.
491 (bfd_link_info): Add elf_stt_common.
492
493 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
494
495 PR ld/19636
496 PR ld/19704
497 PR ld/19719
498 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
499
500 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
501 Jiong Wang <jiong.wang@arm.com>
502
503 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
504
505 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
506 Janek van Oirschot <jvanoirs@synopsys.com>
507
508 * opcode/arc.h (arc_opcode arc_relax_opcodes)
509 (arc_num_relax_opcodes): Declare.
510
511 2016-02-09 Nick Clifton <nickc@redhat.com>
512
513 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
514 * opcode/nds32.h (nds32_r45map): Likewise.
515 (nds32_r54map): Likewise.
516 * opcode/visium.h (gen_reg_table): Likewise.
517 (fp_reg_table, cc_table, opcode_table): Likewise.
518
519 2016-02-09 Alan Modra <amodra@gmail.com>
520
521 PR 16583
522 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
523
524 2016-02-04 Nick Clifton <nickc@redhat.com>
525
526 PR target/19561
527 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
528 (RRUX): Synthesise using case 2 rather than 7.
529
530 2016-01-19 John Baldwin <jhb@FreeBSD.org>
531
532 * elf/common.h (NT_FREEBSD_THRMISC): Define.
533 (NT_FREEBSD_PROCSTAT_PROC): Define.
534 (NT_FREEBSD_PROCSTAT_FILES): Define.
535 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
536 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
537 (NT_FREEBSD_PROCSTAT_UMASK): Define.
538 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
539 (NT_FREEBSD_PROCSTAT_OSREL): Define.
540 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
541 (NT_FREEBSD_PROCSTAT_AUXV): Define.
542
543 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
544 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
545
546 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
547 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
548 (ARC_TLS_LE_32): Fixed formula.
549 (ARC_TLS_GD_LD): Use new special function.
550 * opcode/arc-func.h: Changed all the replacement
551 functions to clear the patching bits before doing an or it with the value
552 argument.
553
554 2016-01-18 Nick Clifton <nickc@redhat.com>
555
556 PR ld/19440
557 * coff/internal.h (internal_syment): Use int to hold section
558 number.
559 (N_UNDEF): Cast to int not short.
560 (N_ABS): Likewise.
561 (N_DEBUG): Likewise.
562 (N_TV): Likewise.
563 (P_TV): Likewise.
564
565 2016-01-11 Nick Clifton <nickc@redhat.com>
566
567 Import this change from GCC mainline:
568
569 2016-01-07 Mike Frysinger <vapier@gentoo.org>
570
571 * longlong.h: Change !__SHMEDIA__ to
572 (!defined (__SHMEDIA__) || !__SHMEDIA__).
573 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
574
575 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
576
577 * opcode/mips.h: Add a summary of MIPS16 operand codes.
578
579 2016-01-05 Mike Frysinger <vapier@gentoo.org>
580
581 * libiberty.h (dupargv): Change arg to char * const *.
582 (writeargv, countargv): Likewise.
583
584 2016-01-01 Alan Modra <amodra@gmail.com>
585
586 Update year range in copyright notice of all files.
587
588 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
589 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
590 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
591 som/ChangeLog-1015, and vms/ChangeLog-1015
592 \f
593 Copyright (C) 2016 Free Software Foundation, Inc.
594
595 Copying and distribution of this file, with or without modification,
596 are permitted in any medium without royalty provided the copyright
597 notice and this notice are preserved.
598
599 Local Variables:
600 mode: change-log
601 left-margin: 8
602 fill-column: 74
603 version-control: never
604 End:
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