include/asm-arm/arch-sa1100/hardware.h

   1 /*
   2  * linux/include/asm-arm/arch-sa1100/hardware.h
   3  *
   4  * Copyright (C) 1998 Nicolas Pitre <nico@cam.org>
   5  *
   6  * This file contains the hardware definitions for SA1100 architecture
   7  *
   8  * 2000/05/23 John Dorsey <john+@cs.cmu.edu>
   9  *      Definitions for SA1111 added.
  10  */
  11
  12 #ifndef __ASM_ARCH_HARDWARE_H
  13 #define __ASM_ARCH_HARDWARE_H
  14
  15 #include <linux/config.h>
  16
  17 /* Flushing areas */
  18 #define FLUSH_BASE_PHYS         0xe0000000      /* SA1100 zero bank */
  19 #define FLUSH_BASE              0xf5000000
  20 #define FLUSH_BASE_MINICACHE    0xf5800000
  21 #define UNCACHEABLE_ADDR        0xfa050000
  22
  23
  24 /*
  25  * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
  26  * in*()/out*() macros to be usable for all cases.
  27  */
  28 #define PCIO_BASE               0
  29
  30
  31 /*
  32  * SA1100 internal I/O mappings
  33  *
  34  * We have the following mapping:
  35  *      phys            virt
  36  *      80000000        f8000000
  37  *      90000000        fa000000
  38  *      a0000000        fc000000
  39  *      b0000000        fe000000
  40  */
  41
  42 #define VIO_BASE        0xf8000000      /* virtual start of IO space */
  43 #define VIO_SHIFT       3               /* x = IO space shrink power */
  44 #define PIO_START       0x80000000      /* physical start of IO space */
  45
  46 #define io_p2v( x )             \
  47    ( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE )
  48 #define io_v2p( x )             \
  49    ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
  50
  51 #ifndef __ASSEMBLY__
  52 #include <asm/types.h>
  53
  54 #if 0
  55 # define __REG(x)       (*((volatile u32 *)io_p2v(x)))
  56 #else
  57 /*
  58  * This __REG() version gives the same results as the one above,  except
  59  * that we are fooling gcc somehow so it generates far better and smaller
  60  * assembly code for access to contigous registers.  It's a shame that gcc
  61  * doesn't guess this by itself.
  62  */
  63 typedef struct { volatile u32 offset[4096]; } __regbase;
  64 # define __REGP(x)      ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
  65 # define __REG(x)       __REGP(io_p2v(x))
  66 #endif
  67
  68 # define __PREG(x)      (io_v2p((u32)&(x)))
  69
  70 #else
  71
  72 # define __REG(x)       io_p2v(x)
  73 # define __PREG(x)      io_v2p(x)
  74
  75 #endif
  76
  77 #include "SA-1100.h"
  78
  79 #ifdef CONFIG_SA1101
  80 #include "SA-1101.h"
  81 #endif
  82
  83 #endif  /* _ASM_ARCH_HARDWARE_H */