[PATCH] Make cpu_relax() imply barrier() on all arches
[deliverable/linux.git] / include / asm-frv / pgtable.h
1 /* pgtable.h: FR-V page table mangling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgtable.h
13 * include/asm-i386/pgtable.h
14 */
15
16 #ifndef _ASM_PGTABLE_H
17 #define _ASM_PGTABLE_H
18
19 #include <asm/mem-layout.h>
20 #include <asm/setup.h>
21 #include <asm/processor.h>
22
23 #ifndef __ASSEMBLY__
24 #include <linux/threads.h>
25 #include <linux/slab.h>
26 #include <linux/list.h>
27 #include <linux/spinlock.h>
28 struct mm_struct;
29 struct vm_area_struct;
30 #endif
31
32 #ifndef __ASSEMBLY__
33 #if defined(CONFIG_HIGHPTE)
34 typedef unsigned long pte_addr_t;
35 #else
36 typedef pte_t *pte_addr_t;
37 #endif
38 #endif
39
40 /*****************************************************************************/
41 /*
42 * MMU-less operation case first
43 */
44 #ifndef CONFIG_MMU
45
46 #define pgd_present(pgd) (1) /* pages are always present on NO_MM */
47 #define pgd_none(pgd) (0)
48 #define pgd_bad(pgd) (0)
49 #define pgd_clear(pgdp)
50 #define kern_addr_valid(addr) (1)
51 #define pmd_offset(a, b) ((void *) 0)
52
53 #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
54 #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
55 #define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
56 #define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
57 #define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
58
59 #define __swp_type(x) (0)
60 #define __swp_offset(x) (0)
61 #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
62 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
63 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
64
65 #ifndef __ASSEMBLY__
66 static inline int pte_file(pte_t pte) { return 0; }
67 #endif
68
69 #define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
70
71 #define swapper_pg_dir ((pgd_t *) NULL)
72
73 #define pgtable_cache_init() do {} while(0)
74
75 #else /* !CONFIG_MMU */
76 /*****************************************************************************/
77 /*
78 * then MMU operation
79 */
80
81 /*
82 * ZERO_PAGE is a global shared page that is always zero: used
83 * for zero-mapped memory areas etc..
84 */
85 #ifndef __ASSEMBLY__
86 extern unsigned long empty_zero_page;
87 #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
88 #endif
89
90 /*
91 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
92 * [see Documentation/fujitsu/frv/mmu-layout.txt]
93 *
94 * Page Directory:
95 * - Size: 16KB
96 * - 64 PGEs per PGD
97 * - Each PGE holds 1 PUD and covers 64MB
98 *
99 * Page Upper Directory:
100 * - Size: 256B
101 * - 1 PUE per PUD
102 * - Each PUE holds 1 PMD and covers 64MB
103 *
104 * Page Mid-Level Directory
105 * - Size: 256B
106 * - 1 PME per PMD
107 * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
108 * - All STEs are instantiated at the same time
109 *
110 * Page Table
111 * - Size: 16KB
112 * - 4096 PTEs per PT
113 * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
114 *
115 * Pages
116 * - Size: 4KB
117 *
118 * total PTEs
119 * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
120 * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
121 * = 262144 (or 256 * 1024)
122 */
123 #define PGDIR_SHIFT 26
124 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
125 #define PGDIR_MASK (~(PGDIR_SIZE - 1))
126 #define PTRS_PER_PGD 64
127
128 #define PUD_SHIFT 26
129 #define PTRS_PER_PUD 1
130 #define PUD_SIZE (1UL << PUD_SHIFT)
131 #define PUD_MASK (~(PUD_SIZE - 1))
132 #define PUE_SIZE 256
133
134 #define PMD_SHIFT 26
135 #define PMD_SIZE (1UL << PMD_SHIFT)
136 #define PMD_MASK (~(PMD_SIZE - 1))
137 #define PTRS_PER_PMD 1
138 #define PME_SIZE 256
139
140 #define __frv_PT_SIZE 256
141
142 #define PTRS_PER_PTE 4096
143
144 #define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
145 #define FIRST_USER_ADDRESS 0
146
147 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
148 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
149
150 #define TWOLEVEL_PGDIR_SHIFT 26
151 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
152 #define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
153
154 #ifndef __ASSEMBLY__
155
156 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
157
158 #define pte_ERROR(e) \
159 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
160 #define pmd_ERROR(e) \
161 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
162 #define pud_ERROR(e) \
163 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
164 #define pgd_ERROR(e) \
165 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
166
167 /*
168 * Certain architectures need to do special things when PTEs
169 * within a page table are directly modified. Thus, the following
170 * hook is made available.
171 */
172 #define set_pte(pteptr, pteval) \
173 do { \
174 *(pteptr) = (pteval); \
175 asm volatile("dcf %M0" :: "U"(*pteptr)); \
176 } while(0)
177 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
178
179 #define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
180
181 /*
182 * pgd_offset() returns a (pgd_t *)
183 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
184 */
185 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
186
187 /*
188 * a shortcut which implies the use of the kernel's pgd, instead
189 * of a process's
190 */
191 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
192
193 /*
194 * The "pgd_xxx()" functions here are trivial for a folded two-level
195 * setup: the pud is never bad, and a pud always exists (as it's folded
196 * into the pgd entry)
197 */
198 static inline int pgd_none(pgd_t pgd) { return 0; }
199 static inline int pgd_bad(pgd_t pgd) { return 0; }
200 static inline int pgd_present(pgd_t pgd) { return 1; }
201 static inline void pgd_clear(pgd_t *pgd) { }
202
203 #define pgd_populate(mm, pgd, pud) do { } while (0)
204 /*
205 * (puds are folded into pgds so this doesn't get actually called,
206 * but the define is needed for a generic inline function.)
207 */
208 #define set_pgd(pgdptr, pgdval) \
209 do { \
210 memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
211 asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
212 } while(0)
213
214 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
215 {
216 return (pud_t *) pgd;
217 }
218
219 #define pgd_page(pgd) (pud_page((pud_t){ pgd }))
220 #define pgd_page_kernel(pgd) (pud_page_kernel((pud_t){ pgd }))
221
222 /*
223 * allocating and freeing a pud is trivial: the 1-entry pud is
224 * inside the pgd, so has no extra memory associated with it.
225 */
226 #define pud_alloc_one(mm, address) NULL
227 #define pud_free(x) do { } while (0)
228 #define __pud_free_tlb(tlb, x) do { } while (0)
229
230 /*
231 * The "pud_xxx()" functions here are trivial for a folded two-level
232 * setup: the pmd is never bad, and a pmd always exists (as it's folded
233 * into the pud entry)
234 */
235 static inline int pud_none(pud_t pud) { return 0; }
236 static inline int pud_bad(pud_t pud) { return 0; }
237 static inline int pud_present(pud_t pud) { return 1; }
238 static inline void pud_clear(pud_t *pud) { }
239
240 #define pud_populate(mm, pmd, pte) do { } while (0)
241
242 /*
243 * (pmds are folded into puds so this doesn't get actually called,
244 * but the define is needed for a generic inline function.)
245 */
246 #define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
247
248 #define pud_page(pud) (pmd_page((pmd_t){ pud }))
249 #define pud_page_kernel(pud) (pmd_page_kernel((pmd_t){ pud }))
250
251 /*
252 * (pmds are folded into pgds so this doesn't get actually called,
253 * but the define is needed for a generic inline function.)
254 */
255 extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
256
257 #define set_pmd(pmdptr, pmdval) \
258 do { \
259 __set_pmd((pmdptr), (pmdval).ste[0]); \
260 } while(0)
261
262 #define __pmd_index(address) 0
263
264 static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
265 {
266 return (pmd_t *) dir + __pmd_index(address);
267 }
268
269 #define pte_same(a, b) ((a).pte == (b).pte)
270 #define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
271 #define pte_none(x) (!(x).pte)
272 #define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
273 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
274 #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
275
276 #define VMALLOC_VMADDR(x) ((unsigned long) (x))
277
278 #endif /* !__ASSEMBLY__ */
279
280 /*
281 * control flags in AMPR registers and TLB entries
282 */
283 #define _PAGE_BIT_PRESENT xAMPRx_V_BIT
284 #define _PAGE_BIT_WP DAMPRx_WP_BIT
285 #define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
286 #define _PAGE_BIT_SUPER xAMPRx_S_BIT
287 #define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
288 #define _PAGE_BIT_DIRTY xAMPRx_M_BIT
289 #define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
290
291 #define _PAGE_PRESENT xAMPRx_V
292 #define _PAGE_WP DAMPRx_WP
293 #define _PAGE_NOCACHE xAMPRx_C
294 #define _PAGE_SUPER xAMPRx_S
295 #define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
296 #define _PAGE_DIRTY xAMPRx_M
297 #define _PAGE_NOTGLOBAL xAMPRx_NG
298
299 #define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
300
301 #define _PAGE_FILE 0x002 /* set:pagecache unset:swap */
302 #define _PAGE_PROTNONE 0x000 /* If not present */
303
304 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
305
306 #define __PGPROT_BASE \
307 (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
308
309 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
310 #define PAGE_SHARED __pgprot(__PGPROT_BASE)
311 #define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
312 #define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
313
314 #define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
315 #define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
316 #define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
317
318 #define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
319
320 #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
321 #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
322 #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
323
324 #define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
325
326 #ifndef __ASSEMBLY__
327
328 /*
329 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
330 * instruction access and for data access. However, we don't have enough reserved bits to say
331 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
332 */
333 #define __P000 PAGE_NONE
334 #define __P001 PAGE_READONLY
335 #define __P010 PAGE_COPY
336 #define __P011 PAGE_COPY
337 #define __P100 PAGE_READONLY
338 #define __P101 PAGE_READONLY
339 #define __P110 PAGE_COPY
340 #define __P111 PAGE_COPY
341
342 #define __S000 PAGE_NONE
343 #define __S001 PAGE_READONLY
344 #define __S010 PAGE_SHARED
345 #define __S011 PAGE_SHARED
346 #define __S100 PAGE_READONLY
347 #define __S101 PAGE_READONLY
348 #define __S110 PAGE_SHARED
349 #define __S111 PAGE_SHARED
350
351 /*
352 * Define this to warn about kernel memory accesses that are
353 * done without a 'access_ok(VERIFY_WRITE,..)'
354 */
355 #undef TEST_ACCESS_OK
356
357 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
358 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
359
360 #define pmd_none(x) (!pmd_val(x))
361 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
362 #define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
363 #define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
364
365 #define pmd_page_kernel(pmd) \
366 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
367
368 #ifndef CONFIG_DISCONTIGMEM
369 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
370 #endif
371
372 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
373
374 /*
375 * The following only work if pte_present() is true.
376 * Undefined behaviour if not..
377 */
378 static inline int pte_read(pte_t pte) { return !((pte).pte & _PAGE_SUPER); }
379 static inline int pte_exec(pte_t pte) { return !((pte).pte & _PAGE_SUPER); }
380 static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
381 static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
382 static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
383
384 static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte |= _PAGE_SUPER; return pte; }
385 static inline pte_t pte_exprotect(pte_t pte) { (pte).pte |= _PAGE_SUPER; return pte; }
386 static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
387 static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
388 static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
389 static inline pte_t pte_mkread(pte_t pte) { (pte).pte &= ~_PAGE_SUPER; return pte; }
390 static inline pte_t pte_mkexec(pte_t pte) { (pte).pte &= ~_PAGE_SUPER; return pte; }
391 static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
392 static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
393 static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
394
395 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
396 {
397 int i = test_and_clear_bit(_PAGE_BIT_DIRTY, ptep);
398 asm volatile("dcf %M0" :: "U"(*ptep));
399 return i;
400 }
401
402 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
403 {
404 int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
405 asm volatile("dcf %M0" :: "U"(*ptep));
406 return i;
407 }
408
409 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
410 {
411 unsigned long x = xchg(&ptep->pte, 0);
412 asm volatile("dcf %M0" :: "U"(*ptep));
413 return __pte(x);
414 }
415
416 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
417 {
418 set_bit(_PAGE_BIT_WP, ptep);
419 asm volatile("dcf %M0" :: "U"(*ptep));
420 }
421
422 /*
423 * Macro to mark a page protection value as "uncacheable"
424 */
425 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))
426
427 /*
428 * Conversion functions: convert a page and protection to a page entry,
429 * and a page entry and page directory to the page they refer to.
430 */
431
432 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
433 #define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
434
435 /* This takes a physical page address that is used by the remapping functions */
436 #define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
437
438 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
439 {
440 pte.pte &= _PAGE_CHG_MASK;
441 pte.pte |= pgprot_val(newprot);
442 return pte;
443 }
444
445 /* to find an entry in a page-table-directory. */
446 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
447 #define pgd_index_k(addr) pgd_index(addr)
448
449 /* Find an entry in the bottom-level page table.. */
450 #define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
451
452 /*
453 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
454 *
455 * this macro returns the index of the entry in the pte page which would
456 * control the given virtual address
457 */
458 #define pte_index(address) \
459 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
460 #define pte_offset_kernel(dir, address) \
461 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
462
463 #if defined(CONFIG_HIGHPTE)
464 #define pte_offset_map(dir, address) \
465 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
466 #define pte_offset_map_nested(dir, address) \
467 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
468 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
469 #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
470 #else
471 #define pte_offset_map(dir, address) \
472 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
473 #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
474 #define pte_unmap(pte) do { } while (0)
475 #define pte_unmap_nested(pte) do { } while (0)
476 #endif
477
478 /*
479 * Handle swap and file entries
480 * - the PTE is encoded in the following format:
481 * bit 0: Must be 0 (!_PAGE_PRESENT)
482 * bit 1: Type: 0 for swap, 1 for file (_PAGE_FILE)
483 * bits 2-7: Swap type
484 * bits 8-31: Swap offset
485 * bits 2-31: File pgoff
486 */
487 #define __swp_type(x) (((x).val >> 2) & 0x1f)
488 #define __swp_offset(x) ((x).val >> 8)
489 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
490 #define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte })
491 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
492
493 static inline int pte_file(pte_t pte)
494 {
495 return pte.pte & _PAGE_FILE;
496 }
497
498 #define PTE_FILE_MAX_BITS 29
499
500 #define pte_to_pgoff(PTE) ((PTE).pte >> 2)
501 #define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
502
503 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
504 #define PageSkip(page) (0)
505 #define kern_addr_valid(addr) (1)
506
507 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
508 remap_pfn_range(vma, vaddr, pfn, size, prot)
509
510 #define MK_IOSPACE_PFN(space, pfn) (pfn)
511 #define GET_IOSPACE(pfn) 0
512 #define GET_PFN(pfn) (pfn)
513
514 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
515 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
516 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
517 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
518 #define __HAVE_ARCH_PTE_SAME
519 #include <asm-generic/pgtable.h>
520
521 /*
522 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
523 */
524 static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
525 {
526 unsigned long ampr;
527 pgd_t *pge = pgd_offset(current->mm, address);
528 pud_t *pue = pud_offset(pge, address);
529 pmd_t *pme = pmd_offset(pue, address);
530
531 ampr = pme->ste[0] & 0xffffff00;
532 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V;
533
534 asm volatile("movgs %0,scr0\n"
535 "movgs %0,scr1\n"
536 "movgs %1,dampr4\n"
537 "movgs %1,dampr5\n"
538 :
539 : "r"(address), "r"(ampr)
540 );
541 }
542
543 #ifdef CONFIG_PROC_FS
544 extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
545 #endif
546
547 extern void __init pgtable_cache_init(void);
548
549 #endif /* !__ASSEMBLY__ */
550 #endif /* !CONFIG_MMU */
551
552 #ifndef __ASSEMBLY__
553 extern void __init paging_init(void);
554 #endif /* !__ASSEMBLY__ */
555
556 #endif /* _ASM_PGTABLE_H */
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