include/asm-generic/gpio.h

   1 #ifndef _ASM_GENERIC_GPIO_H
   2 #define _ASM_GENERIC_GPIO_H
   3
   4 #include <linux/kernel.h>
   5 #include <linux/types.h>
   6 #include <linux/errno.h>
   7 #include <linux/of.h>
   8 #include <linux/pinctrl/pinctrl.h>
   9
  10 #ifdef CONFIG_GPIOLIB
  11
  12 #include <linux/compiler.h>
  13
  14 /* Platforms may implement their GPIO interface with library code,
  15  * at a small performance cost for non-inlined operations and some
  16  * extra memory (for code and for per-GPIO table entries).
  17  *
  18  * While the GPIO programming interface defines valid GPIO numbers
  19  * to be in the range 0..MAX_INT, this library restricts them to the
  20  * smaller range 0..ARCH_NR_GPIOS-1.
  21  *
  22  * ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of
  23  * builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is
  24  * actually an estimate of a board-specific value.
  25  */
  26
  27 #ifndef ARCH_NR_GPIOS
  28 #define ARCH_NR_GPIOS           256
  29 #endif
  30
  31 /*
  32  * "valid" GPIO numbers are nonnegative and may be passed to
  33  * setup routines like gpio_request().  only some valid numbers
  34  * can successfully be requested and used.
  35  *
  36  * Invalid GPIO numbers are useful for indicating no-such-GPIO in
  37  * platform data and other tables.
  38  */
  39
  40 static inline bool gpio_is_valid(int number)
  41 {
  42         return number >= 0 && number < ARCH_NR_GPIOS;
  43 }
  44
  45 struct device;
  46 struct gpio;
  47 struct seq_file;
  48 struct module;
  49 struct device_node;
  50
  51 /**
  52  * struct gpio_chip - abstract a GPIO controller
  53  * @label: for diagnostics
  54  * @dev: optional device providing the GPIOs
  55  * @owner: helps prevent removal of modules exporting active GPIOs
  56  * @request: optional hook for chip-specific activation, such as
  57  *      enabling module power and clock; may sleep
  58  * @free: optional hook for chip-specific deactivation, such as
  59  *      disabling module power and clock; may sleep
  60  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
  61  *      (same as GPIOF_DIR_XXX), or negative error
  62  * @direction_input: configures signal "offset" as input, or returns error
  63  * @get: returns value for signal "offset"; for output signals this
  64  *      returns either the value actually sensed, or zero
  65  * @direction_output: configures signal "offset" as output, or returns error
  66  * @set_debounce: optional hook for setting debounce time for specified gpio in
  67  *      interrupt triggered gpio chips
  68  * @set: assigns output value for signal "offset"
  69  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
  70  *      implementation may not sleep
  71  * @dbg_show: optional routine to show contents in debugfs; default code
  72  *      will be used when this is omitted, but custom code can show extra
  73  *      state (such as pullup/pulldown configuration).
  74  * @base: identifies the first GPIO number handled by this chip; or, if
  75  *      negative during registration, requests dynamic ID allocation.
  76  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
  77  *      handled is (base + ngpio - 1).
  78  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
  79  *      must while accessing GPIO expander chips over I2C or SPI
  80  * @names: if set, must be an array of strings to use as alternative
  81  *      names for the GPIOs in this chip. Any entry in the array
  82  *      may be NULL if there is no alias for the GPIO, however the
  83  *      array must be @ngpio entries long.  A name can include a single printk
  84  *      format specifier for an unsigned int.  It is substituted by the actual
  85  *      number of the gpio.
  86  *
  87  * A gpio_chip can help platforms abstract various sources of GPIOs so
  88  * they can all be accessed through a common programing interface.
  89  * Example sources would be SOC controllers, FPGAs, multifunction
  90  * chips, dedicated GPIO expanders, and so on.
  91  *
  92  * Each chip controls a number of signals, identified in method calls
  93  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
  94  * are referenced through calls like gpio_get_value(gpio), the offset
  95  * is calculated by subtracting @base from the gpio number.
  96  */
  97 struct gpio_chip {
  98         const char              *label;
  99         struct device           *dev;
 100         struct module           *owner;
 101
 102         int                     (*request)(struct gpio_chip *chip,
 103                                                 unsigned offset);
 104         void                    (*free)(struct gpio_chip *chip,
 105                                                 unsigned offset);
 106         int                     (*get_direction)(struct gpio_chip *chip,
 107                                                 unsigned offset);
 108         int                     (*direction_input)(struct gpio_chip *chip,
 109                                                 unsigned offset);
 110         int                     (*get)(struct gpio_chip *chip,
 111                                                 unsigned offset);
 112         int                     (*direction_output)(struct gpio_chip *chip,
 113                                                 unsigned offset, int value);
 114         int                     (*set_debounce)(struct gpio_chip *chip,
 115                                                 unsigned offset, unsigned debounce);
 116
 117         void                    (*set)(struct gpio_chip *chip,
 118                                                 unsigned offset, int value);
 119
 120         int                     (*to_irq)(struct gpio_chip *chip,
 121                                                 unsigned offset);
 122
 123         void                    (*dbg_show)(struct seq_file *s,
 124                                                 struct gpio_chip *chip);
 125         int                     base;
 126         u16                     ngpio;
 127         const char              *const *names;
 128         unsigned                can_sleep:1;
 129         unsigned                exported:1;
 130
 131 #if defined(CONFIG_OF_GPIO)
 132         /*
 133          * If CONFIG_OF is enabled, then all GPIO controllers described in the
 134          * device tree automatically may have an OF translation
 135          */
 136         struct device_node *of_node;
 137         int of_gpio_n_cells;
 138         int (*of_xlate)(struct gpio_chip *gc,
 139                         const struct of_phandle_args *gpiospec, u32 *flags);
 140 #endif
 141 #ifdef CONFIG_PINCTRL
 142         /*
 143          * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
 144          * describe the actual pin range which they serve in an SoC. This
 145          * information would be used by pinctrl subsystem to configure
 146          * corresponding pins for gpio usage.
 147          */
 148         struct list_head pin_ranges;
 149 #endif
 150 };
 151
 152 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
 153                         unsigned offset);
 154 extern struct gpio_chip *gpio_to_chip(unsigned gpio);
 155 extern int __must_check gpiochip_reserve(int start, int ngpio);
 156
 157 /* add/remove chips */
 158 extern int gpiochip_add(struct gpio_chip *chip);
 159 extern int __must_check gpiochip_remove(struct gpio_chip *chip);
 160 extern struct gpio_chip *gpiochip_find(void *data,
 161                                         int (*match)(struct gpio_chip *chip,
 162                                                      void *data));
 163
 164
 165 /* Always use the library code for GPIO management calls,
 166  * or when sleeping may be involved.
 167  */
 168 extern int gpio_request(unsigned gpio, const char *label);
 169 extern void gpio_free(unsigned gpio);
 170
 171 extern int gpio_direction_input(unsigned gpio);
 172 extern int gpio_direction_output(unsigned gpio, int value);
 173
 174 extern int gpio_set_debounce(unsigned gpio, unsigned debounce);
 175
 176 extern int gpio_get_value_cansleep(unsigned gpio);
 177 extern void gpio_set_value_cansleep(unsigned gpio, int value);
 178
 179
 180 /* A platform's <asm/gpio.h> code may want to inline the I/O calls when
 181  * the GPIO is constant and refers to some always-present controller,
 182  * giving direct access to chip registers and tight bitbanging loops.
 183  */
 184 extern int __gpio_get_value(unsigned gpio);
 185 extern void __gpio_set_value(unsigned gpio, int value);
 186
 187 extern int __gpio_cansleep(unsigned gpio);
 188
 189 extern int __gpio_to_irq(unsigned gpio);
 190
 191 extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
 192 extern int gpio_request_array(const struct gpio *array, size_t num);
 193 extern void gpio_free_array(const struct gpio *array, size_t num);
 194
 195 /* bindings for managed devices that want to request gpios */
 196 int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
 197 int devm_gpio_request_one(struct device *dev, unsigned gpio,
 198                           unsigned long flags, const char *label);
 199 void devm_gpio_free(struct device *dev, unsigned int gpio);
 200
 201 #ifdef CONFIG_GPIO_SYSFS
 202
 203 /*
 204  * A sysfs interface can be exported by individual drivers if they want,
 205  * but more typically is configured entirely from userspace.
 206  */
 207 extern int gpio_export(unsigned gpio, bool direction_may_change);
 208 extern int gpio_export_link(struct device *dev, const char *name,
 209                         unsigned gpio);
 210 extern int gpio_sysfs_set_active_low(unsigned gpio, int value);
 211 extern void gpio_unexport(unsigned gpio);
 212
 213 #endif  /* CONFIG_GPIO_SYSFS */
 214
 215 #else   /* !CONFIG_GPIOLIB */
 216
 217 static inline bool gpio_is_valid(int number)
 218 {
 219         /* only non-negative numbers are valid */
 220         return number >= 0;
 221 }
 222
 223 /* platforms that don't directly support access to GPIOs through I2C, SPI,
 224  * or other blocking infrastructure can use these wrappers.
 225  */
 226
 227 static inline int gpio_cansleep(unsigned gpio)
 228 {
 229         return 0;
 230 }
 231
 232 static inline int gpio_get_value_cansleep(unsigned gpio)
 233 {
 234         might_sleep();
 235         return __gpio_get_value(gpio);
 236 }
 237
 238 static inline void gpio_set_value_cansleep(unsigned gpio, int value)
 239 {
 240         might_sleep();
 241         __gpio_set_value(gpio, value);
 242 }
 243
 244 #endif /* !CONFIG_GPIOLIB */
 245
 246 #ifndef CONFIG_GPIO_SYSFS
 247
 248 struct device;
 249
 250 /* sysfs support is only available with gpiolib, where it's optional */
 251
 252 static inline int gpio_export(unsigned gpio, bool direction_may_change)
 253 {
 254         return -ENOSYS;
 255 }
 256
 257 static inline int gpio_export_link(struct device *dev, const char *name,
 258                                 unsigned gpio)
 259 {
 260         return -ENOSYS;
 261 }
 262
 263 static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
 264 {
 265         return -ENOSYS;
 266 }
 267
 268 static inline void gpio_unexport(unsigned gpio)
 269 {
 270 }
 271 #endif  /* CONFIG_GPIO_SYSFS */
 272
 273 #ifdef CONFIG_PINCTRL
 274
 275 /**
 276  * struct gpio_pin_range - pin range controlled by a gpio chip
 277  * @head: list for maintaining set of pin ranges, used internally
 278  * @pctldev: pinctrl device which handles corresponding pins
 279  * @range: actual range of pins controlled by a gpio controller
 280  */
 281
 282 struct gpio_pin_range {
 283         struct list_head node;
 284         struct pinctrl_dev *pctldev;
 285         struct pinctrl_gpio_range range;
 286 };
 287
 288 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 289                            unsigned int gpio_offset, unsigned int pin_offset,
 290                            unsigned int npins);
 291 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 292
 293 #else
 294
 295 static inline int
 296 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 297                        unsigned int gpio_offset, unsigned int pin_offset,
 298                        unsigned int npins)
 299 {
 300         return 0;
 301 }
 302
 303 static inline void
 304 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 305 {
 306 }
 307
 308 #endif /* CONFIG_PINCTRL */
 309
 310 #endif /* _ASM_GENERIC_GPIO_H */