1 /* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */
5 #include <linux/kernel.h>
6 #include <linux/compiler.h>
7 #include <linux/types.h>
9 #include <asm/page.h> /* IO address mapping routines need this */
10 #include <asm/system.h>
14 #define __SLOW_DOWN_IO do { } while (0)
15 #define SLOW_DOWN_IO do { } while (0)
17 extern unsigned long virt_to_bus_not_defined_use_pci_map(volatile void *addr
);
18 #define virt_to_bus virt_to_bus_not_defined_use_pci_map
19 extern unsigned long bus_to_virt_not_defined_use_pci_map(volatile void *addr
);
20 #define bus_to_virt bus_to_virt_not_defined_use_pci_map
22 /* BIO layer definitions. */
23 extern unsigned long kern_base
, kern_size
;
24 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
25 #define BIO_VMERGE_BOUNDARY 8192
27 /* Different PCI controllers we support have their PCI MEM space
28 * mapped to an either 2GB (Psycho) or 4GB (Sabre) aligned area,
29 * so need to chop off the top 33 or 32 bits.
31 extern unsigned long pci_memspace_mask
;
33 #define bus_dvma_to_mem(__vaddr) ((__vaddr) & pci_memspace_mask)
35 static __inline__ u8
_inb(unsigned long addr
)
39 __asm__
__volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
41 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
46 static __inline__ u16
_inw(unsigned long addr
)
50 __asm__
__volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
52 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
57 static __inline__ u32
_inl(unsigned long addr
)
61 __asm__
__volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
63 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
68 static __inline__
void _outb(u8 b
, unsigned long addr
)
70 __asm__
__volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
72 : "Jr" (b
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
75 static __inline__
void _outw(u16 w
, unsigned long addr
)
77 __asm__
__volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
79 : "Jr" (w
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
82 static __inline__
void _outl(u32 l
, unsigned long addr
)
84 __asm__
__volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
86 : "Jr" (l
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
89 #define inb(__addr) (_inb((unsigned long)(__addr)))
90 #define inw(__addr) (_inw((unsigned long)(__addr)))
91 #define inl(__addr) (_inl((unsigned long)(__addr)))
92 #define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr)))
93 #define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr)))
94 #define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr)))
96 #define inb_p(__addr) inb(__addr)
97 #define outb_p(__b, __addr) outb(__b, __addr)
98 #define inw_p(__addr) inw(__addr)
99 #define outw_p(__w, __addr) outw(__w, __addr)
100 #define inl_p(__addr) inl(__addr)
101 #define outl_p(__l, __addr) outl(__l, __addr)
103 extern void outsb(unsigned long, const void *, unsigned long);
104 extern void outsw(unsigned long, const void *, unsigned long);
105 extern void outsl(unsigned long, const void *, unsigned long);
106 extern void insb(unsigned long, void *, unsigned long);
107 extern void insw(unsigned long, void *, unsigned long);
108 extern void insl(unsigned long, void *, unsigned long);
110 static inline void ioread8_rep(void __iomem
*port
, void *buf
, unsigned long count
)
112 insb((unsigned long __force
)port
, buf
, count
);
114 static inline void ioread16_rep(void __iomem
*port
, void *buf
, unsigned long count
)
116 insw((unsigned long __force
)port
, buf
, count
);
119 static inline void ioread32_rep(void __iomem
*port
, void *buf
, unsigned long count
)
121 insl((unsigned long __force
)port
, buf
, count
);
124 static inline void iowrite8_rep(void __iomem
*port
, const void *buf
, unsigned long count
)
126 outsb((unsigned long __force
)port
, buf
, count
);
129 static inline void iowrite16_rep(void __iomem
*port
, const void *buf
, unsigned long count
)
131 outsw((unsigned long __force
)port
, buf
, count
);
134 static inline void iowrite32_rep(void __iomem
*port
, const void *buf
, unsigned long count
)
136 outsl((unsigned long __force
)port
, buf
, count
);
139 /* Memory functions, same as I/O accesses on Ultra. */
140 static inline u8
_readb(const volatile void __iomem
*addr
)
143 __asm__
__volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
145 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
149 static inline u16
_readw(const volatile void __iomem
*addr
)
152 __asm__
__volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
154 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
159 static inline u32
_readl(const volatile void __iomem
*addr
)
162 __asm__
__volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
164 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
169 static inline u64
_readq(const volatile void __iomem
*addr
)
172 __asm__
__volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
174 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
179 static inline void _writeb(u8 b
, volatile void __iomem
*addr
)
181 __asm__
__volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
183 : "Jr" (b
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
186 static inline void _writew(u16 w
, volatile void __iomem
*addr
)
188 __asm__
__volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
190 : "Jr" (w
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
193 static inline void _writel(u32 l
, volatile void __iomem
*addr
)
195 __asm__
__volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
197 : "Jr" (l
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
200 static inline void _writeq(u64 q
, volatile void __iomem
*addr
)
202 __asm__
__volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
204 : "Jr" (q
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E_L
));
207 #define readb(__addr) _readb(__addr)
208 #define readw(__addr) _readw(__addr)
209 #define readl(__addr) _readl(__addr)
210 #define readq(__addr) _readq(__addr)
211 #define readb_relaxed(__addr) _readb(__addr)
212 #define readw_relaxed(__addr) _readw(__addr)
213 #define readl_relaxed(__addr) _readl(__addr)
214 #define readq_relaxed(__addr) _readq(__addr)
215 #define writeb(__b, __addr) _writeb(__b, __addr)
216 #define writew(__w, __addr) _writew(__w, __addr)
217 #define writel(__l, __addr) _writel(__l, __addr)
218 #define writeq(__q, __addr) _writeq(__q, __addr)
220 /* Now versions without byte-swapping. */
221 static __inline__ u8
_raw_readb(unsigned long addr
)
225 __asm__
__volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
227 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
232 static __inline__ u16
_raw_readw(unsigned long addr
)
236 __asm__
__volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
238 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
243 static __inline__ u32
_raw_readl(unsigned long addr
)
247 __asm__
__volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
249 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
254 static __inline__ u64
_raw_readq(unsigned long addr
)
258 __asm__
__volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
260 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
265 static __inline__
void _raw_writeb(u8 b
, unsigned long addr
)
267 __asm__
__volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
269 : "Jr" (b
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
272 static __inline__
void _raw_writew(u16 w
, unsigned long addr
)
274 __asm__
__volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
276 : "Jr" (w
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
279 static __inline__
void _raw_writel(u32 l
, unsigned long addr
)
281 __asm__
__volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
283 : "Jr" (l
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
286 static __inline__
void _raw_writeq(u64 q
, unsigned long addr
)
288 __asm__
__volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
290 : "Jr" (q
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
293 #define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr)))
294 #define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr)))
295 #define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr)))
296 #define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr)))
297 #define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
298 #define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr)))
299 #define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr)))
300 #define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
302 /* Valid I/O Space regions are anywhere, because each PCI bus supported
303 * can live in an arbitrary area of the physical address range.
305 #define IO_SPACE_LIMIT 0xffffffffffffffffUL
307 /* Now, SBUS variants, only difference from PCI is that we do
308 * not use little-endian ASIs.
310 static inline u8
_sbus_readb(const volatile void __iomem
*addr
)
314 __asm__
__volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
316 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
321 static inline u16
_sbus_readw(const volatile void __iomem
*addr
)
325 __asm__
__volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
327 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
332 static inline u32
_sbus_readl(const volatile void __iomem
*addr
)
336 __asm__
__volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
338 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
343 static inline u64
_sbus_readq(const volatile void __iomem
*addr
)
347 __asm__
__volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
349 : "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
354 static inline void _sbus_writeb(u8 b
, volatile void __iomem
*addr
)
356 __asm__
__volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
358 : "Jr" (b
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
361 static inline void _sbus_writew(u16 w
, volatile void __iomem
*addr
)
363 __asm__
__volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
365 : "Jr" (w
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
368 static inline void _sbus_writel(u32 l
, volatile void __iomem
*addr
)
370 __asm__
__volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
372 : "Jr" (l
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
375 static inline void _sbus_writeq(u64 l
, volatile void __iomem
*addr
)
377 __asm__
__volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
379 : "Jr" (l
), "r" (addr
), "i" (ASI_PHYS_BYPASS_EC_E
));
382 #define sbus_readb(__addr) _sbus_readb(__addr)
383 #define sbus_readw(__addr) _sbus_readw(__addr)
384 #define sbus_readl(__addr) _sbus_readl(__addr)
385 #define sbus_readq(__addr) _sbus_readq(__addr)
386 #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr)
387 #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr)
388 #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr)
389 #define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr)
391 static inline void _sbus_memset_io(volatile void __iomem
*dst
, int c
, __kernel_size_t n
)
399 #define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz)
402 _memset_io(volatile void __iomem
*dst
, int c
, __kernel_size_t n
)
404 volatile void __iomem
*d
= dst
;
412 #define memset_io(d,c,sz) _memset_io(d,c,sz)
415 _memcpy_fromio(void *dst
, const volatile void __iomem
*src
, __kernel_size_t n
)
420 char tmp
= readb(src
);
426 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
429 _memcpy_toio(volatile void __iomem
*dst
, const void *src
, __kernel_size_t n
)
432 volatile void __iomem
*d
= dst
;
441 #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
447 /* On sparc64 we have the whole physical IO address space accessible
448 * using physically addressed loads and stores, so this does nothing.
450 static inline void __iomem
*ioremap(unsigned long offset
, unsigned long size
)
452 return (void __iomem
*)offset
;
455 #define ioremap_nocache(X,Y) ioremap((X),(Y))
457 static inline void iounmap(volatile void __iomem
*addr
)
461 #define ioread8(X) readb(X)
462 #define ioread16(X) readw(X)
463 #define ioread32(X) readl(X)
464 #define iowrite8(val,X) writeb(val,X)
465 #define iowrite16(val,X) writew(val,X)
466 #define iowrite32(val,X) writel(val,X)
468 /* Create a virtual mapping cookie for an IO port range */
469 extern void __iomem
*ioport_map(unsigned long port
, unsigned int nr
);
470 extern void ioport_unmap(void __iomem
*);
472 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
474 extern void __iomem
*pci_iomap(struct pci_dev
*dev
, int bar
, unsigned long max
);
475 extern void pci_iounmap(struct pci_dev
*dev
, void __iomem
*);
477 /* Similarly for SBUS. */
478 #define sbus_ioremap(__res, __offset, __size, __name) \
479 ({ unsigned long __ret; \
480 __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
481 __ret += (unsigned long) (__offset); \
482 if (! request_region((__ret), (__size), (__name))) \
484 (void __iomem *) __ret; \
487 #define sbus_iounmap(__addr, __size) \
488 release_region((unsigned long)(__addr), (__size))
492 #define dma_cache_inv(_start,_size) do { } while (0)
493 #define dma_cache_wback(_start,_size) do { } while (0)
494 #define dma_cache_wback_inv(_start,_size) do { } while (0)
497 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
500 #define xlate_dev_mem_ptr(p) __va(p)
503 * Convert a virtual cached pointer to an uncached pointer
505 #define xlate_dev_kmem_ptr(p) p
509 #endif /* !(__SPARC64_IO_H) */
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