Merge branch 'linus' of master.kernel.org:/pub/scm/linux/kernel/git/perex/alsa
[deliverable/linux.git] / include / asm-x86_64 / smp.h
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
3
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 #include <linux/init.h>
11 extern int disable_apic;
12
13 #include <asm/fixmap.h>
14 #include <asm/mpspec.h>
15 #include <asm/io_apic.h>
16 #include <asm/apic.h>
17 #include <asm/thread_info.h>
18
19 #ifdef CONFIG_SMP
20
21 #include <asm/pda.h>
22
23 struct pt_regs;
24
25 extern cpumask_t cpu_present_mask;
26 extern cpumask_t cpu_possible_map;
27 extern cpumask_t cpu_online_map;
28 extern cpumask_t cpu_callout_map;
29 extern cpumask_t cpu_initialized;
30
31 /*
32 * Private routines/data
33 */
34
35 extern void smp_alloc_memory(void);
36 extern volatile unsigned long smp_invalidate_needed;
37 extern void lock_ipi_call_lock(void);
38 extern void unlock_ipi_call_lock(void);
39 extern int smp_num_siblings;
40 extern void smp_send_reschedule(int cpu);
41 void smp_stop_cpu(void);
42
43 extern cpumask_t cpu_sibling_map[NR_CPUS];
44 extern cpumask_t cpu_core_map[NR_CPUS];
45 extern u8 cpu_llc_id[NR_CPUS];
46
47 #define SMP_TRAMPOLINE_BASE 0x6000
48
49 /*
50 * On x86 all CPUs are mapped 1:1 to the APIC space.
51 * This simplifies scheduling and IPI sending and
52 * compresses data structures.
53 */
54
55 static inline int num_booting_cpus(void)
56 {
57 return cpus_weight(cpu_callout_map);
58 }
59
60 #define raw_smp_processor_id() read_pda(cpunumber)
61
62 static inline int hard_smp_processor_id(void)
63 {
64 /* we don't want to mark this access volatile - bad code generation */
65 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
66 }
67
68 extern int __cpu_disable(void);
69 extern void __cpu_die(unsigned int cpu);
70 extern void prefill_possible_map(void);
71 extern unsigned num_processors;
72 extern unsigned __cpuinitdata disabled_cpus;
73
74 #define NO_PROC_ID 0xFF /* No processor magic marker */
75
76 #endif
77
78 /*
79 * Some lowlevel functions might want to know about
80 * the real APIC ID <-> CPU # mapping.
81 */
82 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
83 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
84 extern u8 bios_cpu_apicid[];
85
86 static inline int cpu_present_to_apicid(int mps_cpu)
87 {
88 if (mps_cpu < NR_CPUS)
89 return (int)bios_cpu_apicid[mps_cpu];
90 else
91 return BAD_APICID;
92 }
93
94 #ifndef CONFIG_SMP
95 #define stack_smp_processor_id() 0
96 #define cpu_logical_map(x) (x)
97 #else
98 #include <asm/thread_info.h>
99 #define stack_smp_processor_id() \
100 ({ \
101 struct thread_info *ti; \
102 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
103 ti->cpu; \
104 })
105 #endif
106
107 static __inline int logical_smp_processor_id(void)
108 {
109 /* we don't want to mark this access volatile - bad code generation */
110 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
111 }
112
113 #ifdef CONFIG_SMP
114 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
115 #else
116 #define cpu_physical_id(cpu) boot_cpu_id
117 #endif /* !CONFIG_SMP */
118 #endif
119
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