include/elf/m32r.h

   1 /* M32R ELF support for BFD.
   2    Copyright (C) 1996, 1997 Free Software Foundation, Inc.
   3
   4 This file is part of BFD, the Binary File Descriptor library.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software Foundation, Inc.,
  18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  19
  20 #ifndef _ELF_M32R_H
  21 #define _ELF_M32R_H
  22
  23 enum reloc_type
  24 {
  25   R_M32R_NONE = 0,
  26   R_M32R_16,
  27   R_M32R_32,
  28   R_M32R_24,
  29   R_M32R_10_PCREL,
  30   R_M32R_18_PCREL,
  31   R_M32R_26_PCREL,
  32   R_M32R_HI16_ULO,
  33   R_M32R_HI16_SLO,
  34   R_M32R_LO16,
  35   R_M32R_SDA16,
  36   R_M32R_max
  37 };
  38
  39 /* Processor specific section indices.  These sections do not actually
  40    exist.  Symbols with a st_shndx field corresponding to one of these
  41    values have a special meaning.  */
  42
  43 /* Small common symbol.  */
  44 #define SHN_M32R_SCOMMON        0xff00
  45
  46 /* Processor specific section flags.  */
  47
  48 /* This section contains sufficient relocs to be relaxed.
  49    When relaxing, even relocs of branch instructions the assembler could
  50    complete must be present because relaxing may cause the branch target to
  51    move.  */
  52 #define SHF_M32R_CAN_RELAX      0x10000000
  53
  54 /* Processor specific flags for the ELF header e_flags field.  */
  55
  56 /* Two bit V850 architecture field.  */
  57 #define EF_M32R_ARCH            0x30000000
  58
  59 /* m32r code.  */
  60 #define E_M32R_ARCH             0x00000000
  61 /* m32rx code.  */
  62 #define E_M32RX_ARCH            0x10000000
  63
  64 #endif