1 /* MIPS ELF support for BFD.
2 Copyright (C) 1993-2014 Free Software Foundation, Inc.
4 By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5 information in the System V Application Binary Interface, MIPS
8 This file is part of BFD, the Binary File Descriptor library.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
25 /* This file holds definitions specific to the MIPS ELF ABI. Note
26 that most of this is not actually implemented by BFD. */
31 #include "elf/reloc-macros.h"
33 /* Relocation types. */
34 START_RELOC_NUMBERS (elf_mips_reloc_type
)
35 RELOC_NUMBER (R_MIPS_NONE
, 0)
36 RELOC_NUMBER (R_MIPS_16
, 1)
37 RELOC_NUMBER (R_MIPS_32
, 2) /* In Elf 64: alias R_MIPS_ADD */
38 RELOC_NUMBER (R_MIPS_REL32
, 3) /* In Elf 64: alias R_MIPS_REL */
39 RELOC_NUMBER (R_MIPS_26
, 4)
40 RELOC_NUMBER (R_MIPS_HI16
, 5)
41 RELOC_NUMBER (R_MIPS_LO16
, 6)
42 RELOC_NUMBER (R_MIPS_GPREL16
, 7) /* In Elf 64: alias R_MIPS_GPREL */
43 RELOC_NUMBER (R_MIPS_LITERAL
, 8)
44 RELOC_NUMBER (R_MIPS_GOT16
, 9) /* In Elf 64: alias R_MIPS_GOT */
45 RELOC_NUMBER (R_MIPS_PC16
, 10)
46 RELOC_NUMBER (R_MIPS_CALL16
, 11) /* In Elf 64: alias R_MIPS_CALL */
47 RELOC_NUMBER (R_MIPS_GPREL32
, 12)
48 /* The remaining relocs are defined on Irix, although they are not
49 in the MIPS ELF ABI. */
50 RELOC_NUMBER (R_MIPS_UNUSED1
, 13)
51 RELOC_NUMBER (R_MIPS_UNUSED2
, 14)
52 RELOC_NUMBER (R_MIPS_UNUSED3
, 15)
53 RELOC_NUMBER (R_MIPS_SHIFT5
, 16)
54 RELOC_NUMBER (R_MIPS_SHIFT6
, 17)
55 RELOC_NUMBER (R_MIPS_64
, 18)
56 RELOC_NUMBER (R_MIPS_GOT_DISP
, 19)
57 RELOC_NUMBER (R_MIPS_GOT_PAGE
, 20)
58 RELOC_NUMBER (R_MIPS_GOT_OFST
, 21)
59 RELOC_NUMBER (R_MIPS_GOT_HI16
, 22)
60 RELOC_NUMBER (R_MIPS_GOT_LO16
, 23)
61 RELOC_NUMBER (R_MIPS_SUB
, 24)
62 RELOC_NUMBER (R_MIPS_INSERT_A
, 25)
63 RELOC_NUMBER (R_MIPS_INSERT_B
, 26)
64 RELOC_NUMBER (R_MIPS_DELETE
, 27)
65 RELOC_NUMBER (R_MIPS_HIGHER
, 28)
66 RELOC_NUMBER (R_MIPS_HIGHEST
, 29)
67 RELOC_NUMBER (R_MIPS_CALL_HI16
, 30)
68 RELOC_NUMBER (R_MIPS_CALL_LO16
, 31)
69 RELOC_NUMBER (R_MIPS_SCN_DISP
, 32)
70 RELOC_NUMBER (R_MIPS_REL16
, 33)
71 RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE
, 34)
72 RELOC_NUMBER (R_MIPS_PJUMP
, 35)
73 RELOC_NUMBER (R_MIPS_RELGOT
, 36)
74 RELOC_NUMBER (R_MIPS_JALR
, 37)
75 /* TLS relocations. */
76 RELOC_NUMBER (R_MIPS_TLS_DTPMOD32
, 38)
77 RELOC_NUMBER (R_MIPS_TLS_DTPREL32
, 39)
78 RELOC_NUMBER (R_MIPS_TLS_DTPMOD64
, 40)
79 RELOC_NUMBER (R_MIPS_TLS_DTPREL64
, 41)
80 RELOC_NUMBER (R_MIPS_TLS_GD
, 42)
81 RELOC_NUMBER (R_MIPS_TLS_LDM
, 43)
82 RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16
, 44)
83 RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16
, 45)
84 RELOC_NUMBER (R_MIPS_TLS_GOTTPREL
, 46)
85 RELOC_NUMBER (R_MIPS_TLS_TPREL32
, 47)
86 RELOC_NUMBER (R_MIPS_TLS_TPREL64
, 48)
87 RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16
, 49)
88 RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16
, 50)
89 RELOC_NUMBER (R_MIPS_GLOB_DAT
, 51)
90 FAKE_RELOC (R_MIPS_max
, 52)
91 /* These relocs are used for the mips16. */
92 FAKE_RELOC (R_MIPS16_min
, 100)
93 RELOC_NUMBER (R_MIPS16_26
, 100)
94 RELOC_NUMBER (R_MIPS16_GPREL
, 101)
95 RELOC_NUMBER (R_MIPS16_GOT16
, 102)
96 RELOC_NUMBER (R_MIPS16_CALL16
, 103)
97 RELOC_NUMBER (R_MIPS16_HI16
, 104)
98 RELOC_NUMBER (R_MIPS16_LO16
, 105)
99 RELOC_NUMBER (R_MIPS16_TLS_GD
, 106)
100 RELOC_NUMBER (R_MIPS16_TLS_LDM
, 107)
101 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16
, 108)
102 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16
, 109)
103 RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL
, 110)
104 RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16
, 111)
105 RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16
, 112)
106 FAKE_RELOC (R_MIPS16_max
, 113)
107 /* These relocations are specific to VxWorks. */
108 RELOC_NUMBER (R_MIPS_COPY
, 126)
109 RELOC_NUMBER (R_MIPS_JUMP_SLOT
, 127)
111 /* These relocations are specific to microMIPS. */
112 FAKE_RELOC (R_MICROMIPS_min
, 130)
113 RELOC_NUMBER (R_MICROMIPS_26_S1
, 133)
114 RELOC_NUMBER (R_MICROMIPS_HI16
, 134)
115 RELOC_NUMBER (R_MICROMIPS_LO16
, 135)
116 RELOC_NUMBER (R_MICROMIPS_GPREL16
, 136) /* In Elf 64:
117 alias R_MICROMIPS_GPREL */
118 RELOC_NUMBER (R_MICROMIPS_LITERAL
, 137)
119 RELOC_NUMBER (R_MICROMIPS_GOT16
, 138) /* In Elf 64:
120 alias R_MICROMIPS_GOT */
121 RELOC_NUMBER (R_MICROMIPS_PC7_S1
, 139)
122 RELOC_NUMBER (R_MICROMIPS_PC10_S1
, 140)
123 RELOC_NUMBER (R_MICROMIPS_PC16_S1
, 141)
124 RELOC_NUMBER (R_MICROMIPS_CALL16
, 142) /* In Elf 64:
125 alias R_MICROMIPS_CALL */
126 RELOC_NUMBER (R_MICROMIPS_GOT_DISP
, 145)
127 RELOC_NUMBER (R_MICROMIPS_GOT_PAGE
, 146)
128 RELOC_NUMBER (R_MICROMIPS_GOT_OFST
, 147)
129 RELOC_NUMBER (R_MICROMIPS_GOT_HI16
, 148)
130 RELOC_NUMBER (R_MICROMIPS_GOT_LO16
, 149)
131 RELOC_NUMBER (R_MICROMIPS_SUB
, 150)
132 RELOC_NUMBER (R_MICROMIPS_HIGHER
, 151)
133 RELOC_NUMBER (R_MICROMIPS_HIGHEST
, 152)
134 RELOC_NUMBER (R_MICROMIPS_CALL_HI16
, 153)
135 RELOC_NUMBER (R_MICROMIPS_CALL_LO16
, 154)
136 RELOC_NUMBER (R_MICROMIPS_SCN_DISP
, 155)
137 RELOC_NUMBER (R_MICROMIPS_JALR
, 156)
138 RELOC_NUMBER (R_MICROMIPS_HI0_LO16
, 157)
139 /* TLS relocations. */
140 RELOC_NUMBER (R_MICROMIPS_TLS_GD
, 162)
141 RELOC_NUMBER (R_MICROMIPS_TLS_LDM
, 163)
142 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16
, 164)
143 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16
, 165)
144 RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL
, 166)
145 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16
, 169)
146 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16
, 170)
147 /* microMIPS GP- and PC-relative relocations. */
148 RELOC_NUMBER (R_MICROMIPS_GPREL7_S2
, 172)
149 RELOC_NUMBER (R_MICROMIPS_PC23_S2
, 173)
150 FAKE_RELOC (R_MICROMIPS_max
, 174)
152 /* This was a GNU extension used by embedded-PIC. It was co-opted by
153 mips-linux for exception-handling data. GCC stopped using it in
154 May, 2004, then started using it again for compact unwind tables. */
155 RELOC_NUMBER (R_MIPS_PC32
, 248)
156 RELOC_NUMBER (R_MIPS_EH
, 249)
157 /* FIXME: this relocation is used internally by gas. */
158 RELOC_NUMBER (R_MIPS_GNU_REL16_S2
, 250)
159 /* These are GNU extensions to enable C++ vtable garbage collection. */
160 RELOC_NUMBER (R_MIPS_GNU_VTINHERIT
, 253)
161 RELOC_NUMBER (R_MIPS_GNU_VTENTRY
, 254)
162 END_RELOC_NUMBERS (R_MIPS_maxext
)
164 /* Processor specific flags for the ELF header e_flags field. */
166 /* At least one .noreorder directive appears in the source. */
167 #define EF_MIPS_NOREORDER 0x00000001
169 /* File contains position independent code. */
170 #define EF_MIPS_PIC 0x00000002
172 /* Code in file uses the standard calling sequence for calling
173 position independent code. */
174 #define EF_MIPS_CPIC 0x00000004
176 /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */
177 #define EF_MIPS_XGOT 0x00000008
179 /* Code in file uses UCODE (obsolete) */
180 #define EF_MIPS_UCODE 0x00000010
182 /* Code in file uses new ABI (-n32 on Irix 6). */
183 #define EF_MIPS_ABI2 0x00000020
185 /* Process the .MIPS.options section first by ld */
186 #define EF_MIPS_OPTIONS_FIRST 0x00000080
188 /* Indicates code compiled for a 64-bit machine in 32-bit mode
189 (regs are 32-bits wide). */
190 #define EF_MIPS_32BITMODE 0x00000100
192 /* 32-bit machine but FP registers are 64 bit (-mfp64). */
193 #define EF_MIPS_FP64 0x00000200
195 /* Code in file uses the IEEE 754-2008 NaN encoding convention. */
196 #define EF_MIPS_NAN2008 0x00000400
198 /* Architectural Extensions used by this file */
199 #define EF_MIPS_ARCH_ASE 0x0f000000
201 /* Use MDMX multimedia extensions */
202 #define EF_MIPS_ARCH_ASE_MDMX 0x08000000
204 /* Use MIPS-16 ISA extensions */
205 #define EF_MIPS_ARCH_ASE_M16 0x04000000
207 /* Use MICROMIPS ISA extensions. */
208 #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000
210 /* Four bit MIPS architecture field. */
211 #define EF_MIPS_ARCH 0xf0000000
214 #define E_MIPS_ARCH_1 0x00000000
217 #define E_MIPS_ARCH_2 0x10000000
220 #define E_MIPS_ARCH_3 0x20000000
223 #define E_MIPS_ARCH_4 0x30000000
226 #define E_MIPS_ARCH_5 0x40000000
229 #define E_MIPS_ARCH_32 0x50000000
232 #define E_MIPS_ARCH_64 0x60000000
234 /* -mips32r2 code. */
235 #define E_MIPS_ARCH_32R2 0x70000000
237 /* -mips64r2 code. */
238 #define E_MIPS_ARCH_64R2 0x80000000
240 /* The ABI of the file. Also see EF_MIPS_ABI2 above. */
241 #define EF_MIPS_ABI 0x0000F000
243 /* The original o32 abi. */
244 #define E_MIPS_ABI_O32 0x00001000
246 /* O32 extended to work on 64 bit architectures */
247 #define E_MIPS_ABI_O64 0x00002000
249 /* EABI in 32 bit mode */
250 #define E_MIPS_ABI_EABI32 0x00003000
252 /* EABI in 64 bit mode */
253 #define E_MIPS_ABI_EABI64 0x00004000
256 /* Machine variant if we know it. This field was invented at Cygnus,
257 but it is hoped that other vendors will adopt it. If some standard
258 is developed, this code should be changed to follow it. */
260 #define EF_MIPS_MACH 0x00FF0000
262 /* Cygnus is choosing values between 80 and 9F;
263 00 - 7F should be left for a future standard;
264 the rest are open. */
266 #define E_MIPS_MACH_3900 0x00810000
267 #define E_MIPS_MACH_4010 0x00820000
268 #define E_MIPS_MACH_4100 0x00830000
269 #define E_MIPS_MACH_4650 0x00850000
270 #define E_MIPS_MACH_4120 0x00870000
271 #define E_MIPS_MACH_4111 0x00880000
272 #define E_MIPS_MACH_SB1 0x008a0000
273 #define E_MIPS_MACH_OCTEON 0x008b0000
274 #define E_MIPS_MACH_XLR 0x008c0000
275 #define E_MIPS_MACH_OCTEON2 0x008d0000
276 #define E_MIPS_MACH_OCTEON3 0x008e0000
277 #define E_MIPS_MACH_5400 0x00910000
278 #define E_MIPS_MACH_5900 0x00920000
279 #define E_MIPS_MACH_5500 0x00980000
280 #define E_MIPS_MACH_9000 0x00990000
281 #define E_MIPS_MACH_LS2E 0x00A00000
282 #define E_MIPS_MACH_LS2F 0x00A10000
283 #define E_MIPS_MACH_LS3A 0x00A20000
285 /* Processor specific section indices. These sections do not actually
286 exist. Symbols with a st_shndx field corresponding to one of these
287 values have a special meaning. */
289 /* Defined and allocated common symbol. Value is virtual address. If
290 relocated, alignment must be preserved. */
291 #define SHN_MIPS_ACOMMON SHN_LORESERVE
293 /* Defined and allocated text symbol. Value is virtual address.
294 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
295 #define SHN_MIPS_TEXT (SHN_LORESERVE + 1)
297 /* Defined and allocated data symbol. Value is virtual address.
298 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
299 #define SHN_MIPS_DATA (SHN_LORESERVE + 2)
301 /* Small common symbol. */
302 #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3)
304 /* Small undefined symbol. */
305 #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4)
307 /* Processor specific section types. */
309 /* Section contains the set of dynamic shared objects used when
310 statically linking. */
311 #define SHT_MIPS_LIBLIST 0x70000000
313 /* I'm not sure what this is, but it's used on Irix 5. */
314 #define SHT_MIPS_MSYM 0x70000001
316 /* Section contains list of symbols whose definitions conflict with
317 symbols defined in shared objects. */
318 #define SHT_MIPS_CONFLICT 0x70000002
320 /* Section contains the global pointer table. */
321 #define SHT_MIPS_GPTAB 0x70000003
323 /* Section contains microcode information. The exact format is
325 #define SHT_MIPS_UCODE 0x70000004
327 /* Section contains some sort of debugging information. The exact
328 format is unspecified. It's probably ECOFF symbols. */
329 #define SHT_MIPS_DEBUG 0x70000005
331 /* Section contains register usage information. */
332 #define SHT_MIPS_REGINFO 0x70000006
335 #define SHT_MIPS_PACKAGE 0x70000007
338 #define SHT_MIPS_PACKSYM 0x70000008
341 #define SHT_MIPS_RELD 0x70000009
343 /* Section contains interface information. */
344 #define SHT_MIPS_IFACE 0x7000000b
346 /* Section contains description of contents of another section. */
347 #define SHT_MIPS_CONTENT 0x7000000c
349 /* Section contains miscellaneous options. */
350 #define SHT_MIPS_OPTIONS 0x7000000d
353 #define SHT_MIPS_SHDR 0x70000010
356 #define SHT_MIPS_FDESC 0x70000011
359 #define SHT_MIPS_EXTSYM 0x70000012
362 #define SHT_MIPS_DENSE 0x70000013
365 #define SHT_MIPS_PDESC 0x70000014
368 #define SHT_MIPS_LOCSYM 0x70000015
371 #define SHT_MIPS_AUXSYM 0x70000016
374 #define SHT_MIPS_OPTSYM 0x70000017
377 #define SHT_MIPS_LOCSTR 0x70000018
380 #define SHT_MIPS_LINE 0x70000019
383 #define SHT_MIPS_RFDESC 0x7000001a
385 /* Delta C++: symbol table */
386 #define SHT_MIPS_DELTASYM 0x7000001b
388 /* Delta C++: instance table */
389 #define SHT_MIPS_DELTAINST 0x7000001c
391 /* Delta C++: class table */
392 #define SHT_MIPS_DELTACLASS 0x7000001d
394 /* DWARF debugging section. */
395 #define SHT_MIPS_DWARF 0x7000001e
397 /* Delta C++: declarations */
398 #define SHT_MIPS_DELTADECL 0x7000001f
400 /* List of libraries the binary depends on. Includes a time stamp, version
402 #define SHT_MIPS_SYMBOL_LIB 0x70000020
404 /* Events section. */
405 #define SHT_MIPS_EVENTS 0x70000021
408 #define SHT_MIPS_TRANSLATE 0x70000022
410 /* Special pixie sections */
411 #define SHT_MIPS_PIXIE 0x70000023
413 /* Address translation table (for debug info) */
414 #define SHT_MIPS_XLATE 0x70000024
416 /* SGI internal address translation table (for debug info) */
417 #define SHT_MIPS_XLATE_DEBUG 0x70000025
419 /* Intermediate code */
420 #define SHT_MIPS_WHIRL 0x70000026
422 /* C++ exception handling region info */
423 #define SHT_MIPS_EH_REGION 0x70000027
425 /* Obsolete address translation table (for debug info) */
426 #define SHT_MIPS_XLATE_OLD 0x70000028
428 /* Runtime procedure descriptor table exception information (ucode) ??? */
429 #define SHT_MIPS_PDR_EXCEPTION 0x70000029
431 /* ABI related flags section. */
432 #define SHT_MIPS_ABIFLAGS 0x7000002a
434 /* A section of type SHT_MIPS_LIBLIST contains an array of the
435 following structure. The sh_link field is the section index of the
436 string table. The sh_info field is the number of entries in the
440 /* String table index for name of shared object. */
441 unsigned long l_name
;
443 unsigned long l_time_stamp
;
444 /* Checksum of symbol names and common sizes. */
445 unsigned long l_checksum
;
446 /* String table index for version. */
447 unsigned long l_version
;
449 unsigned long l_flags
;
452 /* The external version of Elf32_Lib. */
455 unsigned char l_name
[4];
456 unsigned char l_time_stamp
[4];
457 unsigned char l_checksum
[4];
458 unsigned char l_version
[4];
459 unsigned char l_flags
[4];
460 } Elf32_External_Lib
;
462 /* The l_flags field of an Elf32_Lib structure may contain the
465 /* Require an exact match at runtime. */
466 #define LL_EXACT_MATCH 0x00000001
468 /* Ignore version incompatibilities at runtime. */
469 #define LL_IGNORE_INT_VER 0x00000002
471 /* Require matching minor version number. */
472 #define LL_REQUIRE_MINOR 0x00000004
475 #define LL_EXPORTS 0x00000008
477 /* Delay loading of this library until really needed. */
478 #define LL_DELAY_LOAD 0x00000010
480 /* ??? Delta C++ stuff ??? */
481 #define LL_DELTA 0x00000020
484 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
485 .dynsym section. Each element has the following type. */
486 typedef unsigned long Elf32_Conflict
;
487 typedef unsigned char Elf32_External_Conflict
[4];
489 typedef unsigned long Elf64_Conflict
;
490 typedef unsigned char Elf64_External_Conflict
[8];
492 /* A section of type SHT_MIPS_GPTAB contains information about how
493 much GP space would be required for different -G arguments. This
494 information is only used so that the linker can provide informative
495 suggestions as to the best -G value to use. The sh_info field is
496 the index of the section for which this information applies. The
497 contents of the section are an array of the following union. The
498 first element uses the gt_header field. The remaining elements use
499 the gt_entry field. */
504 /* -G value actually used for this object file. */
505 unsigned long gt_current_g_value
;
507 unsigned long gt_unused
;
511 /* If this -G argument has been used... */
512 unsigned long gt_g_value
;
513 /* ...this many GP section bytes would be required. */
514 unsigned long gt_bytes
;
518 /* The external version of Elf32_gptab. */
524 unsigned char gt_current_g_value
[4];
525 unsigned char gt_unused
[4];
529 unsigned char gt_g_value
[4];
530 unsigned char gt_bytes
[4];
532 } Elf32_External_gptab
;
534 /* A section of type SHT_MIPS_REGINFO contains the following
538 /* Mask of general purpose registers used. */
539 unsigned long ri_gprmask
;
540 /* Mask of co-processor registers used. */
541 unsigned long ri_cprmask
[4];
542 /* GP register value for this object file. */
546 /* The external version of the Elf_RegInfo structure. */
549 unsigned char ri_gprmask
[4];
550 unsigned char ri_cprmask
[4][4];
551 unsigned char ri_gp_value
[4];
552 } Elf32_External_RegInfo
;
554 /* MIPS ELF .reginfo swapping routines. */
555 extern void bfd_mips_elf32_swap_reginfo_in
556 (bfd
*, const Elf32_External_RegInfo
*, Elf32_RegInfo
*);
557 extern void bfd_mips_elf32_swap_reginfo_out
558 (bfd
*, const Elf32_RegInfo
*, Elf32_External_RegInfo
*);
560 /* Processor specific section flags. */
562 /* This section must be in the global data area. */
563 #define SHF_MIPS_GPREL 0x10000000
565 /* This section should be merged. */
566 #define SHF_MIPS_MERGE 0x20000000
568 /* This section contains address data of size implied by section
570 #define SHF_MIPS_ADDR 0x40000000
572 /* This section contains string data. */
573 #define SHF_MIPS_STRING 0x80000000
575 /* This section may not be stripped. */
576 #define SHF_MIPS_NOSTRIP 0x08000000
578 /* This section is local to threads. */
579 #define SHF_MIPS_LOCAL 0x04000000
581 /* Linker should generate implicit weak names for this section. */
582 #define SHF_MIPS_NAMES 0x02000000
584 /* Section contais text/data which may be replicated in other sections.
585 Linker should retain only one copy. */
586 #define SHF_MIPS_NODUPES 0x01000000
588 /* Processor specific program header types. */
590 /* Register usage information. Identifies one .reginfo section. */
591 #define PT_MIPS_REGINFO 0x70000000
593 /* Runtime procedure table. */
594 #define PT_MIPS_RTPROC 0x70000001
596 /* .MIPS.options section. */
597 #define PT_MIPS_OPTIONS 0x70000002
599 /* Records ABI related flags. */
600 #define PT_MIPS_ABIFLAGS 0x70000003
602 /* Processor specific dynamic array tags. */
604 /* 32 bit version number for runtime linker interface. */
605 #define DT_MIPS_RLD_VERSION 0x70000001
608 #define DT_MIPS_TIME_STAMP 0x70000002
610 /* Checksum of external strings and common sizes. */
611 #define DT_MIPS_ICHECKSUM 0x70000003
613 /* Index of version string in string table. */
614 #define DT_MIPS_IVERSION 0x70000004
616 /* 32 bits of flags. */
617 #define DT_MIPS_FLAGS 0x70000005
619 /* Base address of the segment. */
620 #define DT_MIPS_BASE_ADDRESS 0x70000006
623 #define DT_MIPS_MSYM 0x70000007
625 /* Address of .conflict section. */
626 #define DT_MIPS_CONFLICT 0x70000008
628 /* Address of .liblist section. */
629 #define DT_MIPS_LIBLIST 0x70000009
631 /* Number of local global offset table entries. */
632 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
634 /* Number of entries in the .conflict section. */
635 #define DT_MIPS_CONFLICTNO 0x7000000b
637 /* Number of entries in the .liblist section. */
638 #define DT_MIPS_LIBLISTNO 0x70000010
640 /* Number of entries in the .dynsym section. */
641 #define DT_MIPS_SYMTABNO 0x70000011
643 /* Index of first external dynamic symbol not referenced locally. */
644 #define DT_MIPS_UNREFEXTNO 0x70000012
646 /* Index of first dynamic symbol in global offset table. */
647 #define DT_MIPS_GOTSYM 0x70000013
649 /* Number of page table entries in global offset table. */
650 #define DT_MIPS_HIPAGENO 0x70000014
652 /* Address of run time loader map, used for debugging. */
653 #define DT_MIPS_RLD_MAP 0x70000016
655 /* Delta C++ class definition. */
656 #define DT_MIPS_DELTA_CLASS 0x70000017
658 /* Number of entries in DT_MIPS_DELTA_CLASS. */
659 #define DT_MIPS_DELTA_CLASS_NO 0x70000018
661 /* Delta C++ class instances. */
662 #define DT_MIPS_DELTA_INSTANCE 0x70000019
664 /* Number of entries in DT_MIPS_DELTA_INSTANCE. */
665 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a
667 /* Delta relocations. */
668 #define DT_MIPS_DELTA_RELOC 0x7000001b
670 /* Number of entries in DT_MIPS_DELTA_RELOC. */
671 #define DT_MIPS_DELTA_RELOC_NO 0x7000001c
673 /* Delta symbols that Delta relocations refer to. */
674 #define DT_MIPS_DELTA_SYM 0x7000001d
676 /* Number of entries in DT_MIPS_DELTA_SYM. */
677 #define DT_MIPS_DELTA_SYM_NO 0x7000001e
679 /* Delta symbols that hold class declarations. */
680 #define DT_MIPS_DELTA_CLASSSYM 0x70000020
682 /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
683 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021
685 /* Flags indicating information about C++ flavor. */
686 #define DT_MIPS_CXX_FLAGS 0x70000022
688 /* Pixie information (???). */
689 #define DT_MIPS_PIXIE_INIT 0x70000023
691 /* Address of .MIPS.symlib */
692 #define DT_MIPS_SYMBOL_LIB 0x70000024
694 /* The GOT index of the first PTE for a segment */
695 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
697 /* The GOT index of the first PTE for a local symbol */
698 #define DT_MIPS_LOCAL_GOTIDX 0x70000026
700 /* The GOT index of the first PTE for a hidden symbol */
701 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027
703 /* The GOT index of the first PTE for a protected symbol */
704 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028
706 /* Address of `.MIPS.options'. */
707 #define DT_MIPS_OPTIONS 0x70000029
709 /* Address of `.interface'. */
710 #define DT_MIPS_INTERFACE 0x7000002a
713 #define DT_MIPS_DYNSTR_ALIGN 0x7000002b
715 /* Size of the .interface section. */
716 #define DT_MIPS_INTERFACE_SIZE 0x7000002c
718 /* Size of rld_text_resolve function stored in the GOT. */
719 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d
721 /* Default suffix of DSO to be added by rld on dlopen() calls. */
722 #define DT_MIPS_PERF_SUFFIX 0x7000002e
724 /* Size of compact relocation section (O32). */
725 #define DT_MIPS_COMPACT_SIZE 0x7000002f
727 /* GP value for auxiliary GOTs. */
728 #define DT_MIPS_GP_VALUE 0x70000030
730 /* Address of auxiliary .dynamic. */
731 #define DT_MIPS_AUX_DYNAMIC 0x70000031
733 /* Address of the base of the PLTGOT. */
734 #define DT_MIPS_PLTGOT 0x70000032
736 /* Points to the base of a writable PLT. */
737 #define DT_MIPS_RWPLT 0x70000034
739 /* Flags which may appear in a DT_MIPS_FLAGS entry. */
742 #define RHF_NONE 0x00000000
744 /* Uses shortcut pointers. */
745 #define RHF_QUICKSTART 0x00000001
747 /* Hash size is not a power of two. */
748 #define RHF_NOTPOT 0x00000002
750 /* Ignore LD_LIBRARY_PATH. */
751 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
753 /* DSO address may not be relocated. */
754 #define RHF_NO_MOVE 0x00000008
756 /* SGI specific features. */
757 #define RHF_SGI_ONLY 0x00000010
759 /* Guarantee that .init will finish executing before any non-init
760 code in DSO is called. */
761 #define RHF_GUARANTEE_INIT 0x00000020
763 /* Contains Delta C++ code. */
764 #define RHF_DELTA_C_PLUS_PLUS 0x00000040
766 /* Guarantee that .init will start executing before any non-init
767 code in DSO is called. */
768 #define RHF_GUARANTEE_START_INIT 0x00000080
770 /* Generated by pixie. */
771 #define RHF_PIXIE 0x00000100
773 /* Delay-load DSO by default. */
774 #define RHF_DEFAULT_DELAY_LOAD 0x00000200
776 /* Object may be requickstarted */
777 #define RHF_REQUICKSTART 0x00000400
779 /* Object has been requickstarted */
780 #define RHF_REQUICKSTARTED 0x00000800
782 /* Generated by cord. */
783 #define RHF_CORD 0x00001000
785 /* Object contains no unresolved undef symbols. */
786 #define RHF_NO_UNRES_UNDEF 0x00002000
788 /* Symbol table is in a safe order. */
789 #define RHF_RLD_ORDER_SAFE 0x00004000
791 /* Special values for the st_other field in the symbol table. These
792 are used in an Irix 5 dynamic symbol table. */
794 #define STO_DEFAULT STV_DEFAULT
795 #define STO_INTERNAL STV_INTERNAL
796 #define STO_HIDDEN STV_HIDDEN
797 #define STO_PROTECTED STV_PROTECTED
799 /* Two topmost bits denote the MIPS ISA for .text symbols:
800 + 00 -- standard MIPS code,
801 + 10 -- microMIPS code,
802 + 11 -- MIPS16 code; requires the following two bits to be set too.
803 Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below
805 #define STO_MIPS_ISA (3 << 6)
807 /* The mask spanning the rest of MIPS psABI flags. At most one is expected
808 to be set except for STO_MIPS16. */
809 #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
811 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
812 relocs. There are therefore two types of nonzero SHN_UNDEF functions:
813 PLT entries and traditional MIPS lazy binding stubs. We mark the former
814 with STO_MIPS_PLT to distinguish them from the latter. */
815 #define STO_MIPS_PLT 0x8
816 #define ELF_ST_IS_MIPS_PLT(other) \
817 ((ELF_ST_IS_MIPS16 (other) \
818 ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \
819 : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
820 #define ELF_ST_SET_MIPS_PLT(other) \
821 ((ELF_ST_IS_MIPS16 (other) \
822 ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \
823 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
825 /* This value is used to mark PIC functions in an object that mixes
826 PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
827 although MIPS16 symbols are never considered to be MIPS_PIC. */
828 #define STO_MIPS_PIC 0x20
829 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
830 #define ELF_ST_SET_MIPS_PIC(other) \
831 ((ELF_ST_IS_MIPS16 (other) \
832 ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \
833 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
835 /* This value is used for a mips16 .text symbol. */
836 #define STO_MIPS16 0xf0
837 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
838 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
840 /* This value is used for a microMIPS .text symbol. To distinguish from
841 STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
842 mask is STO_MIPS_ISA. */
843 #define STO_MICROMIPS (2 << 6)
844 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
845 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
847 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
848 has been indicated for a .text symbol. */
849 #define ELF_ST_IS_COMPRESSED(other) \
850 (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
852 /* This bit is used on Irix to indicate a symbol whose definition
853 is optional - if, at final link time, it cannot be found, no
854 error message should be produced. */
855 #define STO_OPTIONAL (1 << 2)
856 /* A macro to examine the STO_OPTIONAL bit. */
857 #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL)
859 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
860 relocation entry specifies up to three actual relocations, all at
861 the same address. The first relocation which required a symbol
862 uses the symbol in the r_sym field. The second relocation which
863 requires a symbol uses the symbol in the r_ssym field. If all
864 three relocations require a symbol, the third one uses a zero
867 /* An entry in a 64 bit SHT_REL section. */
871 /* Address of relocation. */
872 unsigned char r_offset
[8];
874 unsigned char r_sym
[4];
875 /* Special symbol. */
876 unsigned char r_ssym
[1];
877 /* Third relocation. */
878 unsigned char r_type3
[1];
879 /* Second relocation. */
880 unsigned char r_type2
[1];
881 /* First relocation. */
882 unsigned char r_type
[1];
883 } Elf64_Mips_External_Rel
;
887 /* Address of relocation. */
891 /* Special symbol. */
892 unsigned char r_ssym
;
893 /* Third relocation. */
894 unsigned char r_type3
;
895 /* Second relocation. */
896 unsigned char r_type2
;
897 /* First relocation. */
898 unsigned char r_type
;
899 } Elf64_Mips_Internal_Rel
;
901 /* An entry in a 64 bit SHT_RELA section. */
905 /* Address of relocation. */
906 unsigned char r_offset
[8];
908 unsigned char r_sym
[4];
909 /* Special symbol. */
910 unsigned char r_ssym
[1];
911 /* Third relocation. */
912 unsigned char r_type3
[1];
913 /* Second relocation. */
914 unsigned char r_type2
[1];
915 /* First relocation. */
916 unsigned char r_type
[1];
918 unsigned char r_addend
[8];
919 } Elf64_Mips_External_Rela
;
923 /* Address of relocation. */
927 /* Special symbol. */
928 unsigned char r_ssym
;
929 /* Third relocation. */
930 unsigned char r_type3
;
931 /* Second relocation. */
932 unsigned char r_type2
;
933 /* First relocation. */
934 unsigned char r_type
;
936 bfd_signed_vma r_addend
;
937 } Elf64_Mips_Internal_Rela
;
939 /* MIPS ELF 64 relocation info access macros. */
940 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
941 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
942 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
943 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
945 /* Values found in the r_ssym field of a relocation entry. */
953 /* Value of GP in object being relocated. */
956 /* Address of location being relocated. */
959 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
960 which starts with this header. */
964 /* Type of option. */
965 unsigned char kind
[1];
966 /* Size of option descriptor, including header. */
967 unsigned char size
[1];
968 /* Section index of affected section, or 0 for global option. */
969 unsigned char section
[2];
970 /* Information specific to this kind of option. */
971 unsigned char info
[4];
972 } Elf_External_Options
;
976 /* Type of option. */
978 /* Size of option descriptor, including header. */
980 /* Section index of affected section, or 0 for global option. */
981 unsigned short section
;
982 /* Information specific to this kind of option. */
984 } Elf_Internal_Options
;
986 /* MIPS ELF option header swapping routines. */
987 extern void bfd_mips_elf_swap_options_in
988 (bfd
*, const Elf_External_Options
*, Elf_Internal_Options
*);
989 extern void bfd_mips_elf_swap_options_out
990 (bfd
*, const Elf_Internal_Options
*, Elf_External_Options
*);
992 /* Values which may appear in the kind field of an Elf_Options
998 /* Register usage and GP value. */
999 #define ODK_REGINFO 1
1001 /* Exception processing information. */
1002 #define ODK_EXCEPTIONS 2
1004 /* Section padding information. */
1007 /* Hardware workarounds performed. */
1008 #define ODK_HWPATCH 4
1010 /* Fill value used by the linker. */
1013 /* Reserved space for desktop tools. */
1016 /* Hardware workarounds, AND bits when merging. */
1019 /* Hardware workarounds, OR bits when merging. */
1022 /* GP group to use for text/data sections. */
1023 #define ODK_GP_GROUP 9
1025 /* ID information. */
1026 #define ODK_IDENT 10
1028 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1029 structure. In the 64 bit ABI, it is the following structure. The
1030 info field of the options header is not used. */
1034 /* Mask of general purpose registers used. */
1035 unsigned char ri_gprmask
[4];
1037 unsigned char ri_pad
[4];
1038 /* Mask of co-processor registers used. */
1039 unsigned char ri_cprmask
[4][4];
1040 /* GP register value for this object file. */
1041 unsigned char ri_gp_value
[8];
1042 } Elf64_External_RegInfo
;
1046 /* Mask of general purpose registers used. */
1047 unsigned long ri_gprmask
;
1049 unsigned long ri_pad
;
1050 /* Mask of co-processor registers used. */
1051 unsigned long ri_cprmask
[4];
1052 /* GP register value for this object file. */
1053 bfd_vma ri_gp_value
;
1054 } Elf64_Internal_RegInfo
;
1056 /* ABI Flags structure version 0. */
1060 /* Version of flags structure. */
1061 unsigned char version
[2];
1062 /* The level of the ISA: 1-5, 32, 64. */
1063 unsigned char isa_level
[1];
1064 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1065 unsigned char isa_rev
[1];
1066 /* The size of general purpose registers. */
1067 unsigned char gpr_size
[1];
1068 /* The size of co-processor 1 registers. */
1069 unsigned char cpr1_size
[1];
1070 /* The size of co-processor 2 registers. */
1071 unsigned char cpr2_size
[1];
1072 /* The floating-point ABI. */
1073 unsigned char fp_abi
[1];
1074 /* Processor-specific extension. */
1075 unsigned char isa_ext
[4];
1076 /* Mask of ASEs used. */
1077 unsigned char ases
[4];
1078 /* Mask of general flags. */
1079 unsigned char flags1
[4];
1080 unsigned char flags2
[4];
1081 } Elf_External_ABIFlags_v0
;
1085 /* Version of flags structure. */
1086 unsigned short version
;
1087 /* The level of the ISA: 1-5, 32, 64. */
1088 unsigned char isa_level
;
1089 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1090 unsigned char isa_rev
;
1091 /* The size of general purpose registers. */
1092 unsigned char gpr_size
;
1093 /* The size of co-processor 1 registers. */
1094 unsigned char cpr1_size
;
1095 /* The size of co-processor 2 registers. */
1096 unsigned char cpr2_size
;
1097 /* The floating-point ABI. */
1098 unsigned char fp_abi
;
1099 /* Processor-specific extension. */
1100 unsigned long isa_ext
;
1101 /* Mask of ASEs used. */
1103 /* Mask of general flags. */
1104 unsigned long flags1
;
1105 unsigned long flags2
;
1106 } Elf_Internal_ABIFlags_v0
;
1110 /* The hash value computed from the name of the corresponding
1112 unsigned char ms_hash_value
[4];
1113 /* Contains both the dynamic relocation index and the symbol flags
1114 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1115 to access the individual values. The dynamic relocation index
1116 identifies the first entry in the .rel.dyn section that
1117 references the dynamic symbol corresponding to this msym entry.
1118 If the index is 0, no dynamic relocations are associated with the
1119 symbol. The symbol flags field is reserved for future use. */
1120 unsigned char ms_info
[4];
1121 } Elf32_External_Msym
;
1125 /* The hash value computed from the name of the corresponding
1127 unsigned long ms_hash_value
;
1128 /* Contains both the dynamic relocation index and the symbol flags
1129 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1130 to access the individual values. The dynamic relocation index
1131 identifies the first entry in the .rel.dyn section that
1132 references the dynamic symbol corresponding to this msym entry.
1133 If the index is 0, no dynamic relocations are associated with the
1134 symbol. The symbol flags field is reserved for future use. */
1135 unsigned long ms_info
;
1136 } Elf32_Internal_Msym
;
1138 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1139 #define ELF32_MS_FLAGS(i) (i) & 0xff)
1140 #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff))
1142 /* MIPS ELF reginfo swapping routines. */
1143 extern void bfd_mips_elf64_swap_reginfo_in
1144 (bfd
*, const Elf64_External_RegInfo
*, Elf64_Internal_RegInfo
*);
1145 extern void bfd_mips_elf64_swap_reginfo_out
1146 (bfd
*, const Elf64_Internal_RegInfo
*, Elf64_External_RegInfo
*);
1148 /* MIPS ELF flags swapping routines. */
1149 extern void bfd_mips_elf_swap_abiflags_v0_in
1150 (bfd
*, const Elf_External_ABIFlags_v0
*, Elf_Internal_ABIFlags_v0
*);
1151 extern void bfd_mips_elf_swap_abiflags_v0_out
1152 (bfd
*, const Elf_Internal_ABIFlags_v0
*, Elf_External_ABIFlags_v0
*);
1154 /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */
1155 #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */
1156 #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */
1157 #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */
1158 #define OEX_SMM 0x20000 /* Force sequential memory mode. */
1159 #define OEX_FPDBUG 0x40000 /* Force precise floating-point
1160 exceptions (debug mode). */
1161 #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */
1163 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */
1164 #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */
1165 #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */
1166 #define OEX_FPU_OFLO 0x04 /* Overflow exception. */
1167 #define OEX_FPU_UFLO 0x02 /* Underflow exception. */
1168 #define OEX_FPU_INEX 0x01 /* Inexact exception. */
1170 /* Masks for the info word of an ODK_PAD descriptor. */
1171 #define OPAD_PREFIX 0x01
1172 #define OPAD_POSTFIX 0x02
1173 #define OPAD_SYMBOL 0x04
1175 /* Masks for the info word of an ODK_HWPATCH descriptor. */
1176 #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */
1177 #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */
1178 #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */
1179 #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug
1181 #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned
1184 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */
1185 #define OGP_GROUP 0x0000ffff /* GP group number. */
1186 #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */
1188 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */
1189 #define OHWA0_R4KEOP_CHECKED 0x00000001
1190 #define OHWA0_R4KEOP_CLEAN 0x00000002
1192 /* Values for the xxx_size bytes of an ABI flags structure. */
1194 #define AFL_REG_NONE 0x00 /* No registers. */
1195 #define AFL_REG_32 0x01 /* 32-bit registers. */
1196 #define AFL_REG_64 0x02 /* 64-bit registers. */
1197 #define AFL_REG_128 0x03 /* 128-bit registers. */
1199 /* Masks for the ases word of an ABI flags structure. */
1201 #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */
1202 #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
1203 #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
1204 #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
1205 #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
1206 #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
1207 #define AFL_ASE_MT 0x00000040 /* MT ASE. */
1208 #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
1209 #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
1210 #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */
1211 #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
1212 #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
1213 #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
1215 /* Values for the isa_ext word of an ABI flags structure. */
1217 #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */
1218 #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
1219 #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
1220 #define AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */
1221 #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
1222 #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */
1223 #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */
1224 #define AFL_EXT_4010 8 /* LSI R4010 instruction. */
1225 #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */
1226 #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
1227 #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */
1228 #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
1229 #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
1230 #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */
1231 #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */
1232 #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */
1233 #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
1234 #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */
1236 /* Masks for the flags1 word of an ABI flags structure. */
1237 #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */
1239 extern unsigned int bfd_mips_isa_ext (bfd
*);
1242 /* Object attribute tags. */
1245 /* 0-3 are generic. */
1247 /* Floating-point ABI used by this object file. */
1248 Tag_GNU_MIPS_ABI_FP
= 4,
1250 /* MSA ABI used by this object file. */
1251 Tag_GNU_MIPS_ABI_MSA
= 8,
1254 /* Object attribute values. */
1257 /* Values defined for Tag_GNU_MIPS_ABI_FP. */
1259 /* Not tagged or not using any ABIs affected by the differences. */
1260 Val_GNU_MIPS_ABI_FP_ANY
= 0,
1262 /* Using hard-float -mdouble-float. */
1263 Val_GNU_MIPS_ABI_FP_DOUBLE
= 1,
1265 /* Using hard-float -msingle-float. */
1266 Val_GNU_MIPS_ABI_FP_SINGLE
= 2,
1268 /* Using soft-float. */
1269 Val_GNU_MIPS_ABI_FP_SOFT
= 3,
1271 /* Using -mips32r2 -mfp64. */
1272 Val_GNU_MIPS_ABI_FP_OLD_64
= 4,
1275 Val_GNU_MIPS_ABI_FP_XX
= 5,
1277 /* Using -mips32r2 -mfp64. */
1278 Val_GNU_MIPS_ABI_FP_64
= 6,
1280 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */
1281 Val_GNU_MIPS_ABI_FP_64A
= 7,
1283 /* Values defined for Tag_GNU_MIPS_ABI_MSA. */
1285 /* Not tagged or not using any ABIs affected by the differences. */
1286 Val_GNU_MIPS_ABI_MSA_ANY
= 0,
1288 /* Using 128-bit MSA. */
1289 Val_GNU_MIPS_ABI_MSA_128
= 1,
1292 #endif /* _ELF_MIPS_H */