include/linux/bcma/bcma.h

   1 #ifndef LINUX_BCMA_H_
   2 #define LINUX_BCMA_H_
   3
   4 #include <linux/pci.h>
   5 #include <linux/mod_devicetable.h>
   6
   7 #include <linux/bcma/bcma_driver_chipcommon.h>
   8 #include <linux/bcma/bcma_driver_pci.h>
   9 #include <linux/bcma/bcma_driver_pcie2.h>
  10 #include <linux/bcma/bcma_driver_mips.h>
  11 #include <linux/bcma/bcma_driver_gmac_cmn.h>
  12 #include <linux/ssb/ssb.h> /* SPROM sharing */
  13
  14 #include <linux/bcma/bcma_regs.h>
  15
  16 struct bcma_device;
  17 struct bcma_bus;
  18
  19 enum bcma_hosttype {
  20         BCMA_HOSTTYPE_PCI,
  21         BCMA_HOSTTYPE_SDIO,
  22         BCMA_HOSTTYPE_SOC,
  23 };
  24
  25 struct bcma_chipinfo {
  26         u16 id;
  27         u8 rev;
  28         u8 pkg;
  29 };
  30
  31 struct bcma_boardinfo {
  32         u16 vendor;
  33         u16 type;
  34 };
  35
  36 enum bcma_clkmode {
  37         BCMA_CLKMODE_FAST,
  38         BCMA_CLKMODE_DYNAMIC,
  39 };
  40
  41 struct bcma_host_ops {
  42         u8 (*read8)(struct bcma_device *core, u16 offset);
  43         u16 (*read16)(struct bcma_device *core, u16 offset);
  44         u32 (*read32)(struct bcma_device *core, u16 offset);
  45         void (*write8)(struct bcma_device *core, u16 offset, u8 value);
  46         void (*write16)(struct bcma_device *core, u16 offset, u16 value);
  47         void (*write32)(struct bcma_device *core, u16 offset, u32 value);
  48 #ifdef CONFIG_BCMA_BLOCKIO
  49         void (*block_read)(struct bcma_device *core, void *buffer,
  50                            size_t count, u16 offset, u8 reg_width);
  51         void (*block_write)(struct bcma_device *core, const void *buffer,
  52                             size_t count, u16 offset, u8 reg_width);
  53 #endif
  54         /* Agent ops */
  55         u32 (*aread32)(struct bcma_device *core, u16 offset);
  56         void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
  57 };
  58
  59 /* Core manufacturers */
  60 #define BCMA_MANUF_ARM                  0x43B
  61 #define BCMA_MANUF_MIPS                 0x4A7
  62 #define BCMA_MANUF_BCM                  0x4BF
  63
  64 /* Core class values. */
  65 #define BCMA_CL_SIM                     0x0
  66 #define BCMA_CL_EROM                    0x1
  67 #define BCMA_CL_CORESIGHT               0x9
  68 #define BCMA_CL_VERIF                   0xB
  69 #define BCMA_CL_OPTIMO                  0xD
  70 #define BCMA_CL_GEN                     0xE
  71 #define BCMA_CL_PRIMECELL               0xF
  72
  73 /* Core-ID values. */
  74 #define BCMA_CORE_OOB_ROUTER            0x367   /* Out of band */
  75 #define BCMA_CORE_4706_CHIPCOMMON       0x500
  76 #define BCMA_CORE_NS_PCIEG2             0x501
  77 #define BCMA_CORE_NS_DMA                0x502
  78 #define BCMA_CORE_NS_SDIO3              0x503
  79 #define BCMA_CORE_NS_USB20              0x504
  80 #define BCMA_CORE_NS_USB30              0x505
  81 #define BCMA_CORE_NS_A9JTAG             0x506
  82 #define BCMA_CORE_NS_DDR23              0x507
  83 #define BCMA_CORE_NS_ROM                0x508
  84 #define BCMA_CORE_NS_NAND               0x509
  85 #define BCMA_CORE_NS_QSPI               0x50A
  86 #define BCMA_CORE_NS_CHIPCOMMON_B       0x50B
  87 #define BCMA_CORE_4706_SOC_RAM          0x50E
  88 #define BCMA_CORE_ARMCA9                0x510
  89 #define BCMA_CORE_4706_MAC_GBIT         0x52D
  90 #define BCMA_CORE_AMEMC                 0x52E   /* DDR1/2 memory controller core */
  91 #define BCMA_CORE_ALTA                  0x534   /* I2S core */
  92 #define BCMA_CORE_4706_MAC_GBIT_COMMON  0x5DC
  93 #define BCMA_CORE_DDR23_PHY             0x5DD
  94 #define BCMA_CORE_INVALID               0x700
  95 #define BCMA_CORE_CHIPCOMMON            0x800
  96 #define BCMA_CORE_ILINE20               0x801
  97 #define BCMA_CORE_SRAM                  0x802
  98 #define BCMA_CORE_SDRAM                 0x803
  99 #define BCMA_CORE_PCI                   0x804
 100 #define BCMA_CORE_MIPS                  0x805
 101 #define BCMA_CORE_ETHERNET              0x806
 102 #define BCMA_CORE_V90                   0x807
 103 #define BCMA_CORE_USB11_HOSTDEV         0x808
 104 #define BCMA_CORE_ADSL                  0x809
 105 #define BCMA_CORE_ILINE100              0x80A
 106 #define BCMA_CORE_IPSEC                 0x80B
 107 #define BCMA_CORE_UTOPIA                0x80C
 108 #define BCMA_CORE_PCMCIA                0x80D
 109 #define BCMA_CORE_INTERNAL_MEM          0x80E
 110 #define BCMA_CORE_MEMC_SDRAM            0x80F
 111 #define BCMA_CORE_OFDM                  0x810
 112 #define BCMA_CORE_EXTIF                 0x811
 113 #define BCMA_CORE_80211                 0x812
 114 #define BCMA_CORE_PHY_A                 0x813
 115 #define BCMA_CORE_PHY_B                 0x814
 116 #define BCMA_CORE_PHY_G                 0x815
 117 #define BCMA_CORE_MIPS_3302             0x816
 118 #define BCMA_CORE_USB11_HOST            0x817
 119 #define BCMA_CORE_USB11_DEV             0x818
 120 #define BCMA_CORE_USB20_HOST            0x819
 121 #define BCMA_CORE_USB20_DEV             0x81A
 122 #define BCMA_CORE_SDIO_HOST             0x81B
 123 #define BCMA_CORE_ROBOSWITCH            0x81C
 124 #define BCMA_CORE_PARA_ATA              0x81D
 125 #define BCMA_CORE_SATA_XORDMA           0x81E
 126 #define BCMA_CORE_ETHERNET_GBIT         0x81F
 127 #define BCMA_CORE_PCIE                  0x820
 128 #define BCMA_CORE_PHY_N                 0x821
 129 #define BCMA_CORE_SRAM_CTL              0x822
 130 #define BCMA_CORE_MINI_MACPHY           0x823
 131 #define BCMA_CORE_ARM_1176              0x824
 132 #define BCMA_CORE_ARM_7TDMI             0x825
 133 #define BCMA_CORE_PHY_LP                0x826
 134 #define BCMA_CORE_PMU                   0x827
 135 #define BCMA_CORE_PHY_SSN               0x828
 136 #define BCMA_CORE_SDIO_DEV              0x829
 137 #define BCMA_CORE_ARM_CM3               0x82A
 138 #define BCMA_CORE_PHY_HT                0x82B
 139 #define BCMA_CORE_MIPS_74K              0x82C
 140 #define BCMA_CORE_MAC_GBIT              0x82D
 141 #define BCMA_CORE_DDR12_MEM_CTL         0x82E
 142 #define BCMA_CORE_PCIE_RC               0x82F   /* PCIe Root Complex */
 143 #define BCMA_CORE_OCP_OCP_BRIDGE        0x830
 144 #define BCMA_CORE_SHARED_COMMON         0x831
 145 #define BCMA_CORE_OCP_AHB_BRIDGE        0x832
 146 #define BCMA_CORE_SPI_HOST              0x833
 147 #define BCMA_CORE_I2S                   0x834
 148 #define BCMA_CORE_SDR_DDR1_MEM_CTL      0x835   /* SDR/DDR1 memory controller core */
 149 #define BCMA_CORE_SHIM                  0x837   /* SHIM component in ubus/6362 */
 150 #define BCMA_CORE_PHY_AC                0x83B
 151 #define BCMA_CORE_PCIE2                 0x83C   /* PCI Express Gen2 */
 152 #define BCMA_CORE_USB30_DEV             0x83D
 153 #define BCMA_CORE_ARM_CR4               0x83E
 154 #define BCMA_CORE_DEFAULT               0xFFF
 155
 156 #define BCMA_MAX_NR_CORES               16
 157
 158 /* Chip IDs of PCIe devices */
 159 #define BCMA_CHIP_ID_BCM4313    0x4313
 160 #define BCMA_CHIP_ID_BCM43142   43142
 161 #define BCMA_CHIP_ID_BCM43131   43131
 162 #define BCMA_CHIP_ID_BCM43217   43217
 163 #define BCMA_CHIP_ID_BCM43222   43222
 164 #define BCMA_CHIP_ID_BCM43224   43224
 165 #define  BCMA_PKG_ID_BCM43224_FAB_CSM   0x8
 166 #define  BCMA_PKG_ID_BCM43224_FAB_SMIC  0xa
 167 #define BCMA_CHIP_ID_BCM43225   43225
 168 #define BCMA_CHIP_ID_BCM43227   43227
 169 #define BCMA_CHIP_ID_BCM43228   43228
 170 #define BCMA_CHIP_ID_BCM43421   43421
 171 #define BCMA_CHIP_ID_BCM43428   43428
 172 #define BCMA_CHIP_ID_BCM43431   43431
 173 #define BCMA_CHIP_ID_BCM43460   43460
 174 #define BCMA_CHIP_ID_BCM4331    0x4331
 175 #define BCMA_CHIP_ID_BCM6362    0x6362
 176 #define BCMA_CHIP_ID_BCM4360    0x4360
 177 #define BCMA_CHIP_ID_BCM4352    0x4352
 178
 179 /* Chip IDs of SoCs */
 180 #define BCMA_CHIP_ID_BCM4706    0x5300
 181 #define  BCMA_PKG_ID_BCM4706L   1
 182 #define BCMA_CHIP_ID_BCM4716    0x4716
 183 #define  BCMA_PKG_ID_BCM4716    8
 184 #define  BCMA_PKG_ID_BCM4717    9
 185 #define  BCMA_PKG_ID_BCM4718    10
 186 #define BCMA_CHIP_ID_BCM47162   47162
 187 #define BCMA_CHIP_ID_BCM4748    0x4748
 188 #define BCMA_CHIP_ID_BCM4749    0x4749
 189 #define BCMA_CHIP_ID_BCM5356    0x5356
 190 #define BCMA_CHIP_ID_BCM5357    0x5357
 191 #define  BCMA_PKG_ID_BCM5358    9
 192 #define  BCMA_PKG_ID_BCM47186   10
 193 #define  BCMA_PKG_ID_BCM5357    11
 194 #define BCMA_CHIP_ID_BCM53572   53572
 195 #define  BCMA_PKG_ID_BCM47188   9
 196 #define BCMA_CHIP_ID_BCM4707    53010
 197 #define  BCMA_PKG_ID_BCM4707    1
 198 #define  BCMA_PKG_ID_BCM4708    2
 199 #define  BCMA_PKG_ID_BCM4709    0
 200 #define BCMA_CHIP_ID_BCM53018   53018
 201
 202 /* Board types (on PCI usually equals to the subsystem dev id) */
 203 /* BCM4313 */
 204 #define BCMA_BOARD_TYPE_BCM94313BU      0X050F
 205 #define BCMA_BOARD_TYPE_BCM94313HM      0X0510
 206 #define BCMA_BOARD_TYPE_BCM94313EPA     0X0511
 207 #define BCMA_BOARD_TYPE_BCM94313HMG     0X051C
 208 /* BCM4716 */
 209 #define BCMA_BOARD_TYPE_BCM94716NR2     0X04CD
 210 /* BCM43224 */
 211 #define BCMA_BOARD_TYPE_BCM943224X21    0X056E
 212 #define BCMA_BOARD_TYPE_BCM943224X21_FCC        0X00D1
 213 #define BCMA_BOARD_TYPE_BCM943224X21B   0X00E9
 214 #define BCMA_BOARD_TYPE_BCM943224M93    0X008B
 215 #define BCMA_BOARD_TYPE_BCM943224M93A   0X0090
 216 #define BCMA_BOARD_TYPE_BCM943224X16    0X0093
 217 #define BCMA_BOARD_TYPE_BCM94322X9      0X008D
 218 #define BCMA_BOARD_TYPE_BCM94322M35E    0X008E
 219 /* BCM43228 */
 220 #define BCMA_BOARD_TYPE_BCM943228BU8    0X0540
 221 #define BCMA_BOARD_TYPE_BCM943228BU9    0X0541
 222 #define BCMA_BOARD_TYPE_BCM943228BU     0X0542
 223 #define BCMA_BOARD_TYPE_BCM943227HM4L   0X0543
 224 #define BCMA_BOARD_TYPE_BCM943227HMB    0X0544
 225 #define BCMA_BOARD_TYPE_BCM943228HM4L   0X0545
 226 #define BCMA_BOARD_TYPE_BCM943228SD     0X0573
 227 /* BCM4331 */
 228 #define BCMA_BOARD_TYPE_BCM94331X19     0X00D6
 229 #define BCMA_BOARD_TYPE_BCM94331X28     0X00E4
 230 #define BCMA_BOARD_TYPE_BCM94331X28B    0X010E
 231 #define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX       0X00E4
 232 #define BCMA_BOARD_TYPE_BCM94331X12_2G  0X00EC
 233 #define BCMA_BOARD_TYPE_BCM94331X12_5G  0X00ED
 234 #define BCMA_BOARD_TYPE_BCM94331X29B    0X00EF
 235 #define BCMA_BOARD_TYPE_BCM94331CSAX    0X00EF
 236 #define BCMA_BOARD_TYPE_BCM94331X19C    0X00F5
 237 #define BCMA_BOARD_TYPE_BCM94331X33     0X00F4
 238 #define BCMA_BOARD_TYPE_BCM94331BU      0X0523
 239 #define BCMA_BOARD_TYPE_BCM94331S9BU    0X0524
 240 #define BCMA_BOARD_TYPE_BCM94331MC      0X0525
 241 #define BCMA_BOARD_TYPE_BCM94331MCI     0X0526
 242 #define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527
 243 #define BCMA_BOARD_TYPE_BCM94331HM      0X0574
 244 #define BCMA_BOARD_TYPE_BCM94331PCIEDUAL        0X059B
 245 #define BCMA_BOARD_TYPE_BCM94331MCH5    0X05A9
 246 #define BCMA_BOARD_TYPE_BCM94331CS      0X05C6
 247 #define BCMA_BOARD_TYPE_BCM94331CD      0X05DA
 248 /* BCM53572 */
 249 #define BCMA_BOARD_TYPE_BCM953572BU     0X058D
 250 #define BCMA_BOARD_TYPE_BCM953572NR2    0X058E
 251 #define BCMA_BOARD_TYPE_BCM947188NR2    0X058F
 252 #define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590
 253 /* BCM43142 */
 254 #define BCMA_BOARD_TYPE_BCM943142HM     0X05E0
 255
 256 struct bcma_device {
 257         struct bcma_bus *bus;
 258         struct bcma_device_id id;
 259
 260         struct device dev;
 261         struct device *dma_dev;
 262
 263         unsigned int irq;
 264         bool dev_registered;
 265
 266         u8 core_index;
 267         u8 core_unit;
 268
 269         u32 addr;
 270         u32 addr_s[8];
 271         u32 wrap;
 272
 273         void __iomem *io_addr;
 274         void __iomem *io_wrap;
 275
 276         void *drvdata;
 277         struct list_head list;
 278 };
 279
 280 static inline void *bcma_get_drvdata(struct bcma_device *core)
 281 {
 282         return core->drvdata;
 283 }
 284 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
 285 {
 286         core->drvdata = drvdata;
 287 }
 288
 289 struct bcma_driver {
 290         const char *name;
 291         const struct bcma_device_id *id_table;
 292
 293         int (*probe)(struct bcma_device *dev);
 294         void (*remove)(struct bcma_device *dev);
 295         int (*suspend)(struct bcma_device *dev);
 296         int (*resume)(struct bcma_device *dev);
 297         void (*shutdown)(struct bcma_device *dev);
 298
 299         struct device_driver drv;
 300 };
 301 extern
 302 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
 303 #define bcma_driver_register(drv) \
 304         __bcma_driver_register(drv, THIS_MODULE)
 305
 306 extern void bcma_driver_unregister(struct bcma_driver *drv);
 307
 308 /* Set a fallback SPROM.
 309  * See kdoc at the function definition for complete documentation. */
 310 extern int bcma_arch_register_fallback_sprom(
 311                 int (*sprom_callback)(struct bcma_bus *bus,
 312                 struct ssb_sprom *out));
 313
 314 struct bcma_bus {
 315         /* The MMIO area. */
 316         void __iomem *mmio;
 317
 318         const struct bcma_host_ops *ops;
 319
 320         enum bcma_hosttype hosttype;
 321         union {
 322                 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
 323                 struct pci_dev *host_pci;
 324                 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
 325                 struct sdio_func *host_sdio;
 326                 /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
 327                 struct platform_device *host_pdev;
 328         };
 329
 330         struct bcma_chipinfo chipinfo;
 331
 332         struct bcma_boardinfo boardinfo;
 333
 334         struct bcma_device *mapped_core;
 335         struct list_head cores;
 336         u8 nr_cores;
 337         u8 num;
 338
 339         struct bcma_drv_cc drv_cc;
 340         struct bcma_drv_cc_b drv_cc_b;
 341         struct bcma_drv_pci drv_pci[2];
 342         struct bcma_drv_pcie2 drv_pcie2;
 343         struct bcma_drv_mips drv_mips;
 344         struct bcma_drv_gmac_cmn drv_gmac_cmn;
 345
 346         /* We decided to share SPROM struct with SSB as long as we do not need
 347          * any hacks for BCMA. This simplifies drivers code. */
 348         struct ssb_sprom sprom;
 349 };
 350
 351 static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
 352 {
 353         return core->bus->ops->read8(core, offset);
 354 }
 355 static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
 356 {
 357         return core->bus->ops->read16(core, offset);
 358 }
 359 static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
 360 {
 361         return core->bus->ops->read32(core, offset);
 362 }
 363 static inline
 364 void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
 365 {
 366         core->bus->ops->write8(core, offset, value);
 367 }
 368 static inline
 369 void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
 370 {
 371         core->bus->ops->write16(core, offset, value);
 372 }
 373 static inline
 374 void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
 375 {
 376         core->bus->ops->write32(core, offset, value);
 377 }
 378 #ifdef CONFIG_BCMA_BLOCKIO
 379 static inline void bcma_block_read(struct bcma_device *core, void *buffer,
 380                                    size_t count, u16 offset, u8 reg_width)
 381 {
 382         core->bus->ops->block_read(core, buffer, count, offset, reg_width);
 383 }
 384 static inline void bcma_block_write(struct bcma_device *core,
 385                                     const void *buffer, size_t count,
 386                                     u16 offset, u8 reg_width)
 387 {
 388         core->bus->ops->block_write(core, buffer, count, offset, reg_width);
 389 }
 390 #endif
 391 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
 392 {
 393         return core->bus->ops->aread32(core, offset);
 394 }
 395 static inline
 396 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
 397 {
 398         core->bus->ops->awrite32(core, offset, value);
 399 }
 400
 401 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
 402 {
 403         bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
 404 }
 405 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
 406 {
 407         bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
 408 }
 409 static inline void bcma_maskset32(struct bcma_device *cc,
 410                                   u16 offset, u32 mask, u32 set)
 411 {
 412         bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
 413 }
 414 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
 415 {
 416         bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
 417 }
 418 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
 419 {
 420         bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
 421 }
 422 static inline void bcma_maskset16(struct bcma_device *cc,
 423                                   u16 offset, u16 mask, u16 set)
 424 {
 425         bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
 426 }
 427
 428 extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
 429                                                u8 unit);
 430 static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus,
 431                                                  u16 coreid)
 432 {
 433         return bcma_find_core_unit(bus, coreid, 0);
 434 }
 435
 436 extern bool bcma_core_is_enabled(struct bcma_device *core);
 437 extern void bcma_core_disable(struct bcma_device *core, u32 flags);
 438 extern int bcma_core_enable(struct bcma_device *core, u32 flags);
 439 extern void bcma_core_set_clockmode(struct bcma_device *core,
 440                                     enum bcma_clkmode clkmode);
 441 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
 442                               bool on);
 443 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
 444 #define BCMA_DMA_TRANSLATION_MASK       0xC0000000
 445 #define  BCMA_DMA_TRANSLATION_NONE      0x00000000
 446 #define  BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
 447 #define  BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
 448 extern u32 bcma_core_dma_translation(struct bcma_device *core);
 449
 450 #endif /* LINUX_BCMA_H_ */