include/linux/dma-mapping.h

   1 #ifndef _LINUX_DMA_MAPPING_H
   2 #define _LINUX_DMA_MAPPING_H
   3
   4 #include <linux/device.h>
   5 #include <linux/err.h>
   6 #include <linux/dma-attrs.h>
   7 #include <linux/scatterlist.h>
   8
   9 /* These definitions mirror those in pci.h, so they can be used
  10  * interchangeably with their PCI_ counterparts */
  11 enum dma_data_direction {
  12         DMA_BIDIRECTIONAL = 0,
  13         DMA_TO_DEVICE = 1,
  14         DMA_FROM_DEVICE = 2,
  15         DMA_NONE = 3,
  16 };
  17
  18 struct dma_map_ops {
  19         void* (*alloc_coherent)(struct device *dev, size_t size,
  20                                 dma_addr_t *dma_handle, gfp_t gfp);
  21         void (*free_coherent)(struct device *dev, size_t size,
  22                               void *vaddr, dma_addr_t dma_handle);
  23         dma_addr_t (*map_page)(struct device *dev, struct page *page,
  24                                unsigned long offset, size_t size,
  25                                enum dma_data_direction dir,
  26                                struct dma_attrs *attrs);
  27         void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
  28                            size_t size, enum dma_data_direction dir,
  29                            struct dma_attrs *attrs);
  30         int (*map_sg)(struct device *dev, struct scatterlist *sg,
  31                       int nents, enum dma_data_direction dir,
  32                       struct dma_attrs *attrs);
  33         void (*unmap_sg)(struct device *dev,
  34                          struct scatterlist *sg, int nents,
  35                          enum dma_data_direction dir,
  36                          struct dma_attrs *attrs);
  37         void (*sync_single_for_cpu)(struct device *dev,
  38                                     dma_addr_t dma_handle, size_t size,
  39                                     enum dma_data_direction dir);
  40         void (*sync_single_for_device)(struct device *dev,
  41                                        dma_addr_t dma_handle, size_t size,
  42                                        enum dma_data_direction dir);
  43         void (*sync_single_range_for_cpu)(struct device *dev,
  44                                           dma_addr_t dma_handle,
  45                                           unsigned long offset,
  46                                           size_t size,
  47                                           enum dma_data_direction dir);
  48         void (*sync_single_range_for_device)(struct device *dev,
  49                                              dma_addr_t dma_handle,
  50                                              unsigned long offset,
  51                                              size_t size,
  52                                              enum dma_data_direction dir);
  53         void (*sync_sg_for_cpu)(struct device *dev,
  54                                 struct scatterlist *sg, int nents,
  55                                 enum dma_data_direction dir);
  56         void (*sync_sg_for_device)(struct device *dev,
  57                                    struct scatterlist *sg, int nents,
  58                                    enum dma_data_direction dir);
  59         int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
  60         int (*dma_supported)(struct device *dev, u64 mask);
  61         int (*set_dma_mask)(struct device *dev, u64 mask);
  62         int is_phys;
  63 };
  64
  65 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
  66
  67 typedef u64 DMA_nnBIT_MASK __deprecated;
  68
  69 /*
  70  * NOTE: do not use the below macros in new code and do not add new definitions
  71  * here.
  72  *
  73  * Instead, just open-code DMA_BIT_MASK(n) within your driver
  74  */
  75 #define DMA_64BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
  76 #define DMA_48BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
  77 #define DMA_47BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
  78 #define DMA_40BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
  79 #define DMA_39BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
  80 #define DMA_35BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
  81 #define DMA_32BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
  82 #define DMA_31BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
  83 #define DMA_30BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
  84 #define DMA_29BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
  85 #define DMA_28BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
  86 #define DMA_24BIT_MASK  (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
  87
  88 #define DMA_MASK_NONE   0x0ULL
  89
  90 static inline int valid_dma_direction(int dma_direction)
  91 {
  92         return ((dma_direction == DMA_BIDIRECTIONAL) ||
  93                 (dma_direction == DMA_TO_DEVICE) ||
  94                 (dma_direction == DMA_FROM_DEVICE));
  95 }
  96
  97 static inline int is_device_dma_capable(struct device *dev)
  98 {
  99         return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
 100 }
 101
 102 #ifdef CONFIG_HAS_DMA
 103 #include <asm/dma-mapping.h>
 104 #else
 105 #include <asm-generic/dma-mapping-broken.h>
 106 #endif
 107
 108 /* for backwards compatibility, removed soon */
 109 static inline void __deprecated dma_sync_single(struct device *dev,
 110                                                 dma_addr_t addr, size_t size,
 111                                                 enum dma_data_direction dir)
 112 {
 113         dma_sync_single_for_cpu(dev, addr, size, dir);
 114 }
 115
 116 static inline void __deprecated dma_sync_sg(struct device *dev,
 117                                             struct scatterlist *sg, int nelems,
 118                                             enum dma_data_direction dir)
 119 {
 120         dma_sync_sg_for_cpu(dev, sg, nelems, dir);
 121 }
 122
 123 static inline u64 dma_get_mask(struct device *dev)
 124 {
 125         if (dev && dev->dma_mask && *dev->dma_mask)
 126                 return *dev->dma_mask;
 127         return DMA_BIT_MASK(32);
 128 }
 129
 130 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
 131 {
 132         if (!dma_supported(dev, mask))
 133                 return -EIO;
 134         dev->coherent_dma_mask = mask;
 135         return 0;
 136 }
 137
 138 extern u64 dma_get_required_mask(struct device *dev);
 139
 140 static inline unsigned int dma_get_max_seg_size(struct device *dev)
 141 {
 142         return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
 143 }
 144
 145 static inline unsigned int dma_set_max_seg_size(struct device *dev,
 146                                                 unsigned int size)
 147 {
 148         if (dev->dma_parms) {
 149                 dev->dma_parms->max_segment_size = size;
 150                 return 0;
 151         } else
 152                 return -EIO;
 153 }
 154
 155 static inline unsigned long dma_get_seg_boundary(struct device *dev)
 156 {
 157         return dev->dma_parms ?
 158                 dev->dma_parms->segment_boundary_mask : 0xffffffff;
 159 }
 160
 161 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
 162 {
 163         if (dev->dma_parms) {
 164                 dev->dma_parms->segment_boundary_mask = mask;
 165                 return 0;
 166         } else
 167                 return -EIO;
 168 }
 169
 170 /* flags for the coherent memory api */
 171 #define DMA_MEMORY_MAP                  0x01
 172 #define DMA_MEMORY_IO                   0x02
 173 #define DMA_MEMORY_INCLUDES_CHILDREN    0x04
 174 #define DMA_MEMORY_EXCLUSIVE            0x08
 175
 176 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
 177 static inline int
 178 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
 179                             dma_addr_t device_addr, size_t size, int flags)
 180 {
 181         return 0;
 182 }
 183
 184 static inline void
 185 dma_release_declared_memory(struct device *dev)
 186 {
 187 }
 188
 189 static inline void *
 190 dma_mark_declared_memory_occupied(struct device *dev,
 191                                   dma_addr_t device_addr, size_t size)
 192 {
 193         return ERR_PTR(-EBUSY);
 194 }
 195 #endif
 196
 197 /*
 198  * Managed DMA API
 199  */
 200 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
 201                                  dma_addr_t *dma_handle, gfp_t gfp);
 202 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
 203                                dma_addr_t dma_handle);
 204 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
 205                                     dma_addr_t *dma_handle, gfp_t gfp);
 206 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 207                                   dma_addr_t dma_handle);
 208 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
 209 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
 210                                         dma_addr_t device_addr, size_t size,
 211                                         int flags);
 212 extern void dmam_release_declared_memory(struct device *dev);
 213 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
 214 static inline int dmam_declare_coherent_memory(struct device *dev,
 215                                 dma_addr_t bus_addr, dma_addr_t device_addr,
 216                                 size_t size, gfp_t gfp)
 217 {
 218         return 0;
 219 }
 220
 221 static inline void dmam_release_declared_memory(struct device *dev)
 222 {
 223 }
 224 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
 225
 226 #ifndef CONFIG_HAVE_DMA_ATTRS
 227 struct dma_attrs;
 228
 229 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
 230         dma_map_single(dev, cpu_addr, size, dir)
 231
 232 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
 233         dma_unmap_single(dev, dma_addr, size, dir)
 234
 235 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
 236         dma_map_sg(dev, sgl, nents, dir)
 237
 238 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
 239         dma_unmap_sg(dev, sgl, nents, dir)
 240
 241 #endif /* CONFIG_HAVE_DMA_ATTRS */
 242
 243 #ifdef CONFIG_NEED_DMA_MAP_STATE
 244 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
 245 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
 246 #define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
 247 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
 248 #define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
 249 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
 250 #else
 251 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
 252 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
 253 #define dma_unmap_addr(PTR, ADDR_NAME)           (0)
 254 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
 255 #define dma_unmap_len(PTR, LEN_NAME)             (0)
 256 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
 257 #endif
 258
 259 #endif