2 * include/linux/fsl_devices.h
4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices
7 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
9 * Copyright 2004,2012 Freescale Semiconductor, Inc
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #ifndef _FSL_DEVICE_H_
18 #define _FSL_DEVICE_H_
20 #define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
21 PHY CLK to become stable - 10ms*/
22 #define FSL_USB_VER_OLD 0
23 #define FSL_USB_VER_1_6 1
24 #define FSL_USB_VER_2_2 2
26 #include <linux/types.h>
29 * Some conventions on how we handle peripherals on Freescale chips
31 * unique device: a platform_device entry in fsl_plat_devs[] plus
32 * associated device information in its platform_data structure.
34 * A chip is described by a set of unique devices.
36 * Each sub-arch has its own master list of unique devices and
37 * enumerates them by enum fsl_devices in a sub-arch specific header
39 * The platform data structure is broken into two parts. The
40 * first is device specific information that help identify any
41 * unique features of a peripheral. The second is any
42 * information that may be defined by the board or how the device
43 * is connected externally of the chip.
46 * - platform data structures: <driver>_platform_data
47 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
48 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
52 enum fsl_usb2_operating_modes
{
59 enum fsl_usb2_phy_modes
{
63 FSL_USB2_PHY_UTMI_WIDE
,
68 struct platform_device
;
70 struct fsl_usb2_platform_data
{
71 /* board specific information */
73 enum fsl_usb2_operating_modes operating_mode
;
74 enum fsl_usb2_phy_modes phy_mode
;
75 unsigned int port_enables
;
76 unsigned int workaround
;
78 int (*init
)(struct platform_device
*);
79 void (*exit
)(struct platform_device
*);
80 void __iomem
*regs
; /* ioremap'd register base */
82 unsigned power_budget
; /* hcd->power_budget */
83 unsigned big_endian_mmio
:1;
84 unsigned big_endian_desc
:1;
85 unsigned es
:1; /* need USBMODE:ES */
86 unsigned le_setup_buf
:1;
87 unsigned have_sysif_regs
:1;
88 unsigned invert_drvvbus
:1;
89 unsigned invert_pwr_fault
:1;
92 unsigned already_suspended
:1;
94 /* register save area for suspend/resume */
102 u32 pm_configured_flag
;
107 /* Flags in fsl_usb2_mph_platform_data */
108 #define FSL_USB2_PORT0_ENABLED 0x00000001
109 #define FSL_USB2_PORT1_ENABLED 0x00000002
111 #define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
115 struct fsl_spi_platform_data
{
116 u32 initial_spmode
; /* initial SPMODE value */
119 #define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
120 #define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
121 #define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
122 #define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
123 #define SPI_QE (1 << 4) /* SPI unit is in QE block */
124 /* board specific information */
126 void (*cs_control
)(struct spi_device
*spi
, bool on
);
130 struct mpc8xx_pcmcia_ops
{
131 void(*hw_ctrl
)(int slot
, int enable
);
132 int(*voltage_set
)(int slot
, int vcc
, int vpp
);
135 /* Returns non-zero if the current suspend operation would
136 * lead to a deep sleep (i.e. power removed from the core,
137 * instead of just the clock).
139 #if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
140 int fsl_deep_sleep(void);
142 static inline int fsl_deep_sleep(void) { return 0; }
145 #endif /* _FSL_DEVICE_H_ */