ide: add ide_find_port() helper
[deliverable/linux.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/hdsmart.h>
13 #include <linux/blkdev.h>
14 #include <linux/proc_fs.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitops.h>
17 #include <linux/bio.h>
18 #include <linux/device.h>
19 #include <linux/pci.h>
20 #include <linux/completion.h>
21 #ifdef CONFIG_BLK_DEV_IDEACPI
22 #include <acpi/acpi.h>
23 #endif
24 #include <asm/byteorder.h>
25 #include <asm/system.h>
26 #include <asm/io.h>
27 #include <asm/semaphore.h>
28 #include <asm/mutex.h>
29
30 /******************************************************************************
31 * IDE driver configuration options (play with these as desired):
32 *
33 * REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
34 */
35 #define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
36
37 #ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
38 #define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
39 #endif
40 #ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
41 #define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
42 #endif
43 #ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
44 #define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
45 #endif
46
47 #ifndef DISABLE_IRQ_NOSYNC
48 #define DISABLE_IRQ_NOSYNC 0
49 #endif
50
51 /*
52 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
53 * number.
54 */
55
56 #define IDE_NO_IRQ (-1)
57
58 /*
59 * "No user-serviceable parts" beyond this point :)
60 *****************************************************************************/
61
62 typedef unsigned char byte; /* used everywhere */
63
64 /*
65 * Probably not wise to fiddle with these
66 */
67 #define ERROR_MAX 8 /* Max read/write errors per sector */
68 #define ERROR_RESET 3 /* Reset controller every 4th retry */
69 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
70
71 /*
72 * Tune flags
73 */
74 #define IDE_TUNE_NOAUTO 2
75 #define IDE_TUNE_AUTO 1
76 #define IDE_TUNE_DEFAULT 0
77
78 /*
79 * state flags
80 */
81
82 #define DMA_PIO_RETRY 1 /* retrying in PIO */
83
84 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
85 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
86
87 /*
88 * Definitions for accessing IDE controller registers
89 */
90 #define IDE_NR_PORTS (10)
91
92 #define IDE_DATA_OFFSET (0)
93 #define IDE_ERROR_OFFSET (1)
94 #define IDE_NSECTOR_OFFSET (2)
95 #define IDE_SECTOR_OFFSET (3)
96 #define IDE_LCYL_OFFSET (4)
97 #define IDE_HCYL_OFFSET (5)
98 #define IDE_SELECT_OFFSET (6)
99 #define IDE_STATUS_OFFSET (7)
100 #define IDE_CONTROL_OFFSET (8)
101 #define IDE_IRQ_OFFSET (9)
102
103 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
104 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
105
106 #define IDE_CONTROL_OFFSET_HOB (7)
107
108 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
109 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
110 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
111 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
112 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
113 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
114 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
115 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
116 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
117 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
118
119 #define IDE_FEATURE_REG IDE_ERROR_REG
120 #define IDE_COMMAND_REG IDE_STATUS_REG
121 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
122 #define IDE_IREASON_REG IDE_NSECTOR_REG
123 #define IDE_BCOUNTL_REG IDE_LCYL_REG
124 #define IDE_BCOUNTH_REG IDE_HCYL_REG
125
126 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
127 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
128 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
129 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
130 #define DRIVE_READY (READY_STAT | SEEK_STAT)
131 #define DATA_READY (DRQ_STAT)
132
133 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
134
135 #define SATA_NR_PORTS (3) /* 16 possible ?? */
136
137 #define SATA_STATUS_OFFSET (0)
138 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
139 #define SATA_ERROR_OFFSET (1)
140 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
141 #define SATA_CONTROL_OFFSET (2)
142 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
143
144 #define SATA_MISC_OFFSET (0)
145 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
146 #define SATA_PHY_OFFSET (1)
147 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
148 #define SATA_IEN_OFFSET (2)
149 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
150
151 /*
152 * Our Physical Region Descriptor (PRD) table should be large enough
153 * to handle the biggest I/O request we are likely to see. Since requests
154 * can have no more than 256 sectors, and since the typical blocksize is
155 * two or more sectors, we could get by with a limit of 128 entries here for
156 * the usual worst case. Most requests seem to include some contiguous blocks,
157 * further reducing the number of table entries required.
158 *
159 * The driver reverts to PIO mode for individual requests that exceed
160 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
161 * 100% of all crazy scenarios here is not necessary.
162 *
163 * As it turns out though, we must allocate a full 4KB page for this,
164 * so the two PRD tables (ide0 & ide1) will each get half of that,
165 * allowing each to have about 256 entries (8 bytes each) from this.
166 */
167 #define PRD_BYTES 8
168 #define PRD_ENTRIES 256
169
170 /*
171 * Some more useful definitions
172 */
173 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
174 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
175 #define SECTOR_SIZE 512
176 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
177 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
178
179 /*
180 * Timeouts for various operations:
181 */
182 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
183 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
184 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
185 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
186 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
187 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
188
189 /*
190 * Check for an interrupt and acknowledge the interrupt status
191 */
192 struct hwif_s;
193 typedef int (ide_ack_intr_t)(struct hwif_s *);
194
195 #ifndef NO_DMA
196 #define NO_DMA 255
197 #endif
198
199 /*
200 * hwif_chipset_t is used to keep track of the specific hardware
201 * chipset used by each IDE interface, if known.
202 */
203 enum { ide_unknown, ide_generic, ide_pci,
204 ide_cmd640, ide_dtc2278, ide_ali14xx,
205 ide_qd65xx, ide_umc8672, ide_ht6560b,
206 ide_rz1000, ide_trm290,
207 ide_cmd646, ide_cy82c693, ide_4drives,
208 ide_pmac, ide_etrax100, ide_acorn,
209 ide_au1xxx, ide_forced
210 };
211
212 typedef u8 hwif_chipset_t;
213
214 /*
215 * Structure to hold all information about the location of this port
216 */
217 typedef struct hw_regs_s {
218 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
219 int irq; /* our irq number */
220 int dma; /* our dma entry */
221 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
222 hwif_chipset_t chipset;
223 struct device *dev;
224 } hw_regs_t;
225
226 struct hwif_s * ide_find_port(unsigned long);
227
228 int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
229 struct hwif_s **);
230
231 /*
232 * Set up hw_regs_t structure before calling ide_register_hw (optional)
233 */
234 void ide_setup_ports( hw_regs_t *hw,
235 unsigned long base,
236 int *offsets,
237 unsigned long ctrl,
238 unsigned long intr,
239 ide_ack_intr_t *ack_intr,
240 #if 0
241 ide_io_ops_t *iops,
242 #endif
243 int irq);
244
245 static inline void ide_std_init_ports(hw_regs_t *hw,
246 unsigned long io_addr,
247 unsigned long ctl_addr)
248 {
249 unsigned int i;
250
251 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
252 hw->io_ports[i] = io_addr++;
253
254 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
255 }
256
257 #include <asm/ide.h>
258
259 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
260 #undef MAX_HWIFS
261 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
262 #endif
263
264 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
265 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
266 # define ide_default_io_base(index) (0)
267 # define ide_default_irq(base) (0)
268 # define ide_init_default_irq(base) (0)
269 #endif
270
271 /*
272 * ide_init_hwif_ports() is OBSOLETE and will be removed in 2.7 series.
273 * New ports shouldn't define IDE_ARCH_OBSOLETE_INIT in <asm/ide.h>.
274 */
275 #ifdef IDE_ARCH_OBSOLETE_INIT
276 static inline void ide_init_hwif_ports(hw_regs_t *hw,
277 unsigned long io_addr,
278 unsigned long ctl_addr,
279 int *irq)
280 {
281 if (!ctl_addr)
282 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
283 else
284 ide_std_init_ports(hw, io_addr, ctl_addr);
285
286 if (irq)
287 *irq = 0;
288
289 hw->io_ports[IDE_IRQ_OFFSET] = 0;
290
291 #ifdef CONFIG_PPC32
292 if (ppc_ide_md.ide_init_hwif)
293 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
294 #endif
295 }
296 #else
297 static inline void ide_init_hwif_ports(hw_regs_t *hw,
298 unsigned long io_addr,
299 unsigned long ctl_addr,
300 int *irq)
301 {
302 if (io_addr || ctl_addr)
303 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
304 }
305 #endif /* IDE_ARCH_OBSOLETE_INIT */
306
307 /* Currently only m68k, apus and m8xx need it */
308 #ifndef IDE_ARCH_ACK_INTR
309 # define ide_ack_intr(hwif) (1)
310 #endif
311
312 /* Currently only Atari needs it */
313 #ifndef IDE_ARCH_LOCK
314 # define ide_release_lock() do {} while (0)
315 # define ide_get_lock(hdlr, data) do {} while (0)
316 #endif /* IDE_ARCH_LOCK */
317
318 /*
319 * Now for the data we need to maintain per-drive: ide_drive_t
320 */
321
322 #define ide_scsi 0x21
323 #define ide_disk 0x20
324 #define ide_optical 0x7
325 #define ide_cdrom 0x5
326 #define ide_tape 0x1
327 #define ide_floppy 0x0
328
329 /*
330 * Special Driver Flags
331 *
332 * set_geometry : respecify drive geometry
333 * recalibrate : seek to cyl 0
334 * set_multmode : set multmode count
335 * set_tune : tune interface for drive
336 * serviced : service command
337 * reserved : unused
338 */
339 typedef union {
340 unsigned all : 8;
341 struct {
342 #if defined(__LITTLE_ENDIAN_BITFIELD)
343 unsigned set_geometry : 1;
344 unsigned recalibrate : 1;
345 unsigned set_multmode : 1;
346 unsigned set_tune : 1;
347 unsigned serviced : 1;
348 unsigned reserved : 3;
349 #elif defined(__BIG_ENDIAN_BITFIELD)
350 unsigned reserved : 3;
351 unsigned serviced : 1;
352 unsigned set_tune : 1;
353 unsigned set_multmode : 1;
354 unsigned recalibrate : 1;
355 unsigned set_geometry : 1;
356 #else
357 #error "Please fix <asm/byteorder.h>"
358 #endif
359 } b;
360 } special_t;
361
362 /*
363 * ATA DATA Register Special.
364 * ATA NSECTOR Count Register().
365 * ATAPI Byte Count Register.
366 */
367 typedef union {
368 unsigned all :16;
369 struct {
370 #if defined(__LITTLE_ENDIAN_BITFIELD)
371 unsigned low :8; /* LSB */
372 unsigned high :8; /* MSB */
373 #elif defined(__BIG_ENDIAN_BITFIELD)
374 unsigned high :8; /* MSB */
375 unsigned low :8; /* LSB */
376 #else
377 #error "Please fix <asm/byteorder.h>"
378 #endif
379 } b;
380 } ata_nsector_t, ata_data_t, atapi_bcount_t;
381
382 /*
383 * ATA-IDE Select Register, aka Device-Head
384 *
385 * head : always zeros here
386 * unit : drive select number: 0/1
387 * bit5 : always 1
388 * lba : using LBA instead of CHS
389 * bit7 : always 1
390 */
391 typedef union {
392 unsigned all : 8;
393 struct {
394 #if defined(__LITTLE_ENDIAN_BITFIELD)
395 unsigned head : 4;
396 unsigned unit : 1;
397 unsigned bit5 : 1;
398 unsigned lba : 1;
399 unsigned bit7 : 1;
400 #elif defined(__BIG_ENDIAN_BITFIELD)
401 unsigned bit7 : 1;
402 unsigned lba : 1;
403 unsigned bit5 : 1;
404 unsigned unit : 1;
405 unsigned head : 4;
406 #else
407 #error "Please fix <asm/byteorder.h>"
408 #endif
409 } b;
410 } select_t, ata_select_t;
411
412 /*
413 * The ATA-IDE Status Register.
414 * The ATAPI Status Register.
415 *
416 * check : Error occurred
417 * idx : Index Error
418 * corr : Correctable error occurred
419 * drq : Data is request by the device
420 * dsc : Disk Seek Complete : ata
421 * : Media access command finished : atapi
422 * df : Device Fault : ata
423 * : Reserved : atapi
424 * drdy : Ready, Command Mode Capable : ata
425 * : Ignored for ATAPI commands : atapi
426 * bsy : Disk is Busy
427 * : The device has access to the command block
428 */
429 typedef union {
430 unsigned all :8;
431 struct {
432 #if defined(__LITTLE_ENDIAN_BITFIELD)
433 unsigned check :1;
434 unsigned idx :1;
435 unsigned corr :1;
436 unsigned drq :1;
437 unsigned dsc :1;
438 unsigned df :1;
439 unsigned drdy :1;
440 unsigned bsy :1;
441 #elif defined(__BIG_ENDIAN_BITFIELD)
442 unsigned bsy :1;
443 unsigned drdy :1;
444 unsigned df :1;
445 unsigned dsc :1;
446 unsigned drq :1;
447 unsigned corr :1;
448 unsigned idx :1;
449 unsigned check :1;
450 #else
451 #error "Please fix <asm/byteorder.h>"
452 #endif
453 } b;
454 } ata_status_t, atapi_status_t;
455
456 /*
457 * ATAPI Feature Register
458 *
459 * dma : Using DMA or PIO
460 * reserved321 : Reserved
461 * reserved654 : Reserved (Tag Type)
462 * reserved7 : Reserved
463 */
464 typedef union {
465 unsigned all :8;
466 struct {
467 #if defined(__LITTLE_ENDIAN_BITFIELD)
468 unsigned dma :1;
469 unsigned reserved321 :3;
470 unsigned reserved654 :3;
471 unsigned reserved7 :1;
472 #elif defined(__BIG_ENDIAN_BITFIELD)
473 unsigned reserved7 :1;
474 unsigned reserved654 :3;
475 unsigned reserved321 :3;
476 unsigned dma :1;
477 #else
478 #error "Please fix <asm/byteorder.h>"
479 #endif
480 } b;
481 } atapi_feature_t;
482
483 /*
484 * ATAPI Interrupt Reason Register.
485 *
486 * cod : Information transferred is command (1) or data (0)
487 * io : The device requests us to read (1) or write (0)
488 * reserved : Reserved
489 */
490 typedef union {
491 unsigned all :8;
492 struct {
493 #if defined(__LITTLE_ENDIAN_BITFIELD)
494 unsigned cod :1;
495 unsigned io :1;
496 unsigned reserved :6;
497 #elif defined(__BIG_ENDIAN_BITFIELD)
498 unsigned reserved :6;
499 unsigned io :1;
500 unsigned cod :1;
501 #else
502 #error "Please fix <asm/byteorder.h>"
503 #endif
504 } b;
505 } atapi_ireason_t;
506
507 /*
508 * The ATAPI error register.
509 *
510 * ili : Illegal Length Indication
511 * eom : End Of Media Detected
512 * abrt : Aborted command - As defined by ATA
513 * mcr : Media Change Requested - As defined by ATA
514 * sense_key : Sense key of the last failed packet command
515 */
516 typedef union {
517 unsigned all :8;
518 struct {
519 #if defined(__LITTLE_ENDIAN_BITFIELD)
520 unsigned ili :1;
521 unsigned eom :1;
522 unsigned abrt :1;
523 unsigned mcr :1;
524 unsigned sense_key :4;
525 #elif defined(__BIG_ENDIAN_BITFIELD)
526 unsigned sense_key :4;
527 unsigned mcr :1;
528 unsigned abrt :1;
529 unsigned eom :1;
530 unsigned ili :1;
531 #else
532 #error "Please fix <asm/byteorder.h>"
533 #endif
534 } b;
535 } atapi_error_t;
536
537 /*
538 * Status returned from various ide_ functions
539 */
540 typedef enum {
541 ide_stopped, /* no drive operation was started */
542 ide_started, /* a drive operation was started, handler was set */
543 } ide_startstop_t;
544
545 struct ide_driver_s;
546 struct ide_settings_s;
547
548 #ifdef CONFIG_BLK_DEV_IDEACPI
549 struct ide_acpi_drive_link;
550 struct ide_acpi_hwif_link;
551 #endif
552
553 typedef struct ide_drive_s {
554 char name[4]; /* drive name, such as "hda" */
555 char driver_req[10]; /* requests specific driver */
556
557 struct request_queue *queue; /* request queue */
558
559 struct request *rq; /* current request */
560 struct ide_drive_s *next; /* circular list of hwgroup drives */
561 void *driver_data; /* extra driver data */
562 struct hd_driveid *id; /* drive model identification info */
563 #ifdef CONFIG_IDE_PROC_FS
564 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
565 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
566 #endif
567 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
568
569 unsigned long sleep; /* sleep until this time */
570 unsigned long service_start; /* time we started last request */
571 unsigned long service_time; /* service time of last request */
572 unsigned long timeout; /* max time to wait for irq */
573
574 special_t special; /* special action flags */
575 select_t select; /* basic drive/head select reg value */
576
577 u8 keep_settings; /* restore settings after drive reset */
578 u8 using_dma; /* disk is using dma for read/write */
579 u8 retry_pio; /* retrying dma capable host in pio */
580 u8 state; /* retry state */
581 u8 waiting_for_dma; /* dma currently in progress */
582 u8 unmask; /* okay to unmask other irqs */
583 u8 bswap; /* byte swap data */
584 u8 noflush; /* don't attempt flushes */
585 u8 dsc_overlap; /* DSC overlap */
586 u8 nice1; /* give potential excess bandwidth */
587
588 unsigned present : 1; /* drive is physically present */
589 unsigned dead : 1; /* device ejected hint */
590 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
591 unsigned noprobe : 1; /* from: hdx=noprobe */
592 unsigned removable : 1; /* 1 if need to do check_media_change */
593 unsigned attach : 1; /* needed for removable devices */
594 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
595 unsigned no_unmask : 1; /* disallow setting unmask bit */
596 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
597 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
598 unsigned nice0 : 1; /* give obvious excess bandwidth */
599 unsigned nice2 : 1; /* give a share in our own bandwidth */
600 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
601 unsigned nodma : 1; /* disallow DMA */
602 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
603 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
604 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
605 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
606 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
607 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
608 unsigned post_reset : 1;
609 unsigned udma33_warned : 1;
610
611 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
612 u8 quirk_list; /* considered quirky, set for a specific host */
613 u8 init_speed; /* transfer rate set at boot */
614 u8 current_speed; /* current transfer rate set */
615 u8 desired_speed; /* desired transfer rate set */
616 u8 dn; /* now wide spread use */
617 u8 wcache; /* status of write cache */
618 u8 acoustic; /* acoustic management */
619 u8 media; /* disk, cdrom, tape, floppy, ... */
620 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
621 u8 ready_stat; /* min status value for drive ready */
622 u8 mult_count; /* current multiple sector setting */
623 u8 mult_req; /* requested multiple sector setting */
624 u8 tune_req; /* requested drive tuning setting */
625 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
626 u8 bad_wstat; /* used for ignoring WRERR_STAT */
627 u8 nowerr; /* used for ignoring WRERR_STAT */
628 u8 sect0; /* offset of first sector for DM6:DDO */
629 u8 head; /* "real" number of heads */
630 u8 sect; /* "real" sectors per track */
631 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
632 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
633
634 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
635 unsigned int cyl; /* "real" number of cyls */
636 unsigned int drive_data; /* used by set_pio_mode/selectproc */
637 unsigned int failures; /* current failure count */
638 unsigned int max_failures; /* maximum allowed failure count */
639 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
640
641 u64 capacity64; /* total number of sectors */
642
643 int lun; /* logical unit */
644 int crc_count; /* crc counter to reduce drive speed */
645 #ifdef CONFIG_BLK_DEV_IDEACPI
646 struct ide_acpi_drive_link *acpidata;
647 #endif
648 struct list_head list;
649 struct device gendev;
650 struct completion gendev_rel_comp; /* to deal with device release() */
651 } ide_drive_t;
652
653 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
654
655 #define IDE_CHIPSET_PCI_MASK \
656 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
657 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
658
659 struct ide_pci_device_s;
660
661 typedef struct hwif_s {
662 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
663 struct hwif_s *mate; /* other hwif from same PCI chip */
664 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
665 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
666
667 char name[6]; /* name of interface, eg. "ide0" */
668
669 /* task file registers for pata and sata */
670 unsigned long io_ports[IDE_NR_PORTS];
671 unsigned long sata_scr[SATA_NR_PORTS];
672 unsigned long sata_misc[SATA_NR_PORTS];
673
674 hw_regs_t hw; /* Hardware info */
675 ide_drive_t drives[MAX_DRIVES]; /* drive info */
676
677 u8 major; /* our major number */
678 u8 index; /* 0 for ide0; 1 for ide1; ... */
679 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
680 u8 straight8; /* Alan's straight 8 check */
681 u8 bus_state; /* power state of the IDE bus */
682
683 u16 host_flags;
684
685 u8 pio_mask;
686
687 u8 ultra_mask;
688 u8 mwdma_mask;
689 u8 swdma_mask;
690
691 u8 cbl; /* cable type */
692
693 hwif_chipset_t chipset; /* sub-module for tuning.. */
694
695 struct pci_dev *pci_dev; /* for pci chipsets */
696 struct ide_pci_device_s *cds; /* chipset device struct */
697
698 void (*rw_disk)(ide_drive_t *, struct request *);
699
700 #if 0
701 ide_hwif_ops_t *hwifops;
702 #else
703 /* routine to program host for PIO mode */
704 void (*set_pio_mode)(ide_drive_t *, const u8);
705 /* routine to program host for DMA mode */
706 void (*set_dma_mode)(ide_drive_t *, const u8);
707 /* tweaks hardware to select drive */
708 void (*selectproc)(ide_drive_t *);
709 /* chipset polling based on hba specifics */
710 int (*reset_poll)(ide_drive_t *);
711 /* chipset specific changes to default for device-hba resets */
712 void (*pre_reset)(ide_drive_t *);
713 /* routine to reset controller after a disk reset */
714 void (*resetproc)(ide_drive_t *);
715 /* special interrupt handling for shared pci interrupts */
716 void (*intrproc)(ide_drive_t *);
717 /* special host masking for drive selection */
718 void (*maskproc)(ide_drive_t *, int);
719 /* check host's drive quirk list */
720 int (*quirkproc)(ide_drive_t *);
721 /* driver soft-power interface */
722 int (*busproc)(ide_drive_t *, int);
723 #endif
724 u8 (*mdma_filter)(ide_drive_t *);
725 u8 (*udma_filter)(ide_drive_t *);
726
727 void (*fixup)(struct hwif_s *);
728
729 void (*ata_input_data)(ide_drive_t *, void *, u32);
730 void (*ata_output_data)(ide_drive_t *, void *, u32);
731
732 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
733 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
734
735 int (*dma_setup)(ide_drive_t *);
736 void (*dma_exec_cmd)(ide_drive_t *, u8);
737 void (*dma_start)(ide_drive_t *);
738 int (*ide_dma_end)(ide_drive_t *drive);
739 int (*ide_dma_on)(ide_drive_t *drive);
740 void (*dma_off_quietly)(ide_drive_t *drive);
741 int (*ide_dma_test_irq)(ide_drive_t *drive);
742 void (*ide_dma_clear_irq)(ide_drive_t *drive);
743 void (*dma_host_on)(ide_drive_t *drive);
744 void (*dma_host_off)(ide_drive_t *drive);
745 void (*dma_lost_irq)(ide_drive_t *drive);
746 void (*dma_timeout)(ide_drive_t *drive);
747
748 void (*OUTB)(u8 addr, unsigned long port);
749 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
750 void (*OUTW)(u16 addr, unsigned long port);
751 void (*OUTSW)(unsigned long port, void *addr, u32 count);
752 void (*OUTSL)(unsigned long port, void *addr, u32 count);
753
754 u8 (*INB)(unsigned long port);
755 u16 (*INW)(unsigned long port);
756 void (*INSW)(unsigned long port, void *addr, u32 count);
757 void (*INSL)(unsigned long port, void *addr, u32 count);
758
759 /* dma physical region descriptor table (cpu view) */
760 unsigned int *dmatable_cpu;
761 /* dma physical region descriptor table (dma view) */
762 dma_addr_t dmatable_dma;
763 /* Scatter-gather list used to build the above */
764 struct scatterlist *sg_table;
765 int sg_max_nents; /* Maximum number of entries in it */
766 int sg_nents; /* Current number of entries in it */
767 int sg_dma_direction; /* dma transfer direction */
768
769 /* data phase of the active command (currently only valid for PIO/DMA) */
770 int data_phase;
771
772 unsigned int nsect;
773 unsigned int nleft;
774 struct scatterlist *cursg;
775 unsigned int cursg_ofs;
776
777 int rqsize; /* max sectors per request */
778 int irq; /* our irq number */
779
780 unsigned long dma_master; /* reference base addr dmabase */
781 unsigned long dma_base; /* base addr for dma ports */
782 unsigned long dma_command; /* dma command register */
783 unsigned long dma_vendor1; /* dma vendor 1 register */
784 unsigned long dma_status; /* dma status register */
785 unsigned long dma_vendor3; /* dma vendor 3 register */
786 unsigned long dma_prdtable; /* actual prd table address */
787
788 unsigned long config_data; /* for use by chipset-specific code */
789 unsigned long select_data; /* for use by chipset-specific code */
790
791 unsigned long extra_base; /* extra addr for dma ports */
792 unsigned extra_ports; /* number of extra dma ports */
793
794 unsigned noprobe : 1; /* don't probe for this interface */
795 unsigned present : 1; /* this interface exists */
796 unsigned hold : 1; /* this interface is always present */
797 unsigned serialized : 1; /* serialized all channel operation */
798 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
799 unsigned reset : 1; /* reset after probe */
800 unsigned auto_poll : 1; /* supports nop auto-poll */
801 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
802 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
803 unsigned mmio : 1; /* host uses MMIO */
804
805 struct device gendev;
806 struct completion gendev_rel_comp; /* To deal with device release() */
807
808 void *hwif_data; /* extra hwif data */
809
810 unsigned dma;
811
812 #ifdef CONFIG_BLK_DEV_IDEACPI
813 struct ide_acpi_hwif_link *acpidata;
814 #endif
815 } ____cacheline_internodealigned_in_smp ide_hwif_t;
816
817 /*
818 * internal ide interrupt handler type
819 */
820 typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
821 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
822 typedef int (ide_expiry_t)(ide_drive_t *);
823
824 typedef struct hwgroup_s {
825 /* irq handler, if active */
826 ide_startstop_t (*handler)(ide_drive_t *);
827 /* irq handler, suspended if active */
828 ide_startstop_t (*handler_save)(ide_drive_t *);
829 /* BOOL: protects all fields below */
830 volatile int busy;
831 /* BOOL: wake us up on timer expiry */
832 unsigned int sleeping : 1;
833 /* BOOL: polling active & poll_timeout field valid */
834 unsigned int polling : 1;
835 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
836 unsigned int resetting : 1;
837
838 /* current drive */
839 ide_drive_t *drive;
840 /* ptr to current hwif in linked-list */
841 ide_hwif_t *hwif;
842
843 /* for pci chipsets */
844 struct pci_dev *pci_dev;
845 /* chipset device struct */
846 struct ide_pci_device_s *cds;
847
848 /* current request */
849 struct request *rq;
850 /* failsafe timer */
851 struct timer_list timer;
852 /* local copy of current write rq */
853 struct request wrq;
854 /* timeout value during long polls */
855 unsigned long poll_timeout;
856 /* queried upon timeouts */
857 int (*expiry)(ide_drive_t *);
858 /* ide_system_bus_speed */
859 int pio_clock;
860 int req_gen;
861 int req_gen_timer;
862
863 unsigned char cmd_buf[4];
864 } ide_hwgroup_t;
865
866 typedef struct ide_driver_s ide_driver_t;
867
868 extern struct mutex ide_setting_mtx;
869
870 int set_io_32bit(ide_drive_t *, int);
871 int set_pio_mode(ide_drive_t *, int);
872 int set_using_dma(ide_drive_t *, int);
873
874 #ifdef CONFIG_IDE_PROC_FS
875 /*
876 * configurable drive settings
877 */
878
879 #define TYPE_INT 0
880 #define TYPE_BYTE 1
881 #define TYPE_SHORT 2
882
883 #define SETTING_READ (1 << 0)
884 #define SETTING_WRITE (1 << 1)
885 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
886
887 typedef int (ide_procset_t)(ide_drive_t *, int);
888 typedef struct ide_settings_s {
889 char *name;
890 int rw;
891 int data_type;
892 int min;
893 int max;
894 int mul_factor;
895 int div_factor;
896 void *data;
897 ide_procset_t *set;
898 int auto_remove;
899 struct ide_settings_s *next;
900 } ide_settings_t;
901
902 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
903
904 /*
905 * /proc/ide interface
906 */
907 typedef struct {
908 const char *name;
909 mode_t mode;
910 read_proc_t *read_proc;
911 write_proc_t *write_proc;
912 } ide_proc_entry_t;
913
914 void proc_ide_create(void);
915 void proc_ide_destroy(void);
916 void ide_proc_register_port(ide_hwif_t *);
917 void ide_proc_unregister_port(ide_hwif_t *);
918 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
919 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
920
921 void ide_add_generic_settings(ide_drive_t *);
922
923 read_proc_t proc_ide_read_capacity;
924 read_proc_t proc_ide_read_geometry;
925
926 #ifdef CONFIG_BLK_DEV_IDEPCI
927 void ide_pci_create_host_proc(const char *, get_info_t *);
928 #endif
929
930 /*
931 * Standard exit stuff:
932 */
933 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
934 { \
935 len -= off; \
936 if (len < count) { \
937 *eof = 1; \
938 if (len <= 0) \
939 return 0; \
940 } else \
941 len = count; \
942 *start = page + off; \
943 return len; \
944 }
945 #else
946 static inline void proc_ide_create(void) { ; }
947 static inline void proc_ide_destroy(void) { ; }
948 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
949 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
950 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
951 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
952 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
953 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
954 #endif
955
956 /*
957 * Power Management step value (rq->pm->pm_step).
958 *
959 * The step value starts at 0 (ide_pm_state_start_suspend) for a
960 * suspend operation or 1000 (ide_pm_state_start_resume) for a
961 * resume operation.
962 *
963 * For each step, the core calls the subdriver start_power_step() first.
964 * This can return:
965 * - ide_stopped : In this case, the core calls us back again unless
966 * step have been set to ide_power_state_completed.
967 * - ide_started : In this case, the channel is left busy until an
968 * async event (interrupt) occurs.
969 * Typically, start_power_step() will issue a taskfile request with
970 * do_rw_taskfile().
971 *
972 * Upon reception of the interrupt, the core will call complete_power_step()
973 * with the error code if any. This routine should update the step value
974 * and return. It should not start a new request. The core will call
975 * start_power_step for the new step value, unless step have been set to
976 * ide_power_state_completed.
977 *
978 * Subdrivers are expected to define their own additional power
979 * steps from 1..999 for suspend and from 1001..1999 for resume,
980 * other values are reserved for future use.
981 */
982
983 enum {
984 ide_pm_state_completed = -1,
985 ide_pm_state_start_suspend = 0,
986 ide_pm_state_start_resume = 1000,
987 };
988
989 /*
990 * Subdrivers support.
991 *
992 * The gendriver.owner field should be set to the module owner of this driver.
993 * The gendriver.name field should be set to the name of this driver
994 */
995 struct ide_driver_s {
996 const char *version;
997 u8 media;
998 unsigned supports_dsc_overlap : 1;
999 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1000 int (*end_request)(ide_drive_t *, int, int);
1001 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1002 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1003 struct device_driver gen_driver;
1004 int (*probe)(ide_drive_t *);
1005 void (*remove)(ide_drive_t *);
1006 void (*resume)(ide_drive_t *);
1007 void (*shutdown)(ide_drive_t *);
1008 #ifdef CONFIG_IDE_PROC_FS
1009 ide_proc_entry_t *proc;
1010 #endif
1011 };
1012
1013 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
1014
1015 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
1016
1017 /*
1018 * ide_hwifs[] is the master data structure used to keep track
1019 * of just about everything in ide.c. Whenever possible, routines
1020 * should be using pointers to a drive (ide_drive_t *) or
1021 * pointers to a hwif (ide_hwif_t *), rather than indexing this
1022 * structure directly (the allocation/layout may change!).
1023 *
1024 */
1025 #ifndef _IDE_C
1026 extern ide_hwif_t ide_hwifs[]; /* master data repository */
1027 #endif
1028 extern int noautodma;
1029
1030 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
1031 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
1032 int uptodate, int nr_sectors);
1033
1034 /*
1035 * This is used on exit from the driver to designate the next irq handler
1036 * and also to start the safety timer.
1037 */
1038 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
1039
1040 /*
1041 * This is used on exit from the driver to designate the next irq handler
1042 * and start the safety time safely and atomically from the IRQ handler
1043 * with respect to the command issue (which it also does)
1044 */
1045 extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *);
1046
1047 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
1048
1049 /*
1050 * ide_error() takes action based on the error returned by the controller.
1051 * The caller should return immediately after invoking this.
1052 *
1053 * (drive, msg, status)
1054 */
1055 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
1056
1057 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
1058
1059 /*
1060 * Abort a running command on the controller triggering the abort
1061 * from a host side, non error situation
1062 * (drive, msg)
1063 */
1064 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
1065
1066 extern void ide_fix_driveid(struct hd_driveid *);
1067 /*
1068 * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
1069 * removing leading/trailing blanks and compressing internal blanks.
1070 * It is primarily used to tidy up the model name/number fields as
1071 * returned by the WIN_[P]IDENTIFY commands.
1072 *
1073 * (s, bytecount, byteswap)
1074 */
1075 extern void ide_fixstring(u8 *, const int, const int);
1076
1077 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1078
1079 /*
1080 * Start a reset operation for an IDE interface.
1081 * The caller should return immediately after invoking this.
1082 */
1083 extern ide_startstop_t ide_do_reset (ide_drive_t *);
1084
1085 /*
1086 * This function is intended to be used prior to invoking ide_do_drive_cmd().
1087 */
1088 extern void ide_init_drive_cmd (struct request *rq);
1089
1090 /*
1091 * "action" parameter type for ide_do_drive_cmd() below.
1092 */
1093 typedef enum {
1094 ide_wait, /* insert rq at end of list, and wait for it */
1095 ide_preempt, /* insert rq in front of current request */
1096 ide_head_wait, /* insert rq in front of current request and wait for it */
1097 ide_end /* insert rq at end of list, but don't wait for it */
1098 } ide_action_t;
1099
1100 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1101
1102 /*
1103 * Clean up after success/failure of an explicit drive cmd.
1104 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_CMD).
1105 * stat/err are used only when (HWGROUP(drive)->rq->cmd == IDE_DRIVE_TASK_MASK).
1106 *
1107 * (ide_drive_t *drive, u8 stat, u8 err)
1108 */
1109 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1110
1111 /*
1112 * Issue ATA command and wait for completion.
1113 * Use for implementing commands in kernel
1114 *
1115 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
1116 */
1117 extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
1118
1119 typedef struct ide_task_s {
1120 /*
1121 * struct hd_drive_task_hdr tf;
1122 * task_struct_t tf;
1123 * struct hd_drive_hob_hdr hobf;
1124 * hob_struct_t hobf;
1125 */
1126 task_ioreg_t tfRegister[8];
1127 task_ioreg_t hobRegister[8];
1128 ide_reg_valid_t tf_out_flags;
1129 ide_reg_valid_t tf_in_flags;
1130 int data_phase;
1131 int command_type;
1132 ide_pre_handler_t *prehandler;
1133 ide_handler_t *handler;
1134 struct request *rq; /* copy of request */
1135 void *special; /* valid_t generally */
1136 } ide_task_t;
1137
1138 extern u32 ide_read_24(ide_drive_t *);
1139
1140 extern void SELECT_DRIVE(ide_drive_t *);
1141 extern void SELECT_INTERRUPT(ide_drive_t *);
1142 extern void SELECT_MASK(ide_drive_t *, int);
1143 extern void QUIRK_LIST(ide_drive_t *);
1144
1145 extern int drive_is_ready(ide_drive_t *);
1146
1147 /*
1148 * taskfile io for disks for now...and builds request from ide_ioctl
1149 */
1150 extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1151
1152 /*
1153 * Special Flagged Register Validation Caller
1154 */
1155 extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1156
1157 extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1158 extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1159 extern ide_startstop_t recal_intr(ide_drive_t *);
1160 extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1161 extern ide_startstop_t task_in_intr(ide_drive_t *);
1162 extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1163
1164 extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1165
1166 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1167 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1168 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1169
1170 extern int system_bus_clock(void);
1171
1172 extern int ide_driveid_update(ide_drive_t *);
1173 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1174 extern int ide_config_drive_speed(ide_drive_t *, u8);
1175 extern u8 eighty_ninty_three (ide_drive_t *);
1176 extern int set_transfer(ide_drive_t *, ide_task_t *);
1177 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1178
1179 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1180
1181 /*
1182 * ide_stall_queue() can be used by a drive to give excess bandwidth back
1183 * to the hwgroup by sleeping for timeout jiffies.
1184 */
1185 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1186
1187 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1188 extern void ide_timer_expiry(unsigned long);
1189 extern irqreturn_t ide_intr(int irq, void *dev_id);
1190 extern void do_ide_request(struct request_queue *);
1191
1192 void ide_init_disk(struct gendisk *, ide_drive_t *);
1193
1194 extern int ideprobe_init(void);
1195
1196 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1197 extern void ide_scan_pcibus(int scan_direction) __init;
1198 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1199 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1200 #else
1201 #define ide_pci_register_driver(d) pci_register_driver(d)
1202 #endif
1203
1204 void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, u8 *);
1205 extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d);
1206
1207 extern void default_hwif_iops(ide_hwif_t *);
1208 extern void default_hwif_mmiops(ide_hwif_t *);
1209 extern void default_hwif_transport(ide_hwif_t *);
1210
1211 typedef struct ide_pci_enablebit_s {
1212 u8 reg; /* byte pci reg holding the enable-bit */
1213 u8 mask; /* mask to isolate the enable-bit */
1214 u8 val; /* value of masked reg when "enabled" */
1215 } ide_pci_enablebit_t;
1216
1217 enum {
1218 /* Uses ISA control ports not PCI ones. */
1219 IDE_HFLAG_ISA_PORTS = (1 << 0),
1220 /* single port device */
1221 IDE_HFLAG_SINGLE = (1 << 1),
1222 /* don't use legacy PIO blacklist */
1223 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1224 /* don't use conservative PIO "downgrade" */
1225 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1226 /* use PIO8/9 for prefetch off/on */
1227 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1228 /* use PIO6/7 for fast-devsel off/on */
1229 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1230 /* use 100-102 and 200-202 PIO values to set DMA modes */
1231 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1232 /*
1233 * keep DMA setting when programming PIO mode, may be used only
1234 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1235 */
1236 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1237 /* program host for the transfer mode after programming device */
1238 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1239 /* don't program host/device for the transfer mode ("smart" hosts) */
1240 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1241 /* trust BIOS for programming chipset/device for DMA */
1242 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1243 /* host uses VDMA */
1244 IDE_HFLAG_VDMA = (1 << 11),
1245 /* ATAPI DMA is unsupported */
1246 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1247 /* set if host is a "bootable" controller */
1248 IDE_HFLAG_BOOTABLE = (1 << 13),
1249 /* host doesn't support DMA */
1250 IDE_HFLAG_NO_DMA = (1 << 14),
1251 /* check if host is PCI IDE device before allowing DMA */
1252 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1253 /* host is CS5510/CS5520 */
1254 IDE_HFLAG_CS5520 = (1 << 16),
1255 /* no LBA48 */
1256 IDE_HFLAG_NO_LBA48 = (1 << 17),
1257 /* no LBA48 DMA */
1258 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1259 /* data FIFO is cleared by an error */
1260 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1261 /* serialize ports */
1262 IDE_HFLAG_SERIALIZE = (1 << 20),
1263 /* use legacy IRQs */
1264 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1265 /* force use of legacy IRQs */
1266 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1267 /* limit LBA48 requests to 256 sectors */
1268 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1269 /* use 32-bit I/O ops */
1270 IDE_HFLAG_IO_32BIT = (1 << 24),
1271 /* unmask IRQs */
1272 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1273 };
1274
1275 #ifdef CONFIG_BLK_DEV_OFFBOARD
1276 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1277 #else
1278 # define IDE_HFLAG_OFF_BOARD 0
1279 #endif
1280
1281 typedef struct ide_pci_device_s {
1282 char *name;
1283 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1284 void (*init_iops)(ide_hwif_t *);
1285 void (*init_hwif)(ide_hwif_t *);
1286 void (*init_dma)(ide_hwif_t *, unsigned long);
1287 void (*fixup)(ide_hwif_t *);
1288 ide_pci_enablebit_t enablebits[2];
1289 hwif_chipset_t chipset;
1290 unsigned int extra;
1291 u32 host_flags;
1292 u8 pio_mask;
1293 u8 swdma_mask;
1294 u8 mwdma_mask;
1295 u8 udma_mask;
1296 } ide_pci_device_t;
1297
1298 extern int ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
1299 extern int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, ide_pci_device_t *);
1300
1301 void ide_map_sg(ide_drive_t *, struct request *);
1302 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1303
1304 #define BAD_DMA_DRIVE 0
1305 #define GOOD_DMA_DRIVE 1
1306
1307 struct drive_list_entry {
1308 const char *id_model;
1309 const char *id_firmware;
1310 };
1311
1312 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1313
1314 #ifdef CONFIG_BLK_DEV_IDEDMA
1315 int __ide_dma_bad_drive(ide_drive_t *);
1316
1317 u8 ide_find_dma_mode(ide_drive_t *, u8);
1318
1319 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1320 {
1321 return ide_find_dma_mode(drive, XFER_UDMA_6);
1322 }
1323
1324 void ide_dma_off(ide_drive_t *);
1325 void ide_dma_verbose(ide_drive_t *);
1326 int ide_set_dma(ide_drive_t *);
1327 ide_startstop_t ide_dma_intr(ide_drive_t *);
1328
1329 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1330 extern int ide_build_sglist(ide_drive_t *, struct request *);
1331 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1332 extern void ide_destroy_dmatable(ide_drive_t *);
1333 extern int ide_release_dma(ide_hwif_t *);
1334 extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1335
1336 void ide_dma_host_off(ide_drive_t *);
1337 void ide_dma_off_quietly(ide_drive_t *);
1338 void ide_dma_host_on(ide_drive_t *);
1339 extern int __ide_dma_on(ide_drive_t *);
1340 extern int ide_dma_setup(ide_drive_t *);
1341 extern void ide_dma_start(ide_drive_t *);
1342 extern int __ide_dma_end(ide_drive_t *);
1343 extern void ide_dma_lost_irq(ide_drive_t *);
1344 extern void ide_dma_timeout(ide_drive_t *);
1345 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1346
1347 #else
1348 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1349 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1350 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1351 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1352 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1353 #endif /* CONFIG_BLK_DEV_IDEDMA */
1354
1355 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1356 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1357 #endif
1358
1359 #ifdef CONFIG_BLK_DEV_IDEACPI
1360 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1361 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1362 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1363 extern void ide_acpi_init(ide_hwif_t *hwif);
1364 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1365 #else
1366 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1367 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1368 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1369 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1370 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1371 #endif
1372
1373 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1374 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1375 extern void ide_unregister (unsigned int index);
1376
1377 void ide_register_region(struct gendisk *);
1378 void ide_unregister_region(struct gendisk *);
1379
1380 void ide_undecoded_slave(ide_hwif_t *);
1381
1382 int ide_device_add(u8 idx[4]);
1383
1384 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1385 {
1386 return hwif->hwif_data;
1387 }
1388
1389 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1390 {
1391 hwif->hwif_data = data;
1392 }
1393
1394 /* ide-lib.c */
1395 extern char *ide_xfer_verbose(u8 xfer_rate);
1396 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1397 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1398
1399 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1400 {
1401 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1402 }
1403
1404 static inline int ide_dev_is_sata(struct hd_driveid *id)
1405 {
1406 /*
1407 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1408 * verifying that word 80 by casting it to a signed type --
1409 * this trick allows us to filter out the reserved values of
1410 * 0x0000 and 0xffff along with the earlier ATA revisions...
1411 */
1412 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1413 return 1;
1414 return 0;
1415 }
1416
1417 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1418
1419 typedef struct ide_pio_timings_s {
1420 int setup_time; /* Address setup (ns) minimum */
1421 int active_time; /* Active pulse (ns) minimum */
1422 int cycle_time; /* Cycle time (ns) minimum = */
1423 /* active + recovery (+ setup for some chips) */
1424 } ide_pio_timings_t;
1425
1426 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1427 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1428 extern const ide_pio_timings_t ide_pio_timings[6];
1429
1430 int ide_set_pio_mode(ide_drive_t *, u8);
1431 int ide_set_dma_mode(ide_drive_t *, u8);
1432
1433 void ide_set_pio(ide_drive_t *, u8);
1434
1435 static inline void ide_set_max_pio(ide_drive_t *drive)
1436 {
1437 ide_set_pio(drive, 255);
1438 }
1439
1440 extern spinlock_t ide_lock;
1441 extern struct mutex ide_cfg_mtx;
1442 /*
1443 * Structure locking:
1444 *
1445 * ide_cfg_mtx and ide_lock together protect changes to
1446 * ide_hwif_t->{next,hwgroup}
1447 * ide_drive_t->next
1448 *
1449 * ide_hwgroup_t->busy: ide_lock
1450 * ide_hwgroup_t->hwif: ide_lock
1451 * ide_hwif_t->mate: constant, no locking
1452 * ide_drive_t->hwif: constant, no locking
1453 */
1454
1455 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1456
1457 extern struct bus_type ide_bus_type;
1458
1459 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1460 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1461
1462 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1463 #define ide_id_has_flush_cache_ext(id) \
1464 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1465
1466 static inline int hwif_to_node(ide_hwif_t *hwif)
1467 {
1468 struct pci_dev *dev = hwif->pci_dev;
1469 return dev ? pcibus_to_node(dev->bus) : -1;
1470 }
1471
1472 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1473 {
1474 ide_hwif_t *hwif = HWIF(drive);
1475
1476 return &hwif->drives[(drive->dn ^ 1) & 1];
1477 }
1478
1479 #endif /* _IDE_H */
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