6a3b16993c1a8333b75e29c0709823f393291824
[deliverable/linux.git] / include / linux / mfd / arizona / registers.h
1 /*
2 * ARIZONA register definitions
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #ifndef _ARIZONA_REGISTERS_H
14 #define _ARIZONA_REGISTERS_H
15
16 /*
17 * Register values.
18 */
19 #define ARIZONA_SOFTWARE_RESET 0x00
20 #define ARIZONA_DEVICE_REVISION 0x01
21 #define ARIZONA_CTRL_IF_SPI_CFG_1 0x08
22 #define ARIZONA_CTRL_IF_I2C1_CFG_1 0x09
23 #define ARIZONA_CTRL_IF_I2C2_CFG_1 0x0A
24 #define ARIZONA_CTRL_IF_I2C1_CFG_2 0x0B
25 #define ARIZONA_CTRL_IF_I2C2_CFG_2 0x0C
26 #define ARIZONA_CTRL_IF_STATUS_1 0x0D
27 #define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
28 #define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
29 #define ARIZONA_WRITE_SEQUENCER_CTRL_2 0x18
30 #define ARIZONA_WRITE_SEQUENCER_PROM 0x1A
31 #define ARIZONA_TONE_GENERATOR_1 0x20
32 #define ARIZONA_TONE_GENERATOR_2 0x21
33 #define ARIZONA_TONE_GENERATOR_3 0x22
34 #define ARIZONA_TONE_GENERATOR_4 0x23
35 #define ARIZONA_TONE_GENERATOR_5 0x24
36 #define ARIZONA_PWM_DRIVE_1 0x30
37 #define ARIZONA_PWM_DRIVE_2 0x31
38 #define ARIZONA_PWM_DRIVE_3 0x32
39 #define ARIZONA_WAKE_CONTROL 0x40
40 #define ARIZONA_SEQUENCE_CONTROL 0x41
41 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61
42 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
43 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
44 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64
45 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68
46 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69
47 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A
48 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B
49 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C
50 #define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D
51 #define ARIZONA_COMFORT_NOISE_GENERATOR 0x70
52 #define ARIZONA_HAPTICS_CONTROL_1 0x90
53 #define ARIZONA_HAPTICS_CONTROL_2 0x91
54 #define ARIZONA_HAPTICS_PHASE_1_INTENSITY 0x92
55 #define ARIZONA_HAPTICS_PHASE_1_DURATION 0x93
56 #define ARIZONA_HAPTICS_PHASE_2_INTENSITY 0x94
57 #define ARIZONA_HAPTICS_PHASE_2_DURATION 0x95
58 #define ARIZONA_HAPTICS_PHASE_3_INTENSITY 0x96
59 #define ARIZONA_HAPTICS_PHASE_3_DURATION 0x97
60 #define ARIZONA_HAPTICS_STATUS 0x98
61 #define ARIZONA_CLOCK_32K_1 0x100
62 #define ARIZONA_SYSTEM_CLOCK_1 0x101
63 #define ARIZONA_SAMPLE_RATE_1 0x102
64 #define ARIZONA_SAMPLE_RATE_2 0x103
65 #define ARIZONA_SAMPLE_RATE_3 0x104
66 #define ARIZONA_SAMPLE_RATE_1_STATUS 0x10A
67 #define ARIZONA_SAMPLE_RATE_2_STATUS 0x10B
68 #define ARIZONA_SAMPLE_RATE_3_STATUS 0x10C
69 #define ARIZONA_ASYNC_CLOCK_1 0x112
70 #define ARIZONA_ASYNC_SAMPLE_RATE_1 0x113
71 #define ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B
72 #define ARIZONA_OUTPUT_SYSTEM_CLOCK 0x149
73 #define ARIZONA_OUTPUT_ASYNC_CLOCK 0x14A
74 #define ARIZONA_RATE_ESTIMATOR_1 0x152
75 #define ARIZONA_RATE_ESTIMATOR_2 0x153
76 #define ARIZONA_RATE_ESTIMATOR_3 0x154
77 #define ARIZONA_RATE_ESTIMATOR_4 0x155
78 #define ARIZONA_RATE_ESTIMATOR_5 0x156
79 #define ARIZONA_DYNAMIC_FREQUENCY_SCALING_1 0x161
80 #define ARIZONA_FLL1_CONTROL_1 0x171
81 #define ARIZONA_FLL1_CONTROL_2 0x172
82 #define ARIZONA_FLL1_CONTROL_3 0x173
83 #define ARIZONA_FLL1_CONTROL_4 0x174
84 #define ARIZONA_FLL1_CONTROL_5 0x175
85 #define ARIZONA_FLL1_CONTROL_6 0x176
86 #define ARIZONA_FLL1_LOOP_FILTER_TEST_1 0x177
87 #define ARIZONA_FLL1_NCO_TEST_0 0x178
88 #define ARIZONA_FLL1_CONTROL_7 0x179
89 #define ARIZONA_FLL1_SYNCHRONISER_1 0x181
90 #define ARIZONA_FLL1_SYNCHRONISER_2 0x182
91 #define ARIZONA_FLL1_SYNCHRONISER_3 0x183
92 #define ARIZONA_FLL1_SYNCHRONISER_4 0x184
93 #define ARIZONA_FLL1_SYNCHRONISER_5 0x185
94 #define ARIZONA_FLL1_SYNCHRONISER_6 0x186
95 #define ARIZONA_FLL1_SYNCHRONISER_7 0x187
96 #define ARIZONA_FLL1_SPREAD_SPECTRUM 0x189
97 #define ARIZONA_FLL1_GPIO_CLOCK 0x18A
98 #define ARIZONA_FLL2_CONTROL_1 0x191
99 #define ARIZONA_FLL2_CONTROL_2 0x192
100 #define ARIZONA_FLL2_CONTROL_3 0x193
101 #define ARIZONA_FLL2_CONTROL_4 0x194
102 #define ARIZONA_FLL2_CONTROL_5 0x195
103 #define ARIZONA_FLL2_CONTROL_6 0x196
104 #define ARIZONA_FLL2_LOOP_FILTER_TEST_1 0x197
105 #define ARIZONA_FLL2_NCO_TEST_0 0x198
106 #define ARIZONA_FLL2_CONTROL_7 0x199
107 #define ARIZONA_FLL2_SYNCHRONISER_1 0x1A1
108 #define ARIZONA_FLL2_SYNCHRONISER_2 0x1A2
109 #define ARIZONA_FLL2_SYNCHRONISER_3 0x1A3
110 #define ARIZONA_FLL2_SYNCHRONISER_4 0x1A4
111 #define ARIZONA_FLL2_SYNCHRONISER_5 0x1A5
112 #define ARIZONA_FLL2_SYNCHRONISER_6 0x1A6
113 #define ARIZONA_FLL2_SYNCHRONISER_7 0x1A7
114 #define ARIZONA_FLL2_SPREAD_SPECTRUM 0x1A9
115 #define ARIZONA_FLL2_GPIO_CLOCK 0x1AA
116 #define ARIZONA_MIC_CHARGE_PUMP_1 0x200
117 #define ARIZONA_LDO1_CONTROL_1 0x210
118 #define ARIZONA_LDO1_CONTROL_2 0x212
119 #define ARIZONA_LDO2_CONTROL_1 0x213
120 #define ARIZONA_MIC_BIAS_CTRL_1 0x218
121 #define ARIZONA_MIC_BIAS_CTRL_2 0x219
122 #define ARIZONA_MIC_BIAS_CTRL_3 0x21A
123 #define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293
124 #define ARIZONA_HEADPHONE_DETECT_1 0x29B
125 #define ARIZONA_HEADPHONE_DETECT_2 0x29C
126 #define ARIZONA_HP_DACVAL 0x29F
127 #define ARIZONA_MICD_CLAMP_CONTROL 0x2A2
128 #define ARIZONA_MIC_DETECT_1 0x2A3
129 #define ARIZONA_MIC_DETECT_2 0x2A4
130 #define ARIZONA_MIC_DETECT_3 0x2A5
131 #define ARIZONA_MIC_DETECT_LEVEL_1 0x2A6
132 #define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7
133 #define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8
134 #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9
135 #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3
136 #define ARIZONA_ISOLATION_CONTROL 0x2CB
137 #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3
138 #define ARIZONA_INPUT_ENABLES 0x300
139 #define ARIZONA_INPUT_ENABLES_STATUS 0x301
140 #define ARIZONA_INPUT_RATE 0x308
141 #define ARIZONA_INPUT_VOLUME_RAMP 0x309
142 #define ARIZONA_HPF_CONTROL 0x30C
143 #define ARIZONA_IN1L_CONTROL 0x310
144 #define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
145 #define ARIZONA_DMIC1L_CONTROL 0x312
146 #define ARIZONA_IN1R_CONTROL 0x314
147 #define ARIZONA_ADC_DIGITAL_VOLUME_1R 0x315
148 #define ARIZONA_DMIC1R_CONTROL 0x316
149 #define ARIZONA_IN2L_CONTROL 0x318
150 #define ARIZONA_ADC_DIGITAL_VOLUME_2L 0x319
151 #define ARIZONA_DMIC2L_CONTROL 0x31A
152 #define ARIZONA_IN2R_CONTROL 0x31C
153 #define ARIZONA_ADC_DIGITAL_VOLUME_2R 0x31D
154 #define ARIZONA_DMIC2R_CONTROL 0x31E
155 #define ARIZONA_IN3L_CONTROL 0x320
156 #define ARIZONA_ADC_DIGITAL_VOLUME_3L 0x321
157 #define ARIZONA_DMIC3L_CONTROL 0x322
158 #define ARIZONA_IN3R_CONTROL 0x324
159 #define ARIZONA_ADC_DIGITAL_VOLUME_3R 0x325
160 #define ARIZONA_DMIC3R_CONTROL 0x326
161 #define ARIZONA_IN4L_CONTROL 0x328
162 #define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
163 #define ARIZONA_DMIC4L_CONTROL 0x32A
164 #define ARIZONA_IN4R_CONTROL 0x32C
165 #define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
166 #define ARIZONA_DMIC4R_CONTROL 0x32E
167 #define ARIZONA_OUTPUT_ENABLES_1 0x400
168 #define ARIZONA_OUTPUT_STATUS_1 0x401
169 #define ARIZONA_RAW_OUTPUT_STATUS_1 0x406
170 #define ARIZONA_OUTPUT_RATE_1 0x408
171 #define ARIZONA_OUTPUT_VOLUME_RAMP 0x409
172 #define ARIZONA_OUTPUT_PATH_CONFIG_1L 0x410
173 #define ARIZONA_DAC_DIGITAL_VOLUME_1L 0x411
174 #define ARIZONA_DAC_VOLUME_LIMIT_1L 0x412
175 #define ARIZONA_NOISE_GATE_SELECT_1L 0x413
176 #define ARIZONA_OUTPUT_PATH_CONFIG_1R 0x414
177 #define ARIZONA_DAC_DIGITAL_VOLUME_1R 0x415
178 #define ARIZONA_DAC_VOLUME_LIMIT_1R 0x416
179 #define ARIZONA_NOISE_GATE_SELECT_1R 0x417
180 #define ARIZONA_OUTPUT_PATH_CONFIG_2L 0x418
181 #define ARIZONA_DAC_DIGITAL_VOLUME_2L 0x419
182 #define ARIZONA_DAC_VOLUME_LIMIT_2L 0x41A
183 #define ARIZONA_NOISE_GATE_SELECT_2L 0x41B
184 #define ARIZONA_OUTPUT_PATH_CONFIG_2R 0x41C
185 #define ARIZONA_DAC_DIGITAL_VOLUME_2R 0x41D
186 #define ARIZONA_DAC_VOLUME_LIMIT_2R 0x41E
187 #define ARIZONA_NOISE_GATE_SELECT_2R 0x41F
188 #define ARIZONA_OUTPUT_PATH_CONFIG_3L 0x420
189 #define ARIZONA_DAC_DIGITAL_VOLUME_3L 0x421
190 #define ARIZONA_DAC_VOLUME_LIMIT_3L 0x422
191 #define ARIZONA_NOISE_GATE_SELECT_3L 0x423
192 #define ARIZONA_OUTPUT_PATH_CONFIG_3R 0x424
193 #define ARIZONA_DAC_DIGITAL_VOLUME_3R 0x425
194 #define ARIZONA_DAC_VOLUME_LIMIT_3R 0x426
195 #define ARIZONA_NOISE_GATE_SELECT_3R 0x427
196 #define ARIZONA_OUTPUT_PATH_CONFIG_4L 0x428
197 #define ARIZONA_DAC_DIGITAL_VOLUME_4L 0x429
198 #define ARIZONA_OUT_VOLUME_4L 0x42A
199 #define ARIZONA_NOISE_GATE_SELECT_4L 0x42B
200 #define ARIZONA_OUTPUT_PATH_CONFIG_4R 0x42C
201 #define ARIZONA_DAC_DIGITAL_VOLUME_4R 0x42D
202 #define ARIZONA_OUT_VOLUME_4R 0x42E
203 #define ARIZONA_NOISE_GATE_SELECT_4R 0x42F
204 #define ARIZONA_OUTPUT_PATH_CONFIG_5L 0x430
205 #define ARIZONA_DAC_DIGITAL_VOLUME_5L 0x431
206 #define ARIZONA_DAC_VOLUME_LIMIT_5L 0x432
207 #define ARIZONA_NOISE_GATE_SELECT_5L 0x433
208 #define ARIZONA_OUTPUT_PATH_CONFIG_5R 0x434
209 #define ARIZONA_DAC_DIGITAL_VOLUME_5R 0x435
210 #define ARIZONA_DAC_VOLUME_LIMIT_5R 0x436
211 #define ARIZONA_NOISE_GATE_SELECT_5R 0x437
212 #define ARIZONA_OUTPUT_PATH_CONFIG_6L 0x438
213 #define ARIZONA_DAC_DIGITAL_VOLUME_6L 0x439
214 #define ARIZONA_DAC_VOLUME_LIMIT_6L 0x43A
215 #define ARIZONA_NOISE_GATE_SELECT_6L 0x43B
216 #define ARIZONA_OUTPUT_PATH_CONFIG_6R 0x43C
217 #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D
218 #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E
219 #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F
220 #define ARIZONA_DRE_ENABLE 0x440
221 #define ARIZONA_DRE_CONTROL_2 0x442
222 #define ARIZONA_DRE_CONTROL_3 0x443
223 #define ARIZONA_DAC_AEC_CONTROL_1 0x450
224 #define ARIZONA_NOISE_GATE_CONTROL 0x458
225 #define ARIZONA_PDM_SPK1_CTRL_1 0x490
226 #define ARIZONA_PDM_SPK1_CTRL_2 0x491
227 #define ARIZONA_PDM_SPK2_CTRL_1 0x492
228 #define ARIZONA_PDM_SPK2_CTRL_2 0x493
229 #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0
230 #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1
231 #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2
232 #define ARIZONA_SPK_CTRL_2 0x4B5
233 #define ARIZONA_SPK_CTRL_3 0x4B6
234 #define ARIZONA_DAC_COMP_1 0x4DC
235 #define ARIZONA_DAC_COMP_2 0x4DD
236 #define ARIZONA_DAC_COMP_3 0x4DE
237 #define ARIZONA_DAC_COMP_4 0x4DF
238 #define ARIZONA_AIF1_BCLK_CTRL 0x500
239 #define ARIZONA_AIF1_TX_PIN_CTRL 0x501
240 #define ARIZONA_AIF1_RX_PIN_CTRL 0x502
241 #define ARIZONA_AIF1_RATE_CTRL 0x503
242 #define ARIZONA_AIF1_FORMAT 0x504
243 #define ARIZONA_AIF1_TX_BCLK_RATE 0x505
244 #define ARIZONA_AIF1_RX_BCLK_RATE 0x506
245 #define ARIZONA_AIF1_FRAME_CTRL_1 0x507
246 #define ARIZONA_AIF1_FRAME_CTRL_2 0x508
247 #define ARIZONA_AIF1_FRAME_CTRL_3 0x509
248 #define ARIZONA_AIF1_FRAME_CTRL_4 0x50A
249 #define ARIZONA_AIF1_FRAME_CTRL_5 0x50B
250 #define ARIZONA_AIF1_FRAME_CTRL_6 0x50C
251 #define ARIZONA_AIF1_FRAME_CTRL_7 0x50D
252 #define ARIZONA_AIF1_FRAME_CTRL_8 0x50E
253 #define ARIZONA_AIF1_FRAME_CTRL_9 0x50F
254 #define ARIZONA_AIF1_FRAME_CTRL_10 0x510
255 #define ARIZONA_AIF1_FRAME_CTRL_11 0x511
256 #define ARIZONA_AIF1_FRAME_CTRL_12 0x512
257 #define ARIZONA_AIF1_FRAME_CTRL_13 0x513
258 #define ARIZONA_AIF1_FRAME_CTRL_14 0x514
259 #define ARIZONA_AIF1_FRAME_CTRL_15 0x515
260 #define ARIZONA_AIF1_FRAME_CTRL_16 0x516
261 #define ARIZONA_AIF1_FRAME_CTRL_17 0x517
262 #define ARIZONA_AIF1_FRAME_CTRL_18 0x518
263 #define ARIZONA_AIF1_TX_ENABLES 0x519
264 #define ARIZONA_AIF1_RX_ENABLES 0x51A
265 #define ARIZONA_AIF1_FORCE_WRITE 0x51B
266 #define ARIZONA_AIF2_BCLK_CTRL 0x540
267 #define ARIZONA_AIF2_TX_PIN_CTRL 0x541
268 #define ARIZONA_AIF2_RX_PIN_CTRL 0x542
269 #define ARIZONA_AIF2_RATE_CTRL 0x543
270 #define ARIZONA_AIF2_FORMAT 0x544
271 #define ARIZONA_AIF2_TX_BCLK_RATE 0x545
272 #define ARIZONA_AIF2_RX_BCLK_RATE 0x546
273 #define ARIZONA_AIF2_FRAME_CTRL_1 0x547
274 #define ARIZONA_AIF2_FRAME_CTRL_2 0x548
275 #define ARIZONA_AIF2_FRAME_CTRL_3 0x549
276 #define ARIZONA_AIF2_FRAME_CTRL_4 0x54A
277 #define ARIZONA_AIF2_FRAME_CTRL_11 0x551
278 #define ARIZONA_AIF2_FRAME_CTRL_12 0x552
279 #define ARIZONA_AIF2_TX_ENABLES 0x559
280 #define ARIZONA_AIF2_RX_ENABLES 0x55A
281 #define ARIZONA_AIF2_FORCE_WRITE 0x55B
282 #define ARIZONA_AIF3_BCLK_CTRL 0x580
283 #define ARIZONA_AIF3_TX_PIN_CTRL 0x581
284 #define ARIZONA_AIF3_RX_PIN_CTRL 0x582
285 #define ARIZONA_AIF3_RATE_CTRL 0x583
286 #define ARIZONA_AIF3_FORMAT 0x584
287 #define ARIZONA_AIF3_TX_BCLK_RATE 0x585
288 #define ARIZONA_AIF3_RX_BCLK_RATE 0x586
289 #define ARIZONA_AIF3_FRAME_CTRL_1 0x587
290 #define ARIZONA_AIF3_FRAME_CTRL_2 0x588
291 #define ARIZONA_AIF3_FRAME_CTRL_3 0x589
292 #define ARIZONA_AIF3_FRAME_CTRL_4 0x58A
293 #define ARIZONA_AIF3_FRAME_CTRL_11 0x591
294 #define ARIZONA_AIF3_FRAME_CTRL_12 0x592
295 #define ARIZONA_AIF3_TX_ENABLES 0x599
296 #define ARIZONA_AIF3_RX_ENABLES 0x59A
297 #define ARIZONA_AIF3_FORCE_WRITE 0x59B
298 #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3
299 #define ARIZONA_SLIMBUS_RATES_1 0x5E5
300 #define ARIZONA_SLIMBUS_RATES_2 0x5E6
301 #define ARIZONA_SLIMBUS_RATES_3 0x5E7
302 #define ARIZONA_SLIMBUS_RATES_4 0x5E8
303 #define ARIZONA_SLIMBUS_RATES_5 0x5E9
304 #define ARIZONA_SLIMBUS_RATES_6 0x5EA
305 #define ARIZONA_SLIMBUS_RATES_7 0x5EB
306 #define ARIZONA_SLIMBUS_RATES_8 0x5EC
307 #define ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE 0x5F5
308 #define ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE 0x5F6
309 #define ARIZONA_SLIMBUS_RX_PORT_STATUS 0x5F7
310 #define ARIZONA_SLIMBUS_TX_PORT_STATUS 0x5F8
311 #define ARIZONA_PWM1MIX_INPUT_1_SOURCE 0x640
312 #define ARIZONA_PWM1MIX_INPUT_1_VOLUME 0x641
313 #define ARIZONA_PWM1MIX_INPUT_2_SOURCE 0x642
314 #define ARIZONA_PWM1MIX_INPUT_2_VOLUME 0x643
315 #define ARIZONA_PWM1MIX_INPUT_3_SOURCE 0x644
316 #define ARIZONA_PWM1MIX_INPUT_3_VOLUME 0x645
317 #define ARIZONA_PWM1MIX_INPUT_4_SOURCE 0x646
318 #define ARIZONA_PWM1MIX_INPUT_4_VOLUME 0x647
319 #define ARIZONA_PWM2MIX_INPUT_1_SOURCE 0x648
320 #define ARIZONA_PWM2MIX_INPUT_1_VOLUME 0x649
321 #define ARIZONA_PWM2MIX_INPUT_2_SOURCE 0x64A
322 #define ARIZONA_PWM2MIX_INPUT_2_VOLUME 0x64B
323 #define ARIZONA_PWM2MIX_INPUT_3_SOURCE 0x64C
324 #define ARIZONA_PWM2MIX_INPUT_3_VOLUME 0x64D
325 #define ARIZONA_PWM2MIX_INPUT_4_SOURCE 0x64E
326 #define ARIZONA_PWM2MIX_INPUT_4_VOLUME 0x64F
327 #define ARIZONA_MICMIX_INPUT_1_SOURCE 0x660
328 #define ARIZONA_MICMIX_INPUT_1_VOLUME 0x661
329 #define ARIZONA_MICMIX_INPUT_2_SOURCE 0x662
330 #define ARIZONA_MICMIX_INPUT_2_VOLUME 0x663
331 #define ARIZONA_MICMIX_INPUT_3_SOURCE 0x664
332 #define ARIZONA_MICMIX_INPUT_3_VOLUME 0x665
333 #define ARIZONA_MICMIX_INPUT_4_SOURCE 0x666
334 #define ARIZONA_MICMIX_INPUT_4_VOLUME 0x667
335 #define ARIZONA_NOISEMIX_INPUT_1_SOURCE 0x668
336 #define ARIZONA_NOISEMIX_INPUT_1_VOLUME 0x669
337 #define ARIZONA_NOISEMIX_INPUT_2_SOURCE 0x66A
338 #define ARIZONA_NOISEMIX_INPUT_2_VOLUME 0x66B
339 #define ARIZONA_NOISEMIX_INPUT_3_SOURCE 0x66C
340 #define ARIZONA_NOISEMIX_INPUT_3_VOLUME 0x66D
341 #define ARIZONA_NOISEMIX_INPUT_4_SOURCE 0x66E
342 #define ARIZONA_NOISEMIX_INPUT_4_VOLUME 0x66F
343 #define ARIZONA_OUT1LMIX_INPUT_1_SOURCE 0x680
344 #define ARIZONA_OUT1LMIX_INPUT_1_VOLUME 0x681
345 #define ARIZONA_OUT1LMIX_INPUT_2_SOURCE 0x682
346 #define ARIZONA_OUT1LMIX_INPUT_2_VOLUME 0x683
347 #define ARIZONA_OUT1LMIX_INPUT_3_SOURCE 0x684
348 #define ARIZONA_OUT1LMIX_INPUT_3_VOLUME 0x685
349 #define ARIZONA_OUT1LMIX_INPUT_4_SOURCE 0x686
350 #define ARIZONA_OUT1LMIX_INPUT_4_VOLUME 0x687
351 #define ARIZONA_OUT1RMIX_INPUT_1_SOURCE 0x688
352 #define ARIZONA_OUT1RMIX_INPUT_1_VOLUME 0x689
353 #define ARIZONA_OUT1RMIX_INPUT_2_SOURCE 0x68A
354 #define ARIZONA_OUT1RMIX_INPUT_2_VOLUME 0x68B
355 #define ARIZONA_OUT1RMIX_INPUT_3_SOURCE 0x68C
356 #define ARIZONA_OUT1RMIX_INPUT_3_VOLUME 0x68D
357 #define ARIZONA_OUT1RMIX_INPUT_4_SOURCE 0x68E
358 #define ARIZONA_OUT1RMIX_INPUT_4_VOLUME 0x68F
359 #define ARIZONA_OUT2LMIX_INPUT_1_SOURCE 0x690
360 #define ARIZONA_OUT2LMIX_INPUT_1_VOLUME 0x691
361 #define ARIZONA_OUT2LMIX_INPUT_2_SOURCE 0x692
362 #define ARIZONA_OUT2LMIX_INPUT_2_VOLUME 0x693
363 #define ARIZONA_OUT2LMIX_INPUT_3_SOURCE 0x694
364 #define ARIZONA_OUT2LMIX_INPUT_3_VOLUME 0x695
365 #define ARIZONA_OUT2LMIX_INPUT_4_SOURCE 0x696
366 #define ARIZONA_OUT2LMIX_INPUT_4_VOLUME 0x697
367 #define ARIZONA_OUT2RMIX_INPUT_1_SOURCE 0x698
368 #define ARIZONA_OUT2RMIX_INPUT_1_VOLUME 0x699
369 #define ARIZONA_OUT2RMIX_INPUT_2_SOURCE 0x69A
370 #define ARIZONA_OUT2RMIX_INPUT_2_VOLUME 0x69B
371 #define ARIZONA_OUT2RMIX_INPUT_3_SOURCE 0x69C
372 #define ARIZONA_OUT2RMIX_INPUT_3_VOLUME 0x69D
373 #define ARIZONA_OUT2RMIX_INPUT_4_SOURCE 0x69E
374 #define ARIZONA_OUT2RMIX_INPUT_4_VOLUME 0x69F
375 #define ARIZONA_OUT3LMIX_INPUT_1_SOURCE 0x6A0
376 #define ARIZONA_OUT3LMIX_INPUT_1_VOLUME 0x6A1
377 #define ARIZONA_OUT3LMIX_INPUT_2_SOURCE 0x6A2
378 #define ARIZONA_OUT3LMIX_INPUT_2_VOLUME 0x6A3
379 #define ARIZONA_OUT3LMIX_INPUT_3_SOURCE 0x6A4
380 #define ARIZONA_OUT3LMIX_INPUT_3_VOLUME 0x6A5
381 #define ARIZONA_OUT3LMIX_INPUT_4_SOURCE 0x6A6
382 #define ARIZONA_OUT3LMIX_INPUT_4_VOLUME 0x6A7
383 #define ARIZONA_OUT3RMIX_INPUT_1_SOURCE 0x6A8
384 #define ARIZONA_OUT3RMIX_INPUT_1_VOLUME 0x6A9
385 #define ARIZONA_OUT3RMIX_INPUT_2_SOURCE 0x6AA
386 #define ARIZONA_OUT3RMIX_INPUT_2_VOLUME 0x6AB
387 #define ARIZONA_OUT3RMIX_INPUT_3_SOURCE 0x6AC
388 #define ARIZONA_OUT3RMIX_INPUT_3_VOLUME 0x6AD
389 #define ARIZONA_OUT3RMIX_INPUT_4_SOURCE 0x6AE
390 #define ARIZONA_OUT3RMIX_INPUT_4_VOLUME 0x6AF
391 #define ARIZONA_OUT4LMIX_INPUT_1_SOURCE 0x6B0
392 #define ARIZONA_OUT4LMIX_INPUT_1_VOLUME 0x6B1
393 #define ARIZONA_OUT4LMIX_INPUT_2_SOURCE 0x6B2
394 #define ARIZONA_OUT4LMIX_INPUT_2_VOLUME 0x6B3
395 #define ARIZONA_OUT4LMIX_INPUT_3_SOURCE 0x6B4
396 #define ARIZONA_OUT4LMIX_INPUT_3_VOLUME 0x6B5
397 #define ARIZONA_OUT4LMIX_INPUT_4_SOURCE 0x6B6
398 #define ARIZONA_OUT4LMIX_INPUT_4_VOLUME 0x6B7
399 #define ARIZONA_OUT4RMIX_INPUT_1_SOURCE 0x6B8
400 #define ARIZONA_OUT4RMIX_INPUT_1_VOLUME 0x6B9
401 #define ARIZONA_OUT4RMIX_INPUT_2_SOURCE 0x6BA
402 #define ARIZONA_OUT4RMIX_INPUT_2_VOLUME 0x6BB
403 #define ARIZONA_OUT4RMIX_INPUT_3_SOURCE 0x6BC
404 #define ARIZONA_OUT4RMIX_INPUT_3_VOLUME 0x6BD
405 #define ARIZONA_OUT4RMIX_INPUT_4_SOURCE 0x6BE
406 #define ARIZONA_OUT4RMIX_INPUT_4_VOLUME 0x6BF
407 #define ARIZONA_OUT5LMIX_INPUT_1_SOURCE 0x6C0
408 #define ARIZONA_OUT5LMIX_INPUT_1_VOLUME 0x6C1
409 #define ARIZONA_OUT5LMIX_INPUT_2_SOURCE 0x6C2
410 #define ARIZONA_OUT5LMIX_INPUT_2_VOLUME 0x6C3
411 #define ARIZONA_OUT5LMIX_INPUT_3_SOURCE 0x6C4
412 #define ARIZONA_OUT5LMIX_INPUT_3_VOLUME 0x6C5
413 #define ARIZONA_OUT5LMIX_INPUT_4_SOURCE 0x6C6
414 #define ARIZONA_OUT5LMIX_INPUT_4_VOLUME 0x6C7
415 #define ARIZONA_OUT5RMIX_INPUT_1_SOURCE 0x6C8
416 #define ARIZONA_OUT5RMIX_INPUT_1_VOLUME 0x6C9
417 #define ARIZONA_OUT5RMIX_INPUT_2_SOURCE 0x6CA
418 #define ARIZONA_OUT5RMIX_INPUT_2_VOLUME 0x6CB
419 #define ARIZONA_OUT5RMIX_INPUT_3_SOURCE 0x6CC
420 #define ARIZONA_OUT5RMIX_INPUT_3_VOLUME 0x6CD
421 #define ARIZONA_OUT5RMIX_INPUT_4_SOURCE 0x6CE
422 #define ARIZONA_OUT5RMIX_INPUT_4_VOLUME 0x6CF
423 #define ARIZONA_OUT6LMIX_INPUT_1_SOURCE 0x6D0
424 #define ARIZONA_OUT6LMIX_INPUT_1_VOLUME 0x6D1
425 #define ARIZONA_OUT6LMIX_INPUT_2_SOURCE 0x6D2
426 #define ARIZONA_OUT6LMIX_INPUT_2_VOLUME 0x6D3
427 #define ARIZONA_OUT6LMIX_INPUT_3_SOURCE 0x6D4
428 #define ARIZONA_OUT6LMIX_INPUT_3_VOLUME 0x6D5
429 #define ARIZONA_OUT6LMIX_INPUT_4_SOURCE 0x6D6
430 #define ARIZONA_OUT6LMIX_INPUT_4_VOLUME 0x6D7
431 #define ARIZONA_OUT6RMIX_INPUT_1_SOURCE 0x6D8
432 #define ARIZONA_OUT6RMIX_INPUT_1_VOLUME 0x6D9
433 #define ARIZONA_OUT6RMIX_INPUT_2_SOURCE 0x6DA
434 #define ARIZONA_OUT6RMIX_INPUT_2_VOLUME 0x6DB
435 #define ARIZONA_OUT6RMIX_INPUT_3_SOURCE 0x6DC
436 #define ARIZONA_OUT6RMIX_INPUT_3_VOLUME 0x6DD
437 #define ARIZONA_OUT6RMIX_INPUT_4_SOURCE 0x6DE
438 #define ARIZONA_OUT6RMIX_INPUT_4_VOLUME 0x6DF
439 #define ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE 0x700
440 #define ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME 0x701
441 #define ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE 0x702
442 #define ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME 0x703
443 #define ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE 0x704
444 #define ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME 0x705
445 #define ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE 0x706
446 #define ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME 0x707
447 #define ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE 0x708
448 #define ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME 0x709
449 #define ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE 0x70A
450 #define ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME 0x70B
451 #define ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE 0x70C
452 #define ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME 0x70D
453 #define ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE 0x70E
454 #define ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME 0x70F
455 #define ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE 0x710
456 #define ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME 0x711
457 #define ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE 0x712
458 #define ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME 0x713
459 #define ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE 0x714
460 #define ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME 0x715
461 #define ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE 0x716
462 #define ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME 0x717
463 #define ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE 0x718
464 #define ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME 0x719
465 #define ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE 0x71A
466 #define ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME 0x71B
467 #define ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE 0x71C
468 #define ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME 0x71D
469 #define ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE 0x71E
470 #define ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME 0x71F
471 #define ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE 0x720
472 #define ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME 0x721
473 #define ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE 0x722
474 #define ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME 0x723
475 #define ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE 0x724
476 #define ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME 0x725
477 #define ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE 0x726
478 #define ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME 0x727
479 #define ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE 0x728
480 #define ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME 0x729
481 #define ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE 0x72A
482 #define ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME 0x72B
483 #define ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE 0x72C
484 #define ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME 0x72D
485 #define ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE 0x72E
486 #define ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME 0x72F
487 #define ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE 0x730
488 #define ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME 0x731
489 #define ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE 0x732
490 #define ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME 0x733
491 #define ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE 0x734
492 #define ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME 0x735
493 #define ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE 0x736
494 #define ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME 0x737
495 #define ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE 0x738
496 #define ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME 0x739
497 #define ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE 0x73A
498 #define ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME 0x73B
499 #define ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE 0x73C
500 #define ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME 0x73D
501 #define ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE 0x73E
502 #define ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME 0x73F
503 #define ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE 0x740
504 #define ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME 0x741
505 #define ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE 0x742
506 #define ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME 0x743
507 #define ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE 0x744
508 #define ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME 0x745
509 #define ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE 0x746
510 #define ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME 0x747
511 #define ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE 0x748
512 #define ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME 0x749
513 #define ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE 0x74A
514 #define ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME 0x74B
515 #define ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE 0x74C
516 #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
517 #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
518 #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
519 #define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750
520 #define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751
521 #define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752
522 #define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753
523 #define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754
524 #define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755
525 #define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756
526 #define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757
527 #define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758
528 #define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759
529 #define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A
530 #define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B
531 #define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C
532 #define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D
533 #define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E
534 #define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F
535 #define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760
536 #define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761
537 #define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762
538 #define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763
539 #define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764
540 #define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765
541 #define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766
542 #define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767
543 #define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768
544 #define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769
545 #define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A
546 #define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B
547 #define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C
548 #define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D
549 #define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E
550 #define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F
551 #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
552 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
553 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
554 #define ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME 0x783
555 #define ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE 0x784
556 #define ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME 0x785
557 #define ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE 0x786
558 #define ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME 0x787
559 #define ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE 0x788
560 #define ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME 0x789
561 #define ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE 0x78A
562 #define ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME 0x78B
563 #define ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE 0x78C
564 #define ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D
565 #define ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E
566 #define ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F
567 #define ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0
568 #define ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1
569 #define ARIZONA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2
570 #define ARIZONA_SLIMTX1MIX_INPUT_2_VOLUME 0x7C3
571 #define ARIZONA_SLIMTX1MIX_INPUT_3_SOURCE 0x7C4
572 #define ARIZONA_SLIMTX1MIX_INPUT_3_VOLUME 0x7C5
573 #define ARIZONA_SLIMTX1MIX_INPUT_4_SOURCE 0x7C6
574 #define ARIZONA_SLIMTX1MIX_INPUT_4_VOLUME 0x7C7
575 #define ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE 0x7C8
576 #define ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME 0x7C9
577 #define ARIZONA_SLIMTX2MIX_INPUT_2_SOURCE 0x7CA
578 #define ARIZONA_SLIMTX2MIX_INPUT_2_VOLUME 0x7CB
579 #define ARIZONA_SLIMTX2MIX_INPUT_3_SOURCE 0x7CC
580 #define ARIZONA_SLIMTX2MIX_INPUT_3_VOLUME 0x7CD
581 #define ARIZONA_SLIMTX2MIX_INPUT_4_SOURCE 0x7CE
582 #define ARIZONA_SLIMTX2MIX_INPUT_4_VOLUME 0x7CF
583 #define ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE 0x7D0
584 #define ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME 0x7D1
585 #define ARIZONA_SLIMTX3MIX_INPUT_2_SOURCE 0x7D2
586 #define ARIZONA_SLIMTX3MIX_INPUT_2_VOLUME 0x7D3
587 #define ARIZONA_SLIMTX3MIX_INPUT_3_SOURCE 0x7D4
588 #define ARIZONA_SLIMTX3MIX_INPUT_3_VOLUME 0x7D5
589 #define ARIZONA_SLIMTX3MIX_INPUT_4_SOURCE 0x7D6
590 #define ARIZONA_SLIMTX3MIX_INPUT_4_VOLUME 0x7D7
591 #define ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE 0x7D8
592 #define ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME 0x7D9
593 #define ARIZONA_SLIMTX4MIX_INPUT_2_SOURCE 0x7DA
594 #define ARIZONA_SLIMTX4MIX_INPUT_2_VOLUME 0x7DB
595 #define ARIZONA_SLIMTX4MIX_INPUT_3_SOURCE 0x7DC
596 #define ARIZONA_SLIMTX4MIX_INPUT_3_VOLUME 0x7DD
597 #define ARIZONA_SLIMTX4MIX_INPUT_4_SOURCE 0x7DE
598 #define ARIZONA_SLIMTX4MIX_INPUT_4_VOLUME 0x7DF
599 #define ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE 0x7E0
600 #define ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME 0x7E1
601 #define ARIZONA_SLIMTX5MIX_INPUT_2_SOURCE 0x7E2
602 #define ARIZONA_SLIMTX5MIX_INPUT_2_VOLUME 0x7E3
603 #define ARIZONA_SLIMTX5MIX_INPUT_3_SOURCE 0x7E4
604 #define ARIZONA_SLIMTX5MIX_INPUT_3_VOLUME 0x7E5
605 #define ARIZONA_SLIMTX5MIX_INPUT_4_SOURCE 0x7E6
606 #define ARIZONA_SLIMTX5MIX_INPUT_4_VOLUME 0x7E7
607 #define ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE 0x7E8
608 #define ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME 0x7E9
609 #define ARIZONA_SLIMTX6MIX_INPUT_2_SOURCE 0x7EA
610 #define ARIZONA_SLIMTX6MIX_INPUT_2_VOLUME 0x7EB
611 #define ARIZONA_SLIMTX6MIX_INPUT_3_SOURCE 0x7EC
612 #define ARIZONA_SLIMTX6MIX_INPUT_3_VOLUME 0x7ED
613 #define ARIZONA_SLIMTX6MIX_INPUT_4_SOURCE 0x7EE
614 #define ARIZONA_SLIMTX6MIX_INPUT_4_VOLUME 0x7EF
615 #define ARIZONA_SLIMTX7MIX_INPUT_1_SOURCE 0x7F0
616 #define ARIZONA_SLIMTX7MIX_INPUT_1_VOLUME 0x7F1
617 #define ARIZONA_SLIMTX7MIX_INPUT_2_SOURCE 0x7F2
618 #define ARIZONA_SLIMTX7MIX_INPUT_2_VOLUME 0x7F3
619 #define ARIZONA_SLIMTX7MIX_INPUT_3_SOURCE 0x7F4
620 #define ARIZONA_SLIMTX7MIX_INPUT_3_VOLUME 0x7F5
621 #define ARIZONA_SLIMTX7MIX_INPUT_4_SOURCE 0x7F6
622 #define ARIZONA_SLIMTX7MIX_INPUT_4_VOLUME 0x7F7
623 #define ARIZONA_SLIMTX8MIX_INPUT_1_SOURCE 0x7F8
624 #define ARIZONA_SLIMTX8MIX_INPUT_1_VOLUME 0x7F9
625 #define ARIZONA_SLIMTX8MIX_INPUT_2_SOURCE 0x7FA
626 #define ARIZONA_SLIMTX8MIX_INPUT_2_VOLUME 0x7FB
627 #define ARIZONA_SLIMTX8MIX_INPUT_3_SOURCE 0x7FC
628 #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD
629 #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE
630 #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF
631 #define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880
632 #define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881
633 #define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882
634 #define ARIZONA_EQ1MIX_INPUT_2_VOLUME 0x883
635 #define ARIZONA_EQ1MIX_INPUT_3_SOURCE 0x884
636 #define ARIZONA_EQ1MIX_INPUT_3_VOLUME 0x885
637 #define ARIZONA_EQ1MIX_INPUT_4_SOURCE 0x886
638 #define ARIZONA_EQ1MIX_INPUT_4_VOLUME 0x887
639 #define ARIZONA_EQ2MIX_INPUT_1_SOURCE 0x888
640 #define ARIZONA_EQ2MIX_INPUT_1_VOLUME 0x889
641 #define ARIZONA_EQ2MIX_INPUT_2_SOURCE 0x88A
642 #define ARIZONA_EQ2MIX_INPUT_2_VOLUME 0x88B
643 #define ARIZONA_EQ2MIX_INPUT_3_SOURCE 0x88C
644 #define ARIZONA_EQ2MIX_INPUT_3_VOLUME 0x88D
645 #define ARIZONA_EQ2MIX_INPUT_4_SOURCE 0x88E
646 #define ARIZONA_EQ2MIX_INPUT_4_VOLUME 0x88F
647 #define ARIZONA_EQ3MIX_INPUT_1_SOURCE 0x890
648 #define ARIZONA_EQ3MIX_INPUT_1_VOLUME 0x891
649 #define ARIZONA_EQ3MIX_INPUT_2_SOURCE 0x892
650 #define ARIZONA_EQ3MIX_INPUT_2_VOLUME 0x893
651 #define ARIZONA_EQ3MIX_INPUT_3_SOURCE 0x894
652 #define ARIZONA_EQ3MIX_INPUT_3_VOLUME 0x895
653 #define ARIZONA_EQ3MIX_INPUT_4_SOURCE 0x896
654 #define ARIZONA_EQ3MIX_INPUT_4_VOLUME 0x897
655 #define ARIZONA_EQ4MIX_INPUT_1_SOURCE 0x898
656 #define ARIZONA_EQ4MIX_INPUT_1_VOLUME 0x899
657 #define ARIZONA_EQ4MIX_INPUT_2_SOURCE 0x89A
658 #define ARIZONA_EQ4MIX_INPUT_2_VOLUME 0x89B
659 #define ARIZONA_EQ4MIX_INPUT_3_SOURCE 0x89C
660 #define ARIZONA_EQ4MIX_INPUT_3_VOLUME 0x89D
661 #define ARIZONA_EQ4MIX_INPUT_4_SOURCE 0x89E
662 #define ARIZONA_EQ4MIX_INPUT_4_VOLUME 0x89F
663 #define ARIZONA_DRC1LMIX_INPUT_1_SOURCE 0x8C0
664 #define ARIZONA_DRC1LMIX_INPUT_1_VOLUME 0x8C1
665 #define ARIZONA_DRC1LMIX_INPUT_2_SOURCE 0x8C2
666 #define ARIZONA_DRC1LMIX_INPUT_2_VOLUME 0x8C3
667 #define ARIZONA_DRC1LMIX_INPUT_3_SOURCE 0x8C4
668 #define ARIZONA_DRC1LMIX_INPUT_3_VOLUME 0x8C5
669 #define ARIZONA_DRC1LMIX_INPUT_4_SOURCE 0x8C6
670 #define ARIZONA_DRC1LMIX_INPUT_4_VOLUME 0x8C7
671 #define ARIZONA_DRC1RMIX_INPUT_1_SOURCE 0x8C8
672 #define ARIZONA_DRC1RMIX_INPUT_1_VOLUME 0x8C9
673 #define ARIZONA_DRC1RMIX_INPUT_2_SOURCE 0x8CA
674 #define ARIZONA_DRC1RMIX_INPUT_2_VOLUME 0x8CB
675 #define ARIZONA_DRC1RMIX_INPUT_3_SOURCE 0x8CC
676 #define ARIZONA_DRC1RMIX_INPUT_3_VOLUME 0x8CD
677 #define ARIZONA_DRC1RMIX_INPUT_4_SOURCE 0x8CE
678 #define ARIZONA_DRC1RMIX_INPUT_4_VOLUME 0x8CF
679 #define ARIZONA_DRC2LMIX_INPUT_1_SOURCE 0x8D0
680 #define ARIZONA_DRC2LMIX_INPUT_1_VOLUME 0x8D1
681 #define ARIZONA_DRC2LMIX_INPUT_2_SOURCE 0x8D2
682 #define ARIZONA_DRC2LMIX_INPUT_2_VOLUME 0x8D3
683 #define ARIZONA_DRC2LMIX_INPUT_3_SOURCE 0x8D4
684 #define ARIZONA_DRC2LMIX_INPUT_3_VOLUME 0x8D5
685 #define ARIZONA_DRC2LMIX_INPUT_4_SOURCE 0x8D6
686 #define ARIZONA_DRC2LMIX_INPUT_4_VOLUME 0x8D7
687 #define ARIZONA_DRC2RMIX_INPUT_1_SOURCE 0x8D8
688 #define ARIZONA_DRC2RMIX_INPUT_1_VOLUME 0x8D9
689 #define ARIZONA_DRC2RMIX_INPUT_2_SOURCE 0x8DA
690 #define ARIZONA_DRC2RMIX_INPUT_2_VOLUME 0x8DB
691 #define ARIZONA_DRC2RMIX_INPUT_3_SOURCE 0x8DC
692 #define ARIZONA_DRC2RMIX_INPUT_3_VOLUME 0x8DD
693 #define ARIZONA_DRC2RMIX_INPUT_4_SOURCE 0x8DE
694 #define ARIZONA_DRC2RMIX_INPUT_4_VOLUME 0x8DF
695 #define ARIZONA_HPLP1MIX_INPUT_1_SOURCE 0x900
696 #define ARIZONA_HPLP1MIX_INPUT_1_VOLUME 0x901
697 #define ARIZONA_HPLP1MIX_INPUT_2_SOURCE 0x902
698 #define ARIZONA_HPLP1MIX_INPUT_2_VOLUME 0x903
699 #define ARIZONA_HPLP1MIX_INPUT_3_SOURCE 0x904
700 #define ARIZONA_HPLP1MIX_INPUT_3_VOLUME 0x905
701 #define ARIZONA_HPLP1MIX_INPUT_4_SOURCE 0x906
702 #define ARIZONA_HPLP1MIX_INPUT_4_VOLUME 0x907
703 #define ARIZONA_HPLP2MIX_INPUT_1_SOURCE 0x908
704 #define ARIZONA_HPLP2MIX_INPUT_1_VOLUME 0x909
705 #define ARIZONA_HPLP2MIX_INPUT_2_SOURCE 0x90A
706 #define ARIZONA_HPLP2MIX_INPUT_2_VOLUME 0x90B
707 #define ARIZONA_HPLP2MIX_INPUT_3_SOURCE 0x90C
708 #define ARIZONA_HPLP2MIX_INPUT_3_VOLUME 0x90D
709 #define ARIZONA_HPLP2MIX_INPUT_4_SOURCE 0x90E
710 #define ARIZONA_HPLP2MIX_INPUT_4_VOLUME 0x90F
711 #define ARIZONA_HPLP3MIX_INPUT_1_SOURCE 0x910
712 #define ARIZONA_HPLP3MIX_INPUT_1_VOLUME 0x911
713 #define ARIZONA_HPLP3MIX_INPUT_2_SOURCE 0x912
714 #define ARIZONA_HPLP3MIX_INPUT_2_VOLUME 0x913
715 #define ARIZONA_HPLP3MIX_INPUT_3_SOURCE 0x914
716 #define ARIZONA_HPLP3MIX_INPUT_3_VOLUME 0x915
717 #define ARIZONA_HPLP3MIX_INPUT_4_SOURCE 0x916
718 #define ARIZONA_HPLP3MIX_INPUT_4_VOLUME 0x917
719 #define ARIZONA_HPLP4MIX_INPUT_1_SOURCE 0x918
720 #define ARIZONA_HPLP4MIX_INPUT_1_VOLUME 0x919
721 #define ARIZONA_HPLP4MIX_INPUT_2_SOURCE 0x91A
722 #define ARIZONA_HPLP4MIX_INPUT_2_VOLUME 0x91B
723 #define ARIZONA_HPLP4MIX_INPUT_3_SOURCE 0x91C
724 #define ARIZONA_HPLP4MIX_INPUT_3_VOLUME 0x91D
725 #define ARIZONA_HPLP4MIX_INPUT_4_SOURCE 0x91E
726 #define ARIZONA_HPLP4MIX_INPUT_4_VOLUME 0x91F
727 #define ARIZONA_DSP1LMIX_INPUT_1_SOURCE 0x940
728 #define ARIZONA_DSP1LMIX_INPUT_1_VOLUME 0x941
729 #define ARIZONA_DSP1LMIX_INPUT_2_SOURCE 0x942
730 #define ARIZONA_DSP1LMIX_INPUT_2_VOLUME 0x943
731 #define ARIZONA_DSP1LMIX_INPUT_3_SOURCE 0x944
732 #define ARIZONA_DSP1LMIX_INPUT_3_VOLUME 0x945
733 #define ARIZONA_DSP1LMIX_INPUT_4_SOURCE 0x946
734 #define ARIZONA_DSP1LMIX_INPUT_4_VOLUME 0x947
735 #define ARIZONA_DSP1RMIX_INPUT_1_SOURCE 0x948
736 #define ARIZONA_DSP1RMIX_INPUT_1_VOLUME 0x949
737 #define ARIZONA_DSP1RMIX_INPUT_2_SOURCE 0x94A
738 #define ARIZONA_DSP1RMIX_INPUT_2_VOLUME 0x94B
739 #define ARIZONA_DSP1RMIX_INPUT_3_SOURCE 0x94C
740 #define ARIZONA_DSP1RMIX_INPUT_3_VOLUME 0x94D
741 #define ARIZONA_DSP1RMIX_INPUT_4_SOURCE 0x94E
742 #define ARIZONA_DSP1RMIX_INPUT_4_VOLUME 0x94F
743 #define ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE 0x950
744 #define ARIZONA_DSP1AUX2MIX_INPUT_1_SOURCE 0x958
745 #define ARIZONA_DSP1AUX3MIX_INPUT_1_SOURCE 0x960
746 #define ARIZONA_DSP1AUX4MIX_INPUT_1_SOURCE 0x968
747 #define ARIZONA_DSP1AUX5MIX_INPUT_1_SOURCE 0x970
748 #define ARIZONA_DSP1AUX6MIX_INPUT_1_SOURCE 0x978
749 #define ARIZONA_DSP2LMIX_INPUT_1_SOURCE 0x980
750 #define ARIZONA_DSP2LMIX_INPUT_1_VOLUME 0x981
751 #define ARIZONA_DSP2LMIX_INPUT_2_SOURCE 0x982
752 #define ARIZONA_DSP2LMIX_INPUT_2_VOLUME 0x983
753 #define ARIZONA_DSP2LMIX_INPUT_3_SOURCE 0x984
754 #define ARIZONA_DSP2LMIX_INPUT_3_VOLUME 0x985
755 #define ARIZONA_DSP2LMIX_INPUT_4_SOURCE 0x986
756 #define ARIZONA_DSP2LMIX_INPUT_4_VOLUME 0x987
757 #define ARIZONA_DSP2RMIX_INPUT_1_SOURCE 0x988
758 #define ARIZONA_DSP2RMIX_INPUT_1_VOLUME 0x989
759 #define ARIZONA_DSP2RMIX_INPUT_2_SOURCE 0x98A
760 #define ARIZONA_DSP2RMIX_INPUT_2_VOLUME 0x98B
761 #define ARIZONA_DSP2RMIX_INPUT_3_SOURCE 0x98C
762 #define ARIZONA_DSP2RMIX_INPUT_3_VOLUME 0x98D
763 #define ARIZONA_DSP2RMIX_INPUT_4_SOURCE 0x98E
764 #define ARIZONA_DSP2RMIX_INPUT_4_VOLUME 0x98F
765 #define ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE 0x990
766 #define ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE 0x998
767 #define ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0
768 #define ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8
769 #define ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0
770 #define ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8
771 #define ARIZONA_DSP3LMIX_INPUT_1_SOURCE 0x9C0
772 #define ARIZONA_DSP3LMIX_INPUT_1_VOLUME 0x9C1
773 #define ARIZONA_DSP3LMIX_INPUT_2_SOURCE 0x9C2
774 #define ARIZONA_DSP3LMIX_INPUT_2_VOLUME 0x9C3
775 #define ARIZONA_DSP3LMIX_INPUT_3_SOURCE 0x9C4
776 #define ARIZONA_DSP3LMIX_INPUT_3_VOLUME 0x9C5
777 #define ARIZONA_DSP3LMIX_INPUT_4_SOURCE 0x9C6
778 #define ARIZONA_DSP3LMIX_INPUT_4_VOLUME 0x9C7
779 #define ARIZONA_DSP3RMIX_INPUT_1_SOURCE 0x9C8
780 #define ARIZONA_DSP3RMIX_INPUT_1_VOLUME 0x9C9
781 #define ARIZONA_DSP3RMIX_INPUT_2_SOURCE 0x9CA
782 #define ARIZONA_DSP3RMIX_INPUT_2_VOLUME 0x9CB
783 #define ARIZONA_DSP3RMIX_INPUT_3_SOURCE 0x9CC
784 #define ARIZONA_DSP3RMIX_INPUT_3_VOLUME 0x9CD
785 #define ARIZONA_DSP3RMIX_INPUT_4_SOURCE 0x9CE
786 #define ARIZONA_DSP3RMIX_INPUT_4_VOLUME 0x9CF
787 #define ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0
788 #define ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8
789 #define ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0
790 #define ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8
791 #define ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0
792 #define ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8
793 #define ARIZONA_DSP4LMIX_INPUT_1_SOURCE 0xA00
794 #define ARIZONA_DSP4LMIX_INPUT_1_VOLUME 0xA01
795 #define ARIZONA_DSP4LMIX_INPUT_2_SOURCE 0xA02
796 #define ARIZONA_DSP4LMIX_INPUT_2_VOLUME 0xA03
797 #define ARIZONA_DSP4LMIX_INPUT_3_SOURCE 0xA04
798 #define ARIZONA_DSP4LMIX_INPUT_3_VOLUME 0xA05
799 #define ARIZONA_DSP4LMIX_INPUT_4_SOURCE 0xA06
800 #define ARIZONA_DSP4LMIX_INPUT_4_VOLUME 0xA07
801 #define ARIZONA_DSP4RMIX_INPUT_1_SOURCE 0xA08
802 #define ARIZONA_DSP4RMIX_INPUT_1_VOLUME 0xA09
803 #define ARIZONA_DSP4RMIX_INPUT_2_SOURCE 0xA0A
804 #define ARIZONA_DSP4RMIX_INPUT_2_VOLUME 0xA0B
805 #define ARIZONA_DSP4RMIX_INPUT_3_SOURCE 0xA0C
806 #define ARIZONA_DSP4RMIX_INPUT_3_VOLUME 0xA0D
807 #define ARIZONA_DSP4RMIX_INPUT_4_SOURCE 0xA0E
808 #define ARIZONA_DSP4RMIX_INPUT_4_VOLUME 0xA0F
809 #define ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE 0xA10
810 #define ARIZONA_DSP4AUX2MIX_INPUT_1_SOURCE 0xA18
811 #define ARIZONA_DSP4AUX3MIX_INPUT_1_SOURCE 0xA20
812 #define ARIZONA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28
813 #define ARIZONA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30
814 #define ARIZONA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38
815 #define ARIZONA_ASRC1LMIX_INPUT_1_SOURCE 0xA80
816 #define ARIZONA_ASRC1RMIX_INPUT_1_SOURCE 0xA88
817 #define ARIZONA_ASRC2LMIX_INPUT_1_SOURCE 0xA90
818 #define ARIZONA_ASRC2RMIX_INPUT_1_SOURCE 0xA98
819 #define ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00
820 #define ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08
821 #define ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10
822 #define ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18
823 #define ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20
824 #define ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28
825 #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
826 #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
827 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
828 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
829 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
830 #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
831 #define ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
832 #define ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
833 #define ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
834 #define ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
835 #define ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50
836 #define ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58
837 #define ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
838 #define ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
839 #define ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70
840 #define ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78
841 #define ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE 0xB80
842 #define ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE 0xB88
843 #define ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE 0xB90
844 #define ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE 0xB98
845 #define ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE 0xBA0
846 #define ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8
847 #define ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0
848 #define ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8
849 #define ARIZONA_GPIO1_CTRL 0xC00
850 #define ARIZONA_GPIO2_CTRL 0xC01
851 #define ARIZONA_GPIO3_CTRL 0xC02
852 #define ARIZONA_GPIO4_CTRL 0xC03
853 #define ARIZONA_GPIO5_CTRL 0xC04
854 #define ARIZONA_IRQ_CTRL_1 0xC0F
855 #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10
856 #define ARIZONA_MISC_PAD_CTRL_1 0xC20
857 #define ARIZONA_MISC_PAD_CTRL_2 0xC21
858 #define ARIZONA_MISC_PAD_CTRL_3 0xC22
859 #define ARIZONA_MISC_PAD_CTRL_4 0xC23
860 #define ARIZONA_MISC_PAD_CTRL_5 0xC24
861 #define ARIZONA_MISC_PAD_CTRL_6 0xC25
862 #define ARIZONA_MISC_PAD_CTRL_7 0xC30
863 #define ARIZONA_MISC_PAD_CTRL_8 0xC31
864 #define ARIZONA_MISC_PAD_CTRL_9 0xC32
865 #define ARIZONA_MISC_PAD_CTRL_10 0xC33
866 #define ARIZONA_MISC_PAD_CTRL_11 0xC34
867 #define ARIZONA_MISC_PAD_CTRL_12 0xC35
868 #define ARIZONA_MISC_PAD_CTRL_13 0xC36
869 #define ARIZONA_MISC_PAD_CTRL_14 0xC37
870 #define ARIZONA_MISC_PAD_CTRL_15 0xC38
871 #define ARIZONA_MISC_PAD_CTRL_16 0xC39
872 #define ARIZONA_MISC_PAD_CTRL_17 0xC3A
873 #define ARIZONA_MISC_PAD_CTRL_18 0xC3B
874 #define ARIZONA_INTERRUPT_STATUS_1 0xD00
875 #define ARIZONA_INTERRUPT_STATUS_2 0xD01
876 #define ARIZONA_INTERRUPT_STATUS_3 0xD02
877 #define ARIZONA_INTERRUPT_STATUS_4 0xD03
878 #define ARIZONA_INTERRUPT_STATUS_5 0xD04
879 #define ARIZONA_INTERRUPT_STATUS_1_MASK 0xD08
880 #define ARIZONA_INTERRUPT_STATUS_2_MASK 0xD09
881 #define ARIZONA_INTERRUPT_STATUS_3_MASK 0xD0A
882 #define ARIZONA_INTERRUPT_STATUS_4_MASK 0xD0B
883 #define ARIZONA_INTERRUPT_STATUS_5_MASK 0xD0C
884 #define ARIZONA_INTERRUPT_CONTROL 0xD0F
885 #define ARIZONA_IRQ2_STATUS_1 0xD10
886 #define ARIZONA_IRQ2_STATUS_2 0xD11
887 #define ARIZONA_IRQ2_STATUS_3 0xD12
888 #define ARIZONA_IRQ2_STATUS_4 0xD13
889 #define ARIZONA_IRQ2_STATUS_5 0xD14
890 #define ARIZONA_IRQ2_STATUS_1_MASK 0xD18
891 #define ARIZONA_IRQ2_STATUS_2_MASK 0xD19
892 #define ARIZONA_IRQ2_STATUS_3_MASK 0xD1A
893 #define ARIZONA_IRQ2_STATUS_4_MASK 0xD1B
894 #define ARIZONA_IRQ2_STATUS_5_MASK 0xD1C
895 #define ARIZONA_IRQ2_CONTROL 0xD1F
896 #define ARIZONA_INTERRUPT_RAW_STATUS_2 0xD20
897 #define ARIZONA_INTERRUPT_RAW_STATUS_3 0xD21
898 #define ARIZONA_INTERRUPT_RAW_STATUS_4 0xD22
899 #define ARIZONA_INTERRUPT_RAW_STATUS_5 0xD23
900 #define ARIZONA_INTERRUPT_RAW_STATUS_6 0xD24
901 #define ARIZONA_INTERRUPT_RAW_STATUS_7 0xD25
902 #define ARIZONA_INTERRUPT_RAW_STATUS_8 0xD26
903 #define ARIZONA_IRQ_PIN_STATUS 0xD40
904 #define ARIZONA_ADSP2_IRQ0 0xD41
905 #define ARIZONA_AOD_WKUP_AND_TRIG 0xD50
906 #define ARIZONA_AOD_IRQ1 0xD51
907 #define ARIZONA_AOD_IRQ2 0xD52
908 #define ARIZONA_AOD_IRQ_MASK_IRQ1 0xD53
909 #define ARIZONA_AOD_IRQ_MASK_IRQ2 0xD54
910 #define ARIZONA_AOD_IRQ_RAW_STATUS 0xD55
911 #define ARIZONA_JACK_DETECT_DEBOUNCE 0xD56
912 #define ARIZONA_FX_CTRL1 0xE00
913 #define ARIZONA_FX_CTRL2 0xE01
914 #define ARIZONA_EQ1_1 0xE10
915 #define ARIZONA_EQ1_2 0xE11
916 #define ARIZONA_EQ1_3 0xE12
917 #define ARIZONA_EQ1_4 0xE13
918 #define ARIZONA_EQ1_5 0xE14
919 #define ARIZONA_EQ1_6 0xE15
920 #define ARIZONA_EQ1_7 0xE16
921 #define ARIZONA_EQ1_8 0xE17
922 #define ARIZONA_EQ1_9 0xE18
923 #define ARIZONA_EQ1_10 0xE19
924 #define ARIZONA_EQ1_11 0xE1A
925 #define ARIZONA_EQ1_12 0xE1B
926 #define ARIZONA_EQ1_13 0xE1C
927 #define ARIZONA_EQ1_14 0xE1D
928 #define ARIZONA_EQ1_15 0xE1E
929 #define ARIZONA_EQ1_16 0xE1F
930 #define ARIZONA_EQ1_17 0xE20
931 #define ARIZONA_EQ1_18 0xE21
932 #define ARIZONA_EQ1_19 0xE22
933 #define ARIZONA_EQ1_20 0xE23
934 #define ARIZONA_EQ1_21 0xE24
935 #define ARIZONA_EQ2_1 0xE26
936 #define ARIZONA_EQ2_2 0xE27
937 #define ARIZONA_EQ2_3 0xE28
938 #define ARIZONA_EQ2_4 0xE29
939 #define ARIZONA_EQ2_5 0xE2A
940 #define ARIZONA_EQ2_6 0xE2B
941 #define ARIZONA_EQ2_7 0xE2C
942 #define ARIZONA_EQ2_8 0xE2D
943 #define ARIZONA_EQ2_9 0xE2E
944 #define ARIZONA_EQ2_10 0xE2F
945 #define ARIZONA_EQ2_11 0xE30
946 #define ARIZONA_EQ2_12 0xE31
947 #define ARIZONA_EQ2_13 0xE32
948 #define ARIZONA_EQ2_14 0xE33
949 #define ARIZONA_EQ2_15 0xE34
950 #define ARIZONA_EQ2_16 0xE35
951 #define ARIZONA_EQ2_17 0xE36
952 #define ARIZONA_EQ2_18 0xE37
953 #define ARIZONA_EQ2_19 0xE38
954 #define ARIZONA_EQ2_20 0xE39
955 #define ARIZONA_EQ2_21 0xE3A
956 #define ARIZONA_EQ3_1 0xE3C
957 #define ARIZONA_EQ3_2 0xE3D
958 #define ARIZONA_EQ3_3 0xE3E
959 #define ARIZONA_EQ3_4 0xE3F
960 #define ARIZONA_EQ3_5 0xE40
961 #define ARIZONA_EQ3_6 0xE41
962 #define ARIZONA_EQ3_7 0xE42
963 #define ARIZONA_EQ3_8 0xE43
964 #define ARIZONA_EQ3_9 0xE44
965 #define ARIZONA_EQ3_10 0xE45
966 #define ARIZONA_EQ3_11 0xE46
967 #define ARIZONA_EQ3_12 0xE47
968 #define ARIZONA_EQ3_13 0xE48
969 #define ARIZONA_EQ3_14 0xE49
970 #define ARIZONA_EQ3_15 0xE4A
971 #define ARIZONA_EQ3_16 0xE4B
972 #define ARIZONA_EQ3_17 0xE4C
973 #define ARIZONA_EQ3_18 0xE4D
974 #define ARIZONA_EQ3_19 0xE4E
975 #define ARIZONA_EQ3_20 0xE4F
976 #define ARIZONA_EQ3_21 0xE50
977 #define ARIZONA_EQ4_1 0xE52
978 #define ARIZONA_EQ4_2 0xE53
979 #define ARIZONA_EQ4_3 0xE54
980 #define ARIZONA_EQ4_4 0xE55
981 #define ARIZONA_EQ4_5 0xE56
982 #define ARIZONA_EQ4_6 0xE57
983 #define ARIZONA_EQ4_7 0xE58
984 #define ARIZONA_EQ4_8 0xE59
985 #define ARIZONA_EQ4_9 0xE5A
986 #define ARIZONA_EQ4_10 0xE5B
987 #define ARIZONA_EQ4_11 0xE5C
988 #define ARIZONA_EQ4_12 0xE5D
989 #define ARIZONA_EQ4_13 0xE5E
990 #define ARIZONA_EQ4_14 0xE5F
991 #define ARIZONA_EQ4_15 0xE60
992 #define ARIZONA_EQ4_16 0xE61
993 #define ARIZONA_EQ4_17 0xE62
994 #define ARIZONA_EQ4_18 0xE63
995 #define ARIZONA_EQ4_19 0xE64
996 #define ARIZONA_EQ4_20 0xE65
997 #define ARIZONA_EQ4_21 0xE66
998 #define ARIZONA_DRC1_CTRL1 0xE80
999 #define ARIZONA_DRC1_CTRL2 0xE81
1000 #define ARIZONA_DRC1_CTRL3 0xE82
1001 #define ARIZONA_DRC1_CTRL4 0xE83
1002 #define ARIZONA_DRC1_CTRL5 0xE84
1003 #define ARIZONA_DRC2_CTRL1 0xE89
1004 #define ARIZONA_DRC2_CTRL2 0xE8A
1005 #define ARIZONA_DRC2_CTRL3 0xE8B
1006 #define ARIZONA_DRC2_CTRL4 0xE8C
1007 #define ARIZONA_DRC2_CTRL5 0xE8D
1008 #define ARIZONA_HPLPF1_1 0xEC0
1009 #define ARIZONA_HPLPF1_2 0xEC1
1010 #define ARIZONA_HPLPF2_1 0xEC4
1011 #define ARIZONA_HPLPF2_2 0xEC5
1012 #define ARIZONA_HPLPF3_1 0xEC8
1013 #define ARIZONA_HPLPF3_2 0xEC9
1014 #define ARIZONA_HPLPF4_1 0xECC
1015 #define ARIZONA_HPLPF4_2 0xECD
1016 #define ARIZONA_ASRC_ENABLE 0xEE0
1017 #define ARIZONA_ASRC_STATUS 0xEE1
1018 #define ARIZONA_ASRC_RATE1 0xEE2
1019 #define ARIZONA_ASRC_RATE2 0xEE3
1020 #define ARIZONA_ISRC_1_CTRL_1 0xEF0
1021 #define ARIZONA_ISRC_1_CTRL_2 0xEF1
1022 #define ARIZONA_ISRC_1_CTRL_3 0xEF2
1023 #define ARIZONA_ISRC_2_CTRL_1 0xEF3
1024 #define ARIZONA_ISRC_2_CTRL_2 0xEF4
1025 #define ARIZONA_ISRC_2_CTRL_3 0xEF5
1026 #define ARIZONA_ISRC_3_CTRL_1 0xEF6
1027 #define ARIZONA_ISRC_3_CTRL_2 0xEF7
1028 #define ARIZONA_ISRC_3_CTRL_3 0xEF8
1029 #define ARIZONA_CLOCK_CONTROL 0xF00
1030 #define ARIZONA_ANC_SRC 0xF01
1031 #define ARIZONA_DSP_STATUS 0xF02
1032 #define ARIZONA_DSP1_CONTROL_1 0x1100
1033 #define ARIZONA_DSP1_CLOCKING_1 0x1101
1034 #define ARIZONA_DSP1_STATUS_1 0x1104
1035 #define ARIZONA_DSP1_STATUS_2 0x1105
1036 #define ARIZONA_DSP1_STATUS_3 0x1106
1037 #define ARIZONA_DSP1_WDMA_BUFFER_1 0x1110
1038 #define ARIZONA_DSP1_WDMA_BUFFER_2 0x1111
1039 #define ARIZONA_DSP1_WDMA_BUFFER_3 0x1112
1040 #define ARIZONA_DSP1_WDMA_BUFFER_4 0x1113
1041 #define ARIZONA_DSP1_WDMA_BUFFER_5 0x1114
1042 #define ARIZONA_DSP1_WDMA_BUFFER_6 0x1115
1043 #define ARIZONA_DSP1_WDMA_BUFFER_7 0x1116
1044 #define ARIZONA_DSP1_WDMA_BUFFER_8 0x1117
1045 #define ARIZONA_DSP1_RDMA_BUFFER_1 0x1120
1046 #define ARIZONA_DSP1_RDMA_BUFFER_2 0x1121
1047 #define ARIZONA_DSP1_RDMA_BUFFER_3 0x1122
1048 #define ARIZONA_DSP1_RDMA_BUFFER_4 0x1123
1049 #define ARIZONA_DSP1_RDMA_BUFFER_5 0x1124
1050 #define ARIZONA_DSP1_RDMA_BUFFER_6 0x1125
1051 #define ARIZONA_DSP1_WDMA_CONFIG_1 0x1130
1052 #define ARIZONA_DSP1_WDMA_CONFIG_2 0x1131
1053 #define ARIZONA_DSP1_RDMA_CONFIG_1 0x1134
1054 #define ARIZONA_DSP1_SCRATCH_0 0x1140
1055 #define ARIZONA_DSP1_SCRATCH_1 0x1141
1056 #define ARIZONA_DSP1_SCRATCH_2 0x1142
1057 #define ARIZONA_DSP1_SCRATCH_3 0x1143
1058 #define ARIZONA_DSP2_CONTROL_1 0x1200
1059 #define ARIZONA_DSP2_CLOCKING_1 0x1201
1060 #define ARIZONA_DSP2_STATUS_1 0x1204
1061 #define ARIZONA_DSP2_STATUS_2 0x1205
1062 #define ARIZONA_DSP2_STATUS_3 0x1206
1063 #define ARIZONA_DSP2_SCRATCH_0 0x1240
1064 #define ARIZONA_DSP2_SCRATCH_1 0x1241
1065 #define ARIZONA_DSP2_SCRATCH_2 0x1242
1066 #define ARIZONA_DSP2_SCRATCH_3 0x1243
1067 #define ARIZONA_DSP3_CONTROL_1 0x1300
1068 #define ARIZONA_DSP3_CLOCKING_1 0x1301
1069 #define ARIZONA_DSP3_STATUS_1 0x1304
1070 #define ARIZONA_DSP3_STATUS_2 0x1305
1071 #define ARIZONA_DSP3_STATUS_3 0x1306
1072 #define ARIZONA_DSP3_SCRATCH_0 0x1340
1073 #define ARIZONA_DSP3_SCRATCH_1 0x1341
1074 #define ARIZONA_DSP3_SCRATCH_2 0x1342
1075 #define ARIZONA_DSP3_SCRATCH_3 0x1343
1076 #define ARIZONA_DSP4_CONTROL_1 0x1400
1077 #define ARIZONA_DSP4_CLOCKING_1 0x1401
1078 #define ARIZONA_DSP4_STATUS_1 0x1404
1079 #define ARIZONA_DSP4_STATUS_2 0x1405
1080 #define ARIZONA_DSP4_STATUS_3 0x1406
1081 #define ARIZONA_DSP4_SCRATCH_0 0x1440
1082 #define ARIZONA_DSP4_SCRATCH_1 0x1441
1083 #define ARIZONA_DSP4_SCRATCH_2 0x1442
1084 #define ARIZONA_DSP4_SCRATCH_3 0x1443
1085
1086 /*
1087 * Field Definitions.
1088 */
1089
1090 /*
1091 * R0 (0x00) - software reset
1092 */
1093 #define ARIZONA_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
1094 #define ARIZONA_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
1095 #define ARIZONA_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1096
1097 /*
1098 * R1 (0x01) - Device Revision
1099 */
1100 #define ARIZONA_DEVICE_REVISION_MASK 0x00FF /* DEVICE_REVISION - [7:0] */
1101 #define ARIZONA_DEVICE_REVISION_SHIFT 0 /* DEVICE_REVISION - [7:0] */
1102 #define ARIZONA_DEVICE_REVISION_WIDTH 8 /* DEVICE_REVISION - [7:0] */
1103
1104 /*
1105 * R8 (0x08) - Ctrl IF SPI CFG 1
1106 */
1107 #define ARIZONA_SPI_CFG 0x0010 /* SPI_CFG */
1108 #define ARIZONA_SPI_CFG_MASK 0x0010 /* SPI_CFG */
1109 #define ARIZONA_SPI_CFG_SHIFT 4 /* SPI_CFG */
1110 #define ARIZONA_SPI_CFG_WIDTH 1 /* SPI_CFG */
1111 #define ARIZONA_SPI_4WIRE 0x0008 /* SPI_4WIRE */
1112 #define ARIZONA_SPI_4WIRE_MASK 0x0008 /* SPI_4WIRE */
1113 #define ARIZONA_SPI_4WIRE_SHIFT 3 /* SPI_4WIRE */
1114 #define ARIZONA_SPI_4WIRE_WIDTH 1 /* SPI_4WIRE */
1115 #define ARIZONA_SPI_AUTO_INC_MASK 0x0003 /* SPI_AUTO_INC - [1:0] */
1116 #define ARIZONA_SPI_AUTO_INC_SHIFT 0 /* SPI_AUTO_INC - [1:0] */
1117 #define ARIZONA_SPI_AUTO_INC_WIDTH 2 /* SPI_AUTO_INC - [1:0] */
1118
1119 /*
1120 * R9 (0x09) - Ctrl IF I2C1 CFG 1
1121 */
1122 #define ARIZONA_I2C1_AUTO_INC_MASK 0x0003 /* I2C1_AUTO_INC - [1:0] */
1123 #define ARIZONA_I2C1_AUTO_INC_SHIFT 0 /* I2C1_AUTO_INC - [1:0] */
1124 #define ARIZONA_I2C1_AUTO_INC_WIDTH 2 /* I2C1_AUTO_INC - [1:0] */
1125
1126 /*
1127 * R13 (0x0D) - Ctrl IF Status 1
1128 */
1129 #define ARIZONA_I2C1_BUSY 0x0020 /* I2C1_BUSY */
1130 #define ARIZONA_I2C1_BUSY_MASK 0x0020 /* I2C1_BUSY */
1131 #define ARIZONA_I2C1_BUSY_SHIFT 5 /* I2C1_BUSY */
1132 #define ARIZONA_I2C1_BUSY_WIDTH 1 /* I2C1_BUSY */
1133 #define ARIZONA_SPI_BUSY 0x0010 /* SPI_BUSY */
1134 #define ARIZONA_SPI_BUSY_MASK 0x0010 /* SPI_BUSY */
1135 #define ARIZONA_SPI_BUSY_SHIFT 4 /* SPI_BUSY */
1136 #define ARIZONA_SPI_BUSY_WIDTH 1 /* SPI_BUSY */
1137
1138 /*
1139 * R22 (0x16) - Write Sequencer Ctrl 0
1140 */
1141 #define ARIZONA_WSEQ_ABORT 0x0800 /* WSEQ_ABORT */
1142 #define ARIZONA_WSEQ_ABORT_MASK 0x0800 /* WSEQ_ABORT */
1143 #define ARIZONA_WSEQ_ABORT_SHIFT 11 /* WSEQ_ABORT */
1144 #define ARIZONA_WSEQ_ABORT_WIDTH 1 /* WSEQ_ABORT */
1145 #define ARIZONA_WSEQ_START 0x0400 /* WSEQ_START */
1146 #define ARIZONA_WSEQ_START_MASK 0x0400 /* WSEQ_START */
1147 #define ARIZONA_WSEQ_START_SHIFT 10 /* WSEQ_START */
1148 #define ARIZONA_WSEQ_START_WIDTH 1 /* WSEQ_START */
1149 #define ARIZONA_WSEQ_ENA 0x0200 /* WSEQ_ENA */
1150 #define ARIZONA_WSEQ_ENA_MASK 0x0200 /* WSEQ_ENA */
1151 #define ARIZONA_WSEQ_ENA_SHIFT 9 /* WSEQ_ENA */
1152 #define ARIZONA_WSEQ_ENA_WIDTH 1 /* WSEQ_ENA */
1153 #define ARIZONA_WSEQ_START_INDEX_MASK 0x01FF /* WSEQ_START_INDEX - [8:0] */
1154 #define ARIZONA_WSEQ_START_INDEX_SHIFT 0 /* WSEQ_START_INDEX - [8:0] */
1155 #define ARIZONA_WSEQ_START_INDEX_WIDTH 9 /* WSEQ_START_INDEX - [8:0] */
1156
1157 /*
1158 * R23 (0x17) - Write Sequencer Ctrl 1
1159 */
1160 #define ARIZONA_WSEQ_BUSY 0x0200 /* WSEQ_BUSY */
1161 #define ARIZONA_WSEQ_BUSY_MASK 0x0200 /* WSEQ_BUSY */
1162 #define ARIZONA_WSEQ_BUSY_SHIFT 9 /* WSEQ_BUSY */
1163 #define ARIZONA_WSEQ_BUSY_WIDTH 1 /* WSEQ_BUSY */
1164 #define ARIZONA_WSEQ_CURRENT_INDEX_MASK 0x01FF /* WSEQ_CURRENT_INDEX - [8:0] */
1165 #define ARIZONA_WSEQ_CURRENT_INDEX_SHIFT 0 /* WSEQ_CURRENT_INDEX - [8:0] */
1166 #define ARIZONA_WSEQ_CURRENT_INDEX_WIDTH 9 /* WSEQ_CURRENT_INDEX - [8:0] */
1167
1168 /*
1169 * R24 (0x18) - Write Sequencer Ctrl 2
1170 */
1171 #define ARIZONA_LOAD_DEFAULTS 0x0002 /* LOAD_DEFAULTS */
1172 #define ARIZONA_LOAD_DEFAULTS_MASK 0x0002 /* LOAD_DEFAULTS */
1173 #define ARIZONA_LOAD_DEFAULTS_SHIFT 1 /* LOAD_DEFAULTS */
1174 #define ARIZONA_LOAD_DEFAULTS_WIDTH 1 /* LOAD_DEFAULTS */
1175 #define ARIZONA_WSEQ_LOAD_MEM 0x0001 /* WSEQ_LOAD_MEM */
1176 #define ARIZONA_WSEQ_LOAD_MEM_MASK 0x0001 /* WSEQ_LOAD_MEM */
1177 #define ARIZONA_WSEQ_LOAD_MEM_SHIFT 0 /* WSEQ_LOAD_MEM */
1178 #define ARIZONA_WSEQ_LOAD_MEM_WIDTH 1 /* WSEQ_LOAD_MEM */
1179
1180 /*
1181 * R26 (0x1A) - Write Sequencer PROM
1182 */
1183 #define ARIZONA_WSEQ_OTP_WRITE 0x0001 /* WSEQ_OTP_WRITE */
1184 #define ARIZONA_WSEQ_OTP_WRITE_MASK 0x0001 /* WSEQ_OTP_WRITE */
1185 #define ARIZONA_WSEQ_OTP_WRITE_SHIFT 0 /* WSEQ_OTP_WRITE */
1186 #define ARIZONA_WSEQ_OTP_WRITE_WIDTH 1 /* WSEQ_OTP_WRITE */
1187
1188 /*
1189 * R32 (0x20) - Tone Generator 1
1190 */
1191 #define ARIZONA_TONE_RATE_MASK 0x7800 /* TONE_RATE - [14:11] */
1192 #define ARIZONA_TONE_RATE_SHIFT 11 /* TONE_RATE - [14:11] */
1193 #define ARIZONA_TONE_RATE_WIDTH 4 /* TONE_RATE - [14:11] */
1194 #define ARIZONA_TONE_OFFSET_MASK 0x0300 /* TONE_OFFSET - [9:8] */
1195 #define ARIZONA_TONE_OFFSET_SHIFT 8 /* TONE_OFFSET - [9:8] */
1196 #define ARIZONA_TONE_OFFSET_WIDTH 2 /* TONE_OFFSET - [9:8] */
1197 #define ARIZONA_TONE2_OVD 0x0020 /* TONE2_OVD */
1198 #define ARIZONA_TONE2_OVD_MASK 0x0020 /* TONE2_OVD */
1199 #define ARIZONA_TONE2_OVD_SHIFT 5 /* TONE2_OVD */
1200 #define ARIZONA_TONE2_OVD_WIDTH 1 /* TONE2_OVD */
1201 #define ARIZONA_TONE1_OVD 0x0010 /* TONE1_OVD */
1202 #define ARIZONA_TONE1_OVD_MASK 0x0010 /* TONE1_OVD */
1203 #define ARIZONA_TONE1_OVD_SHIFT 4 /* TONE1_OVD */
1204 #define ARIZONA_TONE1_OVD_WIDTH 1 /* TONE1_OVD */
1205 #define ARIZONA_TONE2_ENA 0x0002 /* TONE2_ENA */
1206 #define ARIZONA_TONE2_ENA_MASK 0x0002 /* TONE2_ENA */
1207 #define ARIZONA_TONE2_ENA_SHIFT 1 /* TONE2_ENA */
1208 #define ARIZONA_TONE2_ENA_WIDTH 1 /* TONE2_ENA */
1209 #define ARIZONA_TONE1_ENA 0x0001 /* TONE1_ENA */
1210 #define ARIZONA_TONE1_ENA_MASK 0x0001 /* TONE1_ENA */
1211 #define ARIZONA_TONE1_ENA_SHIFT 0 /* TONE1_ENA */
1212 #define ARIZONA_TONE1_ENA_WIDTH 1 /* TONE1_ENA */
1213
1214 /*
1215 * R33 (0x21) - Tone Generator 2
1216 */
1217 #define ARIZONA_TONE1_LVL_0_MASK 0xFFFF /* TONE1_LVL - [15:0] */
1218 #define ARIZONA_TONE1_LVL_0_SHIFT 0 /* TONE1_LVL - [15:0] */
1219 #define ARIZONA_TONE1_LVL_0_WIDTH 16 /* TONE1_LVL - [15:0] */
1220
1221 /*
1222 * R34 (0x22) - Tone Generator 3
1223 */
1224 #define ARIZONA_TONE1_LVL_MASK 0x00FF /* TONE1_LVL - [7:0] */
1225 #define ARIZONA_TONE1_LVL_SHIFT 0 /* TONE1_LVL - [7:0] */
1226 #define ARIZONA_TONE1_LVL_WIDTH 8 /* TONE1_LVL - [7:0] */
1227
1228 /*
1229 * R35 (0x23) - Tone Generator 4
1230 */
1231 #define ARIZONA_TONE2_LVL_0_MASK 0xFFFF /* TONE2_LVL - [15:0] */
1232 #define ARIZONA_TONE2_LVL_0_SHIFT 0 /* TONE2_LVL - [15:0] */
1233 #define ARIZONA_TONE2_LVL_0_WIDTH 16 /* TONE2_LVL - [15:0] */
1234
1235 /*
1236 * R36 (0x24) - Tone Generator 5
1237 */
1238 #define ARIZONA_TONE2_LVL_MASK 0x00FF /* TONE2_LVL - [7:0] */
1239 #define ARIZONA_TONE2_LVL_SHIFT 0 /* TONE2_LVL - [7:0] */
1240 #define ARIZONA_TONE2_LVL_WIDTH 8 /* TONE2_LVL - [7:0] */
1241
1242 /*
1243 * R48 (0x30) - PWM Drive 1
1244 */
1245 #define ARIZONA_PWM_RATE_MASK 0x7800 /* PWM_RATE - [14:11] */
1246 #define ARIZONA_PWM_RATE_SHIFT 11 /* PWM_RATE - [14:11] */
1247 #define ARIZONA_PWM_RATE_WIDTH 4 /* PWM_RATE - [14:11] */
1248 #define ARIZONA_PWM_CLK_SEL_MASK 0x0700 /* PWM_CLK_SEL - [10:8] */
1249 #define ARIZONA_PWM_CLK_SEL_SHIFT 8 /* PWM_CLK_SEL - [10:8] */
1250 #define ARIZONA_PWM_CLK_SEL_WIDTH 3 /* PWM_CLK_SEL - [10:8] */
1251 #define ARIZONA_PWM2_OVD 0x0020 /* PWM2_OVD */
1252 #define ARIZONA_PWM2_OVD_MASK 0x0020 /* PWM2_OVD */
1253 #define ARIZONA_PWM2_OVD_SHIFT 5 /* PWM2_OVD */
1254 #define ARIZONA_PWM2_OVD_WIDTH 1 /* PWM2_OVD */
1255 #define ARIZONA_PWM1_OVD 0x0010 /* PWM1_OVD */
1256 #define ARIZONA_PWM1_OVD_MASK 0x0010 /* PWM1_OVD */
1257 #define ARIZONA_PWM1_OVD_SHIFT 4 /* PWM1_OVD */
1258 #define ARIZONA_PWM1_OVD_WIDTH 1 /* PWM1_OVD */
1259 #define ARIZONA_PWM2_ENA 0x0002 /* PWM2_ENA */
1260 #define ARIZONA_PWM2_ENA_MASK 0x0002 /* PWM2_ENA */
1261 #define ARIZONA_PWM2_ENA_SHIFT 1 /* PWM2_ENA */
1262 #define ARIZONA_PWM2_ENA_WIDTH 1 /* PWM2_ENA */
1263 #define ARIZONA_PWM1_ENA 0x0001 /* PWM1_ENA */
1264 #define ARIZONA_PWM1_ENA_MASK 0x0001 /* PWM1_ENA */
1265 #define ARIZONA_PWM1_ENA_SHIFT 0 /* PWM1_ENA */
1266 #define ARIZONA_PWM1_ENA_WIDTH 1 /* PWM1_ENA */
1267
1268 /*
1269 * R49 (0x31) - PWM Drive 2
1270 */
1271 #define ARIZONA_PWM1_LVL_MASK 0x03FF /* PWM1_LVL - [9:0] */
1272 #define ARIZONA_PWM1_LVL_SHIFT 0 /* PWM1_LVL - [9:0] */
1273 #define ARIZONA_PWM1_LVL_WIDTH 10 /* PWM1_LVL - [9:0] */
1274
1275 /*
1276 * R50 (0x32) - PWM Drive 3
1277 */
1278 #define ARIZONA_PWM2_LVL_MASK 0x03FF /* PWM2_LVL - [9:0] */
1279 #define ARIZONA_PWM2_LVL_SHIFT 0 /* PWM2_LVL - [9:0] */
1280 #define ARIZONA_PWM2_LVL_WIDTH 10 /* PWM2_LVL - [9:0] */
1281
1282 /*
1283 * R64 (0x40) - Wake control
1284 */
1285 #define ARIZONA_WKUP_MICD_CLAMP_FALL 0x0080 /* WKUP_MICD_CLAMP_FALL */
1286 #define ARIZONA_WKUP_MICD_CLAMP_FALL_MASK 0x0080 /* WKUP_MICD_CLAMP_FALL */
1287 #define ARIZONA_WKUP_MICD_CLAMP_FALL_SHIFT 7 /* WKUP_MICD_CLAMP_FALL */
1288 #define ARIZONA_WKUP_MICD_CLAMP_FALL_WIDTH 1 /* WKUP_MICD_CLAMP_FALL */
1289 #define ARIZONA_WKUP_MICD_CLAMP_RISE 0x0040 /* WKUP_MICD_CLAMP_RISE */
1290 #define ARIZONA_WKUP_MICD_CLAMP_RISE_MASK 0x0040 /* WKUP_MICD_CLAMP_RISE */
1291 #define ARIZONA_WKUP_MICD_CLAMP_RISE_SHIFT 6 /* WKUP_MICD_CLAMP_RISE */
1292 #define ARIZONA_WKUP_MICD_CLAMP_RISE_WIDTH 1 /* WKUP_MICD_CLAMP_RISE */
1293 #define ARIZONA_WKUP_GP5_FALL 0x0020 /* WKUP_GP5_FALL */
1294 #define ARIZONA_WKUP_GP5_FALL_MASK 0x0020 /* WKUP_GP5_FALL */
1295 #define ARIZONA_WKUP_GP5_FALL_SHIFT 5 /* WKUP_GP5_FALL */
1296 #define ARIZONA_WKUP_GP5_FALL_WIDTH 1 /* WKUP_GP5_FALL */
1297 #define ARIZONA_WKUP_GP5_RISE 0x0010 /* WKUP_GP5_RISE */
1298 #define ARIZONA_WKUP_GP5_RISE_MASK 0x0010 /* WKUP_GP5_RISE */
1299 #define ARIZONA_WKUP_GP5_RISE_SHIFT 4 /* WKUP_GP5_RISE */
1300 #define ARIZONA_WKUP_GP5_RISE_WIDTH 1 /* WKUP_GP5_RISE */
1301 #define ARIZONA_WKUP_JD1_FALL 0x0008 /* WKUP_JD1_FALL */
1302 #define ARIZONA_WKUP_JD1_FALL_MASK 0x0008 /* WKUP_JD1_FALL */
1303 #define ARIZONA_WKUP_JD1_FALL_SHIFT 3 /* WKUP_JD1_FALL */
1304 #define ARIZONA_WKUP_JD1_FALL_WIDTH 1 /* WKUP_JD1_FALL */
1305 #define ARIZONA_WKUP_JD1_RISE 0x0004 /* WKUP_JD1_RISE */
1306 #define ARIZONA_WKUP_JD1_RISE_MASK 0x0004 /* WKUP_JD1_RISE */
1307 #define ARIZONA_WKUP_JD1_RISE_SHIFT 2 /* WKUP_JD1_RISE */
1308 #define ARIZONA_WKUP_JD1_RISE_WIDTH 1 /* WKUP_JD1_RISE */
1309 #define ARIZONA_WKUP_JD2_FALL 0x0002 /* WKUP_JD2_FALL */
1310 #define ARIZONA_WKUP_JD2_FALL_MASK 0x0002 /* WKUP_JD2_FALL */
1311 #define ARIZONA_WKUP_JD2_FALL_SHIFT 1 /* WKUP_JD2_FALL */
1312 #define ARIZONA_WKUP_JD2_FALL_WIDTH 1 /* WKUP_JD2_FALL */
1313 #define ARIZONA_WKUP_JD2_RISE 0x0001 /* WKUP_JD2_RISE */
1314 #define ARIZONA_WKUP_JD2_RISE_MASK 0x0001 /* WKUP_JD2_RISE */
1315 #define ARIZONA_WKUP_JD2_RISE_SHIFT 0 /* WKUP_JD2_RISE */
1316 #define ARIZONA_WKUP_JD2_RISE_WIDTH 1 /* WKUP_JD2_RISE */
1317
1318 /*
1319 * R65 (0x41) - Sequence control
1320 */
1321 #define ARIZONA_WSEQ_ENA_GP5_FALL 0x0020 /* WSEQ_ENA_GP5_FALL */
1322 #define ARIZONA_WSEQ_ENA_GP5_FALL_MASK 0x0020 /* WSEQ_ENA_GP5_FALL */
1323 #define ARIZONA_WSEQ_ENA_GP5_FALL_SHIFT 5 /* WSEQ_ENA_GP5_FALL */
1324 #define ARIZONA_WSEQ_ENA_GP5_FALL_WIDTH 1 /* WSEQ_ENA_GP5_FALL */
1325 #define ARIZONA_WSEQ_ENA_GP5_RISE 0x0010 /* WSEQ_ENA_GP5_RISE */
1326 #define ARIZONA_WSEQ_ENA_GP5_RISE_MASK 0x0010 /* WSEQ_ENA_GP5_RISE */
1327 #define ARIZONA_WSEQ_ENA_GP5_RISE_SHIFT 4 /* WSEQ_ENA_GP5_RISE */
1328 #define ARIZONA_WSEQ_ENA_GP5_RISE_WIDTH 1 /* WSEQ_ENA_GP5_RISE */
1329 #define ARIZONA_WSEQ_ENA_JD1_FALL 0x0008 /* WSEQ_ENA_JD1_FALL */
1330 #define ARIZONA_WSEQ_ENA_JD1_FALL_MASK 0x0008 /* WSEQ_ENA_JD1_FALL */
1331 #define ARIZONA_WSEQ_ENA_JD1_FALL_SHIFT 3 /* WSEQ_ENA_JD1_FALL */
1332 #define ARIZONA_WSEQ_ENA_JD1_FALL_WIDTH 1 /* WSEQ_ENA_JD1_FALL */
1333 #define ARIZONA_WSEQ_ENA_JD1_RISE 0x0004 /* WSEQ_ENA_JD1_RISE */
1334 #define ARIZONA_WSEQ_ENA_JD1_RISE_MASK 0x0004 /* WSEQ_ENA_JD1_RISE */
1335 #define ARIZONA_WSEQ_ENA_JD1_RISE_SHIFT 2 /* WSEQ_ENA_JD1_RISE */
1336 #define ARIZONA_WSEQ_ENA_JD1_RISE_WIDTH 1 /* WSEQ_ENA_JD1_RISE */
1337 #define ARIZONA_WSEQ_ENA_JD2_FALL 0x0002 /* WSEQ_ENA_JD2_FALL */
1338 #define ARIZONA_WSEQ_ENA_JD2_FALL_MASK 0x0002 /* WSEQ_ENA_JD2_FALL */
1339 #define ARIZONA_WSEQ_ENA_JD2_FALL_SHIFT 1 /* WSEQ_ENA_JD2_FALL */
1340 #define ARIZONA_WSEQ_ENA_JD2_FALL_WIDTH 1 /* WSEQ_ENA_JD2_FALL */
1341 #define ARIZONA_WSEQ_ENA_JD2_RISE 0x0001 /* WSEQ_ENA_JD2_RISE */
1342 #define ARIZONA_WSEQ_ENA_JD2_RISE_MASK 0x0001 /* WSEQ_ENA_JD2_RISE */
1343 #define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT 0 /* WSEQ_ENA_JD2_RISE */
1344 #define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH 1 /* WSEQ_ENA_JD2_RISE */
1345
1346 /*
1347 * R97 (0x61) - Sample Rate Sequence Select 1
1348 */
1349 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1350 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1351 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_A_SEQ_ADDR - [8:0] */
1352
1353 /*
1354 * R98 (0x62) - Sample Rate Sequence Select 2
1355 */
1356 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1357 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1358 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_B_SEQ_ADDR - [8:0] */
1359
1360 /*
1361 * R99 (0x63) - Sample Rate Sequence Select 3
1362 */
1363 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1364 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1365 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_C_SEQ_ADDR - [8:0] */
1366
1367 /*
1368 * R100 (0x64) - Sample Rate Sequence Select 4
1369 */
1370 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_MASK 0x01FF /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1371 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_SHIFT 0 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1372 #define ARIZONA_WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR_WIDTH 9 /* WSEQ_SAMPLE_RATE_DETECT_D_SEQ_ADDR - [8:0] */
1373
1374 /*
1375 * R104 (0x68) - Always On Triggers Sequence Select 1
1376 */
1377 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1378 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1379 #define ARIZONA_WSEQ_GP5_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_RISE_SEQ_ADDR - [8:0] */
1380
1381 /*
1382 * R105 (0x69) - Always On Triggers Sequence Select 2
1383 */
1384 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1385 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1386 #define ARIZONA_WSEQ_GP5_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_GP5_FALL_SEQ_ADDR - [8:0] */
1387
1388 /*
1389 * R106 (0x6A) - Always On Triggers Sequence Select 3
1390 */
1391 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1392 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1393 #define ARIZONA_WSEQ_JD1_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_RISE_SEQ_ADDR - [8:0] */
1394
1395 /*
1396 * R107 (0x6B) - Always On Triggers Sequence Select 4
1397 */
1398 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1399 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1400 #define ARIZONA_WSEQ_JD1_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD1_FALL_SEQ_ADDR - [8:0] */
1401
1402 /*
1403 * R108 (0x6C) - Always On Triggers Sequence Select 5
1404 */
1405 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1406 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1407 #define ARIZONA_WSEQ_JD2_RISE_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_RISE_SEQ_ADDR - [8:0] */
1408
1409 /*
1410 * R109 (0x6D) - Always On Triggers Sequence Select 6
1411 */
1412 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_MASK 0x01FF /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1413 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_SHIFT 0 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1414 #define ARIZONA_WSEQ_JD2_FALL_SEQ_ADDR_WIDTH 9 /* WSEQ_JD2_FALL_SEQ_ADDR - [8:0] */
1415
1416 /*
1417 * R112 (0x70) - Comfort Noise Generator
1418 */
1419 #define ARIZONA_NOISE_GEN_RATE_MASK 0x7800 /* NOISE_GEN_RATE - [14:11] */
1420 #define ARIZONA_NOISE_GEN_RATE_SHIFT 11 /* NOISE_GEN_RATE - [14:11] */
1421 #define ARIZONA_NOISE_GEN_RATE_WIDTH 4 /* NOISE_GEN_RATE - [14:11] */
1422 #define ARIZONA_NOISE_GEN_ENA 0x0020 /* NOISE_GEN_ENA */
1423 #define ARIZONA_NOISE_GEN_ENA_MASK 0x0020 /* NOISE_GEN_ENA */
1424 #define ARIZONA_NOISE_GEN_ENA_SHIFT 5 /* NOISE_GEN_ENA */
1425 #define ARIZONA_NOISE_GEN_ENA_WIDTH 1 /* NOISE_GEN_ENA */
1426 #define ARIZONA_NOISE_GEN_GAIN_MASK 0x001F /* NOISE_GEN_GAIN - [4:0] */
1427 #define ARIZONA_NOISE_GEN_GAIN_SHIFT 0 /* NOISE_GEN_GAIN - [4:0] */
1428 #define ARIZONA_NOISE_GEN_GAIN_WIDTH 5 /* NOISE_GEN_GAIN - [4:0] */
1429
1430 /*
1431 * R144 (0x90) - Haptics Control 1
1432 */
1433 #define ARIZONA_HAP_RATE_MASK 0x7800 /* HAP_RATE - [14:11] */
1434 #define ARIZONA_HAP_RATE_SHIFT 11 /* HAP_RATE - [14:11] */
1435 #define ARIZONA_HAP_RATE_WIDTH 4 /* HAP_RATE - [14:11] */
1436 #define ARIZONA_ONESHOT_TRIG 0x0010 /* ONESHOT_TRIG */
1437 #define ARIZONA_ONESHOT_TRIG_MASK 0x0010 /* ONESHOT_TRIG */
1438 #define ARIZONA_ONESHOT_TRIG_SHIFT 4 /* ONESHOT_TRIG */
1439 #define ARIZONA_ONESHOT_TRIG_WIDTH 1 /* ONESHOT_TRIG */
1440 #define ARIZONA_HAP_CTRL_MASK 0x000C /* HAP_CTRL - [3:2] */
1441 #define ARIZONA_HAP_CTRL_SHIFT 2 /* HAP_CTRL - [3:2] */
1442 #define ARIZONA_HAP_CTRL_WIDTH 2 /* HAP_CTRL - [3:2] */
1443 #define ARIZONA_HAP_ACT 0x0002 /* HAP_ACT */
1444 #define ARIZONA_HAP_ACT_MASK 0x0002 /* HAP_ACT */
1445 #define ARIZONA_HAP_ACT_SHIFT 1 /* HAP_ACT */
1446 #define ARIZONA_HAP_ACT_WIDTH 1 /* HAP_ACT */
1447
1448 /*
1449 * R145 (0x91) - Haptics Control 2
1450 */
1451 #define ARIZONA_LRA_FREQ_MASK 0x7FFF /* LRA_FREQ - [14:0] */
1452 #define ARIZONA_LRA_FREQ_SHIFT 0 /* LRA_FREQ - [14:0] */
1453 #define ARIZONA_LRA_FREQ_WIDTH 15 /* LRA_FREQ - [14:0] */
1454
1455 /*
1456 * R146 (0x92) - Haptics phase 1 intensity
1457 */
1458 #define ARIZONA_PHASE1_INTENSITY_MASK 0x00FF /* PHASE1_INTENSITY - [7:0] */
1459 #define ARIZONA_PHASE1_INTENSITY_SHIFT 0 /* PHASE1_INTENSITY - [7:0] */
1460 #define ARIZONA_PHASE1_INTENSITY_WIDTH 8 /* PHASE1_INTENSITY - [7:0] */
1461
1462 /*
1463 * R147 (0x93) - Haptics phase 1 duration
1464 */
1465 #define ARIZONA_PHASE1_DURATION_MASK 0x01FF /* PHASE1_DURATION - [8:0] */
1466 #define ARIZONA_PHASE1_DURATION_SHIFT 0 /* PHASE1_DURATION - [8:0] */
1467 #define ARIZONA_PHASE1_DURATION_WIDTH 9 /* PHASE1_DURATION - [8:0] */
1468
1469 /*
1470 * R148 (0x94) - Haptics phase 2 intensity
1471 */
1472 #define ARIZONA_PHASE2_INTENSITY_MASK 0x00FF /* PHASE2_INTENSITY - [7:0] */
1473 #define ARIZONA_PHASE2_INTENSITY_SHIFT 0 /* PHASE2_INTENSITY - [7:0] */
1474 #define ARIZONA_PHASE2_INTENSITY_WIDTH 8 /* PHASE2_INTENSITY - [7:0] */
1475
1476 /*
1477 * R149 (0x95) - Haptics phase 2 duration
1478 */
1479 #define ARIZONA_PHASE2_DURATION_MASK 0x07FF /* PHASE2_DURATION - [10:0] */
1480 #define ARIZONA_PHASE2_DURATION_SHIFT 0 /* PHASE2_DURATION - [10:0] */
1481 #define ARIZONA_PHASE2_DURATION_WIDTH 11 /* PHASE2_DURATION - [10:0] */
1482
1483 /*
1484 * R150 (0x96) - Haptics phase 3 intensity
1485 */
1486 #define ARIZONA_PHASE3_INTENSITY_MASK 0x00FF /* PHASE3_INTENSITY - [7:0] */
1487 #define ARIZONA_PHASE3_INTENSITY_SHIFT 0 /* PHASE3_INTENSITY - [7:0] */
1488 #define ARIZONA_PHASE3_INTENSITY_WIDTH 8 /* PHASE3_INTENSITY - [7:0] */
1489
1490 /*
1491 * R151 (0x97) - Haptics phase 3 duration
1492 */
1493 #define ARIZONA_PHASE3_DURATION_MASK 0x01FF /* PHASE3_DURATION - [8:0] */
1494 #define ARIZONA_PHASE3_DURATION_SHIFT 0 /* PHASE3_DURATION - [8:0] */
1495 #define ARIZONA_PHASE3_DURATION_WIDTH 9 /* PHASE3_DURATION - [8:0] */
1496
1497 /*
1498 * R152 (0x98) - Haptics Status
1499 */
1500 #define ARIZONA_ONESHOT_STS 0x0001 /* ONESHOT_STS */
1501 #define ARIZONA_ONESHOT_STS_MASK 0x0001 /* ONESHOT_STS */
1502 #define ARIZONA_ONESHOT_STS_SHIFT 0 /* ONESHOT_STS */
1503 #define ARIZONA_ONESHOT_STS_WIDTH 1 /* ONESHOT_STS */
1504
1505 /*
1506 * R256 (0x100) - Clock 32k 1
1507 */
1508 #define ARIZONA_CLK_32K_ENA 0x0040 /* CLK_32K_ENA */
1509 #define ARIZONA_CLK_32K_ENA_MASK 0x0040 /* CLK_32K_ENA */
1510 #define ARIZONA_CLK_32K_ENA_SHIFT 6 /* CLK_32K_ENA */
1511 #define ARIZONA_CLK_32K_ENA_WIDTH 1 /* CLK_32K_ENA */
1512 #define ARIZONA_CLK_32K_SRC_MASK 0x0003 /* CLK_32K_SRC - [1:0] */
1513 #define ARIZONA_CLK_32K_SRC_SHIFT 0 /* CLK_32K_SRC - [1:0] */
1514 #define ARIZONA_CLK_32K_SRC_WIDTH 2 /* CLK_32K_SRC - [1:0] */
1515
1516 /*
1517 * R257 (0x101) - System Clock 1
1518 */
1519 #define ARIZONA_SYSCLK_FRAC 0x8000 /* SYSCLK_FRAC */
1520 #define ARIZONA_SYSCLK_FRAC_MASK 0x8000 /* SYSCLK_FRAC */
1521 #define ARIZONA_SYSCLK_FRAC_SHIFT 15 /* SYSCLK_FRAC */
1522 #define ARIZONA_SYSCLK_FRAC_WIDTH 1 /* SYSCLK_FRAC */
1523 #define ARIZONA_SYSCLK_FREQ_MASK 0x0700 /* SYSCLK_FREQ - [10:8] */
1524 #define ARIZONA_SYSCLK_FREQ_SHIFT 8 /* SYSCLK_FREQ - [10:8] */
1525 #define ARIZONA_SYSCLK_FREQ_WIDTH 3 /* SYSCLK_FREQ - [10:8] */
1526 #define ARIZONA_SYSCLK_ENA 0x0040 /* SYSCLK_ENA */
1527 #define ARIZONA_SYSCLK_ENA_MASK 0x0040 /* SYSCLK_ENA */
1528 #define ARIZONA_SYSCLK_ENA_SHIFT 6 /* SYSCLK_ENA */
1529 #define ARIZONA_SYSCLK_ENA_WIDTH 1 /* SYSCLK_ENA */
1530 #define ARIZONA_SYSCLK_SRC_MASK 0x000F /* SYSCLK_SRC - [3:0] */
1531 #define ARIZONA_SYSCLK_SRC_SHIFT 0 /* SYSCLK_SRC - [3:0] */
1532 #define ARIZONA_SYSCLK_SRC_WIDTH 4 /* SYSCLK_SRC - [3:0] */
1533
1534 /*
1535 * R258 (0x102) - Sample rate 1
1536 */
1537 #define ARIZONA_SAMPLE_RATE_1_MASK 0x001F /* SAMPLE_RATE_1 - [4:0] */
1538 #define ARIZONA_SAMPLE_RATE_1_SHIFT 0 /* SAMPLE_RATE_1 - [4:0] */
1539 #define ARIZONA_SAMPLE_RATE_1_WIDTH 5 /* SAMPLE_RATE_1 - [4:0] */
1540
1541 /*
1542 * R259 (0x103) - Sample rate 2
1543 */
1544 #define ARIZONA_SAMPLE_RATE_2_MASK 0x001F /* SAMPLE_RATE_2 - [4:0] */
1545 #define ARIZONA_SAMPLE_RATE_2_SHIFT 0 /* SAMPLE_RATE_2 - [4:0] */
1546 #define ARIZONA_SAMPLE_RATE_2_WIDTH 5 /* SAMPLE_RATE_2 - [4:0] */
1547
1548 /*
1549 * R260 (0x104) - Sample rate 3
1550 */
1551 #define ARIZONA_SAMPLE_RATE_3_MASK 0x001F /* SAMPLE_RATE_3 - [4:0] */
1552 #define ARIZONA_SAMPLE_RATE_3_SHIFT 0 /* SAMPLE_RATE_3 - [4:0] */
1553 #define ARIZONA_SAMPLE_RATE_3_WIDTH 5 /* SAMPLE_RATE_3 - [4:0] */
1554
1555 /*
1556 * R266 (0x10A) - Sample rate 1 status
1557 */
1558 #define ARIZONA_SAMPLE_RATE_1_STS_MASK 0x001F /* SAMPLE_RATE_1_STS - [4:0] */
1559 #define ARIZONA_SAMPLE_RATE_1_STS_SHIFT 0 /* SAMPLE_RATE_1_STS - [4:0] */
1560 #define ARIZONA_SAMPLE_RATE_1_STS_WIDTH 5 /* SAMPLE_RATE_1_STS - [4:0] */
1561
1562 /*
1563 * R267 (0x10B) - Sample rate 2 status
1564 */
1565 #define ARIZONA_SAMPLE_RATE_2_STS_MASK 0x001F /* SAMPLE_RATE_2_STS - [4:0] */
1566 #define ARIZONA_SAMPLE_RATE_2_STS_SHIFT 0 /* SAMPLE_RATE_2_STS - [4:0] */
1567 #define ARIZONA_SAMPLE_RATE_2_STS_WIDTH 5 /* SAMPLE_RATE_2_STS - [4:0] */
1568
1569 /*
1570 * R268 (0x10C) - Sample rate 3 status
1571 */
1572 #define ARIZONA_SAMPLE_RATE_3_STS_MASK 0x001F /* SAMPLE_RATE_3_STS - [4:0] */
1573 #define ARIZONA_SAMPLE_RATE_3_STS_SHIFT 0 /* SAMPLE_RATE_3_STS - [4:0] */
1574 #define ARIZONA_SAMPLE_RATE_3_STS_WIDTH 5 /* SAMPLE_RATE_3_STS - [4:0] */
1575
1576 /*
1577 * R274 (0x112) - Async clock 1
1578 */
1579 #define ARIZONA_ASYNC_CLK_FREQ_MASK 0x0700 /* ASYNC_CLK_FREQ - [10:8] */
1580 #define ARIZONA_ASYNC_CLK_FREQ_SHIFT 8 /* ASYNC_CLK_FREQ - [10:8] */
1581 #define ARIZONA_ASYNC_CLK_FREQ_WIDTH 3 /* ASYNC_CLK_FREQ - [10:8] */
1582 #define ARIZONA_ASYNC_CLK_ENA 0x0040 /* ASYNC_CLK_ENA */
1583 #define ARIZONA_ASYNC_CLK_ENA_MASK 0x0040 /* ASYNC_CLK_ENA */
1584 #define ARIZONA_ASYNC_CLK_ENA_SHIFT 6 /* ASYNC_CLK_ENA */
1585 #define ARIZONA_ASYNC_CLK_ENA_WIDTH 1 /* ASYNC_CLK_ENA */
1586 #define ARIZONA_ASYNC_CLK_SRC_MASK 0x000F /* ASYNC_CLK_SRC - [3:0] */
1587 #define ARIZONA_ASYNC_CLK_SRC_SHIFT 0 /* ASYNC_CLK_SRC - [3:0] */
1588 #define ARIZONA_ASYNC_CLK_SRC_WIDTH 4 /* ASYNC_CLK_SRC - [3:0] */
1589
1590 /*
1591 * R275 (0x113) - Async sample rate 1
1592 */
1593 #define ARIZONA_ASYNC_SAMPLE_RATE_MASK 0x001F /* ASYNC_SAMPLE_RATE - [4:0] */
1594 #define ARIZONA_ASYNC_SAMPLE_RATE_SHIFT 0 /* ASYNC_SAMPLE_RATE - [4:0] */
1595 #define ARIZONA_ASYNC_SAMPLE_RATE_WIDTH 5 /* ASYNC_SAMPLE_RATE - [4:0] */
1596
1597 /*
1598 * R283 (0x11B) - Async sample rate 1 status
1599 */
1600 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_MASK 0x001F /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1601 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_SHIFT 0 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1602 #define ARIZONA_ASYNC_SAMPLE_RATE_STS_WIDTH 5 /* ASYNC_SAMPLE_RATE_STS - [4:0] */
1603
1604 /*
1605 * R329 (0x149) - Output system clock
1606 */
1607 #define ARIZONA_OPCLK_ENA 0x8000 /* OPCLK_ENA */
1608 #define ARIZONA_OPCLK_ENA_MASK 0x8000 /* OPCLK_ENA */
1609 #define ARIZONA_OPCLK_ENA_SHIFT 15 /* OPCLK_ENA */
1610 #define ARIZONA_OPCLK_ENA_WIDTH 1 /* OPCLK_ENA */
1611 #define ARIZONA_OPCLK_DIV_MASK 0x00F8 /* OPCLK_DIV - [7:3] */
1612 #define ARIZONA_OPCLK_DIV_SHIFT 3 /* OPCLK_DIV - [7:3] */
1613 #define ARIZONA_OPCLK_DIV_WIDTH 5 /* OPCLK_DIV - [7:3] */
1614 #define ARIZONA_OPCLK_SEL_MASK 0x0007 /* OPCLK_SEL - [2:0] */
1615 #define ARIZONA_OPCLK_SEL_SHIFT 0 /* OPCLK_SEL - [2:0] */
1616 #define ARIZONA_OPCLK_SEL_WIDTH 3 /* OPCLK_SEL - [2:0] */
1617
1618 /*
1619 * R330 (0x14A) - Output async clock
1620 */
1621 #define ARIZONA_OPCLK_ASYNC_ENA 0x8000 /* OPCLK_ASYNC_ENA */
1622 #define ARIZONA_OPCLK_ASYNC_ENA_MASK 0x8000 /* OPCLK_ASYNC_ENA */
1623 #define ARIZONA_OPCLK_ASYNC_ENA_SHIFT 15 /* OPCLK_ASYNC_ENA */
1624 #define ARIZONA_OPCLK_ASYNC_ENA_WIDTH 1 /* OPCLK_ASYNC_ENA */
1625 #define ARIZONA_OPCLK_ASYNC_DIV_MASK 0x00F8 /* OPCLK_ASYNC_DIV - [7:3] */
1626 #define ARIZONA_OPCLK_ASYNC_DIV_SHIFT 3 /* OPCLK_ASYNC_DIV - [7:3] */
1627 #define ARIZONA_OPCLK_ASYNC_DIV_WIDTH 5 /* OPCLK_ASYNC_DIV - [7:3] */
1628 #define ARIZONA_OPCLK_ASYNC_SEL_MASK 0x0007 /* OPCLK_ASYNC_SEL - [2:0] */
1629 #define ARIZONA_OPCLK_ASYNC_SEL_SHIFT 0 /* OPCLK_ASYNC_SEL - [2:0] */
1630 #define ARIZONA_OPCLK_ASYNC_SEL_WIDTH 3 /* OPCLK_ASYNC_SEL - [2:0] */
1631
1632 /*
1633 * R338 (0x152) - Rate Estimator 1
1634 */
1635 #define ARIZONA_TRIG_ON_STARTUP 0x0010 /* TRIG_ON_STARTUP */
1636 #define ARIZONA_TRIG_ON_STARTUP_MASK 0x0010 /* TRIG_ON_STARTUP */
1637 #define ARIZONA_TRIG_ON_STARTUP_SHIFT 4 /* TRIG_ON_STARTUP */
1638 #define ARIZONA_TRIG_ON_STARTUP_WIDTH 1 /* TRIG_ON_STARTUP */
1639 #define ARIZONA_LRCLK_SRC_MASK 0x000E /* LRCLK_SRC - [3:1] */
1640 #define ARIZONA_LRCLK_SRC_SHIFT 1 /* LRCLK_SRC - [3:1] */
1641 #define ARIZONA_LRCLK_SRC_WIDTH 3 /* LRCLK_SRC - [3:1] */
1642 #define ARIZONA_RATE_EST_ENA 0x0001 /* RATE_EST_ENA */
1643 #define ARIZONA_RATE_EST_ENA_MASK 0x0001 /* RATE_EST_ENA */
1644 #define ARIZONA_RATE_EST_ENA_SHIFT 0 /* RATE_EST_ENA */
1645 #define ARIZONA_RATE_EST_ENA_WIDTH 1 /* RATE_EST_ENA */
1646
1647 /*
1648 * R339 (0x153) - Rate Estimator 2
1649 */
1650 #define ARIZONA_SAMPLE_RATE_DETECT_A_MASK 0x001F /* SAMPLE_RATE_DETECT_A - [4:0] */
1651 #define ARIZONA_SAMPLE_RATE_DETECT_A_SHIFT 0 /* SAMPLE_RATE_DETECT_A - [4:0] */
1652 #define ARIZONA_SAMPLE_RATE_DETECT_A_WIDTH 5 /* SAMPLE_RATE_DETECT_A - [4:0] */
1653
1654 /*
1655 * R340 (0x154) - Rate Estimator 3
1656 */
1657 #define ARIZONA_SAMPLE_RATE_DETECT_B_MASK 0x001F /* SAMPLE_RATE_DETECT_B - [4:0] */
1658 #define ARIZONA_SAMPLE_RATE_DETECT_B_SHIFT 0 /* SAMPLE_RATE_DETECT_B - [4:0] */
1659 #define ARIZONA_SAMPLE_RATE_DETECT_B_WIDTH 5 /* SAMPLE_RATE_DETECT_B - [4:0] */
1660
1661 /*
1662 * R341 (0x155) - Rate Estimator 4
1663 */
1664 #define ARIZONA_SAMPLE_RATE_DETECT_C_MASK 0x001F /* SAMPLE_RATE_DETECT_C - [4:0] */
1665 #define ARIZONA_SAMPLE_RATE_DETECT_C_SHIFT 0 /* SAMPLE_RATE_DETECT_C - [4:0] */
1666 #define ARIZONA_SAMPLE_RATE_DETECT_C_WIDTH 5 /* SAMPLE_RATE_DETECT_C - [4:0] */
1667
1668 /*
1669 * R342 (0x156) - Rate Estimator 5
1670 */
1671 #define ARIZONA_SAMPLE_RATE_DETECT_D_MASK 0x001F /* SAMPLE_RATE_DETECT_D - [4:0] */
1672 #define ARIZONA_SAMPLE_RATE_DETECT_D_SHIFT 0 /* SAMPLE_RATE_DETECT_D - [4:0] */
1673 #define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH 5 /* SAMPLE_RATE_DETECT_D - [4:0] */
1674
1675 /*
1676 * R353 (0x161) - Dynamic Frequency Scaling 1
1677 */
1678 #define ARIZONA_SUBSYS_MAX_FREQ 0x0001 /* SUBSYS_MAX_FREQ */
1679 #define ARIZONA_SUBSYS_MAX_FREQ_SHIFT 0 /* SUBSYS_MAX_FREQ */
1680 #define ARIZONA_SUBSYS_MAX_FREQ_WIDTH 1 /* SUBSYS_MAX_FREQ */
1681
1682 /*
1683 * R369 (0x171) - FLL1 Control 1
1684 */
1685 #define ARIZONA_FLL1_FREERUN 0x0002 /* FLL1_FREERUN */
1686 #define ARIZONA_FLL1_FREERUN_MASK 0x0002 /* FLL1_FREERUN */
1687 #define ARIZONA_FLL1_FREERUN_SHIFT 1 /* FLL1_FREERUN */
1688 #define ARIZONA_FLL1_FREERUN_WIDTH 1 /* FLL1_FREERUN */
1689 #define ARIZONA_FLL1_ENA 0x0001 /* FLL1_ENA */
1690 #define ARIZONA_FLL1_ENA_MASK 0x0001 /* FLL1_ENA */
1691 #define ARIZONA_FLL1_ENA_SHIFT 0 /* FLL1_ENA */
1692 #define ARIZONA_FLL1_ENA_WIDTH 1 /* FLL1_ENA */
1693
1694 /*
1695 * R370 (0x172) - FLL1 Control 2
1696 */
1697 #define ARIZONA_FLL1_CTRL_UPD 0x8000 /* FLL1_CTRL_UPD */
1698 #define ARIZONA_FLL1_CTRL_UPD_MASK 0x8000 /* FLL1_CTRL_UPD */
1699 #define ARIZONA_FLL1_CTRL_UPD_SHIFT 15 /* FLL1_CTRL_UPD */
1700 #define ARIZONA_FLL1_CTRL_UPD_WIDTH 1 /* FLL1_CTRL_UPD */
1701 #define ARIZONA_FLL1_N_MASK 0x03FF /* FLL1_N - [9:0] */
1702 #define ARIZONA_FLL1_N_SHIFT 0 /* FLL1_N - [9:0] */
1703 #define ARIZONA_FLL1_N_WIDTH 10 /* FLL1_N - [9:0] */
1704
1705 /*
1706 * R371 (0x173) - FLL1 Control 3
1707 */
1708 #define ARIZONA_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1709 #define ARIZONA_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1710 #define ARIZONA_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1711
1712 /*
1713 * R372 (0x174) - FLL1 Control 4
1714 */
1715 #define ARIZONA_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1716 #define ARIZONA_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
1717 #define ARIZONA_FLL1_LAMBDA_WIDTH 16 /* FLL1_LAMBDA - [15:0] */
1718
1719 /*
1720 * R373 (0x175) - FLL1 Control 5
1721 */
1722 #define ARIZONA_FLL1_FRATIO_MASK 0x0700 /* FLL1_FRATIO - [10:8] */
1723 #define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [10:8] */
1724 #define ARIZONA_FLL1_FRATIO_WIDTH 3 /* FLL1_FRATIO - [10:8] */
1725 #define ARIZONA_FLL1_OUTDIV_MASK 0x000E /* FLL1_OUTDIV - [3:1] */
1726 #define ARIZONA_FLL1_OUTDIV_SHIFT 1 /* FLL1_OUTDIV - [3:1] */
1727 #define ARIZONA_FLL1_OUTDIV_WIDTH 3 /* FLL1_OUTDIV - [3:1] */
1728
1729 /*
1730 * R374 (0x176) - FLL1 Control 6
1731 */
1732 #define ARIZONA_FLL1_CLK_REF_DIV_MASK 0x00C0 /* FLL1_CLK_REF_DIV - [7:6] */
1733 #define ARIZONA_FLL1_CLK_REF_DIV_SHIFT 6 /* FLL1_CLK_REF_DIV - [7:6] */
1734 #define ARIZONA_FLL1_CLK_REF_DIV_WIDTH 2 /* FLL1_CLK_REF_DIV - [7:6] */
1735 #define ARIZONA_FLL1_CLK_REF_SRC_MASK 0x000F /* FLL1_CLK_REF_SRC - [3:0] */
1736 #define ARIZONA_FLL1_CLK_REF_SRC_SHIFT 0 /* FLL1_CLK_REF_SRC - [3:0] */
1737 #define ARIZONA_FLL1_CLK_REF_SRC_WIDTH 4 /* FLL1_CLK_REF_SRC - [3:0] */
1738
1739 /*
1740 * R375 (0x177) - FLL1 Loop Filter Test 1
1741 */
1742 #define ARIZONA_FLL1_FRC_INTEG_UPD 0x8000 /* FLL1_FRC_INTEG_UPD */
1743 #define ARIZONA_FLL1_FRC_INTEG_UPD_MASK 0x8000 /* FLL1_FRC_INTEG_UPD */
1744 #define ARIZONA_FLL1_FRC_INTEG_UPD_SHIFT 15 /* FLL1_FRC_INTEG_UPD */
1745 #define ARIZONA_FLL1_FRC_INTEG_UPD_WIDTH 1 /* FLL1_FRC_INTEG_UPD */
1746 #define ARIZONA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF /* FLL1_FRC_INTEG_VAL - [11:0] */
1747 #define ARIZONA_FLL1_FRC_INTEG_VAL_SHIFT 0 /* FLL1_FRC_INTEG_VAL - [11:0] */
1748 #define ARIZONA_FLL1_FRC_INTEG_VAL_WIDTH 12 /* FLL1_FRC_INTEG_VAL - [11:0] */
1749
1750 /*
1751 * R377 (0x179) - FLL1 Control 7
1752 */
1753 #define ARIZONA_FLL1_GAIN_MASK 0x003c /* FLL1_GAIN */
1754 #define ARIZONA_FLL1_GAIN_SHIFT 2 /* FLL1_GAIN */
1755 #define ARIZONA_FLL1_GAIN_WIDTH 4 /* FLL1_GAIN */
1756
1757 /*
1758 * R385 (0x181) - FLL1 Synchroniser 1
1759 */
1760 #define ARIZONA_FLL1_SYNC_ENA 0x0001 /* FLL1_SYNC_ENA */
1761 #define ARIZONA_FLL1_SYNC_ENA_MASK 0x0001 /* FLL1_SYNC_ENA */
1762 #define ARIZONA_FLL1_SYNC_ENA_SHIFT 0 /* FLL1_SYNC_ENA */
1763 #define ARIZONA_FLL1_SYNC_ENA_WIDTH 1 /* FLL1_SYNC_ENA */
1764
1765 /*
1766 * R386 (0x182) - FLL1 Synchroniser 2
1767 */
1768 #define ARIZONA_FLL1_SYNC_N_MASK 0x03FF /* FLL1_SYNC_N - [9:0] */
1769 #define ARIZONA_FLL1_SYNC_N_SHIFT 0 /* FLL1_SYNC_N - [9:0] */
1770 #define ARIZONA_FLL1_SYNC_N_WIDTH 10 /* FLL1_SYNC_N - [9:0] */
1771
1772 /*
1773 * R387 (0x183) - FLL1 Synchroniser 3
1774 */
1775 #define ARIZONA_FLL1_SYNC_THETA_MASK 0xFFFF /* FLL1_SYNC_THETA - [15:0] */
1776 #define ARIZONA_FLL1_SYNC_THETA_SHIFT 0 /* FLL1_SYNC_THETA - [15:0] */
1777 #define ARIZONA_FLL1_SYNC_THETA_WIDTH 16 /* FLL1_SYNC_THETA - [15:0] */
1778
1779 /*
1780 * R388 (0x184) - FLL1 Synchroniser 4
1781 */
1782 #define ARIZONA_FLL1_SYNC_LAMBDA_MASK 0xFFFF /* FLL1_SYNC_LAMBDA - [15:0] */
1783 #define ARIZONA_FLL1_SYNC_LAMBDA_SHIFT 0 /* FLL1_SYNC_LAMBDA - [15:0] */
1784 #define ARIZONA_FLL1_SYNC_LAMBDA_WIDTH 16 /* FLL1_SYNC_LAMBDA - [15:0] */
1785
1786 /*
1787 * R389 (0x185) - FLL1 Synchroniser 5
1788 */
1789 #define ARIZONA_FLL1_SYNC_FRATIO_MASK 0x0700 /* FLL1_SYNC_FRATIO - [10:8] */
1790 #define ARIZONA_FLL1_SYNC_FRATIO_SHIFT 8 /* FLL1_SYNC_FRATIO - [10:8] */
1791 #define ARIZONA_FLL1_SYNC_FRATIO_WIDTH 3 /* FLL1_SYNC_FRATIO - [10:8] */
1792
1793 /*
1794 * R390 (0x186) - FLL1 Synchroniser 6
1795 */
1796 #define ARIZONA_FLL1_CLK_SYNC_DIV_MASK 0x00C0 /* FLL1_CLK_SYNC_DIV - [7:6] */
1797 #define ARIZONA_FLL1_CLK_SYNC_DIV_SHIFT 6 /* FLL1_CLK_SYNC_DIV - [7:6] */
1798 #define ARIZONA_FLL1_CLK_SYNC_DIV_WIDTH 2 /* FLL1_CLK_SYNC_DIV - [7:6] */
1799 #define ARIZONA_FLL1_CLK_SYNC_SRC_MASK 0x000F /* FLL1_CLK_SYNC_SRC - [3:0] */
1800 #define ARIZONA_FLL1_CLK_SYNC_SRC_SHIFT 0 /* FLL1_CLK_SYNC_SRC - [3:0] */
1801 #define ARIZONA_FLL1_CLK_SYNC_SRC_WIDTH 4 /* FLL1_CLK_SYNC_SRC - [3:0] */
1802
1803 /*
1804 * R391 (0x187) - FLL1 Synchroniser 7
1805 */
1806 #define ARIZONA_FLL1_SYNC_GAIN_MASK 0x003c /* FLL1_SYNC_GAIN */
1807 #define ARIZONA_FLL1_SYNC_GAIN_SHIFT 2 /* FLL1_SYNC_GAIN */
1808 #define ARIZONA_FLL1_SYNC_GAIN_WIDTH 4 /* FLL1_SYNC_GAIN */
1809 #define ARIZONA_FLL1_SYNC_BW 0x0001 /* FLL1_SYNC_BW */
1810 #define ARIZONA_FLL1_SYNC_BW_MASK 0x0001 /* FLL1_SYNC_BW */
1811 #define ARIZONA_FLL1_SYNC_BW_SHIFT 0 /* FLL1_SYNC_BW */
1812 #define ARIZONA_FLL1_SYNC_BW_WIDTH 1 /* FLL1_SYNC_BW */
1813
1814 /*
1815 * R393 (0x189) - FLL1 Spread Spectrum
1816 */
1817 #define ARIZONA_FLL1_SS_AMPL_MASK 0x0030 /* FLL1_SS_AMPL - [5:4] */
1818 #define ARIZONA_FLL1_SS_AMPL_SHIFT 4 /* FLL1_SS_AMPL - [5:4] */
1819 #define ARIZONA_FLL1_SS_AMPL_WIDTH 2 /* FLL1_SS_AMPL - [5:4] */
1820 #define ARIZONA_FLL1_SS_FREQ_MASK 0x000C /* FLL1_SS_FREQ - [3:2] */
1821 #define ARIZONA_FLL1_SS_FREQ_SHIFT 2 /* FLL1_SS_FREQ - [3:2] */
1822 #define ARIZONA_FLL1_SS_FREQ_WIDTH 2 /* FLL1_SS_FREQ - [3:2] */
1823 #define ARIZONA_FLL1_SS_SEL_MASK 0x0003 /* FLL1_SS_SEL - [1:0] */
1824 #define ARIZONA_FLL1_SS_SEL_SHIFT 0 /* FLL1_SS_SEL - [1:0] */
1825 #define ARIZONA_FLL1_SS_SEL_WIDTH 2 /* FLL1_SS_SEL - [1:0] */
1826
1827 /*
1828 * R394 (0x18A) - FLL1 GPIO Clock
1829 */
1830 #define ARIZONA_FLL1_GPDIV_MASK 0x00FE /* FLL1_GPDIV - [7:1] */
1831 #define ARIZONA_FLL1_GPDIV_SHIFT 1 /* FLL1_GPDIV - [7:1] */
1832 #define ARIZONA_FLL1_GPDIV_WIDTH 7 /* FLL1_GPDIV - [7:1] */
1833 #define ARIZONA_FLL1_GPDIV_ENA 0x0001 /* FLL1_GPDIV_ENA */
1834 #define ARIZONA_FLL1_GPDIV_ENA_MASK 0x0001 /* FLL1_GPDIV_ENA */
1835 #define ARIZONA_FLL1_GPDIV_ENA_SHIFT 0 /* FLL1_GPDIV_ENA */
1836 #define ARIZONA_FLL1_GPDIV_ENA_WIDTH 1 /* FLL1_GPDIV_ENA */
1837
1838 /*
1839 * R401 (0x191) - FLL2 Control 1
1840 */
1841 #define ARIZONA_FLL2_FREERUN 0x0002 /* FLL2_FREERUN */
1842 #define ARIZONA_FLL2_FREERUN_MASK 0x0002 /* FLL2_FREERUN */
1843 #define ARIZONA_FLL2_FREERUN_SHIFT 1 /* FLL2_FREERUN */
1844 #define ARIZONA_FLL2_FREERUN_WIDTH 1 /* FLL2_FREERUN */
1845 #define ARIZONA_FLL2_ENA 0x0001 /* FLL2_ENA */
1846 #define ARIZONA_FLL2_ENA_MASK 0x0001 /* FLL2_ENA */
1847 #define ARIZONA_FLL2_ENA_SHIFT 0 /* FLL2_ENA */
1848 #define ARIZONA_FLL2_ENA_WIDTH 1 /* FLL2_ENA */
1849
1850 /*
1851 * R402 (0x192) - FLL2 Control 2
1852 */
1853 #define ARIZONA_FLL2_CTRL_UPD 0x8000 /* FLL2_CTRL_UPD */
1854 #define ARIZONA_FLL2_CTRL_UPD_MASK 0x8000 /* FLL2_CTRL_UPD */
1855 #define ARIZONA_FLL2_CTRL_UPD_SHIFT 15 /* FLL2_CTRL_UPD */
1856 #define ARIZONA_FLL2_CTRL_UPD_WIDTH 1 /* FLL2_CTRL_UPD */
1857 #define ARIZONA_FLL2_N_MASK 0x03FF /* FLL2_N - [9:0] */
1858 #define ARIZONA_FLL2_N_SHIFT 0 /* FLL2_N - [9:0] */
1859 #define ARIZONA_FLL2_N_WIDTH 10 /* FLL2_N - [9:0] */
1860
1861 /*
1862 * R403 (0x193) - FLL2 Control 3
1863 */
1864 #define ARIZONA_FLL2_THETA_MASK 0xFFFF /* FLL2_THETA - [15:0] */
1865 #define ARIZONA_FLL2_THETA_SHIFT 0 /* FLL2_THETA - [15:0] */
1866 #define ARIZONA_FLL2_THETA_WIDTH 16 /* FLL2_THETA - [15:0] */
1867
1868 /*
1869 * R404 (0x194) - FLL2 Control 4
1870 */
1871 #define ARIZONA_FLL2_LAMBDA_MASK 0xFFFF /* FLL2_LAMBDA - [15:0] */
1872 #define ARIZONA_FLL2_LAMBDA_SHIFT 0 /* FLL2_LAMBDA - [15:0] */
1873 #define ARIZONA_FLL2_LAMBDA_WIDTH 16 /* FLL2_LAMBDA - [15:0] */
1874
1875 /*
1876 * R405 (0x195) - FLL2 Control 5
1877 */
1878 #define ARIZONA_FLL2_FRATIO_MASK 0x0700 /* FLL2_FRATIO - [10:8] */
1879 #define ARIZONA_FLL2_FRATIO_SHIFT 8 /* FLL2_FRATIO - [10:8] */
1880 #define ARIZONA_FLL2_FRATIO_WIDTH 3 /* FLL2_FRATIO - [10:8] */
1881 #define ARIZONA_FLL2_OUTDIV_MASK 0x000E /* FLL2_OUTDIV - [3:1] */
1882 #define ARIZONA_FLL2_OUTDIV_SHIFT 1 /* FLL2_OUTDIV - [3:1] */
1883 #define ARIZONA_FLL2_OUTDIV_WIDTH 3 /* FLL2_OUTDIV - [3:1] */
1884
1885 /*
1886 * R406 (0x196) - FLL2 Control 6
1887 */
1888 #define ARIZONA_FLL2_CLK_REF_DIV_MASK 0x00C0 /* FLL2_CLK_REF_DIV - [7:6] */
1889 #define ARIZONA_FLL2_CLK_REF_DIV_SHIFT 6 /* FLL2_CLK_REF_DIV - [7:6] */
1890 #define ARIZONA_FLL2_CLK_REF_DIV_WIDTH 2 /* FLL2_CLK_REF_DIV - [7:6] */
1891 #define ARIZONA_FLL2_CLK_REF_SRC_MASK 0x000F /* FLL2_CLK_REF_SRC - [3:0] */
1892 #define ARIZONA_FLL2_CLK_REF_SRC_SHIFT 0 /* FLL2_CLK_REF_SRC - [3:0] */
1893 #define ARIZONA_FLL2_CLK_REF_SRC_WIDTH 4 /* FLL2_CLK_REF_SRC - [3:0] */
1894
1895 /*
1896 * R407 (0x197) - FLL2 Loop Filter Test 1
1897 */
1898 #define ARIZONA_FLL2_FRC_INTEG_UPD 0x8000 /* FLL2_FRC_INTEG_UPD */
1899 #define ARIZONA_FLL2_FRC_INTEG_UPD_MASK 0x8000 /* FLL2_FRC_INTEG_UPD */
1900 #define ARIZONA_FLL2_FRC_INTEG_UPD_SHIFT 15 /* FLL2_FRC_INTEG_UPD */
1901 #define ARIZONA_FLL2_FRC_INTEG_UPD_WIDTH 1 /* FLL2_FRC_INTEG_UPD */
1902 #define ARIZONA_FLL2_FRC_INTEG_VAL_MASK 0x0FFF /* FLL2_FRC_INTEG_VAL - [11:0] */
1903 #define ARIZONA_FLL2_FRC_INTEG_VAL_SHIFT 0 /* FLL2_FRC_INTEG_VAL - [11:0] */
1904 #define ARIZONA_FLL2_FRC_INTEG_VAL_WIDTH 12 /* FLL2_FRC_INTEG_VAL - [11:0] */
1905
1906 /*
1907 * R409 (0x199) - FLL2 Control 7
1908 */
1909 #define ARIZONA_FLL2_GAIN_MASK 0x003c /* FLL2_GAIN */
1910 #define ARIZONA_FLL2_GAIN_SHIFT 2 /* FLL2_GAIN */
1911 #define ARIZONA_FLL2_GAIN_WIDTH 4 /* FLL2_GAIN */
1912
1913 /*
1914 * R417 (0x1A1) - FLL2 Synchroniser 1
1915 */
1916 #define ARIZONA_FLL2_SYNC_ENA 0x0001 /* FLL2_SYNC_ENA */
1917 #define ARIZONA_FLL2_SYNC_ENA_MASK 0x0001 /* FLL2_SYNC_ENA */
1918 #define ARIZONA_FLL2_SYNC_ENA_SHIFT 0 /* FLL2_SYNC_ENA */
1919 #define ARIZONA_FLL2_SYNC_ENA_WIDTH 1 /* FLL2_SYNC_ENA */
1920
1921 /*
1922 * R418 (0x1A2) - FLL2 Synchroniser 2
1923 */
1924 #define ARIZONA_FLL2_SYNC_N_MASK 0x03FF /* FLL2_SYNC_N - [9:0] */
1925 #define ARIZONA_FLL2_SYNC_N_SHIFT 0 /* FLL2_SYNC_N - [9:0] */
1926 #define ARIZONA_FLL2_SYNC_N_WIDTH 10 /* FLL2_SYNC_N - [9:0] */
1927
1928 /*
1929 * R419 (0x1A3) - FLL2 Synchroniser 3
1930 */
1931 #define ARIZONA_FLL2_SYNC_THETA_MASK 0xFFFF /* FLL2_SYNC_THETA - [15:0] */
1932 #define ARIZONA_FLL2_SYNC_THETA_SHIFT 0 /* FLL2_SYNC_THETA - [15:0] */
1933 #define ARIZONA_FLL2_SYNC_THETA_WIDTH 16 /* FLL2_SYNC_THETA - [15:0] */
1934
1935 /*
1936 * R420 (0x1A4) - FLL2 Synchroniser 4
1937 */
1938 #define ARIZONA_FLL2_SYNC_LAMBDA_MASK 0xFFFF /* FLL2_SYNC_LAMBDA - [15:0] */
1939 #define ARIZONA_FLL2_SYNC_LAMBDA_SHIFT 0 /* FLL2_SYNC_LAMBDA - [15:0] */
1940 #define ARIZONA_FLL2_SYNC_LAMBDA_WIDTH 16 /* FLL2_SYNC_LAMBDA - [15:0] */
1941
1942 /*
1943 * R421 (0x1A5) - FLL2 Synchroniser 5
1944 */
1945 #define ARIZONA_FLL2_SYNC_FRATIO_MASK 0x0700 /* FLL2_SYNC_FRATIO - [10:8] */
1946 #define ARIZONA_FLL2_SYNC_FRATIO_SHIFT 8 /* FLL2_SYNC_FRATIO - [10:8] */
1947 #define ARIZONA_FLL2_SYNC_FRATIO_WIDTH 3 /* FLL2_SYNC_FRATIO - [10:8] */
1948
1949 /*
1950 * R422 (0x1A6) - FLL2 Synchroniser 6
1951 */
1952 #define ARIZONA_FLL2_CLK_SYNC_DIV_MASK 0x00C0 /* FLL2_CLK_SYNC_DIV - [7:6] */
1953 #define ARIZONA_FLL2_CLK_SYNC_DIV_SHIFT 6 /* FLL2_CLK_SYNC_DIV - [7:6] */
1954 #define ARIZONA_FLL2_CLK_SYNC_DIV_WIDTH 2 /* FLL2_CLK_SYNC_DIV - [7:6] */
1955 #define ARIZONA_FLL2_CLK_SYNC_SRC_MASK 0x000F /* FLL2_CLK_SYNC_SRC - [3:0] */
1956 #define ARIZONA_FLL2_CLK_SYNC_SRC_SHIFT 0 /* FLL2_CLK_SYNC_SRC - [3:0] */
1957 #define ARIZONA_FLL2_CLK_SYNC_SRC_WIDTH 4 /* FLL2_CLK_SYNC_SRC - [3:0] */
1958
1959 /*
1960 * R423 (0x1A7) - FLL2 Synchroniser 7
1961 */
1962 #define ARIZONA_FLL2_SYNC_GAIN_MASK 0x003c /* FLL2_SYNC_GAIN */
1963 #define ARIZONA_FLL2_SYNC_GAIN_SHIFT 2 /* FLL2_SYNC_GAIN */
1964 #define ARIZONA_FLL2_SYNC_GAIN_WIDTH 4 /* FLL2_SYNC_GAIN */
1965 #define ARIZONA_FLL2_SYNC_BW 0x0001 /* FLL2_SYNC_BW */
1966 #define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */
1967 #define ARIZONA_FLL2_SYNC_BW_SHIFT 0 /* FLL2_SYNC_BW */
1968 #define ARIZONA_FLL2_SYNC_BW_WIDTH 1 /* FLL2_SYNC_BW */
1969
1970 /*
1971 * R425 (0x1A9) - FLL2 Spread Spectrum
1972 */
1973 #define ARIZONA_FLL2_SS_AMPL_MASK 0x0030 /* FLL2_SS_AMPL - [5:4] */
1974 #define ARIZONA_FLL2_SS_AMPL_SHIFT 4 /* FLL2_SS_AMPL - [5:4] */
1975 #define ARIZONA_FLL2_SS_AMPL_WIDTH 2 /* FLL2_SS_AMPL - [5:4] */
1976 #define ARIZONA_FLL2_SS_FREQ_MASK 0x000C /* FLL2_SS_FREQ - [3:2] */
1977 #define ARIZONA_FLL2_SS_FREQ_SHIFT 2 /* FLL2_SS_FREQ - [3:2] */
1978 #define ARIZONA_FLL2_SS_FREQ_WIDTH 2 /* FLL2_SS_FREQ - [3:2] */
1979 #define ARIZONA_FLL2_SS_SEL_MASK 0x0003 /* FLL2_SS_SEL - [1:0] */
1980 #define ARIZONA_FLL2_SS_SEL_SHIFT 0 /* FLL2_SS_SEL - [1:0] */
1981 #define ARIZONA_FLL2_SS_SEL_WIDTH 2 /* FLL2_SS_SEL - [1:0] */
1982
1983 /*
1984 * R426 (0x1AA) - FLL2 GPIO Clock
1985 */
1986 #define ARIZONA_FLL2_GPDIV_MASK 0x00FE /* FLL2_GPDIV - [7:1] */
1987 #define ARIZONA_FLL2_GPDIV_SHIFT 1 /* FLL2_GPDIV - [7:1] */
1988 #define ARIZONA_FLL2_GPDIV_WIDTH 7 /* FLL2_GPDIV - [7:1] */
1989 #define ARIZONA_FLL2_GPDIV_ENA 0x0001 /* FLL2_GPDIV_ENA */
1990 #define ARIZONA_FLL2_GPDIV_ENA_MASK 0x0001 /* FLL2_GPDIV_ENA */
1991 #define ARIZONA_FLL2_GPDIV_ENA_SHIFT 0 /* FLL2_GPDIV_ENA */
1992 #define ARIZONA_FLL2_GPDIV_ENA_WIDTH 1 /* FLL2_GPDIV_ENA */
1993
1994 /*
1995 * R512 (0x200) - Mic Charge Pump 1
1996 */
1997 #define ARIZONA_CPMIC_DISCH 0x0004 /* CPMIC_DISCH */
1998 #define ARIZONA_CPMIC_DISCH_MASK 0x0004 /* CPMIC_DISCH */
1999 #define ARIZONA_CPMIC_DISCH_SHIFT 2 /* CPMIC_DISCH */
2000 #define ARIZONA_CPMIC_DISCH_WIDTH 1 /* CPMIC_DISCH */
2001 #define ARIZONA_CPMIC_BYPASS 0x0002 /* CPMIC_BYPASS */
2002 #define ARIZONA_CPMIC_BYPASS_MASK 0x0002 /* CPMIC_BYPASS */
2003 #define ARIZONA_CPMIC_BYPASS_SHIFT 1 /* CPMIC_BYPASS */
2004 #define ARIZONA_CPMIC_BYPASS_WIDTH 1 /* CPMIC_BYPASS */
2005 #define ARIZONA_CPMIC_ENA 0x0001 /* CPMIC_ENA */
2006 #define ARIZONA_CPMIC_ENA_MASK 0x0001 /* CPMIC_ENA */
2007 #define ARIZONA_CPMIC_ENA_SHIFT 0 /* CPMIC_ENA */
2008 #define ARIZONA_CPMIC_ENA_WIDTH 1 /* CPMIC_ENA */
2009
2010 /*
2011 * R528 (0x210) - LDO1 Control 1
2012 */
2013 #define ARIZONA_LDO1_VSEL_MASK 0x07E0 /* LDO1_VSEL - [10:5] */
2014 #define ARIZONA_LDO1_VSEL_SHIFT 5 /* LDO1_VSEL - [10:5] */
2015 #define ARIZONA_LDO1_VSEL_WIDTH 6 /* LDO1_VSEL - [10:5] */
2016 #define ARIZONA_LDO1_FAST 0x0010 /* LDO1_FAST */
2017 #define ARIZONA_LDO1_FAST_MASK 0x0010 /* LDO1_FAST */
2018 #define ARIZONA_LDO1_FAST_SHIFT 4 /* LDO1_FAST */
2019 #define ARIZONA_LDO1_FAST_WIDTH 1 /* LDO1_FAST */
2020 #define ARIZONA_LDO1_DISCH 0x0004 /* LDO1_DISCH */
2021 #define ARIZONA_LDO1_DISCH_MASK 0x0004 /* LDO1_DISCH */
2022 #define ARIZONA_LDO1_DISCH_SHIFT 2 /* LDO1_DISCH */
2023 #define ARIZONA_LDO1_DISCH_WIDTH 1 /* LDO1_DISCH */
2024 #define ARIZONA_LDO1_BYPASS 0x0002 /* LDO1_BYPASS */
2025 #define ARIZONA_LDO1_BYPASS_MASK 0x0002 /* LDO1_BYPASS */
2026 #define ARIZONA_LDO1_BYPASS_SHIFT 1 /* LDO1_BYPASS */
2027 #define ARIZONA_LDO1_BYPASS_WIDTH 1 /* LDO1_BYPASS */
2028 #define ARIZONA_LDO1_ENA 0x0001 /* LDO1_ENA */
2029 #define ARIZONA_LDO1_ENA_MASK 0x0001 /* LDO1_ENA */
2030 #define ARIZONA_LDO1_ENA_SHIFT 0 /* LDO1_ENA */
2031 #define ARIZONA_LDO1_ENA_WIDTH 1 /* LDO1_ENA */
2032
2033 /*
2034 * R530 (0x212) - LDO1 Control 2
2035 */
2036 #define ARIZONA_LDO1_HI_PWR 0x0001 /* LDO1_HI_PWR */
2037 #define ARIZONA_LDO1_HI_PWR_SHIFT 0 /* LDO1_HI_PWR */
2038 #define ARIZONA_LDO1_HI_PWR_WIDTH 1 /* LDO1_HI_PWR */
2039
2040 /*
2041 * R531 (0x213) - LDO2 Control 1
2042 */
2043 #define ARIZONA_LDO2_VSEL_MASK 0x07E0 /* LDO2_VSEL - [10:5] */
2044 #define ARIZONA_LDO2_VSEL_SHIFT 5 /* LDO2_VSEL - [10:5] */
2045 #define ARIZONA_LDO2_VSEL_WIDTH 6 /* LDO2_VSEL - [10:5] */
2046 #define ARIZONA_LDO2_FAST 0x0010 /* LDO2_FAST */
2047 #define ARIZONA_LDO2_FAST_MASK 0x0010 /* LDO2_FAST */
2048 #define ARIZONA_LDO2_FAST_SHIFT 4 /* LDO2_FAST */
2049 #define ARIZONA_LDO2_FAST_WIDTH 1 /* LDO2_FAST */
2050 #define ARIZONA_LDO2_DISCH 0x0004 /* LDO2_DISCH */
2051 #define ARIZONA_LDO2_DISCH_MASK 0x0004 /* LDO2_DISCH */
2052 #define ARIZONA_LDO2_DISCH_SHIFT 2 /* LDO2_DISCH */
2053 #define ARIZONA_LDO2_DISCH_WIDTH 1 /* LDO2_DISCH */
2054 #define ARIZONA_LDO2_BYPASS 0x0002 /* LDO2_BYPASS */
2055 #define ARIZONA_LDO2_BYPASS_MASK 0x0002 /* LDO2_BYPASS */
2056 #define ARIZONA_LDO2_BYPASS_SHIFT 1 /* LDO2_BYPASS */
2057 #define ARIZONA_LDO2_BYPASS_WIDTH 1 /* LDO2_BYPASS */
2058 #define ARIZONA_LDO2_ENA 0x0001 /* LDO2_ENA */
2059 #define ARIZONA_LDO2_ENA_MASK 0x0001 /* LDO2_ENA */
2060 #define ARIZONA_LDO2_ENA_SHIFT 0 /* LDO2_ENA */
2061 #define ARIZONA_LDO2_ENA_WIDTH 1 /* LDO2_ENA */
2062
2063 /*
2064 * R536 (0x218) - Mic Bias Ctrl 1
2065 */
2066 #define ARIZONA_MICB1_EXT_CAP 0x8000 /* MICB1_EXT_CAP */
2067 #define ARIZONA_MICB1_EXT_CAP_MASK 0x8000 /* MICB1_EXT_CAP */
2068 #define ARIZONA_MICB1_EXT_CAP_SHIFT 15 /* MICB1_EXT_CAP */
2069 #define ARIZONA_MICB1_EXT_CAP_WIDTH 1 /* MICB1_EXT_CAP */
2070 #define ARIZONA_MICB1_LVL_MASK 0x01E0 /* MICB1_LVL - [8:5] */
2071 #define ARIZONA_MICB1_LVL_SHIFT 5 /* MICB1_LVL - [8:5] */
2072 #define ARIZONA_MICB1_LVL_WIDTH 4 /* MICB1_LVL - [8:5] */
2073 #define ARIZONA_MICB1_FAST 0x0010 /* MICB1_FAST */
2074 #define ARIZONA_MICB1_FAST_MASK 0x0010 /* MICB1_FAST */
2075 #define ARIZONA_MICB1_FAST_SHIFT 4 /* MICB1_FAST */
2076 #define ARIZONA_MICB1_FAST_WIDTH 1 /* MICB1_FAST */
2077 #define ARIZONA_MICB1_RATE 0x0008 /* MICB1_RATE */
2078 #define ARIZONA_MICB1_RATE_MASK 0x0008 /* MICB1_RATE */
2079 #define ARIZONA_MICB1_RATE_SHIFT 3 /* MICB1_RATE */
2080 #define ARIZONA_MICB1_RATE_WIDTH 1 /* MICB1_RATE */
2081 #define ARIZONA_MICB1_DISCH 0x0004 /* MICB1_DISCH */
2082 #define ARIZONA_MICB1_DISCH_MASK 0x0004 /* MICB1_DISCH */
2083 #define ARIZONA_MICB1_DISCH_SHIFT 2 /* MICB1_DISCH */
2084 #define ARIZONA_MICB1_DISCH_WIDTH 1 /* MICB1_DISCH */
2085 #define ARIZONA_MICB1_BYPASS 0x0002 /* MICB1_BYPASS */
2086 #define ARIZONA_MICB1_BYPASS_MASK 0x0002 /* MICB1_BYPASS */
2087 #define ARIZONA_MICB1_BYPASS_SHIFT 1 /* MICB1_BYPASS */
2088 #define ARIZONA_MICB1_BYPASS_WIDTH 1 /* MICB1_BYPASS */
2089 #define ARIZONA_MICB1_ENA 0x0001 /* MICB1_ENA */
2090 #define ARIZONA_MICB1_ENA_MASK 0x0001 /* MICB1_ENA */
2091 #define ARIZONA_MICB1_ENA_SHIFT 0 /* MICB1_ENA */
2092 #define ARIZONA_MICB1_ENA_WIDTH 1 /* MICB1_ENA */
2093
2094 /*
2095 * R537 (0x219) - Mic Bias Ctrl 2
2096 */
2097 #define ARIZONA_MICB2_EXT_CAP 0x8000 /* MICB2_EXT_CAP */
2098 #define ARIZONA_MICB2_EXT_CAP_MASK 0x8000 /* MICB2_EXT_CAP */
2099 #define ARIZONA_MICB2_EXT_CAP_SHIFT 15 /* MICB2_EXT_CAP */
2100 #define ARIZONA_MICB2_EXT_CAP_WIDTH 1 /* MICB2_EXT_CAP */
2101 #define ARIZONA_MICB2_LVL_MASK 0x01E0 /* MICB2_LVL - [8:5] */
2102 #define ARIZONA_MICB2_LVL_SHIFT 5 /* MICB2_LVL - [8:5] */
2103 #define ARIZONA_MICB2_LVL_WIDTH 4 /* MICB2_LVL - [8:5] */
2104 #define ARIZONA_MICB2_FAST 0x0010 /* MICB2_FAST */
2105 #define ARIZONA_MICB2_FAST_MASK 0x0010 /* MICB2_FAST */
2106 #define ARIZONA_MICB2_FAST_SHIFT 4 /* MICB2_FAST */
2107 #define ARIZONA_MICB2_FAST_WIDTH 1 /* MICB2_FAST */
2108 #define ARIZONA_MICB2_RATE 0x0008 /* MICB2_RATE */
2109 #define ARIZONA_MICB2_RATE_MASK 0x0008 /* MICB2_RATE */
2110 #define ARIZONA_MICB2_RATE_SHIFT 3 /* MICB2_RATE */
2111 #define ARIZONA_MICB2_RATE_WIDTH 1 /* MICB2_RATE */
2112 #define ARIZONA_MICB2_DISCH 0x0004 /* MICB2_DISCH */
2113 #define ARIZONA_MICB2_DISCH_MASK 0x0004 /* MICB2_DISCH */
2114 #define ARIZONA_MICB2_DISCH_SHIFT 2 /* MICB2_DISCH */
2115 #define ARIZONA_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */
2116 #define ARIZONA_MICB2_BYPASS 0x0002 /* MICB2_BYPASS */
2117 #define ARIZONA_MICB2_BYPASS_MASK 0x0002 /* MICB2_BYPASS */
2118 #define ARIZONA_MICB2_BYPASS_SHIFT 1 /* MICB2_BYPASS */
2119 #define ARIZONA_MICB2_BYPASS_WIDTH 1 /* MICB2_BYPASS */
2120 #define ARIZONA_MICB2_ENA 0x0001 /* MICB2_ENA */
2121 #define ARIZONA_MICB2_ENA_MASK 0x0001 /* MICB2_ENA */
2122 #define ARIZONA_MICB2_ENA_SHIFT 0 /* MICB2_ENA */
2123 #define ARIZONA_MICB2_ENA_WIDTH 1 /* MICB2_ENA */
2124
2125 /*
2126 * R538 (0x21A) - Mic Bias Ctrl 3
2127 */
2128 #define ARIZONA_MICB3_EXT_CAP 0x8000 /* MICB3_EXT_CAP */
2129 #define ARIZONA_MICB3_EXT_CAP_MASK 0x8000 /* MICB3_EXT_CAP */
2130 #define ARIZONA_MICB3_EXT_CAP_SHIFT 15 /* MICB3_EXT_CAP */
2131 #define ARIZONA_MICB3_EXT_CAP_WIDTH 1 /* MICB3_EXT_CAP */
2132 #define ARIZONA_MICB3_LVL_MASK 0x01E0 /* MICB3_LVL - [8:5] */
2133 #define ARIZONA_MICB3_LVL_SHIFT 5 /* MICB3_LVL - [8:5] */
2134 #define ARIZONA_MICB3_LVL_WIDTH 4 /* MICB3_LVL - [8:5] */
2135 #define ARIZONA_MICB3_FAST 0x0010 /* MICB3_FAST */
2136 #define ARIZONA_MICB3_FAST_MASK 0x0010 /* MICB3_FAST */
2137 #define ARIZONA_MICB3_FAST_SHIFT 4 /* MICB3_FAST */
2138 #define ARIZONA_MICB3_FAST_WIDTH 1 /* MICB3_FAST */
2139 #define ARIZONA_MICB3_RATE 0x0008 /* MICB3_RATE */
2140 #define ARIZONA_MICB3_RATE_MASK 0x0008 /* MICB3_RATE */
2141 #define ARIZONA_MICB3_RATE_SHIFT 3 /* MICB3_RATE */
2142 #define ARIZONA_MICB3_RATE_WIDTH 1 /* MICB3_RATE */
2143 #define ARIZONA_MICB3_DISCH 0x0004 /* MICB3_DISCH */
2144 #define ARIZONA_MICB3_DISCH_MASK 0x0004 /* MICB3_DISCH */
2145 #define ARIZONA_MICB3_DISCH_SHIFT 2 /* MICB3_DISCH */
2146 #define ARIZONA_MICB3_DISCH_WIDTH 1 /* MICB3_DISCH */
2147 #define ARIZONA_MICB3_BYPASS 0x0002 /* MICB3_BYPASS */
2148 #define ARIZONA_MICB3_BYPASS_MASK 0x0002 /* MICB3_BYPASS */
2149 #define ARIZONA_MICB3_BYPASS_SHIFT 1 /* MICB3_BYPASS */
2150 #define ARIZONA_MICB3_BYPASS_WIDTH 1 /* MICB3_BYPASS */
2151 #define ARIZONA_MICB3_ENA 0x0001 /* MICB3_ENA */
2152 #define ARIZONA_MICB3_ENA_MASK 0x0001 /* MICB3_ENA */
2153 #define ARIZONA_MICB3_ENA_SHIFT 0 /* MICB3_ENA */
2154 #define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */
2155
2156 /*
2157 * R659 (0x293) - Accessory Detect Mode 1
2158 */
2159 #define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
2160 #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */
2161 #define ARIZONA_ACCDET_SRC_SHIFT 13 /* ACCDET_SRC */
2162 #define ARIZONA_ACCDET_SRC_WIDTH 1 /* ACCDET_SRC */
2163 #define ARIZONA_ACCDET_MODE_MASK 0x0003 /* ACCDET_MODE - [1:0] */
2164 #define ARIZONA_ACCDET_MODE_SHIFT 0 /* ACCDET_MODE - [1:0] */
2165 #define ARIZONA_ACCDET_MODE_WIDTH 2 /* ACCDET_MODE - [1:0] */
2166
2167 /*
2168 * R667 (0x29B) - Headphone Detect 1
2169 */
2170 #define ARIZONA_HP_IMPEDANCE_RANGE_MASK 0x0600 /* HP_IMPEDANCE_RANGE - [10:9] */
2171 #define ARIZONA_HP_IMPEDANCE_RANGE_SHIFT 9 /* HP_IMPEDANCE_RANGE - [10:9] */
2172 #define ARIZONA_HP_IMPEDANCE_RANGE_WIDTH 2 /* HP_IMPEDANCE_RANGE - [10:9] */
2173 #define ARIZONA_HP_STEP_SIZE 0x0100 /* HP_STEP_SIZE */
2174 #define ARIZONA_HP_STEP_SIZE_MASK 0x0100 /* HP_STEP_SIZE */
2175 #define ARIZONA_HP_STEP_SIZE_SHIFT 8 /* HP_STEP_SIZE */
2176 #define ARIZONA_HP_STEP_SIZE_WIDTH 1 /* HP_STEP_SIZE */
2177 #define ARIZONA_HP_HOLDTIME_MASK 0x00E0 /* HP_HOLDTIME - [7:5] */
2178 #define ARIZONA_HP_HOLDTIME_SHIFT 5 /* HP_HOLDTIME - [7:5] */
2179 #define ARIZONA_HP_HOLDTIME_WIDTH 3 /* HP_HOLDTIME - [7:5] */
2180 #define ARIZONA_HP_CLK_DIV_MASK 0x0018 /* HP_CLK_DIV - [4:3] */
2181 #define ARIZONA_HP_CLK_DIV_SHIFT 3 /* HP_CLK_DIV - [4:3] */
2182 #define ARIZONA_HP_CLK_DIV_WIDTH 2 /* HP_CLK_DIV - [4:3] */
2183 #define ARIZONA_HP_IDAC_STEER 0x0004 /* HP_IDAC_STEER */
2184 #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */
2185 #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */
2186 #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */
2187 #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */
2188 #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */
2189 #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */
2190 #define ARIZONA_HP_RATE_WIDTH 1 /* HP_RATE */
2191 #define ARIZONA_HP_POLL 0x0001 /* HP_POLL */
2192 #define ARIZONA_HP_POLL_MASK 0x0001 /* HP_POLL */
2193 #define ARIZONA_HP_POLL_SHIFT 0 /* HP_POLL */
2194 #define ARIZONA_HP_POLL_WIDTH 1 /* HP_POLL */
2195
2196 /*
2197 * R668 (0x29C) - Headphone Detect 2
2198 */
2199 #define ARIZONA_HP_DONE 0x0080 /* HP_DONE */
2200 #define ARIZONA_HP_DONE_MASK 0x0080 /* HP_DONE */
2201 #define ARIZONA_HP_DONE_SHIFT 7 /* HP_DONE */
2202 #define ARIZONA_HP_DONE_WIDTH 1 /* HP_DONE */
2203 #define ARIZONA_HP_LVL_MASK 0x007F /* HP_LVL - [6:0] */
2204 #define ARIZONA_HP_LVL_SHIFT 0 /* HP_LVL - [6:0] */
2205 #define ARIZONA_HP_LVL_WIDTH 7 /* HP_LVL - [6:0] */
2206
2207 #define ARIZONA_HP_DONE_B 0x8000 /* HP_DONE */
2208 #define ARIZONA_HP_DONE_B_MASK 0x8000 /* HP_DONE */
2209 #define ARIZONA_HP_DONE_B_SHIFT 15 /* HP_DONE */
2210 #define ARIZONA_HP_DONE_B_WIDTH 1 /* HP_DONE */
2211 #define ARIZONA_HP_LVL_B_MASK 0x7FFF /* HP_LVL - [14:0] */
2212 #define ARIZONA_HP_LVL_B_SHIFT 0 /* HP_LVL - [14:0] */
2213 #define ARIZONA_HP_LVL_B_WIDTH 15 /* HP_LVL - [14:0] */
2214
2215 /*
2216 * R674 (0x2A2) - MICD clamp control
2217 */
2218 #define ARIZONA_MICD_CLAMP_MODE_MASK 0x000F /* MICD_CLAMP_MODE - [3:0] */
2219 #define ARIZONA_MICD_CLAMP_MODE_SHIFT 0 /* MICD_CLAMP_MODE - [3:0] */
2220 #define ARIZONA_MICD_CLAMP_MODE_WIDTH 4 /* MICD_CLAMP_MODE - [3:0] */
2221
2222 /*
2223 * R675 (0x2A3) - Mic Detect 1
2224 */
2225 #define ARIZONA_MICD_BIAS_STARTTIME_MASK 0xF000 /* MICD_BIAS_STARTTIME - [15:12] */
2226 #define ARIZONA_MICD_BIAS_STARTTIME_SHIFT 12 /* MICD_BIAS_STARTTIME - [15:12] */
2227 #define ARIZONA_MICD_BIAS_STARTTIME_WIDTH 4 /* MICD_BIAS_STARTTIME - [15:12] */
2228 #define ARIZONA_MICD_RATE_MASK 0x0F00 /* MICD_RATE - [11:8] */
2229 #define ARIZONA_MICD_RATE_SHIFT 8 /* MICD_RATE - [11:8] */
2230 #define ARIZONA_MICD_RATE_WIDTH 4 /* MICD_RATE - [11:8] */
2231 #define ARIZONA_MICD_BIAS_SRC_MASK 0x0030 /* MICD_BIAS_SRC - [5:4] */
2232 #define ARIZONA_MICD_BIAS_SRC_SHIFT 4 /* MICD_BIAS_SRC - [5:4] */
2233 #define ARIZONA_MICD_BIAS_SRC_WIDTH 2 /* MICD_BIAS_SRC - [5:4] */
2234 #define ARIZONA_MICD_DBTIME 0x0002 /* MICD_DBTIME */
2235 #define ARIZONA_MICD_DBTIME_MASK 0x0002 /* MICD_DBTIME */
2236 #define ARIZONA_MICD_DBTIME_SHIFT 1 /* MICD_DBTIME */
2237 #define ARIZONA_MICD_DBTIME_WIDTH 1 /* MICD_DBTIME */
2238 #define ARIZONA_MICD_ENA 0x0001 /* MICD_ENA */
2239 #define ARIZONA_MICD_ENA_MASK 0x0001 /* MICD_ENA */
2240 #define ARIZONA_MICD_ENA_SHIFT 0 /* MICD_ENA */
2241 #define ARIZONA_MICD_ENA_WIDTH 1 /* MICD_ENA */
2242
2243 /*
2244 * R676 (0x2A4) - Mic Detect 2
2245 */
2246 #define ARIZONA_MICD_LVL_SEL_MASK 0x00FF /* MICD_LVL_SEL - [7:0] */
2247 #define ARIZONA_MICD_LVL_SEL_SHIFT 0 /* MICD_LVL_SEL - [7:0] */
2248 #define ARIZONA_MICD_LVL_SEL_WIDTH 8 /* MICD_LVL_SEL - [7:0] */
2249
2250 /*
2251 * R677 (0x2A5) - Mic Detect 3
2252 */
2253 #define ARIZONA_MICD_LVL_0 0x0004 /* MICD_LVL - [2] */
2254 #define ARIZONA_MICD_LVL_1 0x0008 /* MICD_LVL - [3] */
2255 #define ARIZONA_MICD_LVL_2 0x0010 /* MICD_LVL - [4] */
2256 #define ARIZONA_MICD_LVL_3 0x0020 /* MICD_LVL - [5] */
2257 #define ARIZONA_MICD_LVL_4 0x0040 /* MICD_LVL - [6] */
2258 #define ARIZONA_MICD_LVL_5 0x0080 /* MICD_LVL - [7] */
2259 #define ARIZONA_MICD_LVL_6 0x0100 /* MICD_LVL - [8] */
2260 #define ARIZONA_MICD_LVL_7 0x0200 /* MICD_LVL - [9] */
2261 #define ARIZONA_MICD_LVL_8 0x0400 /* MICD_LVL - [10] */
2262 #define ARIZONA_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */
2263 #define ARIZONA_MICD_LVL_SHIFT 2 /* MICD_LVL - [10:2] */
2264 #define ARIZONA_MICD_LVL_WIDTH 9 /* MICD_LVL - [10:2] */
2265 #define ARIZONA_MICD_VALID 0x0002 /* MICD_VALID */
2266 #define ARIZONA_MICD_VALID_MASK 0x0002 /* MICD_VALID */
2267 #define ARIZONA_MICD_VALID_SHIFT 1 /* MICD_VALID */
2268 #define ARIZONA_MICD_VALID_WIDTH 1 /* MICD_VALID */
2269 #define ARIZONA_MICD_STS 0x0001 /* MICD_STS */
2270 #define ARIZONA_MICD_STS_MASK 0x0001 /* MICD_STS */
2271 #define ARIZONA_MICD_STS_SHIFT 0 /* MICD_STS */
2272 #define ARIZONA_MICD_STS_WIDTH 1 /* MICD_STS */
2273
2274 /*
2275 * R707 (0x2C3) - Mic noise mix control 1
2276 */
2277 #define ARIZONA_MICMUTE_RATE_MASK 0x7800 /* MICMUTE_RATE - [14:11] */
2278 #define ARIZONA_MICMUTE_RATE_SHIFT 11 /* MICMUTE_RATE - [14:11] */
2279 #define ARIZONA_MICMUTE_RATE_WIDTH 4 /* MICMUTE_RATE - [14:11] */
2280 #define ARIZONA_MICMUTE_MIX_ENA 0x0040 /* MICMUTE_MIX_ENA */
2281 #define ARIZONA_MICMUTE_MIX_ENA_MASK 0x0040 /* MICMUTE_MIX_ENA */
2282 #define ARIZONA_MICMUTE_MIX_ENA_SHIFT 6 /* MICMUTE_MIX_ENA */
2283 #define ARIZONA_MICMUTE_MIX_ENA_WIDTH 1 /* MICMUTE_MIX_ENA */
2284
2285 /*
2286 * R715 (0x2CB) - Isolation control
2287 */
2288 #define ARIZONA_ISOLATE_DCVDD1 0x0001 /* ISOLATE_DCVDD1 */
2289 #define ARIZONA_ISOLATE_DCVDD1_MASK 0x0001 /* ISOLATE_DCVDD1 */
2290 #define ARIZONA_ISOLATE_DCVDD1_SHIFT 0 /* ISOLATE_DCVDD1 */
2291 #define ARIZONA_ISOLATE_DCVDD1_WIDTH 1 /* ISOLATE_DCVDD1 */
2292
2293 /*
2294 * R723 (0x2D3) - Jack detect analogue
2295 */
2296 #define ARIZONA_JD2_ENA 0x0002 /* JD2_ENA */
2297 #define ARIZONA_JD2_ENA_MASK 0x0002 /* JD2_ENA */
2298 #define ARIZONA_JD2_ENA_SHIFT 1 /* JD2_ENA */
2299 #define ARIZONA_JD2_ENA_WIDTH 1 /* JD2_ENA */
2300 #define ARIZONA_JD1_ENA 0x0001 /* JD1_ENA */
2301 #define ARIZONA_JD1_ENA_MASK 0x0001 /* JD1_ENA */
2302 #define ARIZONA_JD1_ENA_SHIFT 0 /* JD1_ENA */
2303 #define ARIZONA_JD1_ENA_WIDTH 1 /* JD1_ENA */
2304
2305 /*
2306 * R768 (0x300) - Input Enables
2307 */
2308 #define ARIZONA_IN4L_ENA 0x0080 /* IN4L_ENA */
2309 #define ARIZONA_IN4L_ENA_MASK 0x0080 /* IN4L_ENA */
2310 #define ARIZONA_IN4L_ENA_SHIFT 7 /* IN4L_ENA */
2311 #define ARIZONA_IN4L_ENA_WIDTH 1 /* IN4L_ENA */
2312 #define ARIZONA_IN4R_ENA 0x0040 /* IN4R_ENA */
2313 #define ARIZONA_IN4R_ENA_MASK 0x0040 /* IN4R_ENA */
2314 #define ARIZONA_IN4R_ENA_SHIFT 6 /* IN4R_ENA */
2315 #define ARIZONA_IN4R_ENA_WIDTH 1 /* IN4R_ENA */
2316 #define ARIZONA_IN3L_ENA 0x0020 /* IN3L_ENA */
2317 #define ARIZONA_IN3L_ENA_MASK 0x0020 /* IN3L_ENA */
2318 #define ARIZONA_IN3L_ENA_SHIFT 5 /* IN3L_ENA */
2319 #define ARIZONA_IN3L_ENA_WIDTH 1 /* IN3L_ENA */
2320 #define ARIZONA_IN3R_ENA 0x0010 /* IN3R_ENA */
2321 #define ARIZONA_IN3R_ENA_MASK 0x0010 /* IN3R_ENA */
2322 #define ARIZONA_IN3R_ENA_SHIFT 4 /* IN3R_ENA */
2323 #define ARIZONA_IN3R_ENA_WIDTH 1 /* IN3R_ENA */
2324 #define ARIZONA_IN2L_ENA 0x0008 /* IN2L_ENA */
2325 #define ARIZONA_IN2L_ENA_MASK 0x0008 /* IN2L_ENA */
2326 #define ARIZONA_IN2L_ENA_SHIFT 3 /* IN2L_ENA */
2327 #define ARIZONA_IN2L_ENA_WIDTH 1 /* IN2L_ENA */
2328 #define ARIZONA_IN2R_ENA 0x0004 /* IN2R_ENA */
2329 #define ARIZONA_IN2R_ENA_MASK 0x0004 /* IN2R_ENA */
2330 #define ARIZONA_IN2R_ENA_SHIFT 2 /* IN2R_ENA */
2331 #define ARIZONA_IN2R_ENA_WIDTH 1 /* IN2R_ENA */
2332 #define ARIZONA_IN1L_ENA 0x0002 /* IN1L_ENA */
2333 #define ARIZONA_IN1L_ENA_MASK 0x0002 /* IN1L_ENA */
2334 #define ARIZONA_IN1L_ENA_SHIFT 1 /* IN1L_ENA */
2335 #define ARIZONA_IN1L_ENA_WIDTH 1 /* IN1L_ENA */
2336 #define ARIZONA_IN1R_ENA 0x0001 /* IN1R_ENA */
2337 #define ARIZONA_IN1R_ENA_MASK 0x0001 /* IN1R_ENA */
2338 #define ARIZONA_IN1R_ENA_SHIFT 0 /* IN1R_ENA */
2339 #define ARIZONA_IN1R_ENA_WIDTH 1 /* IN1R_ENA */
2340
2341 /*
2342 * R776 (0x308) - Input Rate
2343 */
2344 #define ARIZONA_IN_RATE_MASK 0x7800 /* IN_RATE - [14:11] */
2345 #define ARIZONA_IN_RATE_SHIFT 11 /* IN_RATE - [14:11] */
2346 #define ARIZONA_IN_RATE_WIDTH 4 /* IN_RATE - [14:11] */
2347
2348 /*
2349 * R777 (0x309) - Input Volume Ramp
2350 */
2351 #define ARIZONA_IN_VD_RAMP_MASK 0x0070 /* IN_VD_RAMP - [6:4] */
2352 #define ARIZONA_IN_VD_RAMP_SHIFT 4 /* IN_VD_RAMP - [6:4] */
2353 #define ARIZONA_IN_VD_RAMP_WIDTH 3 /* IN_VD_RAMP - [6:4] */
2354 #define ARIZONA_IN_VI_RAMP_MASK 0x0007 /* IN_VI_RAMP - [2:0] */
2355 #define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */
2356 #define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */
2357
2358 /*
2359 * R780 (0x30C) - HPF Control
2360 */
2361 #define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */
2362 #define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */
2363 #define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */
2364
2365 /*
2366 * R784 (0x310) - IN1L Control
2367 */
2368 #define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */
2369 #define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */
2370 #define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */
2371 #define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */
2372 #define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */
2373 #define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */
2374 #define ARIZONA_IN1_DMIC_SUP_MASK 0x1800 /* IN1_DMIC_SUP - [12:11] */
2375 #define ARIZONA_IN1_DMIC_SUP_SHIFT 11 /* IN1_DMIC_SUP - [12:11] */
2376 #define ARIZONA_IN1_DMIC_SUP_WIDTH 2 /* IN1_DMIC_SUP - [12:11] */
2377 #define ARIZONA_IN1_MODE_MASK 0x0600 /* IN1_MODE - [10:9] */
2378 #define ARIZONA_IN1_MODE_SHIFT 9 /* IN1_MODE - [10:9] */
2379 #define ARIZONA_IN1_MODE_WIDTH 2 /* IN1_MODE - [10:9] */
2380 #define ARIZONA_IN1L_PGA_VOL_MASK 0x00FE /* IN1L_PGA_VOL - [7:1] */
2381 #define ARIZONA_IN1L_PGA_VOL_SHIFT 1 /* IN1L_PGA_VOL - [7:1] */
2382 #define ARIZONA_IN1L_PGA_VOL_WIDTH 7 /* IN1L_PGA_VOL - [7:1] */
2383
2384 /*
2385 * R785 (0x311) - ADC Digital Volume 1L
2386 */
2387 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2388 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2389 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2390 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2391 #define ARIZONA_IN1L_MUTE 0x0100 /* IN1L_MUTE */
2392 #define ARIZONA_IN1L_MUTE_MASK 0x0100 /* IN1L_MUTE */
2393 #define ARIZONA_IN1L_MUTE_SHIFT 8 /* IN1L_MUTE */
2394 #define ARIZONA_IN1L_MUTE_WIDTH 1 /* IN1L_MUTE */
2395 #define ARIZONA_IN1L_DIG_VOL_MASK 0x00FF /* IN1L_DIG_VOL - [7:0] */
2396 #define ARIZONA_IN1L_DIG_VOL_SHIFT 0 /* IN1L_DIG_VOL - [7:0] */
2397 #define ARIZONA_IN1L_DIG_VOL_WIDTH 8 /* IN1L_DIG_VOL - [7:0] */
2398
2399 /*
2400 * R786 (0x312) - DMIC1L Control
2401 */
2402 #define ARIZONA_IN1_DMICL_DLY_MASK 0x003F /* IN1_DMICL_DLY - [5:0] */
2403 #define ARIZONA_IN1_DMICL_DLY_SHIFT 0 /* IN1_DMICL_DLY - [5:0] */
2404 #define ARIZONA_IN1_DMICL_DLY_WIDTH 6 /* IN1_DMICL_DLY - [5:0] */
2405
2406 /*
2407 * R788 (0x314) - IN1R Control
2408 */
2409 #define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */
2410 #define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */
2411 #define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */
2412 #define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */
2413 #define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */
2414 #define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */
2415
2416 /*
2417 * R789 (0x315) - ADC Digital Volume 1R
2418 */
2419 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2420 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2421 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2422 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2423 #define ARIZONA_IN1R_MUTE 0x0100 /* IN1R_MUTE */
2424 #define ARIZONA_IN1R_MUTE_MASK 0x0100 /* IN1R_MUTE */
2425 #define ARIZONA_IN1R_MUTE_SHIFT 8 /* IN1R_MUTE */
2426 #define ARIZONA_IN1R_MUTE_WIDTH 1 /* IN1R_MUTE */
2427 #define ARIZONA_IN1R_DIG_VOL_MASK 0x00FF /* IN1R_DIG_VOL - [7:0] */
2428 #define ARIZONA_IN1R_DIG_VOL_SHIFT 0 /* IN1R_DIG_VOL - [7:0] */
2429 #define ARIZONA_IN1R_DIG_VOL_WIDTH 8 /* IN1R_DIG_VOL - [7:0] */
2430
2431 /*
2432 * R790 (0x316) - DMIC1R Control
2433 */
2434 #define ARIZONA_IN1_DMICR_DLY_MASK 0x003F /* IN1_DMICR_DLY - [5:0] */
2435 #define ARIZONA_IN1_DMICR_DLY_SHIFT 0 /* IN1_DMICR_DLY - [5:0] */
2436 #define ARIZONA_IN1_DMICR_DLY_WIDTH 6 /* IN1_DMICR_DLY - [5:0] */
2437
2438 /*
2439 * R792 (0x318) - IN2L Control
2440 */
2441 #define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */
2442 #define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */
2443 #define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */
2444 #define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */
2445 #define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */
2446 #define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */
2447 #define ARIZONA_IN2_DMIC_SUP_MASK 0x1800 /* IN2_DMIC_SUP - [12:11] */
2448 #define ARIZONA_IN2_DMIC_SUP_SHIFT 11 /* IN2_DMIC_SUP - [12:11] */
2449 #define ARIZONA_IN2_DMIC_SUP_WIDTH 2 /* IN2_DMIC_SUP - [12:11] */
2450 #define ARIZONA_IN2_MODE_MASK 0x0600 /* IN2_MODE - [10:9] */
2451 #define ARIZONA_IN2_MODE_SHIFT 9 /* IN2_MODE - [10:9] */
2452 #define ARIZONA_IN2_MODE_WIDTH 2 /* IN2_MODE - [10:9] */
2453 #define ARIZONA_IN2L_PGA_VOL_MASK 0x00FE /* IN2L_PGA_VOL - [7:1] */
2454 #define ARIZONA_IN2L_PGA_VOL_SHIFT 1 /* IN2L_PGA_VOL - [7:1] */
2455 #define ARIZONA_IN2L_PGA_VOL_WIDTH 7 /* IN2L_PGA_VOL - [7:1] */
2456
2457 /*
2458 * R793 (0x319) - ADC Digital Volume 2L
2459 */
2460 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2461 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2462 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2463 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2464 #define ARIZONA_IN2L_MUTE 0x0100 /* IN2L_MUTE */
2465 #define ARIZONA_IN2L_MUTE_MASK 0x0100 /* IN2L_MUTE */
2466 #define ARIZONA_IN2L_MUTE_SHIFT 8 /* IN2L_MUTE */
2467 #define ARIZONA_IN2L_MUTE_WIDTH 1 /* IN2L_MUTE */
2468 #define ARIZONA_IN2L_DIG_VOL_MASK 0x00FF /* IN2L_DIG_VOL - [7:0] */
2469 #define ARIZONA_IN2L_DIG_VOL_SHIFT 0 /* IN2L_DIG_VOL - [7:0] */
2470 #define ARIZONA_IN2L_DIG_VOL_WIDTH 8 /* IN2L_DIG_VOL - [7:0] */
2471
2472 /*
2473 * R794 (0x31A) - DMIC2L Control
2474 */
2475 #define ARIZONA_IN2_DMICL_DLY_MASK 0x003F /* IN2_DMICL_DLY - [5:0] */
2476 #define ARIZONA_IN2_DMICL_DLY_SHIFT 0 /* IN2_DMICL_DLY - [5:0] */
2477 #define ARIZONA_IN2_DMICL_DLY_WIDTH 6 /* IN2_DMICL_DLY - [5:0] */
2478
2479 /*
2480 * R796 (0x31C) - IN2R Control
2481 */
2482 #define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */
2483 #define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */
2484 #define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */
2485 #define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */
2486 #define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */
2487 #define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */
2488
2489 /*
2490 * R797 (0x31D) - ADC Digital Volume 2R
2491 */
2492 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2493 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2494 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2495 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2496 #define ARIZONA_IN2R_MUTE 0x0100 /* IN2R_MUTE */
2497 #define ARIZONA_IN2R_MUTE_MASK 0x0100 /* IN2R_MUTE */
2498 #define ARIZONA_IN2R_MUTE_SHIFT 8 /* IN2R_MUTE */
2499 #define ARIZONA_IN2R_MUTE_WIDTH 1 /* IN2R_MUTE */
2500 #define ARIZONA_IN2R_DIG_VOL_MASK 0x00FF /* IN2R_DIG_VOL - [7:0] */
2501 #define ARIZONA_IN2R_DIG_VOL_SHIFT 0 /* IN2R_DIG_VOL - [7:0] */
2502 #define ARIZONA_IN2R_DIG_VOL_WIDTH 8 /* IN2R_DIG_VOL - [7:0] */
2503
2504 /*
2505 * R798 (0x31E) - DMIC2R Control
2506 */
2507 #define ARIZONA_IN2_DMICR_DLY_MASK 0x003F /* IN2_DMICR_DLY - [5:0] */
2508 #define ARIZONA_IN2_DMICR_DLY_SHIFT 0 /* IN2_DMICR_DLY - [5:0] */
2509 #define ARIZONA_IN2_DMICR_DLY_WIDTH 6 /* IN2_DMICR_DLY - [5:0] */
2510
2511 /*
2512 * R800 (0x320) - IN3L Control
2513 */
2514 #define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */
2515 #define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */
2516 #define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */
2517 #define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */
2518 #define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */
2519 #define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */
2520 #define ARIZONA_IN3_DMIC_SUP_MASK 0x1800 /* IN3_DMIC_SUP - [12:11] */
2521 #define ARIZONA_IN3_DMIC_SUP_SHIFT 11 /* IN3_DMIC_SUP - [12:11] */
2522 #define ARIZONA_IN3_DMIC_SUP_WIDTH 2 /* IN3_DMIC_SUP - [12:11] */
2523 #define ARIZONA_IN3_MODE_MASK 0x0600 /* IN3_MODE - [10:9] */
2524 #define ARIZONA_IN3_MODE_SHIFT 9 /* IN3_MODE - [10:9] */
2525 #define ARIZONA_IN3_MODE_WIDTH 2 /* IN3_MODE - [10:9] */
2526 #define ARIZONA_IN3L_PGA_VOL_MASK 0x00FE /* IN3L_PGA_VOL - [7:1] */
2527 #define ARIZONA_IN3L_PGA_VOL_SHIFT 1 /* IN3L_PGA_VOL - [7:1] */
2528 #define ARIZONA_IN3L_PGA_VOL_WIDTH 7 /* IN3L_PGA_VOL - [7:1] */
2529
2530 /*
2531 * R801 (0x321) - ADC Digital Volume 3L
2532 */
2533 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2534 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2535 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2536 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2537 #define ARIZONA_IN3L_MUTE 0x0100 /* IN3L_MUTE */
2538 #define ARIZONA_IN3L_MUTE_MASK 0x0100 /* IN3L_MUTE */
2539 #define ARIZONA_IN3L_MUTE_SHIFT 8 /* IN3L_MUTE */
2540 #define ARIZONA_IN3L_MUTE_WIDTH 1 /* IN3L_MUTE */
2541 #define ARIZONA_IN3L_DIG_VOL_MASK 0x00FF /* IN3L_DIG_VOL - [7:0] */
2542 #define ARIZONA_IN3L_DIG_VOL_SHIFT 0 /* IN3L_DIG_VOL - [7:0] */
2543 #define ARIZONA_IN3L_DIG_VOL_WIDTH 8 /* IN3L_DIG_VOL - [7:0] */
2544
2545 /*
2546 * R802 (0x322) - DMIC3L Control
2547 */
2548 #define ARIZONA_IN3_DMICL_DLY_MASK 0x003F /* IN3_DMICL_DLY - [5:0] */
2549 #define ARIZONA_IN3_DMICL_DLY_SHIFT 0 /* IN3_DMICL_DLY - [5:0] */
2550 #define ARIZONA_IN3_DMICL_DLY_WIDTH 6 /* IN3_DMICL_DLY - [5:0] */
2551
2552 /*
2553 * R804 (0x324) - IN3R Control
2554 */
2555 #define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */
2556 #define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */
2557 #define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */
2558 #define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */
2559 #define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */
2560 #define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */
2561
2562 /*
2563 * R805 (0x325) - ADC Digital Volume 3R
2564 */
2565 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2566 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2567 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2568 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2569 #define ARIZONA_IN3R_MUTE 0x0100 /* IN3R_MUTE */
2570 #define ARIZONA_IN3R_MUTE_MASK 0x0100 /* IN3R_MUTE */
2571 #define ARIZONA_IN3R_MUTE_SHIFT 8 /* IN3R_MUTE */
2572 #define ARIZONA_IN3R_MUTE_WIDTH 1 /* IN3R_MUTE */
2573 #define ARIZONA_IN3R_DIG_VOL_MASK 0x00FF /* IN3R_DIG_VOL - [7:0] */
2574 #define ARIZONA_IN3R_DIG_VOL_SHIFT 0 /* IN3R_DIG_VOL - [7:0] */
2575 #define ARIZONA_IN3R_DIG_VOL_WIDTH 8 /* IN3R_DIG_VOL - [7:0] */
2576
2577 /*
2578 * R806 (0x326) - DMIC3R Control
2579 */
2580 #define ARIZONA_IN3_DMICR_DLY_MASK 0x003F /* IN3_DMICR_DLY - [5:0] */
2581 #define ARIZONA_IN3_DMICR_DLY_SHIFT 0 /* IN3_DMICR_DLY - [5:0] */
2582 #define ARIZONA_IN3_DMICR_DLY_WIDTH 6 /* IN3_DMICR_DLY - [5:0] */
2583
2584 /*
2585 * R808 (0x328) - IN4 Control
2586 */
2587 #define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */
2588 #define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */
2589 #define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */
2590 #define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */
2591 #define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */
2592 #define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */
2593 #define ARIZONA_IN4_DMIC_SUP_MASK 0x1800 /* IN4_DMIC_SUP - [12:11] */
2594 #define ARIZONA_IN4_DMIC_SUP_SHIFT 11 /* IN4_DMIC_SUP - [12:11] */
2595 #define ARIZONA_IN4_DMIC_SUP_WIDTH 2 /* IN4_DMIC_SUP - [12:11] */
2596
2597 /*
2598 * R809 (0x329) - ADC Digital Volume 4L
2599 */
2600 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2601 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2602 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2603 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2604 #define ARIZONA_IN4L_MUTE 0x0100 /* IN4L_MUTE */
2605 #define ARIZONA_IN4L_MUTE_MASK 0x0100 /* IN4L_MUTE */
2606 #define ARIZONA_IN4L_MUTE_SHIFT 8 /* IN4L_MUTE */
2607 #define ARIZONA_IN4L_MUTE_WIDTH 1 /* IN4L_MUTE */
2608 #define ARIZONA_IN4L_DIG_VOL_MASK 0x00FF /* IN4L_DIG_VOL - [7:0] */
2609 #define ARIZONA_IN4L_DIG_VOL_SHIFT 0 /* IN4L_DIG_VOL - [7:0] */
2610 #define ARIZONA_IN4L_DIG_VOL_WIDTH 8 /* IN4L_DIG_VOL - [7:0] */
2611
2612 /*
2613 * R810 (0x32A) - DMIC4L Control
2614 */
2615 #define ARIZONA_IN4L_DMIC_DLY_MASK 0x003F /* IN4L_DMIC_DLY - [5:0] */
2616 #define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */
2617 #define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */
2618
2619 /*
2620 * R812 (0x32C) - IN4R Control
2621 */
2622 #define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */
2623 #define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */
2624 #define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */
2625
2626 /*
2627 * R813 (0x32D) - ADC Digital Volume 4R
2628 */
2629 #define ARIZONA_IN_VU 0x0200 /* IN_VU */
2630 #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
2631 #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
2632 #define ARIZONA_IN_VU_WIDTH 1 /* IN_VU */
2633 #define ARIZONA_IN4R_MUTE 0x0100 /* IN4R_MUTE */
2634 #define ARIZONA_IN4R_MUTE_MASK 0x0100 /* IN4R_MUTE */
2635 #define ARIZONA_IN4R_MUTE_SHIFT 8 /* IN4R_MUTE */
2636 #define ARIZONA_IN4R_MUTE_WIDTH 1 /* IN4R_MUTE */
2637 #define ARIZONA_IN4R_DIG_VOL_MASK 0x00FF /* IN4R_DIG_VOL - [7:0] */
2638 #define ARIZONA_IN4R_DIG_VOL_SHIFT 0 /* IN4R_DIG_VOL - [7:0] */
2639 #define ARIZONA_IN4R_DIG_VOL_WIDTH 8 /* IN4R_DIG_VOL - [7:0] */
2640
2641 /*
2642 * R814 (0x32E) - DMIC4R Control
2643 */
2644 #define ARIZONA_IN4R_DMIC_DLY_MASK 0x003F /* IN4R_DMIC_DLY - [5:0] */
2645 #define ARIZONA_IN4R_DMIC_DLY_SHIFT 0 /* IN4R_DMIC_DLY - [5:0] */
2646 #define ARIZONA_IN4R_DMIC_DLY_WIDTH 6 /* IN4R_DMIC_DLY - [5:0] */
2647
2648 /*
2649 * R1024 (0x400) - Output Enables 1
2650 */
2651 #define ARIZONA_OUT6L_ENA 0x0800 /* OUT6L_ENA */
2652 #define ARIZONA_OUT6L_ENA_MASK 0x0800 /* OUT6L_ENA */
2653 #define ARIZONA_OUT6L_ENA_SHIFT 11 /* OUT6L_ENA */
2654 #define ARIZONA_OUT6L_ENA_WIDTH 1 /* OUT6L_ENA */
2655 #define ARIZONA_OUT6R_ENA 0x0400 /* OUT6R_ENA */
2656 #define ARIZONA_OUT6R_ENA_MASK 0x0400 /* OUT6R_ENA */
2657 #define ARIZONA_OUT6R_ENA_SHIFT 10 /* OUT6R_ENA */
2658 #define ARIZONA_OUT6R_ENA_WIDTH 1 /* OUT6R_ENA */
2659 #define ARIZONA_OUT5L_ENA 0x0200 /* OUT5L_ENA */
2660 #define ARIZONA_OUT5L_ENA_MASK 0x0200 /* OUT5L_ENA */
2661 #define ARIZONA_OUT5L_ENA_SHIFT 9 /* OUT5L_ENA */
2662 #define ARIZONA_OUT5L_ENA_WIDTH 1 /* OUT5L_ENA */
2663 #define ARIZONA_OUT5R_ENA 0x0100 /* OUT5R_ENA */
2664 #define ARIZONA_OUT5R_ENA_MASK 0x0100 /* OUT5R_ENA */
2665 #define ARIZONA_OUT5R_ENA_SHIFT 8 /* OUT5R_ENA */
2666 #define ARIZONA_OUT5R_ENA_WIDTH 1 /* OUT5R_ENA */
2667 #define ARIZONA_OUT4L_ENA 0x0080 /* OUT4L_ENA */
2668 #define ARIZONA_OUT4L_ENA_MASK 0x0080 /* OUT4L_ENA */
2669 #define ARIZONA_OUT4L_ENA_SHIFT 7 /* OUT4L_ENA */
2670 #define ARIZONA_OUT4L_ENA_WIDTH 1 /* OUT4L_ENA */
2671 #define ARIZONA_OUT4R_ENA 0x0040 /* OUT4R_ENA */
2672 #define ARIZONA_OUT4R_ENA_MASK 0x0040 /* OUT4R_ENA */
2673 #define ARIZONA_OUT4R_ENA_SHIFT 6 /* OUT4R_ENA */
2674 #define ARIZONA_OUT4R_ENA_WIDTH 1 /* OUT4R_ENA */
2675 #define ARIZONA_OUT3L_ENA 0x0020 /* OUT3L_ENA */
2676 #define ARIZONA_OUT3L_ENA_MASK 0x0020 /* OUT3L_ENA */
2677 #define ARIZONA_OUT3L_ENA_SHIFT 5 /* OUT3L_ENA */
2678 #define ARIZONA_OUT3L_ENA_WIDTH 1 /* OUT3L_ENA */
2679 #define ARIZONA_OUT3R_ENA 0x0010 /* OUT3R_ENA */
2680 #define ARIZONA_OUT3R_ENA_MASK 0x0010 /* OUT3R_ENA */
2681 #define ARIZONA_OUT3R_ENA_SHIFT 4 /* OUT3R_ENA */
2682 #define ARIZONA_OUT3R_ENA_WIDTH 1 /* OUT3R_ENA */
2683 #define ARIZONA_OUT2L_ENA 0x0008 /* OUT2L_ENA */
2684 #define ARIZONA_OUT2L_ENA_MASK 0x0008 /* OUT2L_ENA */
2685 #define ARIZONA_OUT2L_ENA_SHIFT 3 /* OUT2L_ENA */
2686 #define ARIZONA_OUT2L_ENA_WIDTH 1 /* OUT2L_ENA */
2687 #define ARIZONA_OUT2R_ENA 0x0004 /* OUT2R_ENA */
2688 #define ARIZONA_OUT2R_ENA_MASK 0x0004 /* OUT2R_ENA */
2689 #define ARIZONA_OUT2R_ENA_SHIFT 2 /* OUT2R_ENA */
2690 #define ARIZONA_OUT2R_ENA_WIDTH 1 /* OUT2R_ENA */
2691 #define ARIZONA_OUT1L_ENA 0x0002 /* OUT1L_ENA */
2692 #define ARIZONA_OUT1L_ENA_MASK 0x0002 /* OUT1L_ENA */
2693 #define ARIZONA_OUT1L_ENA_SHIFT 1 /* OUT1L_ENA */
2694 #define ARIZONA_OUT1L_ENA_WIDTH 1 /* OUT1L_ENA */
2695 #define ARIZONA_OUT1R_ENA 0x0001 /* OUT1R_ENA */
2696 #define ARIZONA_OUT1R_ENA_MASK 0x0001 /* OUT1R_ENA */
2697 #define ARIZONA_OUT1R_ENA_SHIFT 0 /* OUT1R_ENA */
2698 #define ARIZONA_OUT1R_ENA_WIDTH 1 /* OUT1R_ENA */
2699
2700 /*
2701 * R1025 (0x401) - Output Status 1
2702 */
2703 #define ARIZONA_OUT6L_ENA_STS 0x0800 /* OUT6L_ENA_STS */
2704 #define ARIZONA_OUT6L_ENA_STS_MASK 0x0800 /* OUT6L_ENA_STS */
2705 #define ARIZONA_OUT6L_ENA_STS_SHIFT 11 /* OUT6L_ENA_STS */
2706 #define ARIZONA_OUT6L_ENA_STS_WIDTH 1 /* OUT6L_ENA_STS */
2707 #define ARIZONA_OUT6R_ENA_STS 0x0400 /* OUT6R_ENA_STS */
2708 #define ARIZONA_OUT6R_ENA_STS_MASK 0x0400 /* OUT6R_ENA_STS */
2709 #define ARIZONA_OUT6R_ENA_STS_SHIFT 10 /* OUT6R_ENA_STS */
2710 #define ARIZONA_OUT6R_ENA_STS_WIDTH 1 /* OUT6R_ENA_STS */
2711 #define ARIZONA_OUT5L_ENA_STS 0x0200 /* OUT5L_ENA_STS */
2712 #define ARIZONA_OUT5L_ENA_STS_MASK 0x0200 /* OUT5L_ENA_STS */
2713 #define ARIZONA_OUT5L_ENA_STS_SHIFT 9 /* OUT5L_ENA_STS */
2714 #define ARIZONA_OUT5L_ENA_STS_WIDTH 1 /* OUT5L_ENA_STS */
2715 #define ARIZONA_OUT5R_ENA_STS 0x0100 /* OUT5R_ENA_STS */
2716 #define ARIZONA_OUT5R_ENA_STS_MASK 0x0100 /* OUT5R_ENA_STS */
2717 #define ARIZONA_OUT5R_ENA_STS_SHIFT 8 /* OUT5R_ENA_STS */
2718 #define ARIZONA_OUT5R_ENA_STS_WIDTH 1 /* OUT5R_ENA_STS */
2719 #define ARIZONA_OUT4L_ENA_STS 0x0080 /* OUT4L_ENA_STS */
2720 #define ARIZONA_OUT4L_ENA_STS_MASK 0x0080 /* OUT4L_ENA_STS */
2721 #define ARIZONA_OUT4L_ENA_STS_SHIFT 7 /* OUT4L_ENA_STS */
2722 #define ARIZONA_OUT4L_ENA_STS_WIDTH 1 /* OUT4L_ENA_STS */
2723 #define ARIZONA_OUT4R_ENA_STS 0x0040 /* OUT4R_ENA_STS */
2724 #define ARIZONA_OUT4R_ENA_STS_MASK 0x0040 /* OUT4R_ENA_STS */
2725 #define ARIZONA_OUT4R_ENA_STS_SHIFT 6 /* OUT4R_ENA_STS */
2726 #define ARIZONA_OUT4R_ENA_STS_WIDTH 1 /* OUT4R_ENA_STS */
2727
2728 /*
2729 * R1032 (0x408) - Output Rate 1
2730 */
2731 #define ARIZONA_OUT_RATE_MASK 0x7800 /* OUT_RATE - [14:11] */
2732 #define ARIZONA_OUT_RATE_SHIFT 11 /* OUT_RATE - [14:11] */
2733 #define ARIZONA_OUT_RATE_WIDTH 4 /* OUT_RATE - [14:11] */
2734
2735 /*
2736 * R1033 (0x409) - Output Volume Ramp
2737 */
2738 #define ARIZONA_OUT_VD_RAMP_MASK 0x0070 /* OUT_VD_RAMP - [6:4] */
2739 #define ARIZONA_OUT_VD_RAMP_SHIFT 4 /* OUT_VD_RAMP - [6:4] */
2740 #define ARIZONA_OUT_VD_RAMP_WIDTH 3 /* OUT_VD_RAMP - [6:4] */
2741 #define ARIZONA_OUT_VI_RAMP_MASK 0x0007 /* OUT_VI_RAMP - [2:0] */
2742 #define ARIZONA_OUT_VI_RAMP_SHIFT 0 /* OUT_VI_RAMP - [2:0] */
2743 #define ARIZONA_OUT_VI_RAMP_WIDTH 3 /* OUT_VI_RAMP - [2:0] */
2744
2745 /*
2746 * R1040 (0x410) - Output Path Config 1L
2747 */
2748 #define ARIZONA_OUT1_LP_MODE 0x8000 /* OUT1_LP_MODE */
2749 #define ARIZONA_OUT1_LP_MODE_MASK 0x8000 /* OUT1_LP_MODE */
2750 #define ARIZONA_OUT1_LP_MODE_SHIFT 15 /* OUT1_LP_MODE */
2751 #define ARIZONA_OUT1_LP_MODE_WIDTH 1 /* OUT1_LP_MODE */
2752 #define ARIZONA_OUT1_OSR 0x2000 /* OUT1_OSR */
2753 #define ARIZONA_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */
2754 #define ARIZONA_OUT1_OSR_SHIFT 13 /* OUT1_OSR */
2755 #define ARIZONA_OUT1_OSR_WIDTH 1 /* OUT1_OSR */
2756 #define ARIZONA_OUT1_MONO 0x1000 /* OUT1_MONO */
2757 #define ARIZONA_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */
2758 #define ARIZONA_OUT1_MONO_SHIFT 12 /* OUT1_MONO */
2759 #define ARIZONA_OUT1_MONO_WIDTH 1 /* OUT1_MONO */
2760 #define ARIZONA_OUT1L_ANC_SRC_MASK 0x0C00 /* OUT1L_ANC_SRC - [11:10] */
2761 #define ARIZONA_OUT1L_ANC_SRC_SHIFT 10 /* OUT1L_ANC_SRC - [11:10] */
2762 #define ARIZONA_OUT1L_ANC_SRC_WIDTH 2 /* OUT1L_ANC_SRC - [11:10] */
2763 #define ARIZONA_OUT1L_PGA_VOL_MASK 0x00FE /* OUT1L_PGA_VOL - [7:1] */
2764 #define ARIZONA_OUT1L_PGA_VOL_SHIFT 1 /* OUT1L_PGA_VOL - [7:1] */
2765 #define ARIZONA_OUT1L_PGA_VOL_WIDTH 7 /* OUT1L_PGA_VOL - [7:1] */
2766
2767 /*
2768 * R1041 (0x411) - DAC Digital Volume 1L
2769 */
2770 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2771 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2772 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2773 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2774 #define ARIZONA_OUT1L_MUTE 0x0100 /* OUT1L_MUTE */
2775 #define ARIZONA_OUT1L_MUTE_MASK 0x0100 /* OUT1L_MUTE */
2776 #define ARIZONA_OUT1L_MUTE_SHIFT 8 /* OUT1L_MUTE */
2777 #define ARIZONA_OUT1L_MUTE_WIDTH 1 /* OUT1L_MUTE */
2778 #define ARIZONA_OUT1L_VOL_MASK 0x00FF /* OUT1L_VOL - [7:0] */
2779 #define ARIZONA_OUT1L_VOL_SHIFT 0 /* OUT1L_VOL - [7:0] */
2780 #define ARIZONA_OUT1L_VOL_WIDTH 8 /* OUT1L_VOL - [7:0] */
2781
2782 /*
2783 * R1042 (0x412) - DAC Volume Limit 1L
2784 */
2785 #define ARIZONA_OUT1L_VOL_LIM_MASK 0x00FF /* OUT1L_VOL_LIM - [7:0] */
2786 #define ARIZONA_OUT1L_VOL_LIM_SHIFT 0 /* OUT1L_VOL_LIM - [7:0] */
2787 #define ARIZONA_OUT1L_VOL_LIM_WIDTH 8 /* OUT1L_VOL_LIM - [7:0] */
2788
2789 /*
2790 * R1043 (0x413) - Noise Gate Select 1L
2791 */
2792 #define ARIZONA_OUT1L_NGATE_SRC_MASK 0x0FFF /* OUT1L_NGATE_SRC - [11:0] */
2793 #define ARIZONA_OUT1L_NGATE_SRC_SHIFT 0 /* OUT1L_NGATE_SRC - [11:0] */
2794 #define ARIZONA_OUT1L_NGATE_SRC_WIDTH 12 /* OUT1L_NGATE_SRC - [11:0] */
2795
2796 /*
2797 * R1044 (0x414) - Output Path Config 1R
2798 */
2799 #define ARIZONA_OUT1R_ANC_SRC_MASK 0x0C00 /* OUT1R_ANC_SRC - [11:10] */
2800 #define ARIZONA_OUT1R_ANC_SRC_SHIFT 10 /* OUT1R_ANC_SRC - [11:10] */
2801 #define ARIZONA_OUT1R_ANC_SRC_WIDTH 2 /* OUT1R_ANC_SRC - [11:10] */
2802 #define ARIZONA_OUT1R_PGA_VOL_MASK 0x00FE /* OUT1R_PGA_VOL - [7:1] */
2803 #define ARIZONA_OUT1R_PGA_VOL_SHIFT 1 /* OUT1R_PGA_VOL - [7:1] */
2804 #define ARIZONA_OUT1R_PGA_VOL_WIDTH 7 /* OUT1R_PGA_VOL - [7:1] */
2805
2806 /*
2807 * R1045 (0x415) - DAC Digital Volume 1R
2808 */
2809 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2810 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2811 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2812 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2813 #define ARIZONA_OUT1R_MUTE 0x0100 /* OUT1R_MUTE */
2814 #define ARIZONA_OUT1R_MUTE_MASK 0x0100 /* OUT1R_MUTE */
2815 #define ARIZONA_OUT1R_MUTE_SHIFT 8 /* OUT1R_MUTE */
2816 #define ARIZONA_OUT1R_MUTE_WIDTH 1 /* OUT1R_MUTE */
2817 #define ARIZONA_OUT1R_VOL_MASK 0x00FF /* OUT1R_VOL - [7:0] */
2818 #define ARIZONA_OUT1R_VOL_SHIFT 0 /* OUT1R_VOL - [7:0] */
2819 #define ARIZONA_OUT1R_VOL_WIDTH 8 /* OUT1R_VOL - [7:0] */
2820
2821 /*
2822 * R1046 (0x416) - DAC Volume Limit 1R
2823 */
2824 #define ARIZONA_OUT1R_VOL_LIM_MASK 0x00FF /* OUT1R_VOL_LIM - [7:0] */
2825 #define ARIZONA_OUT1R_VOL_LIM_SHIFT 0 /* OUT1R_VOL_LIM - [7:0] */
2826 #define ARIZONA_OUT1R_VOL_LIM_WIDTH 8 /* OUT1R_VOL_LIM - [7:0] */
2827
2828 /*
2829 * R1047 (0x417) - Noise Gate Select 1R
2830 */
2831 #define ARIZONA_OUT1R_NGATE_SRC_MASK 0x0FFF /* OUT1R_NGATE_SRC - [11:0] */
2832 #define ARIZONA_OUT1R_NGATE_SRC_SHIFT 0 /* OUT1R_NGATE_SRC - [11:0] */
2833 #define ARIZONA_OUT1R_NGATE_SRC_WIDTH 12 /* OUT1R_NGATE_SRC - [11:0] */
2834
2835 /*
2836 * R1048 (0x418) - Output Path Config 2L
2837 */
2838 #define ARIZONA_OUT2_LP_MODE 0x8000 /* OUT2_LP_MODE */
2839 #define ARIZONA_OUT2_LP_MODE_MASK 0x8000 /* OUT2_LP_MODE */
2840 #define ARIZONA_OUT2_LP_MODE_SHIFT 15 /* OUT2_LP_MODE */
2841 #define ARIZONA_OUT2_LP_MODE_WIDTH 1 /* OUT2_LP_MODE */
2842 #define ARIZONA_OUT2_OSR 0x2000 /* OUT2_OSR */
2843 #define ARIZONA_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */
2844 #define ARIZONA_OUT2_OSR_SHIFT 13 /* OUT2_OSR */
2845 #define ARIZONA_OUT2_OSR_WIDTH 1 /* OUT2_OSR */
2846 #define ARIZONA_OUT2_MONO 0x1000 /* OUT2_MONO */
2847 #define ARIZONA_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */
2848 #define ARIZONA_OUT2_MONO_SHIFT 12 /* OUT2_MONO */
2849 #define ARIZONA_OUT2_MONO_WIDTH 1 /* OUT2_MONO */
2850 #define ARIZONA_OUT2L_ANC_SRC_MASK 0x0C00 /* OUT2L_ANC_SRC - [11:10] */
2851 #define ARIZONA_OUT2L_ANC_SRC_SHIFT 10 /* OUT2L_ANC_SRC - [11:10] */
2852 #define ARIZONA_OUT2L_ANC_SRC_WIDTH 2 /* OUT2L_ANC_SRC - [11:10] */
2853 #define ARIZONA_OUT2L_PGA_VOL_MASK 0x00FE /* OUT2L_PGA_VOL - [7:1] */
2854 #define ARIZONA_OUT2L_PGA_VOL_SHIFT 1 /* OUT2L_PGA_VOL - [7:1] */
2855 #define ARIZONA_OUT2L_PGA_VOL_WIDTH 7 /* OUT2L_PGA_VOL - [7:1] */
2856
2857 /*
2858 * R1049 (0x419) - DAC Digital Volume 2L
2859 */
2860 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2861 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2862 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2863 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2864 #define ARIZONA_OUT2L_MUTE 0x0100 /* OUT2L_MUTE */
2865 #define ARIZONA_OUT2L_MUTE_MASK 0x0100 /* OUT2L_MUTE */
2866 #define ARIZONA_OUT2L_MUTE_SHIFT 8 /* OUT2L_MUTE */
2867 #define ARIZONA_OUT2L_MUTE_WIDTH 1 /* OUT2L_MUTE */
2868 #define ARIZONA_OUT2L_VOL_MASK 0x00FF /* OUT2L_VOL - [7:0] */
2869 #define ARIZONA_OUT2L_VOL_SHIFT 0 /* OUT2L_VOL - [7:0] */
2870 #define ARIZONA_OUT2L_VOL_WIDTH 8 /* OUT2L_VOL - [7:0] */
2871
2872 /*
2873 * R1050 (0x41A) - DAC Volume Limit 2L
2874 */
2875 #define ARIZONA_OUT2L_VOL_LIM_MASK 0x00FF /* OUT2L_VOL_LIM - [7:0] */
2876 #define ARIZONA_OUT2L_VOL_LIM_SHIFT 0 /* OUT2L_VOL_LIM - [7:0] */
2877 #define ARIZONA_OUT2L_VOL_LIM_WIDTH 8 /* OUT2L_VOL_LIM - [7:0] */
2878
2879 /*
2880 * R1051 (0x41B) - Noise Gate Select 2L
2881 */
2882 #define ARIZONA_OUT2L_NGATE_SRC_MASK 0x0FFF /* OUT2L_NGATE_SRC - [11:0] */
2883 #define ARIZONA_OUT2L_NGATE_SRC_SHIFT 0 /* OUT2L_NGATE_SRC - [11:0] */
2884 #define ARIZONA_OUT2L_NGATE_SRC_WIDTH 12 /* OUT2L_NGATE_SRC - [11:0] */
2885
2886 /*
2887 * R1052 (0x41C) - Output Path Config 2R
2888 */
2889 #define ARIZONA_OUT2R_ANC_SRC_MASK 0x0C00 /* OUT2R_ANC_SRC - [11:10] */
2890 #define ARIZONA_OUT2R_ANC_SRC_SHIFT 10 /* OUT2R_ANC_SRC - [11:10] */
2891 #define ARIZONA_OUT2R_ANC_SRC_WIDTH 2 /* OUT2R_ANC_SRC - [11:10] */
2892 #define ARIZONA_OUT2R_PGA_VOL_MASK 0x00FE /* OUT2R_PGA_VOL - [7:1] */
2893 #define ARIZONA_OUT2R_PGA_VOL_SHIFT 1 /* OUT2R_PGA_VOL - [7:1] */
2894 #define ARIZONA_OUT2R_PGA_VOL_WIDTH 7 /* OUT2R_PGA_VOL - [7:1] */
2895
2896 /*
2897 * R1053 (0x41D) - DAC Digital Volume 2R
2898 */
2899 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2900 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2901 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2902 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2903 #define ARIZONA_OUT2R_MUTE 0x0100 /* OUT2R_MUTE */
2904 #define ARIZONA_OUT2R_MUTE_MASK 0x0100 /* OUT2R_MUTE */
2905 #define ARIZONA_OUT2R_MUTE_SHIFT 8 /* OUT2R_MUTE */
2906 #define ARIZONA_OUT2R_MUTE_WIDTH 1 /* OUT2R_MUTE */
2907 #define ARIZONA_OUT2R_VOL_MASK 0x00FF /* OUT2R_VOL - [7:0] */
2908 #define ARIZONA_OUT2R_VOL_SHIFT 0 /* OUT2R_VOL - [7:0] */
2909 #define ARIZONA_OUT2R_VOL_WIDTH 8 /* OUT2R_VOL - [7:0] */
2910
2911 /*
2912 * R1054 (0x41E) - DAC Volume Limit 2R
2913 */
2914 #define ARIZONA_OUT2R_VOL_LIM_MASK 0x00FF /* OUT2R_VOL_LIM - [7:0] */
2915 #define ARIZONA_OUT2R_VOL_LIM_SHIFT 0 /* OUT2R_VOL_LIM - [7:0] */
2916 #define ARIZONA_OUT2R_VOL_LIM_WIDTH 8 /* OUT2R_VOL_LIM - [7:0] */
2917
2918 /*
2919 * R1055 (0x41F) - Noise Gate Select 2R
2920 */
2921 #define ARIZONA_OUT2R_NGATE_SRC_MASK 0x0FFF /* OUT2R_NGATE_SRC - [11:0] */
2922 #define ARIZONA_OUT2R_NGATE_SRC_SHIFT 0 /* OUT2R_NGATE_SRC - [11:0] */
2923 #define ARIZONA_OUT2R_NGATE_SRC_WIDTH 12 /* OUT2R_NGATE_SRC - [11:0] */
2924
2925 /*
2926 * R1056 (0x420) - Output Path Config 3L
2927 */
2928 #define ARIZONA_OUT3_LP_MODE 0x8000 /* OUT3_LP_MODE */
2929 #define ARIZONA_OUT3_LP_MODE_MASK 0x8000 /* OUT3_LP_MODE */
2930 #define ARIZONA_OUT3_LP_MODE_SHIFT 15 /* OUT3_LP_MODE */
2931 #define ARIZONA_OUT3_LP_MODE_WIDTH 1 /* OUT3_LP_MODE */
2932 #define ARIZONA_OUT3_OSR 0x2000 /* OUT3_OSR */
2933 #define ARIZONA_OUT3_OSR_MASK 0x2000 /* OUT3_OSR */
2934 #define ARIZONA_OUT3_OSR_SHIFT 13 /* OUT3_OSR */
2935 #define ARIZONA_OUT3_OSR_WIDTH 1 /* OUT3_OSR */
2936 #define ARIZONA_OUT3_MONO 0x1000 /* OUT3_MONO */
2937 #define ARIZONA_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */
2938 #define ARIZONA_OUT3_MONO_SHIFT 12 /* OUT3_MONO */
2939 #define ARIZONA_OUT3_MONO_WIDTH 1 /* OUT3_MONO */
2940 #define ARIZONA_OUT3L_ANC_SRC_MASK 0x0C00 /* OUT3L_ANC_SRC - [11:10] */
2941 #define ARIZONA_OUT3L_ANC_SRC_SHIFT 10 /* OUT3L_ANC_SRC - [11:10] */
2942 #define ARIZONA_OUT3L_ANC_SRC_WIDTH 2 /* OUT3L_ANC_SRC - [11:10] */
2943 #define ARIZONA_OUT3L_PGA_VOL_MASK 0x00FE /* OUT3L_PGA_VOL - [7:1] */
2944 #define ARIZONA_OUT3L_PGA_VOL_SHIFT 1 /* OUT3L_PGA_VOL - [7:1] */
2945 #define ARIZONA_OUT3L_PGA_VOL_WIDTH 7 /* OUT3L_PGA_VOL - [7:1] */
2946
2947 /*
2948 * R1057 (0x421) - DAC Digital Volume 3L
2949 */
2950 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2951 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2952 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2953 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2954 #define ARIZONA_OUT3L_MUTE 0x0100 /* OUT3L_MUTE */
2955 #define ARIZONA_OUT3L_MUTE_MASK 0x0100 /* OUT3L_MUTE */
2956 #define ARIZONA_OUT3L_MUTE_SHIFT 8 /* OUT3L_MUTE */
2957 #define ARIZONA_OUT3L_MUTE_WIDTH 1 /* OUT3L_MUTE */
2958 #define ARIZONA_OUT3L_VOL_MASK 0x00FF /* OUT3L_VOL - [7:0] */
2959 #define ARIZONA_OUT3L_VOL_SHIFT 0 /* OUT3L_VOL - [7:0] */
2960 #define ARIZONA_OUT3L_VOL_WIDTH 8 /* OUT3L_VOL - [7:0] */
2961
2962 /*
2963 * R1058 (0x422) - DAC Volume Limit 3L
2964 */
2965 #define ARIZONA_OUT3L_VOL_LIM_MASK 0x00FF /* OUT3L_VOL_LIM - [7:0] */
2966 #define ARIZONA_OUT3L_VOL_LIM_SHIFT 0 /* OUT3L_VOL_LIM - [7:0] */
2967 #define ARIZONA_OUT3L_VOL_LIM_WIDTH 8 /* OUT3L_VOL_LIM - [7:0] */
2968
2969 /*
2970 * R1059 (0x423) - Noise Gate Select 3L
2971 */
2972 #define ARIZONA_OUT3_NGATE_SRC_MASK 0x0FFF /* OUT3_NGATE_SRC - [11:0] */
2973 #define ARIZONA_OUT3_NGATE_SRC_SHIFT 0 /* OUT3_NGATE_SRC - [11:0] */
2974 #define ARIZONA_OUT3_NGATE_SRC_WIDTH 12 /* OUT3_NGATE_SRC - [11:0] */
2975
2976 /*
2977 * R1060 (0x424) - Output Path Config 3R
2978 */
2979 #define ARIZONA_OUT3R_PGA_VOL_MASK 0x00FE /* OUT3R_PGA_VOL - [7:1] */
2980 #define ARIZONA_OUT3R_PGA_VOL_SHIFT 1 /* OUT3R_PGA_VOL - [7:1] */
2981 #define ARIZONA_OUT3R_PGA_VOL_WIDTH 7 /* OUT3R_PGA_VOL - [7:1] */
2982
2983 /*
2984 * R1061 (0x425) - DAC Digital Volume 3R
2985 */
2986 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
2987 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
2988 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
2989 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
2990 #define ARIZONA_OUT3R_MUTE 0x0100 /* OUT3R_MUTE */
2991 #define ARIZONA_OUT3R_MUTE_MASK 0x0100 /* OUT3R_MUTE */
2992 #define ARIZONA_OUT3R_MUTE_SHIFT 8 /* OUT3R_MUTE */
2993 #define ARIZONA_OUT3R_MUTE_WIDTH 1 /* OUT3R_MUTE */
2994 #define ARIZONA_OUT3R_VOL_MASK 0x00FF /* OUT3R_VOL - [7:0] */
2995 #define ARIZONA_OUT3R_VOL_SHIFT 0 /* OUT3R_VOL - [7:0] */
2996 #define ARIZONA_OUT3R_VOL_WIDTH 8 /* OUT3R_VOL - [7:0] */
2997
2998 /*
2999 * R1062 (0x426) - DAC Volume Limit 3R
3000 */
3001 #define ARIZONA_OUT3R_ANC_SRC_MASK 0x0C00 /* OUT3R_ANC_SRC - [11:10] */
3002 #define ARIZONA_OUT3R_ANC_SRC_SHIFT 10 /* OUT3R_ANC_SRC - [11:10] */
3003 #define ARIZONA_OUT3R_ANC_SRC_WIDTH 2 /* OUT3R_ANC_SRC - [11:10] */
3004 #define ARIZONA_OUT3R_VOL_LIM_MASK 0x00FF /* OUT3R_VOL_LIM - [7:0] */
3005 #define ARIZONA_OUT3R_VOL_LIM_SHIFT 0 /* OUT3R_VOL_LIM - [7:0] */
3006 #define ARIZONA_OUT3R_VOL_LIM_WIDTH 8 /* OUT3R_VOL_LIM - [7:0] */
3007
3008 /*
3009 * R1064 (0x428) - Output Path Config 4L
3010 */
3011 #define ARIZONA_OUT4_OSR 0x2000 /* OUT4_OSR */
3012 #define ARIZONA_OUT4_OSR_MASK 0x2000 /* OUT4_OSR */
3013 #define ARIZONA_OUT4_OSR_SHIFT 13 /* OUT4_OSR */
3014 #define ARIZONA_OUT4_OSR_WIDTH 1 /* OUT4_OSR */
3015 #define ARIZONA_OUT4L_ANC_SRC_MASK 0x0C00 /* OUT4L_ANC_SRC - [11:10] */
3016 #define ARIZONA_OUT4L_ANC_SRC_SHIFT 10 /* OUT4L_ANC_SRC - [11:10] */
3017 #define ARIZONA_OUT4L_ANC_SRC_WIDTH 2 /* OUT4L_ANC_SRC - [11:10] */
3018
3019 /*
3020 * R1065 (0x429) - DAC Digital Volume 4L
3021 */
3022 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3023 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3024 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3025 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3026 #define ARIZONA_OUT4L_MUTE 0x0100 /* OUT4L_MUTE */
3027 #define ARIZONA_OUT4L_MUTE_MASK 0x0100 /* OUT4L_MUTE */
3028 #define ARIZONA_OUT4L_MUTE_SHIFT 8 /* OUT4L_MUTE */
3029 #define ARIZONA_OUT4L_MUTE_WIDTH 1 /* OUT4L_MUTE */
3030 #define ARIZONA_OUT4L_VOL_MASK 0x00FF /* OUT4L_VOL - [7:0] */
3031 #define ARIZONA_OUT4L_VOL_SHIFT 0 /* OUT4L_VOL - [7:0] */
3032 #define ARIZONA_OUT4L_VOL_WIDTH 8 /* OUT4L_VOL - [7:0] */
3033
3034 /*
3035 * R1066 (0x42A) - Out Volume 4L
3036 */
3037 #define ARIZONA_OUT4L_VOL_LIM_MASK 0x00FF /* OUT4L_VOL_LIM - [7:0] */
3038 #define ARIZONA_OUT4L_VOL_LIM_SHIFT 0 /* OUT4L_VOL_LIM - [7:0] */
3039 #define ARIZONA_OUT4L_VOL_LIM_WIDTH 8 /* OUT4L_VOL_LIM - [7:0] */
3040
3041 /*
3042 * R1067 (0x42B) - Noise Gate Select 4L
3043 */
3044 #define ARIZONA_OUT4L_NGATE_SRC_MASK 0x0FFF /* OUT4L_NGATE_SRC - [11:0] */
3045 #define ARIZONA_OUT4L_NGATE_SRC_SHIFT 0 /* OUT4L_NGATE_SRC - [11:0] */
3046 #define ARIZONA_OUT4L_NGATE_SRC_WIDTH 12 /* OUT4L_NGATE_SRC - [11:0] */
3047
3048 /*
3049 * R1068 (0x42C) - Output Path Config 4R
3050 */
3051 #define ARIZONA_OUT4R_ANC_SRC_MASK 0x0C00 /* OUT4R_ANC_SRC - [11:10] */
3052 #define ARIZONA_OUT4R_ANC_SRC_SHIFT 10 /* OUT4R_ANC_SRC - [11:10] */
3053 #define ARIZONA_OUT4R_ANC_SRC_WIDTH 2 /* OUT4R_ANC_SRC - [11:10] */
3054
3055 /*
3056 * R1069 (0x42D) - DAC Digital Volume 4R
3057 */
3058 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3059 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3060 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3061 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3062 #define ARIZONA_OUT4R_MUTE 0x0100 /* OUT4R_MUTE */
3063 #define ARIZONA_OUT4R_MUTE_MASK 0x0100 /* OUT4R_MUTE */
3064 #define ARIZONA_OUT4R_MUTE_SHIFT 8 /* OUT4R_MUTE */
3065 #define ARIZONA_OUT4R_MUTE_WIDTH 1 /* OUT4R_MUTE */
3066 #define ARIZONA_OUT4R_VOL_MASK 0x00FF /* OUT4R_VOL - [7:0] */
3067 #define ARIZONA_OUT4R_VOL_SHIFT 0 /* OUT4R_VOL - [7:0] */
3068 #define ARIZONA_OUT4R_VOL_WIDTH 8 /* OUT4R_VOL - [7:0] */
3069
3070 /*
3071 * R1070 (0x42E) - Out Volume 4R
3072 */
3073 #define ARIZONA_OUT4R_VOL_LIM_MASK 0x00FF /* OUT4R_VOL_LIM - [7:0] */
3074 #define ARIZONA_OUT4R_VOL_LIM_SHIFT 0 /* OUT4R_VOL_LIM - [7:0] */
3075 #define ARIZONA_OUT4R_VOL_LIM_WIDTH 8 /* OUT4R_VOL_LIM - [7:0] */
3076
3077 /*
3078 * R1071 (0x42F) - Noise Gate Select 4R
3079 */
3080 #define ARIZONA_OUT4R_NGATE_SRC_MASK 0x0FFF /* OUT4R_NGATE_SRC - [11:0] */
3081 #define ARIZONA_OUT4R_NGATE_SRC_SHIFT 0 /* OUT4R_NGATE_SRC - [11:0] */
3082 #define ARIZONA_OUT4R_NGATE_SRC_WIDTH 12 /* OUT4R_NGATE_SRC - [11:0] */
3083
3084 /*
3085 * R1072 (0x430) - Output Path Config 5L
3086 */
3087 #define ARIZONA_OUT5_OSR 0x2000 /* OUT5_OSR */
3088 #define ARIZONA_OUT5_OSR_MASK 0x2000 /* OUT5_OSR */
3089 #define ARIZONA_OUT5_OSR_SHIFT 13 /* OUT5_OSR */
3090 #define ARIZONA_OUT5_OSR_WIDTH 1 /* OUT5_OSR */
3091 #define ARIZONA_OUT5L_ANC_SRC_MASK 0x0C00 /* OUT5L_ANC_SRC - [11:10] */
3092 #define ARIZONA_OUT5L_ANC_SRC_SHIFT 10 /* OUT5L_ANC_SRC - [11:10] */
3093 #define ARIZONA_OUT5L_ANC_SRC_WIDTH 2 /* OUT5L_ANC_SRC - [11:10] */
3094
3095 /*
3096 * R1073 (0x431) - DAC Digital Volume 5L
3097 */
3098 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3099 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3100 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3101 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3102 #define ARIZONA_OUT5L_MUTE 0x0100 /* OUT5L_MUTE */
3103 #define ARIZONA_OUT5L_MUTE_MASK 0x0100 /* OUT5L_MUTE */
3104 #define ARIZONA_OUT5L_MUTE_SHIFT 8 /* OUT5L_MUTE */
3105 #define ARIZONA_OUT5L_MUTE_WIDTH 1 /* OUT5L_MUTE */
3106 #define ARIZONA_OUT5L_VOL_MASK 0x00FF /* OUT5L_VOL - [7:0] */
3107 #define ARIZONA_OUT5L_VOL_SHIFT 0 /* OUT5L_VOL - [7:0] */
3108 #define ARIZONA_OUT5L_VOL_WIDTH 8 /* OUT5L_VOL - [7:0] */
3109
3110 /*
3111 * R1074 (0x432) - DAC Volume Limit 5L
3112 */
3113 #define ARIZONA_OUT5L_VOL_LIM_MASK 0x00FF /* OUT5L_VOL_LIM - [7:0] */
3114 #define ARIZONA_OUT5L_VOL_LIM_SHIFT 0 /* OUT5L_VOL_LIM - [7:0] */
3115 #define ARIZONA_OUT5L_VOL_LIM_WIDTH 8 /* OUT5L_VOL_LIM - [7:0] */
3116
3117 /*
3118 * R1075 (0x433) - Noise Gate Select 5L
3119 */
3120 #define ARIZONA_OUT5L_NGATE_SRC_MASK 0x0FFF /* OUT5L_NGATE_SRC - [11:0] */
3121 #define ARIZONA_OUT5L_NGATE_SRC_SHIFT 0 /* OUT5L_NGATE_SRC - [11:0] */
3122 #define ARIZONA_OUT5L_NGATE_SRC_WIDTH 12 /* OUT5L_NGATE_SRC - [11:0] */
3123
3124 /*
3125 * R1076 (0x434) - Output Path Config 5R
3126 */
3127 #define ARIZONA_OUT5R_ANC_SRC_MASK 0x0C00 /* OUT5R_ANC_SRC - [11:10] */
3128 #define ARIZONA_OUT5R_ANC_SRC_SHIFT 10 /* OUT5R_ANC_SRC - [11:10] */
3129 #define ARIZONA_OUT5R_ANC_SRC_WIDTH 2 /* OUT5R_ANC_SRC - [11:10] */
3130
3131 /*
3132 * R1077 (0x435) - DAC Digital Volume 5R
3133 */
3134 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3135 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3136 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3137 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3138 #define ARIZONA_OUT5R_MUTE 0x0100 /* OUT5R_MUTE */
3139 #define ARIZONA_OUT5R_MUTE_MASK 0x0100 /* OUT5R_MUTE */
3140 #define ARIZONA_OUT5R_MUTE_SHIFT 8 /* OUT5R_MUTE */
3141 #define ARIZONA_OUT5R_MUTE_WIDTH 1 /* OUT5R_MUTE */
3142 #define ARIZONA_OUT5R_VOL_MASK 0x00FF /* OUT5R_VOL - [7:0] */
3143 #define ARIZONA_OUT5R_VOL_SHIFT 0 /* OUT5R_VOL - [7:0] */
3144 #define ARIZONA_OUT5R_VOL_WIDTH 8 /* OUT5R_VOL - [7:0] */
3145
3146 /*
3147 * R1078 (0x436) - DAC Volume Limit 5R
3148 */
3149 #define ARIZONA_OUT5R_VOL_LIM_MASK 0x00FF /* OUT5R_VOL_LIM - [7:0] */
3150 #define ARIZONA_OUT5R_VOL_LIM_SHIFT 0 /* OUT5R_VOL_LIM - [7:0] */
3151 #define ARIZONA_OUT5R_VOL_LIM_WIDTH 8 /* OUT5R_VOL_LIM - [7:0] */
3152
3153 /*
3154 * R1079 (0x437) - Noise Gate Select 5R
3155 */
3156 #define ARIZONA_OUT5R_NGATE_SRC_MASK 0x0FFF /* OUT5R_NGATE_SRC - [11:0] */
3157 #define ARIZONA_OUT5R_NGATE_SRC_SHIFT 0 /* OUT5R_NGATE_SRC - [11:0] */
3158 #define ARIZONA_OUT5R_NGATE_SRC_WIDTH 12 /* OUT5R_NGATE_SRC - [11:0] */
3159
3160 /*
3161 * R1080 (0x438) - Output Path Config 6L
3162 */
3163 #define ARIZONA_OUT6_OSR 0x2000 /* OUT6_OSR */
3164 #define ARIZONA_OUT6_OSR_MASK 0x2000 /* OUT6_OSR */
3165 #define ARIZONA_OUT6_OSR_SHIFT 13 /* OUT6_OSR */
3166 #define ARIZONA_OUT6_OSR_WIDTH 1 /* OUT6_OSR */
3167 #define ARIZONA_OUT6L_ANC_SRC_MASK 0x0C00 /* OUT6L_ANC_SRC - [11:10] */
3168 #define ARIZONA_OUT6L_ANC_SRC_SHIFT 10 /* OUT6L_ANC_SRC - [11:10] */
3169 #define ARIZONA_OUT6L_ANC_SRC_WIDTH 2 /* OUT6L_ANC_SRC - [11:10] */
3170
3171 /*
3172 * R1081 (0x439) - DAC Digital Volume 6L
3173 */
3174 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3175 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3176 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3177 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3178 #define ARIZONA_OUT6L_MUTE 0x0100 /* OUT6L_MUTE */
3179 #define ARIZONA_OUT6L_MUTE_MASK 0x0100 /* OUT6L_MUTE */
3180 #define ARIZONA_OUT6L_MUTE_SHIFT 8 /* OUT6L_MUTE */
3181 #define ARIZONA_OUT6L_MUTE_WIDTH 1 /* OUT6L_MUTE */
3182 #define ARIZONA_OUT6L_VOL_MASK 0x00FF /* OUT6L_VOL - [7:0] */
3183 #define ARIZONA_OUT6L_VOL_SHIFT 0 /* OUT6L_VOL - [7:0] */
3184 #define ARIZONA_OUT6L_VOL_WIDTH 8 /* OUT6L_VOL - [7:0] */
3185
3186 /*
3187 * R1082 (0x43A) - DAC Volume Limit 6L
3188 */
3189 #define ARIZONA_OUT6L_VOL_LIM_MASK 0x00FF /* OUT6L_VOL_LIM - [7:0] */
3190 #define ARIZONA_OUT6L_VOL_LIM_SHIFT 0 /* OUT6L_VOL_LIM - [7:0] */
3191 #define ARIZONA_OUT6L_VOL_LIM_WIDTH 8 /* OUT6L_VOL_LIM - [7:0] */
3192
3193 /*
3194 * R1083 (0x43B) - Noise Gate Select 6L
3195 */
3196 #define ARIZONA_OUT6L_NGATE_SRC_MASK 0x0FFF /* OUT6L_NGATE_SRC - [11:0] */
3197 #define ARIZONA_OUT6L_NGATE_SRC_SHIFT 0 /* OUT6L_NGATE_SRC - [11:0] */
3198 #define ARIZONA_OUT6L_NGATE_SRC_WIDTH 12 /* OUT6L_NGATE_SRC - [11:0] */
3199
3200 /*
3201 * R1084 (0x43C) - Output Path Config 6R
3202 */
3203 #define ARIZONA_OUT6R_ANC_SRC_MASK 0x0C00 /* OUT6R_ANC_SRC - [11:10] */
3204 #define ARIZONA_OUT6R_ANC_SRC_SHIFT 10 /* OUT6R_ANC_SRC - [11:10] */
3205 #define ARIZONA_OUT6R_ANC_SRC_WIDTH 2 /* OUT6R_ANC_SRC - [11:10] */
3206
3207 /*
3208 * R1085 (0x43D) - DAC Digital Volume 6R
3209 */
3210 #define ARIZONA_OUT_VU 0x0200 /* OUT_VU */
3211 #define ARIZONA_OUT_VU_MASK 0x0200 /* OUT_VU */
3212 #define ARIZONA_OUT_VU_SHIFT 9 /* OUT_VU */
3213 #define ARIZONA_OUT_VU_WIDTH 1 /* OUT_VU */
3214 #define ARIZONA_OUT6R_MUTE 0x0100 /* OUT6R_MUTE */
3215 #define ARIZONA_OUT6R_MUTE_MASK 0x0100 /* OUT6R_MUTE */
3216 #define ARIZONA_OUT6R_MUTE_SHIFT 8 /* OUT6R_MUTE */
3217 #define ARIZONA_OUT6R_MUTE_WIDTH 1 /* OUT6R_MUTE */
3218 #define ARIZONA_OUT6R_VOL_MASK 0x00FF /* OUT6R_VOL - [7:0] */
3219 #define ARIZONA_OUT6R_VOL_SHIFT 0 /* OUT6R_VOL - [7:0] */
3220 #define ARIZONA_OUT6R_VOL_WIDTH 8 /* OUT6R_VOL - [7:0] */
3221
3222 /*
3223 * R1086 (0x43E) - DAC Volume Limit 6R
3224 */
3225 #define ARIZONA_OUT6R_VOL_LIM_MASK 0x00FF /* OUT6R_VOL_LIM - [7:0] */
3226 #define ARIZONA_OUT6R_VOL_LIM_SHIFT 0 /* OUT6R_VOL_LIM - [7:0] */
3227 #define ARIZONA_OUT6R_VOL_LIM_WIDTH 8 /* OUT6R_VOL_LIM - [7:0] */
3228
3229 /*
3230 * R1087 (0x43F) - Noise Gate Select 6R
3231 */
3232 #define ARIZONA_OUT6R_NGATE_SRC_MASK 0x0FFF /* OUT6R_NGATE_SRC - [11:0] */
3233 #define ARIZONA_OUT6R_NGATE_SRC_SHIFT 0 /* OUT6R_NGATE_SRC - [11:0] */
3234 #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */
3235
3236 /*
3237 * R1088 (0x440) - DRE Enable
3238 */
3239 #define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */
3240 #define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */
3241 #define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */
3242 #define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */
3243 #define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */
3244 #define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */
3245 #define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */
3246 #define ARIZONA_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */
3247 #define ARIZONA_DRE2R_ENA 0x0008 /* DRE2R_ENA */
3248 #define ARIZONA_DRE2R_ENA_MASK 0x0008 /* DRE2R_ENA */
3249 #define ARIZONA_DRE2R_ENA_SHIFT 3 /* DRE2R_ENA */
3250 #define ARIZONA_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */
3251 #define ARIZONA_DRE2L_ENA 0x0004 /* DRE2L_ENA */
3252 #define ARIZONA_DRE2L_ENA_MASK 0x0004 /* DRE2L_ENA */
3253 #define ARIZONA_DRE2L_ENA_SHIFT 2 /* DRE2L_ENA */
3254 #define ARIZONA_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */
3255 #define ARIZONA_DRE1R_ENA 0x0002 /* DRE1R_ENA */
3256 #define ARIZONA_DRE1R_ENA_MASK 0x0002 /* DRE1R_ENA */
3257 #define ARIZONA_DRE1R_ENA_SHIFT 1 /* DRE1R_ENA */
3258 #define ARIZONA_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */
3259 #define ARIZONA_DRE1L_ENA 0x0001 /* DRE1L_ENA */
3260 #define ARIZONA_DRE1L_ENA_MASK 0x0001 /* DRE1L_ENA */
3261 #define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */
3262 #define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */
3263
3264 /*
3265 * R1090 (0x442) - DRE Control 2
3266 */
3267 #define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */
3268 #define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */
3269 #define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */
3270
3271 /*
3272 * R1091 (0x443) - DRE Control 3
3273 */
3274 #define ARIZONA_DRE_GAIN_SHIFT_MASK 0xC000 /* DRE_GAIN_SHIFT - [15:14] */
3275 #define ARIZONA_DRE_GAIN_SHIFT_SHIFT 14 /* DRE_GAIN_SHIFT - [15:14] */
3276 #define ARIZONA_DRE_GAIN_SHIFT_WIDTH 2 /* DRE_GAIN_SHIFT - [15:14] */
3277 #define ARIZONA_DRE_LOW_LEVEL_ABS_MASK 0x000F /* LOW_LEVEL_ABS - [3:0] */
3278 #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */
3279 #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */
3280
3281 /*
3282 * R1104 (0x450) - DAC AEC Control 1
3283 */
3284 #define ARIZONA_AEC_LOOPBACK_SRC_MASK 0x003C /* AEC_LOOPBACK_SRC - [5:2] */
3285 #define ARIZONA_AEC_LOOPBACK_SRC_SHIFT 2 /* AEC_LOOPBACK_SRC - [5:2] */
3286 #define ARIZONA_AEC_LOOPBACK_SRC_WIDTH 4 /* AEC_LOOPBACK_SRC - [5:2] */
3287 #define ARIZONA_AEC_ENA_STS 0x0002 /* AEC_ENA_STS */
3288 #define ARIZONA_AEC_ENA_STS_MASK 0x0002 /* AEC_ENA_STS */
3289 #define ARIZONA_AEC_ENA_STS_SHIFT 1 /* AEC_ENA_STS */
3290 #define ARIZONA_AEC_ENA_STS_WIDTH 1 /* AEC_ENA_STS */
3291 #define ARIZONA_AEC_LOOPBACK_ENA 0x0001 /* AEC_LOOPBACK_ENA */
3292 #define ARIZONA_AEC_LOOPBACK_ENA_MASK 0x0001 /* AEC_LOOPBACK_ENA */
3293 #define ARIZONA_AEC_LOOPBACK_ENA_SHIFT 0 /* AEC_LOOPBACK_ENA */
3294 #define ARIZONA_AEC_LOOPBACK_ENA_WIDTH 1 /* AEC_LOOPBACK_ENA */
3295
3296 /*
3297 * R1112 (0x458) - Noise Gate Control
3298 */
3299 #define ARIZONA_NGATE_HOLD_MASK 0x0030 /* NGATE_HOLD - [5:4] */
3300 #define ARIZONA_NGATE_HOLD_SHIFT 4 /* NGATE_HOLD - [5:4] */
3301 #define ARIZONA_NGATE_HOLD_WIDTH 2 /* NGATE_HOLD - [5:4] */
3302 #define ARIZONA_NGATE_THR_MASK 0x000E /* NGATE_THR - [3:1] */
3303 #define ARIZONA_NGATE_THR_SHIFT 1 /* NGATE_THR - [3:1] */
3304 #define ARIZONA_NGATE_THR_WIDTH 3 /* NGATE_THR - [3:1] */
3305 #define ARIZONA_NGATE_ENA 0x0001 /* NGATE_ENA */
3306 #define ARIZONA_NGATE_ENA_MASK 0x0001 /* NGATE_ENA */
3307 #define ARIZONA_NGATE_ENA_SHIFT 0 /* NGATE_ENA */
3308 #define ARIZONA_NGATE_ENA_WIDTH 1 /* NGATE_ENA */
3309
3310 /*
3311 * R1168 (0x490) - PDM SPK1 CTRL 1
3312 */
3313 #define ARIZONA_SPK1R_MUTE 0x2000 /* SPK1R_MUTE */
3314 #define ARIZONA_SPK1R_MUTE_MASK 0x2000 /* SPK1R_MUTE */
3315 #define ARIZONA_SPK1R_MUTE_SHIFT 13 /* SPK1R_MUTE */
3316 #define ARIZONA_SPK1R_MUTE_WIDTH 1 /* SPK1R_MUTE */
3317 #define ARIZONA_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */
3318 #define ARIZONA_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */
3319 #define ARIZONA_SPK1L_MUTE_SHIFT 12 /* SPK1L_MUTE */
3320 #define ARIZONA_SPK1L_MUTE_WIDTH 1 /* SPK1L_MUTE */
3321 #define ARIZONA_SPK1_MUTE_ENDIAN 0x0100 /* SPK1_MUTE_ENDIAN */
3322 #define ARIZONA_SPK1_MUTE_ENDIAN_MASK 0x0100 /* SPK1_MUTE_ENDIAN */
3323 #define ARIZONA_SPK1_MUTE_ENDIAN_SHIFT 8 /* SPK1_MUTE_ENDIAN */
3324 #define ARIZONA_SPK1_MUTE_ENDIAN_WIDTH 1 /* SPK1_MUTE_ENDIAN */
3325 #define ARIZONA_SPK1_MUTE_SEQ1_MASK 0x00FF /* SPK1_MUTE_SEQ1 - [7:0] */
3326 #define ARIZONA_SPK1_MUTE_SEQ1_SHIFT 0 /* SPK1_MUTE_SEQ1 - [7:0] */
3327 #define ARIZONA_SPK1_MUTE_SEQ1_WIDTH 8 /* SPK1_MUTE_SEQ1 - [7:0] */
3328
3329 /*
3330 * R1169 (0x491) - PDM SPK1 CTRL 2
3331 */
3332 #define ARIZONA_SPK1_FMT 0x0001 /* SPK1_FMT */
3333 #define ARIZONA_SPK1_FMT_MASK 0x0001 /* SPK1_FMT */
3334 #define ARIZONA_SPK1_FMT_SHIFT 0 /* SPK1_FMT */
3335 #define ARIZONA_SPK1_FMT_WIDTH 1 /* SPK1_FMT */
3336
3337 /*
3338 * R1170 (0x492) - PDM SPK2 CTRL 1
3339 */
3340 #define ARIZONA_SPK2R_MUTE 0x2000 /* SPK2R_MUTE */
3341 #define ARIZONA_SPK2R_MUTE_MASK 0x2000 /* SPK2R_MUTE */
3342 #define ARIZONA_SPK2R_MUTE_SHIFT 13 /* SPK2R_MUTE */
3343 #define ARIZONA_SPK2R_MUTE_WIDTH 1 /* SPK2R_MUTE */
3344 #define ARIZONA_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */
3345 #define ARIZONA_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUTE */
3346 #define ARIZONA_SPK2L_MUTE_SHIFT 12 /* SPK2L_MUTE */
3347 #define ARIZONA_SPK2L_MUTE_WIDTH 1 /* SPK2L_MUTE */
3348 #define ARIZONA_SPK2_MUTE_ENDIAN 0x0100 /* SPK2_MUTE_ENDIAN */
3349 #define ARIZONA_SPK2_MUTE_ENDIAN_MASK 0x0100 /* SPK2_MUTE_ENDIAN */
3350 #define ARIZONA_SPK2_MUTE_ENDIAN_SHIFT 8 /* SPK2_MUTE_ENDIAN */
3351 #define ARIZONA_SPK2_MUTE_ENDIAN_WIDTH 1 /* SPK2_MUTE_ENDIAN */
3352 #define ARIZONA_SPK2_MUTE_SEQ_MASK 0x00FF /* SPK2_MUTE_SEQ - [7:0] */
3353 #define ARIZONA_SPK2_MUTE_SEQ_SHIFT 0 /* SPK2_MUTE_SEQ - [7:0] */
3354 #define ARIZONA_SPK2_MUTE_SEQ_WIDTH 8 /* SPK2_MUTE_SEQ - [7:0] */
3355
3356 /*
3357 * R1171 (0x493) - PDM SPK2 CTRL 2
3358 */
3359 #define ARIZONA_SPK2_FMT 0x0001 /* SPK2_FMT */
3360 #define ARIZONA_SPK2_FMT_MASK 0x0001 /* SPK2_FMT */
3361 #define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */
3362 #define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */
3363
3364 /*
3365 * R1184 (0x4A0) - HP1 Short Circuit Ctrl
3366 */
3367 #define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */
3368 #define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */
3369 #define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */
3370 #define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */
3371
3372 /*
3373 * R1185 (0x4A1) - HP2 Short Circuit Ctrl
3374 */
3375 #define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */
3376 #define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */
3377 #define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */
3378 #define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */
3379
3380 /*
3381 * R1186 (0x4A2) - HP3 Short Circuit Ctrl
3382 */
3383 #define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */
3384 #define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */
3385 #define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */
3386 #define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */
3387
3388 /*
3389 * R1244 (0x4DC) - DAC comp 1
3390 */
3391 #define ARIZONA_OUT_COMP_COEFF_MASK 0xFFFF /* OUT_COMP_COEFF - [15:0] */
3392 #define ARIZONA_OUT_COMP_COEFF_SHIFT 0 /* OUT_COMP_COEFF - [15:0] */
3393 #define ARIZONA_OUT_COMP_COEFF_WIDTH 16 /* OUT_COMP_COEFF - [15:0] */
3394
3395 /*
3396 * R1245 (0x4DD) - DAC comp 2
3397 */
3398 #define ARIZONA_OUT_COMP_COEFF_1 0x0002 /* OUT_COMP_COEFF */
3399 #define ARIZONA_OUT_COMP_COEFF_1_MASK 0x0002 /* OUT_COMP_COEFF */
3400 #define ARIZONA_OUT_COMP_COEFF_1_SHIFT 1 /* OUT_COMP_COEFF */
3401 #define ARIZONA_OUT_COMP_COEFF_1_WIDTH 1 /* OUT_COMP_COEFF */
3402 #define ARIZONA_OUT_COMP_COEFF_SEL 0x0001 /* OUT_COMP_COEFF_SEL */
3403 #define ARIZONA_OUT_COMP_COEFF_SEL_MASK 0x0001 /* OUT_COMP_COEFF_SEL */
3404 #define ARIZONA_OUT_COMP_COEFF_SEL_SHIFT 0 /* OUT_COMP_COEFF_SEL */
3405 #define ARIZONA_OUT_COMP_COEFF_SEL_WIDTH 1 /* OUT_COMP_COEFF_SEL */
3406
3407 /*
3408 * R1246 (0x4DE) - DAC comp 3
3409 */
3410 #define ARIZONA_AEC_COMP_COEFF_MASK 0xFFFF /* AEC_COMP_COEFF - [15:0] */
3411 #define ARIZONA_AEC_COMP_COEFF_SHIFT 0 /* AEC_COMP_COEFF - [15:0] */
3412 #define ARIZONA_AEC_COMP_COEFF_WIDTH 16 /* AEC_COMP_COEFF - [15:0] */
3413
3414 /*
3415 * R1247 (0x4DF) - DAC comp 4
3416 */
3417 #define ARIZONA_AEC_COMP_COEFF_1 0x0002 /* AEC_COMP_COEFF */
3418 #define ARIZONA_AEC_COMP_COEFF_1_MASK 0x0002 /* AEC_COMP_COEFF */
3419 #define ARIZONA_AEC_COMP_COEFF_1_SHIFT 1 /* AEC_COMP_COEFF */
3420 #define ARIZONA_AEC_COMP_COEFF_1_WIDTH 1 /* AEC_COMP_COEFF */
3421 #define ARIZONA_AEC_COMP_COEFF_SEL 0x0001 /* AEC_COMP_COEFF_SEL */
3422 #define ARIZONA_AEC_COMP_COEFF_SEL_MASK 0x0001 /* AEC_COMP_COEFF_SEL */
3423 #define ARIZONA_AEC_COMP_COEFF_SEL_SHIFT 0 /* AEC_COMP_COEFF_SEL */
3424 #define ARIZONA_AEC_COMP_COEFF_SEL_WIDTH 1 /* AEC_COMP_COEFF_SEL */
3425
3426 /*
3427 * R1280 (0x500) - AIF1 BCLK Ctrl
3428 */
3429 #define ARIZONA_AIF1_BCLK_INV 0x0080 /* AIF1_BCLK_INV */
3430 #define ARIZONA_AIF1_BCLK_INV_MASK 0x0080 /* AIF1_BCLK_INV */
3431 #define ARIZONA_AIF1_BCLK_INV_SHIFT 7 /* AIF1_BCLK_INV */
3432 #define ARIZONA_AIF1_BCLK_INV_WIDTH 1 /* AIF1_BCLK_INV */
3433 #define ARIZONA_AIF1_BCLK_FRC 0x0040 /* AIF1_BCLK_FRC */
3434 #define ARIZONA_AIF1_BCLK_FRC_MASK 0x0040 /* AIF1_BCLK_FRC */
3435 #define ARIZONA_AIF1_BCLK_FRC_SHIFT 6 /* AIF1_BCLK_FRC */
3436 #define ARIZONA_AIF1_BCLK_FRC_WIDTH 1 /* AIF1_BCLK_FRC */
3437 #define ARIZONA_AIF1_BCLK_MSTR 0x0020 /* AIF1_BCLK_MSTR */
3438 #define ARIZONA_AIF1_BCLK_MSTR_MASK 0x0020 /* AIF1_BCLK_MSTR */
3439 #define ARIZONA_AIF1_BCLK_MSTR_SHIFT 5 /* AIF1_BCLK_MSTR */
3440 #define ARIZONA_AIF1_BCLK_MSTR_WIDTH 1 /* AIF1_BCLK_MSTR */
3441 #define ARIZONA_AIF1_BCLK_FREQ_MASK 0x001F /* AIF1_BCLK_FREQ - [4:0] */
3442 #define ARIZONA_AIF1_BCLK_FREQ_SHIFT 0 /* AIF1_BCLK_FREQ - [4:0] */
3443 #define ARIZONA_AIF1_BCLK_FREQ_WIDTH 5 /* AIF1_BCLK_FREQ - [4:0] */
3444
3445 /*
3446 * R1281 (0x501) - AIF1 Tx Pin Ctrl
3447 */
3448 #define ARIZONA_AIF1TX_DAT_TRI 0x0020 /* AIF1TX_DAT_TRI */
3449 #define ARIZONA_AIF1TX_DAT_TRI_MASK 0x0020 /* AIF1TX_DAT_TRI */
3450 #define ARIZONA_AIF1TX_DAT_TRI_SHIFT 5 /* AIF1TX_DAT_TRI */
3451 #define ARIZONA_AIF1TX_DAT_TRI_WIDTH 1 /* AIF1TX_DAT_TRI */
3452 #define ARIZONA_AIF1TX_LRCLK_SRC 0x0008 /* AIF1TX_LRCLK_SRC */
3453 #define ARIZONA_AIF1TX_LRCLK_SRC_MASK 0x0008 /* AIF1TX_LRCLK_SRC */
3454 #define ARIZONA_AIF1TX_LRCLK_SRC_SHIFT 3 /* AIF1TX_LRCLK_SRC */
3455 #define ARIZONA_AIF1TX_LRCLK_SRC_WIDTH 1 /* AIF1TX_LRCLK_SRC */
3456 #define ARIZONA_AIF1TX_LRCLK_INV 0x0004 /* AIF1TX_LRCLK_INV */
3457 #define ARIZONA_AIF1TX_LRCLK_INV_MASK 0x0004 /* AIF1TX_LRCLK_INV */
3458 #define ARIZONA_AIF1TX_LRCLK_INV_SHIFT 2 /* AIF1TX_LRCLK_INV */
3459 #define ARIZONA_AIF1TX_LRCLK_INV_WIDTH 1 /* AIF1TX_LRCLK_INV */
3460 #define ARIZONA_AIF1TX_LRCLK_FRC 0x0002 /* AIF1TX_LRCLK_FRC */
3461 #define ARIZONA_AIF1TX_LRCLK_FRC_MASK 0x0002 /* AIF1TX_LRCLK_FRC */
3462 #define ARIZONA_AIF1TX_LRCLK_FRC_SHIFT 1 /* AIF1TX_LRCLK_FRC */
3463 #define ARIZONA_AIF1TX_LRCLK_FRC_WIDTH 1 /* AIF1TX_LRCLK_FRC */
3464 #define ARIZONA_AIF1TX_LRCLK_MSTR 0x0001 /* AIF1TX_LRCLK_MSTR */
3465 #define ARIZONA_AIF1TX_LRCLK_MSTR_MASK 0x0001 /* AIF1TX_LRCLK_MSTR */
3466 #define ARIZONA_AIF1TX_LRCLK_MSTR_SHIFT 0 /* AIF1TX_LRCLK_MSTR */
3467 #define ARIZONA_AIF1TX_LRCLK_MSTR_WIDTH 1 /* AIF1TX_LRCLK_MSTR */
3468
3469 /*
3470 * R1282 (0x502) - AIF1 Rx Pin Ctrl
3471 */
3472 #define ARIZONA_AIF1RX_LRCLK_INV 0x0004 /* AIF1RX_LRCLK_INV */
3473 #define ARIZONA_AIF1RX_LRCLK_INV_MASK 0x0004 /* AIF1RX_LRCLK_INV */
3474 #define ARIZONA_AIF1RX_LRCLK_INV_SHIFT 2 /* AIF1RX_LRCLK_INV */
3475 #define ARIZONA_AIF1RX_LRCLK_INV_WIDTH 1 /* AIF1RX_LRCLK_INV */
3476 #define ARIZONA_AIF1RX_LRCLK_FRC 0x0002 /* AIF1RX_LRCLK_FRC */
3477 #define ARIZONA_AIF1RX_LRCLK_FRC_MASK 0x0002 /* AIF1RX_LRCLK_FRC */
3478 #define ARIZONA_AIF1RX_LRCLK_FRC_SHIFT 1 /* AIF1RX_LRCLK_FRC */
3479 #define ARIZONA_AIF1RX_LRCLK_FRC_WIDTH 1 /* AIF1RX_LRCLK_FRC */
3480 #define ARIZONA_AIF1RX_LRCLK_MSTR 0x0001 /* AIF1RX_LRCLK_MSTR */
3481 #define ARIZONA_AIF1RX_LRCLK_MSTR_MASK 0x0001 /* AIF1RX_LRCLK_MSTR */
3482 #define ARIZONA_AIF1RX_LRCLK_MSTR_SHIFT 0 /* AIF1RX_LRCLK_MSTR */
3483 #define ARIZONA_AIF1RX_LRCLK_MSTR_WIDTH 1 /* AIF1RX_LRCLK_MSTR */
3484
3485 /*
3486 * R1283 (0x503) - AIF1 Rate Ctrl
3487 */
3488 #define ARIZONA_AIF1_RATE_MASK 0x7800 /* AIF1_RATE - [14:11] */
3489 #define ARIZONA_AIF1_RATE_SHIFT 11 /* AIF1_RATE - [14:11] */
3490 #define ARIZONA_AIF1_RATE_WIDTH 4 /* AIF1_RATE - [14:11] */
3491 #define ARIZONA_AIF1_TRI 0x0040 /* AIF1_TRI */
3492 #define ARIZONA_AIF1_TRI_MASK 0x0040 /* AIF1_TRI */
3493 #define ARIZONA_AIF1_TRI_SHIFT 6 /* AIF1_TRI */
3494 #define ARIZONA_AIF1_TRI_WIDTH 1 /* AIF1_TRI */
3495
3496 /*
3497 * R1284 (0x504) - AIF1 Format
3498 */
3499 #define ARIZONA_AIF1_FMT_MASK 0x0007 /* AIF1_FMT - [2:0] */
3500 #define ARIZONA_AIF1_FMT_SHIFT 0 /* AIF1_FMT - [2:0] */
3501 #define ARIZONA_AIF1_FMT_WIDTH 3 /* AIF1_FMT - [2:0] */
3502
3503 /*
3504 * R1285 (0x505) - AIF1 Tx BCLK Rate
3505 */
3506 #define ARIZONA_AIF1TX_BCPF_MASK 0x1FFF /* AIF1TX_BCPF - [12:0] */
3507 #define ARIZONA_AIF1TX_BCPF_SHIFT 0 /* AIF1TX_BCPF - [12:0] */
3508 #define ARIZONA_AIF1TX_BCPF_WIDTH 13 /* AIF1TX_BCPF - [12:0] */
3509
3510 /*
3511 * R1286 (0x506) - AIF1 Rx BCLK Rate
3512 */
3513 #define ARIZONA_AIF1RX_BCPF_MASK 0x1FFF /* AIF1RX_BCPF - [12:0] */
3514 #define ARIZONA_AIF1RX_BCPF_SHIFT 0 /* AIF1RX_BCPF - [12:0] */
3515 #define ARIZONA_AIF1RX_BCPF_WIDTH 13 /* AIF1RX_BCPF - [12:0] */
3516
3517 /*
3518 * R1287 (0x507) - AIF1 Frame Ctrl 1
3519 */
3520 #define ARIZONA_AIF1TX_WL_MASK 0x3F00 /* AIF1TX_WL - [13:8] */
3521 #define ARIZONA_AIF1TX_WL_SHIFT 8 /* AIF1TX_WL - [13:8] */
3522 #define ARIZONA_AIF1TX_WL_WIDTH 6 /* AIF1TX_WL - [13:8] */
3523 #define ARIZONA_AIF1TX_SLOT_LEN_MASK 0x00FF /* AIF1TX_SLOT_LEN - [7:0] */
3524 #define ARIZONA_AIF1TX_SLOT_LEN_SHIFT 0 /* AIF1TX_SLOT_LEN - [7:0] */
3525 #define ARIZONA_AIF1TX_SLOT_LEN_WIDTH 8 /* AIF1TX_SLOT_LEN - [7:0] */
3526
3527 /*
3528 * R1288 (0x508) - AIF1 Frame Ctrl 2
3529 */
3530 #define ARIZONA_AIF1RX_WL_MASK 0x3F00 /* AIF1RX_WL - [13:8] */
3531 #define ARIZONA_AIF1RX_WL_SHIFT 8 /* AIF1RX_WL - [13:8] */
3532 #define ARIZONA_AIF1RX_WL_WIDTH 6 /* AIF1RX_WL - [13:8] */
3533 #define ARIZONA_AIF1RX_SLOT_LEN_MASK 0x00FF /* AIF1RX_SLOT_LEN - [7:0] */
3534 #define ARIZONA_AIF1RX_SLOT_LEN_SHIFT 0 /* AIF1RX_SLOT_LEN - [7:0] */
3535 #define ARIZONA_AIF1RX_SLOT_LEN_WIDTH 8 /* AIF1RX_SLOT_LEN - [7:0] */
3536
3537 /*
3538 * R1289 (0x509) - AIF1 Frame Ctrl 3
3539 */
3540 #define ARIZONA_AIF1TX1_SLOT_MASK 0x003F /* AIF1TX1_SLOT - [5:0] */
3541 #define ARIZONA_AIF1TX1_SLOT_SHIFT 0 /* AIF1TX1_SLOT - [5:0] */
3542 #define ARIZONA_AIF1TX1_SLOT_WIDTH 6 /* AIF1TX1_SLOT - [5:0] */
3543
3544 /*
3545 * R1290 (0x50A) - AIF1 Frame Ctrl 4
3546 */
3547 #define ARIZONA_AIF1TX2_SLOT_MASK 0x003F /* AIF1TX2_SLOT - [5:0] */
3548 #define ARIZONA_AIF1TX2_SLOT_SHIFT 0 /* AIF1TX2_SLOT - [5:0] */
3549 #define ARIZONA_AIF1TX2_SLOT_WIDTH 6 /* AIF1TX2_SLOT - [5:0] */
3550
3551 /*
3552 * R1291 (0x50B) - AIF1 Frame Ctrl 5
3553 */
3554 #define ARIZONA_AIF1TX3_SLOT_MASK 0x003F /* AIF1TX3_SLOT - [5:0] */
3555 #define ARIZONA_AIF1TX3_SLOT_SHIFT 0 /* AIF1TX3_SLOT - [5:0] */
3556 #define ARIZONA_AIF1TX3_SLOT_WIDTH 6 /* AIF1TX3_SLOT - [5:0] */
3557
3558 /*
3559 * R1292 (0x50C) - AIF1 Frame Ctrl 6
3560 */
3561 #define ARIZONA_AIF1TX4_SLOT_MASK 0x003F /* AIF1TX4_SLOT - [5:0] */
3562 #define ARIZONA_AIF1TX4_SLOT_SHIFT 0 /* AIF1TX4_SLOT - [5:0] */
3563 #define ARIZONA_AIF1TX4_SLOT_WIDTH 6 /* AIF1TX4_SLOT - [5:0] */
3564
3565 /*
3566 * R1293 (0x50D) - AIF1 Frame Ctrl 7
3567 */
3568 #define ARIZONA_AIF1TX5_SLOT_MASK 0x003F /* AIF1TX5_SLOT - [5:0] */
3569 #define ARIZONA_AIF1TX5_SLOT_SHIFT 0 /* AIF1TX5_SLOT - [5:0] */
3570 #define ARIZONA_AIF1TX5_SLOT_WIDTH 6 /* AIF1TX5_SLOT - [5:0] */
3571
3572 /*
3573 * R1294 (0x50E) - AIF1 Frame Ctrl 8
3574 */
3575 #define ARIZONA_AIF1TX6_SLOT_MASK 0x003F /* AIF1TX6_SLOT - [5:0] */
3576 #define ARIZONA_AIF1TX6_SLOT_SHIFT 0 /* AIF1TX6_SLOT - [5:0] */
3577 #define ARIZONA_AIF1TX6_SLOT_WIDTH 6 /* AIF1TX6_SLOT - [5:0] */
3578
3579 /*
3580 * R1295 (0x50F) - AIF1 Frame Ctrl 9
3581 */
3582 #define ARIZONA_AIF1TX7_SLOT_MASK 0x003F /* AIF1TX7_SLOT - [5:0] */
3583 #define ARIZONA_AIF1TX7_SLOT_SHIFT 0 /* AIF1TX7_SLOT - [5:0] */
3584 #define ARIZONA_AIF1TX7_SLOT_WIDTH 6 /* AIF1TX7_SLOT - [5:0] */
3585
3586 /*
3587 * R1296 (0x510) - AIF1 Frame Ctrl 10
3588 */
3589 #define ARIZONA_AIF1TX8_SLOT_MASK 0x003F /* AIF1TX8_SLOT - [5:0] */
3590 #define ARIZONA_AIF1TX8_SLOT_SHIFT 0 /* AIF1TX8_SLOT - [5:0] */
3591 #define ARIZONA_AIF1TX8_SLOT_WIDTH 6 /* AIF1TX8_SLOT - [5:0] */
3592
3593 /*
3594 * R1297 (0x511) - AIF1 Frame Ctrl 11
3595 */
3596 #define ARIZONA_AIF1RX1_SLOT_MASK 0x003F /* AIF1RX1_SLOT - [5:0] */
3597 #define ARIZONA_AIF1RX1_SLOT_SHIFT 0 /* AIF1RX1_SLOT - [5:0] */
3598 #define ARIZONA_AIF1RX1_SLOT_WIDTH 6 /* AIF1RX1_SLOT - [5:0] */
3599
3600 /*
3601 * R1298 (0x512) - AIF1 Frame Ctrl 12
3602 */
3603 #define ARIZONA_AIF1RX2_SLOT_MASK 0x003F /* AIF1RX2_SLOT - [5:0] */
3604 #define ARIZONA_AIF1RX2_SLOT_SHIFT 0 /* AIF1RX2_SLOT - [5:0] */
3605 #define ARIZONA_AIF1RX2_SLOT_WIDTH 6 /* AIF1RX2_SLOT - [5:0] */
3606
3607 /*
3608 * R1299 (0x513) - AIF1 Frame Ctrl 13
3609 */
3610 #define ARIZONA_AIF1RX3_SLOT_MASK 0x003F /* AIF1RX3_SLOT - [5:0] */
3611 #define ARIZONA_AIF1RX3_SLOT_SHIFT 0 /* AIF1RX3_SLOT - [5:0] */
3612 #define ARIZONA_AIF1RX3_SLOT_WIDTH 6 /* AIF1RX3_SLOT - [5:0] */
3613
3614 /*
3615 * R1300 (0x514) - AIF1 Frame Ctrl 14
3616 */
3617 #define ARIZONA_AIF1RX4_SLOT_MASK 0x003F /* AIF1RX4_SLOT - [5:0] */
3618 #define ARIZONA_AIF1RX4_SLOT_SHIFT 0 /* AIF1RX4_SLOT - [5:0] */
3619 #define ARIZONA_AIF1RX4_SLOT_WIDTH 6 /* AIF1RX4_SLOT - [5:0] */
3620
3621 /*
3622 * R1301 (0x515) - AIF1 Frame Ctrl 15
3623 */
3624 #define ARIZONA_AIF1RX5_SLOT_MASK 0x003F /* AIF1RX5_SLOT - [5:0] */
3625 #define ARIZONA_AIF1RX5_SLOT_SHIFT 0 /* AIF1RX5_SLOT - [5:0] */
3626 #define ARIZONA_AIF1RX5_SLOT_WIDTH 6 /* AIF1RX5_SLOT - [5:0] */
3627
3628 /*
3629 * R1302 (0x516) - AIF1 Frame Ctrl 16
3630 */
3631 #define ARIZONA_AIF1RX6_SLOT_MASK 0x003F /* AIF1RX6_SLOT - [5:0] */
3632 #define ARIZONA_AIF1RX6_SLOT_SHIFT 0 /* AIF1RX6_SLOT - [5:0] */
3633 #define ARIZONA_AIF1RX6_SLOT_WIDTH 6 /* AIF1RX6_SLOT - [5:0] */
3634
3635 /*
3636 * R1303 (0x517) - AIF1 Frame Ctrl 17
3637 */
3638 #define ARIZONA_AIF1RX7_SLOT_MASK 0x003F /* AIF1RX7_SLOT - [5:0] */
3639 #define ARIZONA_AIF1RX7_SLOT_SHIFT 0 /* AIF1RX7_SLOT - [5:0] */
3640 #define ARIZONA_AIF1RX7_SLOT_WIDTH 6 /* AIF1RX7_SLOT - [5:0] */
3641
3642 /*
3643 * R1304 (0x518) - AIF1 Frame Ctrl 18
3644 */
3645 #define ARIZONA_AIF1RX8_SLOT_MASK 0x003F /* AIF1RX8_SLOT - [5:0] */
3646 #define ARIZONA_AIF1RX8_SLOT_SHIFT 0 /* AIF1RX8_SLOT - [5:0] */
3647 #define ARIZONA_AIF1RX8_SLOT_WIDTH 6 /* AIF1RX8_SLOT - [5:0] */
3648
3649 /*
3650 * R1305 (0x519) - AIF1 Tx Enables
3651 */
3652 #define ARIZONA_AIF1TX8_ENA 0x0080 /* AIF1TX8_ENA */
3653 #define ARIZONA_AIF1TX8_ENA_MASK 0x0080 /* AIF1TX8_ENA */
3654 #define ARIZONA_AIF1TX8_ENA_SHIFT 7 /* AIF1TX8_ENA */
3655 #define ARIZONA_AIF1TX8_ENA_WIDTH 1 /* AIF1TX8_ENA */
3656 #define ARIZONA_AIF1TX7_ENA 0x0040 /* AIF1TX7_ENA */
3657 #define ARIZONA_AIF1TX7_ENA_MASK 0x0040 /* AIF1TX7_ENA */
3658 #define ARIZONA_AIF1TX7_ENA_SHIFT 6 /* AIF1TX7_ENA */
3659 #define ARIZONA_AIF1TX7_ENA_WIDTH 1 /* AIF1TX7_ENA */
3660 #define ARIZONA_AIF1TX6_ENA 0x0020 /* AIF1TX6_ENA */
3661 #define ARIZONA_AIF1TX6_ENA_MASK 0x0020 /* AIF1TX6_ENA */
3662 #define ARIZONA_AIF1TX6_ENA_SHIFT 5 /* AIF1TX6_ENA */
3663 #define ARIZONA_AIF1TX6_ENA_WIDTH 1 /* AIF1TX6_ENA */
3664 #define ARIZONA_AIF1TX5_ENA 0x0010 /* AIF1TX5_ENA */
3665 #define ARIZONA_AIF1TX5_ENA_MASK 0x0010 /* AIF1TX5_ENA */
3666 #define ARIZONA_AIF1TX5_ENA_SHIFT 4 /* AIF1TX5_ENA */
3667 #define ARIZONA_AIF1TX5_ENA_WIDTH 1 /* AIF1TX5_ENA */
3668 #define ARIZONA_AIF1TX4_ENA 0x0008 /* AIF1TX4_ENA */
3669 #define ARIZONA_AIF1TX4_ENA_MASK 0x0008 /* AIF1TX4_ENA */
3670 #define ARIZONA_AIF1TX4_ENA_SHIFT 3 /* AIF1TX4_ENA */
3671 #define ARIZONA_AIF1TX4_ENA_WIDTH 1 /* AIF1TX4_ENA */
3672 #define ARIZONA_AIF1TX3_ENA 0x0004 /* AIF1TX3_ENA */
3673 #define ARIZONA_AIF1TX3_ENA_MASK 0x0004 /* AIF1TX3_ENA */
3674 #define ARIZONA_AIF1TX3_ENA_SHIFT 2 /* AIF1TX3_ENA */
3675 #define ARIZONA_AIF1TX3_ENA_WIDTH 1 /* AIF1TX3_ENA */
3676 #define ARIZONA_AIF1TX2_ENA 0x0002 /* AIF1TX2_ENA */
3677 #define ARIZONA_AIF1TX2_ENA_MASK 0x0002 /* AIF1TX2_ENA */
3678 #define ARIZONA_AIF1TX2_ENA_SHIFT 1 /* AIF1TX2_ENA */
3679 #define ARIZONA_AIF1TX2_ENA_WIDTH 1 /* AIF1TX2_ENA */
3680 #define ARIZONA_AIF1TX1_ENA 0x0001 /* AIF1TX1_ENA */
3681 #define ARIZONA_AIF1TX1_ENA_MASK 0x0001 /* AIF1TX1_ENA */
3682 #define ARIZONA_AIF1TX1_ENA_SHIFT 0 /* AIF1TX1_ENA */
3683 #define ARIZONA_AIF1TX1_ENA_WIDTH 1 /* AIF1TX1_ENA */
3684
3685 /*
3686 * R1306 (0x51A) - AIF1 Rx Enables
3687 */
3688 #define ARIZONA_AIF1RX8_ENA 0x0080 /* AIF1RX8_ENA */
3689 #define ARIZONA_AIF1RX8_ENA_MASK 0x0080 /* AIF1RX8_ENA */
3690 #define ARIZONA_AIF1RX8_ENA_SHIFT 7 /* AIF1RX8_ENA */
3691 #define ARIZONA_AIF1RX8_ENA_WIDTH 1 /* AIF1RX8_ENA */
3692 #define ARIZONA_AIF1RX7_ENA 0x0040 /* AIF1RX7_ENA */
3693 #define ARIZONA_AIF1RX7_ENA_MASK 0x0040 /* AIF1RX7_ENA */
3694 #define ARIZONA_AIF1RX7_ENA_SHIFT 6 /* AIF1RX7_ENA */
3695 #define ARIZONA_AIF1RX7_ENA_WIDTH 1 /* AIF1RX7_ENA */
3696 #define ARIZONA_AIF1RX6_ENA 0x0020 /* AIF1RX6_ENA */
3697 #define ARIZONA_AIF1RX6_ENA_MASK 0x0020 /* AIF1RX6_ENA */
3698 #define ARIZONA_AIF1RX6_ENA_SHIFT 5 /* AIF1RX6_ENA */
3699 #define ARIZONA_AIF1RX6_ENA_WIDTH 1 /* AIF1RX6_ENA */
3700 #define ARIZONA_AIF1RX5_ENA 0x0010 /* AIF1RX5_ENA */
3701 #define ARIZONA_AIF1RX5_ENA_MASK 0x0010 /* AIF1RX5_ENA */
3702 #define ARIZONA_AIF1RX5_ENA_SHIFT 4 /* AIF1RX5_ENA */
3703 #define ARIZONA_AIF1RX5_ENA_WIDTH 1 /* AIF1RX5_ENA */
3704 #define ARIZONA_AIF1RX4_ENA 0x0008 /* AIF1RX4_ENA */
3705 #define ARIZONA_AIF1RX4_ENA_MASK 0x0008 /* AIF1RX4_ENA */
3706 #define ARIZONA_AIF1RX4_ENA_SHIFT 3 /* AIF1RX4_ENA */
3707 #define ARIZONA_AIF1RX4_ENA_WIDTH 1 /* AIF1RX4_ENA */
3708 #define ARIZONA_AIF1RX3_ENA 0x0004 /* AIF1RX3_ENA */
3709 #define ARIZONA_AIF1RX3_ENA_MASK 0x0004 /* AIF1RX3_ENA */
3710 #define ARIZONA_AIF1RX3_ENA_SHIFT 2 /* AIF1RX3_ENA */
3711 #define ARIZONA_AIF1RX3_ENA_WIDTH 1 /* AIF1RX3_ENA */
3712 #define ARIZONA_AIF1RX2_ENA 0x0002 /* AIF1RX2_ENA */
3713 #define ARIZONA_AIF1RX2_ENA_MASK 0x0002 /* AIF1RX2_ENA */
3714 #define ARIZONA_AIF1RX2_ENA_SHIFT 1 /* AIF1RX2_ENA */
3715 #define ARIZONA_AIF1RX2_ENA_WIDTH 1 /* AIF1RX2_ENA */
3716 #define ARIZONA_AIF1RX1_ENA 0x0001 /* AIF1RX1_ENA */
3717 #define ARIZONA_AIF1RX1_ENA_MASK 0x0001 /* AIF1RX1_ENA */
3718 #define ARIZONA_AIF1RX1_ENA_SHIFT 0 /* AIF1RX1_ENA */
3719 #define ARIZONA_AIF1RX1_ENA_WIDTH 1 /* AIF1RX1_ENA */
3720
3721 /*
3722 * R1307 (0x51B) - AIF1 Force Write
3723 */
3724 #define ARIZONA_AIF1_FRC_WR 0x0001 /* AIF1_FRC_WR */
3725 #define ARIZONA_AIF1_FRC_WR_MASK 0x0001 /* AIF1_FRC_WR */
3726 #define ARIZONA_AIF1_FRC_WR_SHIFT 0 /* AIF1_FRC_WR */
3727 #define ARIZONA_AIF1_FRC_WR_WIDTH 1 /* AIF1_FRC_WR */
3728
3729 /*
3730 * R1344 (0x540) - AIF2 BCLK Ctrl
3731 */
3732 #define ARIZONA_AIF2_BCLK_INV 0x0080 /* AIF2_BCLK_INV */
3733 #define ARIZONA_AIF2_BCLK_INV_MASK 0x0080 /* AIF2_BCLK_INV */
3734 #define ARIZONA_AIF2_BCLK_INV_SHIFT 7 /* AIF2_BCLK_INV */
3735 #define ARIZONA_AIF2_BCLK_INV_WIDTH 1 /* AIF2_BCLK_INV */
3736 #define ARIZONA_AIF2_BCLK_FRC 0x0040 /* AIF2_BCLK_FRC */
3737 #define ARIZONA_AIF2_BCLK_FRC_MASK 0x0040 /* AIF2_BCLK_FRC */
3738 #define ARIZONA_AIF2_BCLK_FRC_SHIFT 6 /* AIF2_BCLK_FRC */
3739 #define ARIZONA_AIF2_BCLK_FRC_WIDTH 1 /* AIF2_BCLK_FRC */
3740 #define ARIZONA_AIF2_BCLK_MSTR 0x0020 /* AIF2_BCLK_MSTR */
3741 #define ARIZONA_AIF2_BCLK_MSTR_MASK 0x0020 /* AIF2_BCLK_MSTR */
3742 #define ARIZONA_AIF2_BCLK_MSTR_SHIFT 5 /* AIF2_BCLK_MSTR */
3743 #define ARIZONA_AIF2_BCLK_MSTR_WIDTH 1 /* AIF2_BCLK_MSTR */
3744 #define ARIZONA_AIF2_BCLK_FREQ_MASK 0x001F /* AIF2_BCLK_FREQ - [4:0] */
3745 #define ARIZONA_AIF2_BCLK_FREQ_SHIFT 0 /* AIF2_BCLK_FREQ - [4:0] */
3746 #define ARIZONA_AIF2_BCLK_FREQ_WIDTH 5 /* AIF2_BCLK_FREQ - [4:0] */
3747
3748 /*
3749 * R1345 (0x541) - AIF2 Tx Pin Ctrl
3750 */
3751 #define ARIZONA_AIF2TX_DAT_TRI 0x0020 /* AIF2TX_DAT_TRI */
3752 #define ARIZONA_AIF2TX_DAT_TRI_MASK 0x0020 /* AIF2TX_DAT_TRI */
3753 #define ARIZONA_AIF2TX_DAT_TRI_SHIFT 5 /* AIF2TX_DAT_TRI */
3754 #define ARIZONA_AIF2TX_DAT_TRI_WIDTH 1 /* AIF2TX_DAT_TRI */
3755 #define ARIZONA_AIF2TX_LRCLK_SRC 0x0008 /* AIF2TX_LRCLK_SRC */
3756 #define ARIZONA_AIF2TX_LRCLK_SRC_MASK 0x0008 /* AIF2TX_LRCLK_SRC */
3757 #define ARIZONA_AIF2TX_LRCLK_SRC_SHIFT 3 /* AIF2TX_LRCLK_SRC */
3758 #define ARIZONA_AIF2TX_LRCLK_SRC_WIDTH 1 /* AIF2TX_LRCLK_SRC */
3759 #define ARIZONA_AIF2TX_LRCLK_INV 0x0004 /* AIF2TX_LRCLK_INV */
3760 #define ARIZONA_AIF2TX_LRCLK_INV_MASK 0x0004 /* AIF2TX_LRCLK_INV */
3761 #define ARIZONA_AIF2TX_LRCLK_INV_SHIFT 2 /* AIF2TX_LRCLK_INV */
3762 #define ARIZONA_AIF2TX_LRCLK_INV_WIDTH 1 /* AIF2TX_LRCLK_INV */
3763 #define ARIZONA_AIF2TX_LRCLK_FRC 0x0002 /* AIF2TX_LRCLK_FRC */
3764 #define ARIZONA_AIF2TX_LRCLK_FRC_MASK 0x0002 /* AIF2TX_LRCLK_FRC */
3765 #define ARIZONA_AIF2TX_LRCLK_FRC_SHIFT 1 /* AIF2TX_LRCLK_FRC */
3766 #define ARIZONA_AIF2TX_LRCLK_FRC_WIDTH 1 /* AIF2TX_LRCLK_FRC */
3767 #define ARIZONA_AIF2TX_LRCLK_MSTR 0x0001 /* AIF2TX_LRCLK_MSTR */
3768 #define ARIZONA_AIF2TX_LRCLK_MSTR_MASK 0x0001 /* AIF2TX_LRCLK_MSTR */
3769 #define ARIZONA_AIF2TX_LRCLK_MSTR_SHIFT 0 /* AIF2TX_LRCLK_MSTR */
3770 #define ARIZONA_AIF2TX_LRCLK_MSTR_WIDTH 1 /* AIF2TX_LRCLK_MSTR */
3771
3772 /*
3773 * R1346 (0x542) - AIF2 Rx Pin Ctrl
3774 */
3775 #define ARIZONA_AIF2RX_LRCLK_INV 0x0004 /* AIF2RX_LRCLK_INV */
3776 #define ARIZONA_AIF2RX_LRCLK_INV_MASK 0x0004 /* AIF2RX_LRCLK_INV */
3777 #define ARIZONA_AIF2RX_LRCLK_INV_SHIFT 2 /* AIF2RX_LRCLK_INV */
3778 #define ARIZONA_AIF2RX_LRCLK_INV_WIDTH 1 /* AIF2RX_LRCLK_INV */
3779 #define ARIZONA_AIF2RX_LRCLK_FRC 0x0002 /* AIF2RX_LRCLK_FRC */
3780 #define ARIZONA_AIF2RX_LRCLK_FRC_MASK 0x0002 /* AIF2RX_LRCLK_FRC */
3781 #define ARIZONA_AIF2RX_LRCLK_FRC_SHIFT 1 /* AIF2RX_LRCLK_FRC */
3782 #define ARIZONA_AIF2RX_LRCLK_FRC_WIDTH 1 /* AIF2RX_LRCLK_FRC */
3783 #define ARIZONA_AIF2RX_LRCLK_MSTR 0x0001 /* AIF2RX_LRCLK_MSTR */
3784 #define ARIZONA_AIF2RX_LRCLK_MSTR_MASK 0x0001 /* AIF2RX_LRCLK_MSTR */
3785 #define ARIZONA_AIF2RX_LRCLK_MSTR_SHIFT 0 /* AIF2RX_LRCLK_MSTR */
3786 #define ARIZONA_AIF2RX_LRCLK_MSTR_WIDTH 1 /* AIF2RX_LRCLK_MSTR */
3787
3788 /*
3789 * R1347 (0x543) - AIF2 Rate Ctrl
3790 */
3791 #define ARIZONA_AIF2_RATE_MASK 0x7800 /* AIF2_RATE - [14:11] */
3792 #define ARIZONA_AIF2_RATE_SHIFT 11 /* AIF2_RATE - [14:11] */
3793 #define ARIZONA_AIF2_RATE_WIDTH 4 /* AIF2_RATE - [14:11] */
3794 #define ARIZONA_AIF2_TRI 0x0040 /* AIF2_TRI */
3795 #define ARIZONA_AIF2_TRI_MASK 0x0040 /* AIF2_TRI */
3796 #define ARIZONA_AIF2_TRI_SHIFT 6 /* AIF2_TRI */
3797 #define ARIZONA_AIF2_TRI_WIDTH 1 /* AIF2_TRI */
3798
3799 /*
3800 * R1348 (0x544) - AIF2 Format
3801 */
3802 #define ARIZONA_AIF2_FMT_MASK 0x0007 /* AIF2_FMT - [2:0] */
3803 #define ARIZONA_AIF2_FMT_SHIFT 0 /* AIF2_FMT - [2:0] */
3804 #define ARIZONA_AIF2_FMT_WIDTH 3 /* AIF2_FMT - [2:0] */
3805
3806 /*
3807 * R1349 (0x545) - AIF2 Tx BCLK Rate
3808 */
3809 #define ARIZONA_AIF2TX_BCPF_MASK 0x1FFF /* AIF2TX_BCPF - [12:0] */
3810 #define ARIZONA_AIF2TX_BCPF_SHIFT 0 /* AIF2TX_BCPF - [12:0] */
3811 #define ARIZONA_AIF2TX_BCPF_WIDTH 13 /* AIF2TX_BCPF - [12:0] */
3812
3813 /*
3814 * R1350 (0x546) - AIF2 Rx BCLK Rate
3815 */
3816 #define ARIZONA_AIF2RX_BCPF_MASK 0x1FFF /* AIF2RX_BCPF - [12:0] */
3817 #define ARIZONA_AIF2RX_BCPF_SHIFT 0 /* AIF2RX_BCPF - [12:0] */
3818 #define ARIZONA_AIF2RX_BCPF_WIDTH 13 /* AIF2RX_BCPF - [12:0] */
3819
3820 /*
3821 * R1351 (0x547) - AIF2 Frame Ctrl 1
3822 */
3823 #define ARIZONA_AIF2TX_WL_MASK 0x3F00 /* AIF2TX_WL - [13:8] */
3824 #define ARIZONA_AIF2TX_WL_SHIFT 8 /* AIF2TX_WL - [13:8] */
3825 #define ARIZONA_AIF2TX_WL_WIDTH 6 /* AIF2TX_WL - [13:8] */
3826 #define ARIZONA_AIF2TX_SLOT_LEN_MASK 0x00FF /* AIF2TX_SLOT_LEN - [7:0] */
3827 #define ARIZONA_AIF2TX_SLOT_LEN_SHIFT 0 /* AIF2TX_SLOT_LEN - [7:0] */
3828 #define ARIZONA_AIF2TX_SLOT_LEN_WIDTH 8 /* AIF2TX_SLOT_LEN - [7:0] */
3829
3830 /*
3831 * R1352 (0x548) - AIF2 Frame Ctrl 2
3832 */
3833 #define ARIZONA_AIF2RX_WL_MASK 0x3F00 /* AIF2RX_WL - [13:8] */
3834 #define ARIZONA_AIF2RX_WL_SHIFT 8 /* AIF2RX_WL - [13:8] */
3835 #define ARIZONA_AIF2RX_WL_WIDTH 6 /* AIF2RX_WL - [13:8] */
3836 #define ARIZONA_AIF2RX_SLOT_LEN_MASK 0x00FF /* AIF2RX_SLOT_LEN - [7:0] */
3837 #define ARIZONA_AIF2RX_SLOT_LEN_SHIFT 0 /* AIF2RX_SLOT_LEN - [7:0] */
3838 #define ARIZONA_AIF2RX_SLOT_LEN_WIDTH 8 /* AIF2RX_SLOT_LEN - [7:0] */
3839
3840 /*
3841 * R1353 (0x549) - AIF2 Frame Ctrl 3
3842 */
3843 #define ARIZONA_AIF2TX1_SLOT_MASK 0x003F /* AIF2TX1_SLOT - [5:0] */
3844 #define ARIZONA_AIF2TX1_SLOT_SHIFT 0 /* AIF2TX1_SLOT - [5:0] */
3845 #define ARIZONA_AIF2TX1_SLOT_WIDTH 6 /* AIF2TX1_SLOT - [5:0] */
3846
3847 /*
3848 * R1354 (0x54A) - AIF2 Frame Ctrl 4
3849 */
3850 #define ARIZONA_AIF2TX2_SLOT_MASK 0x003F /* AIF2TX2_SLOT - [5:0] */
3851 #define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */
3852 #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */
3853
3854 /*
3855 * R1355 (0x54B) - AIF2 Frame Ctrl 5
3856 */
3857 #define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */
3858 #define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */
3859 #define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */
3860
3861 /*
3862 * R1356 (0x54C) - AIF2 Frame Ctrl 6
3863 */
3864 #define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */
3865 #define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */
3866 #define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */
3867
3868
3869 /*
3870 * R1357 (0x54D) - AIF2 Frame Ctrl 7
3871 */
3872 #define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */
3873 #define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */
3874 #define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */
3875
3876 /*
3877 * R1358 (0x54E) - AIF2 Frame Ctrl 8
3878 */
3879 #define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */
3880 #define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */
3881 #define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */
3882
3883 /*
3884 * R1361 (0x551) - AIF2 Frame Ctrl 11
3885 */
3886 #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */
3887 #define ARIZONA_AIF2RX1_SLOT_SHIFT 0 /* AIF2RX1_SLOT - [5:0] */
3888 #define ARIZONA_AIF2RX1_SLOT_WIDTH 6 /* AIF2RX1_SLOT - [5:0] */
3889
3890 /*
3891 * R1362 (0x552) - AIF2 Frame Ctrl 12
3892 */
3893 #define ARIZONA_AIF2RX2_SLOT_MASK 0x003F /* AIF2RX2_SLOT - [5:0] */
3894 #define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */
3895 #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */
3896
3897 /*
3898 * R1363 (0x553) - AIF2 Frame Ctrl 13
3899 */
3900 #define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */
3901 #define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */
3902 #define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */
3903
3904 /*
3905 * R1364 (0x554) - AIF2 Frame Ctrl 14
3906 */
3907 #define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */
3908 #define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */
3909 #define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */
3910
3911 /*
3912 * R1365 (0x555) - AIF2 Frame Ctrl 15
3913 */
3914 #define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */
3915 #define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */
3916 #define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */
3917
3918 /*
3919 * R1366 (0x556) - AIF2 Frame Ctrl 16
3920 */
3921 #define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */
3922 #define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */
3923 #define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */
3924
3925 /*
3926 * R1369 (0x559) - AIF2 Tx Enables
3927 */
3928 #define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */
3929 #define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */
3930 #define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */
3931 #define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */
3932 #define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */
3933 #define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */
3934 #define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */
3935 #define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */
3936 #define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */
3937 #define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */
3938 #define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */
3939 #define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */
3940 #define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */
3941 #define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */
3942 #define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */
3943 #define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */
3944 #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */
3945 #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */
3946 #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */
3947 #define ARIZONA_AIF2TX2_ENA_WIDTH 1 /* AIF2TX2_ENA */
3948 #define ARIZONA_AIF2TX1_ENA 0x0001 /* AIF2TX1_ENA */
3949 #define ARIZONA_AIF2TX1_ENA_MASK 0x0001 /* AIF2TX1_ENA */
3950 #define ARIZONA_AIF2TX1_ENA_SHIFT 0 /* AIF2TX1_ENA */
3951 #define ARIZONA_AIF2TX1_ENA_WIDTH 1 /* AIF2TX1_ENA */
3952
3953 /*
3954 * R1370 (0x55A) - AIF2 Rx Enables
3955 */
3956 #define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */
3957 #define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */
3958 #define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */
3959 #define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */
3960 #define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */
3961 #define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */
3962 #define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */
3963 #define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */
3964 #define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */
3965 #define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */
3966 #define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */
3967 #define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */
3968 #define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */
3969 #define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */
3970 #define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */
3971 #define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */
3972 #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */
3973 #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */
3974 #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */
3975 #define ARIZONA_AIF2RX2_ENA_WIDTH 1 /* AIF2RX2_ENA */
3976 #define ARIZONA_AIF2RX1_ENA 0x0001 /* AIF2RX1_ENA */
3977 #define ARIZONA_AIF2RX1_ENA_MASK 0x0001 /* AIF2RX1_ENA */
3978 #define ARIZONA_AIF2RX1_ENA_SHIFT 0 /* AIF2RX1_ENA */
3979 #define ARIZONA_AIF2RX1_ENA_WIDTH 1 /* AIF2RX1_ENA */
3980
3981 /*
3982 * R1371 (0x55B) - AIF2 Force Write
3983 */
3984 #define ARIZONA_AIF2_FRC_WR 0x0001 /* AIF2_FRC_WR */
3985 #define ARIZONA_AIF2_FRC_WR_MASK 0x0001 /* AIF2_FRC_WR */
3986 #define ARIZONA_AIF2_FRC_WR_SHIFT 0 /* AIF2_FRC_WR */
3987 #define ARIZONA_AIF2_FRC_WR_WIDTH 1 /* AIF2_FRC_WR */
3988
3989 /*
3990 * R1408 (0x580) - AIF3 BCLK Ctrl
3991 */
3992 #define ARIZONA_AIF3_BCLK_INV 0x0080 /* AIF3_BCLK_INV */
3993 #define ARIZONA_AIF3_BCLK_INV_MASK 0x0080 /* AIF3_BCLK_INV */
3994 #define ARIZONA_AIF3_BCLK_INV_SHIFT 7 /* AIF3_BCLK_INV */
3995 #define ARIZONA_AIF3_BCLK_INV_WIDTH 1 /* AIF3_BCLK_INV */
3996 #define ARIZONA_AIF3_BCLK_FRC 0x0040 /* AIF3_BCLK_FRC */
3997 #define ARIZONA_AIF3_BCLK_FRC_MASK 0x0040 /* AIF3_BCLK_FRC */
3998 #define ARIZONA_AIF3_BCLK_FRC_SHIFT 6 /* AIF3_BCLK_FRC */
3999 #define ARIZONA_AIF3_BCLK_FRC_WIDTH 1 /* AIF3_BCLK_FRC */
4000 #define ARIZONA_AIF3_BCLK_MSTR 0x0020 /* AIF3_BCLK_MSTR */
4001 #define ARIZONA_AIF3_BCLK_MSTR_MASK 0x0020 /* AIF3_BCLK_MSTR */
4002 #define ARIZONA_AIF3_BCLK_MSTR_SHIFT 5 /* AIF3_BCLK_MSTR */
4003 #define ARIZONA_AIF3_BCLK_MSTR_WIDTH 1 /* AIF3_BCLK_MSTR */
4004 #define ARIZONA_AIF3_BCLK_FREQ_MASK 0x001F /* AIF3_BCLK_FREQ - [4:0] */
4005 #define ARIZONA_AIF3_BCLK_FREQ_SHIFT 0 /* AIF3_BCLK_FREQ - [4:0] */
4006 #define ARIZONA_AIF3_BCLK_FREQ_WIDTH 5 /* AIF3_BCLK_FREQ - [4:0] */
4007
4008 /*
4009 * R1409 (0x581) - AIF3 Tx Pin Ctrl
4010 */
4011 #define ARIZONA_AIF3TX_DAT_TRI 0x0020 /* AIF3TX_DAT_TRI */
4012 #define ARIZONA_AIF3TX_DAT_TRI_MASK 0x0020 /* AIF3TX_DAT_TRI */
4013 #define ARIZONA_AIF3TX_DAT_TRI_SHIFT 5 /* AIF3TX_DAT_TRI */
4014 #define ARIZONA_AIF3TX_DAT_TRI_WIDTH 1 /* AIF3TX_DAT_TRI */
4015 #define ARIZONA_AIF3TX_LRCLK_SRC 0x0008 /* AIF3TX_LRCLK_SRC */
4016 #define ARIZONA_AIF3TX_LRCLK_SRC_MASK 0x0008 /* AIF3TX_LRCLK_SRC */
4017 #define ARIZONA_AIF3TX_LRCLK_SRC_SHIFT 3 /* AIF3TX_LRCLK_SRC */
4018 #define ARIZONA_AIF3TX_LRCLK_SRC_WIDTH 1 /* AIF3TX_LRCLK_SRC */
4019 #define ARIZONA_AIF3TX_LRCLK_INV 0x0004 /* AIF3TX_LRCLK_INV */
4020 #define ARIZONA_AIF3TX_LRCLK_INV_MASK 0x0004 /* AIF3TX_LRCLK_INV */
4021 #define ARIZONA_AIF3TX_LRCLK_INV_SHIFT 2 /* AIF3TX_LRCLK_INV */
4022 #define ARIZONA_AIF3TX_LRCLK_INV_WIDTH 1 /* AIF3TX_LRCLK_INV */
4023 #define ARIZONA_AIF3TX_LRCLK_FRC 0x0002 /* AIF3TX_LRCLK_FRC */
4024 #define ARIZONA_AIF3TX_LRCLK_FRC_MASK 0x0002 /* AIF3TX_LRCLK_FRC */
4025 #define ARIZONA_AIF3TX_LRCLK_FRC_SHIFT 1 /* AIF3TX_LRCLK_FRC */
4026 #define ARIZONA_AIF3TX_LRCLK_FRC_WIDTH 1 /* AIF3TX_LRCLK_FRC */
4027 #define ARIZONA_AIF3TX_LRCLK_MSTR 0x0001 /* AIF3TX_LRCLK_MSTR */
4028 #define ARIZONA_AIF3TX_LRCLK_MSTR_MASK 0x0001 /* AIF3TX_LRCLK_MSTR */
4029 #define ARIZONA_AIF3TX_LRCLK_MSTR_SHIFT 0 /* AIF3TX_LRCLK_MSTR */
4030 #define ARIZONA_AIF3TX_LRCLK_MSTR_WIDTH 1 /* AIF3TX_LRCLK_MSTR */
4031
4032 /*
4033 * R1410 (0x582) - AIF3 Rx Pin Ctrl
4034 */
4035 #define ARIZONA_AIF3RX_LRCLK_INV 0x0004 /* AIF3RX_LRCLK_INV */
4036 #define ARIZONA_AIF3RX_LRCLK_INV_MASK 0x0004 /* AIF3RX_LRCLK_INV */
4037 #define ARIZONA_AIF3RX_LRCLK_INV_SHIFT 2 /* AIF3RX_LRCLK_INV */
4038 #define ARIZONA_AIF3RX_LRCLK_INV_WIDTH 1 /* AIF3RX_LRCLK_INV */
4039 #define ARIZONA_AIF3RX_LRCLK_FRC 0x0002 /* AIF3RX_LRCLK_FRC */
4040 #define ARIZONA_AIF3RX_LRCLK_FRC_MASK 0x0002 /* AIF3RX_LRCLK_FRC */
4041 #define ARIZONA_AIF3RX_LRCLK_FRC_SHIFT 1 /* AIF3RX_LRCLK_FRC */
4042 #define ARIZONA_AIF3RX_LRCLK_FRC_WIDTH 1 /* AIF3RX_LRCLK_FRC */
4043 #define ARIZONA_AIF3RX_LRCLK_MSTR 0x0001 /* AIF3RX_LRCLK_MSTR */
4044 #define ARIZONA_AIF3RX_LRCLK_MSTR_MASK 0x0001 /* AIF3RX_LRCLK_MSTR */
4045 #define ARIZONA_AIF3RX_LRCLK_MSTR_SHIFT 0 /* AIF3RX_LRCLK_MSTR */
4046 #define ARIZONA_AIF3RX_LRCLK_MSTR_WIDTH 1 /* AIF3RX_LRCLK_MSTR */
4047
4048 /*
4049 * R1411 (0x583) - AIF3 Rate Ctrl
4050 */
4051 #define ARIZONA_AIF3_RATE_MASK 0x7800 /* AIF3_RATE - [14:11] */
4052 #define ARIZONA_AIF3_RATE_SHIFT 11 /* AIF3_RATE - [14:11] */
4053 #define ARIZONA_AIF3_RATE_WIDTH 4 /* AIF3_RATE - [14:11] */
4054 #define ARIZONA_AIF3_TRI 0x0040 /* AIF3_TRI */
4055 #define ARIZONA_AIF3_TRI_MASK 0x0040 /* AIF3_TRI */
4056 #define ARIZONA_AIF3_TRI_SHIFT 6 /* AIF3_TRI */
4057 #define ARIZONA_AIF3_TRI_WIDTH 1 /* AIF3_TRI */
4058
4059 /*
4060 * R1412 (0x584) - AIF3 Format
4061 */
4062 #define ARIZONA_AIF3_FMT_MASK 0x0007 /* AIF3_FMT - [2:0] */
4063 #define ARIZONA_AIF3_FMT_SHIFT 0 /* AIF3_FMT - [2:0] */
4064 #define ARIZONA_AIF3_FMT_WIDTH 3 /* AIF3_FMT - [2:0] */
4065
4066 /*
4067 * R1413 (0x585) - AIF3 Tx BCLK Rate
4068 */
4069 #define ARIZONA_AIF3TX_BCPF_MASK 0x1FFF /* AIF3TX_BCPF - [12:0] */
4070 #define ARIZONA_AIF3TX_BCPF_SHIFT 0 /* AIF3TX_BCPF - [12:0] */
4071 #define ARIZONA_AIF3TX_BCPF_WIDTH 13 /* AIF3TX_BCPF - [12:0] */
4072
4073 /*
4074 * R1414 (0x586) - AIF3 Rx BCLK Rate
4075 */
4076 #define ARIZONA_AIF3RX_BCPF_MASK 0x1FFF /* AIF3RX_BCPF - [12:0] */
4077 #define ARIZONA_AIF3RX_BCPF_SHIFT 0 /* AIF3RX_BCPF - [12:0] */
4078 #define ARIZONA_AIF3RX_BCPF_WIDTH 13 /* AIF3RX_BCPF - [12:0] */
4079
4080 /*
4081 * R1415 (0x587) - AIF3 Frame Ctrl 1
4082 */
4083 #define ARIZONA_AIF3TX_WL_MASK 0x3F00 /* AIF3TX_WL - [13:8] */
4084 #define ARIZONA_AIF3TX_WL_SHIFT 8 /* AIF3TX_WL - [13:8] */
4085 #define ARIZONA_AIF3TX_WL_WIDTH 6 /* AIF3TX_WL - [13:8] */
4086 #define ARIZONA_AIF3TX_SLOT_LEN_MASK 0x00FF /* AIF3TX_SLOT_LEN - [7:0] */
4087 #define ARIZONA_AIF3TX_SLOT_LEN_SHIFT 0 /* AIF3TX_SLOT_LEN - [7:0] */
4088 #define ARIZONA_AIF3TX_SLOT_LEN_WIDTH 8 /* AIF3TX_SLOT_LEN - [7:0] */
4089
4090 /*
4091 * R1416 (0x588) - AIF3 Frame Ctrl 2
4092 */
4093 #define ARIZONA_AIF3RX_WL_MASK 0x3F00 /* AIF3RX_WL - [13:8] */
4094 #define ARIZONA_AIF3RX_WL_SHIFT 8 /* AIF3RX_WL - [13:8] */
4095 #define ARIZONA_AIF3RX_WL_WIDTH 6 /* AIF3RX_WL - [13:8] */
4096 #define ARIZONA_AIF3RX_SLOT_LEN_MASK 0x00FF /* AIF3RX_SLOT_LEN - [7:0] */
4097 #define ARIZONA_AIF3RX_SLOT_LEN_SHIFT 0 /* AIF3RX_SLOT_LEN - [7:0] */
4098 #define ARIZONA_AIF3RX_SLOT_LEN_WIDTH 8 /* AIF3RX_SLOT_LEN - [7:0] */
4099
4100 /*
4101 * R1417 (0x589) - AIF3 Frame Ctrl 3
4102 */
4103 #define ARIZONA_AIF3TX1_SLOT_MASK 0x003F /* AIF3TX1_SLOT - [5:0] */
4104 #define ARIZONA_AIF3TX1_SLOT_SHIFT 0 /* AIF3TX1_SLOT - [5:0] */
4105 #define ARIZONA_AIF3TX1_SLOT_WIDTH 6 /* AIF3TX1_SLOT - [5:0] */
4106
4107 /*
4108 * R1418 (0x58A) - AIF3 Frame Ctrl 4
4109 */
4110 #define ARIZONA_AIF3TX2_SLOT_MASK 0x003F /* AIF3TX2_SLOT - [5:0] */
4111 #define ARIZONA_AIF3TX2_SLOT_SHIFT 0 /* AIF3TX2_SLOT - [5:0] */
4112 #define ARIZONA_AIF3TX2_SLOT_WIDTH 6 /* AIF3TX2_SLOT - [5:0] */
4113
4114 /*
4115 * R1425 (0x591) - AIF3 Frame Ctrl 11
4116 */
4117 #define ARIZONA_AIF3RX1_SLOT_MASK 0x003F /* AIF3RX1_SLOT - [5:0] */
4118 #define ARIZONA_AIF3RX1_SLOT_SHIFT 0 /* AIF3RX1_SLOT - [5:0] */
4119 #define ARIZONA_AIF3RX1_SLOT_WIDTH 6 /* AIF3RX1_SLOT - [5:0] */
4120
4121 /*
4122 * R1426 (0x592) - AIF3 Frame Ctrl 12
4123 */
4124 #define ARIZONA_AIF3RX2_SLOT_MASK 0x003F /* AIF3RX2_SLOT - [5:0] */
4125 #define ARIZONA_AIF3RX2_SLOT_SHIFT 0 /* AIF3RX2_SLOT - [5:0] */
4126 #define ARIZONA_AIF3RX2_SLOT_WIDTH 6 /* AIF3RX2_SLOT - [5:0] */
4127
4128 /*
4129 * R1433 (0x599) - AIF3 Tx Enables
4130 */
4131 #define ARIZONA_AIF3TX2_ENA 0x0002 /* AIF3TX2_ENA */
4132 #define ARIZONA_AIF3TX2_ENA_MASK 0x0002 /* AIF3TX2_ENA */
4133 #define ARIZONA_AIF3TX2_ENA_SHIFT 1 /* AIF3TX2_ENA */
4134 #define ARIZONA_AIF3TX2_ENA_WIDTH 1 /* AIF3TX2_ENA */
4135 #define ARIZONA_AIF3TX1_ENA 0x0001 /* AIF3TX1_ENA */
4136 #define ARIZONA_AIF3TX1_ENA_MASK 0x0001 /* AIF3TX1_ENA */
4137 #define ARIZONA_AIF3TX1_ENA_SHIFT 0 /* AIF3TX1_ENA */
4138 #define ARIZONA_AIF3TX1_ENA_WIDTH 1 /* AIF3TX1_ENA */
4139
4140 /*
4141 * R1434 (0x59A) - AIF3 Rx Enables
4142 */
4143 #define ARIZONA_AIF3RX2_ENA 0x0002 /* AIF3RX2_ENA */
4144 #define ARIZONA_AIF3RX2_ENA_MASK 0x0002 /* AIF3RX2_ENA */
4145 #define ARIZONA_AIF3RX2_ENA_SHIFT 1 /* AIF3RX2_ENA */
4146 #define ARIZONA_AIF3RX2_ENA_WIDTH 1 /* AIF3RX2_ENA */
4147 #define ARIZONA_AIF3RX1_ENA 0x0001 /* AIF3RX1_ENA */
4148 #define ARIZONA_AIF3RX1_ENA_MASK 0x0001 /* AIF3RX1_ENA */
4149 #define ARIZONA_AIF3RX1_ENA_SHIFT 0 /* AIF3RX1_ENA */
4150 #define ARIZONA_AIF3RX1_ENA_WIDTH 1 /* AIF3RX1_ENA */
4151
4152 /*
4153 * R1435 (0x59B) - AIF3 Force Write
4154 */
4155 #define ARIZONA_AIF3_FRC_WR 0x0001 /* AIF3_FRC_WR */
4156 #define ARIZONA_AIF3_FRC_WR_MASK 0x0001 /* AIF3_FRC_WR */
4157 #define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */
4158 #define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */
4159
4160 /*
4161 * R1507 (0x5E3) - SLIMbus Framer Ref Gear
4162 */
4163 #define ARIZONA_SLIMCLK_SRC 0x0010 /* SLIMCLK_SRC */
4164 #define ARIZONA_SLIMCLK_SRC_MASK 0x0010 /* SLIMCLK_SRC */
4165 #define ARIZONA_SLIMCLK_SRC_SHIFT 4 /* SLIMCLK_SRC */
4166 #define ARIZONA_SLIMCLK_SRC_WIDTH 1 /* SLIMCLK_SRC */
4167 #define ARIZONA_FRAMER_REF_GEAR_MASK 0x000F /* FRAMER_REF_GEAR - [3:0] */
4168 #define ARIZONA_FRAMER_REF_GEAR_SHIFT 0 /* FRAMER_REF_GEAR - [3:0] */
4169 #define ARIZONA_FRAMER_REF_GEAR_WIDTH 4 /* FRAMER_REF_GEAR - [3:0] */
4170
4171 /*
4172 * R1509 (0x5E5) - SLIMbus Rates 1
4173 */
4174 #define ARIZONA_SLIMRX2_RATE_MASK 0x7800 /* SLIMRX2_RATE - [14:11] */
4175 #define ARIZONA_SLIMRX2_RATE_SHIFT 11 /* SLIMRX2_RATE - [14:11] */
4176 #define ARIZONA_SLIMRX2_RATE_WIDTH 4 /* SLIMRX2_RATE - [14:11] */
4177 #define ARIZONA_SLIMRX1_RATE_MASK 0x0078 /* SLIMRX1_RATE - [6:3] */
4178 #define ARIZONA_SLIMRX1_RATE_SHIFT 3 /* SLIMRX1_RATE - [6:3] */
4179 #define ARIZONA_SLIMRX1_RATE_WIDTH 4 /* SLIMRX1_RATE - [6:3] */
4180
4181 /*
4182 * R1510 (0x5E6) - SLIMbus Rates 2
4183 */
4184 #define ARIZONA_SLIMRX4_RATE_MASK 0x7800 /* SLIMRX4_RATE - [14:11] */
4185 #define ARIZONA_SLIMRX4_RATE_SHIFT 11 /* SLIMRX4_RATE - [14:11] */
4186 #define ARIZONA_SLIMRX4_RATE_WIDTH 4 /* SLIMRX4_RATE - [14:11] */
4187 #define ARIZONA_SLIMRX3_RATE_MASK 0x0078 /* SLIMRX3_RATE - [6:3] */
4188 #define ARIZONA_SLIMRX3_RATE_SHIFT 3 /* SLIMRX3_RATE - [6:3] */
4189 #define ARIZONA_SLIMRX3_RATE_WIDTH 4 /* SLIMRX3_RATE - [6:3] */
4190
4191 /*
4192 * R1511 (0x5E7) - SLIMbus Rates 3
4193 */
4194 #define ARIZONA_SLIMRX6_RATE_MASK 0x7800 /* SLIMRX6_RATE - [14:11] */
4195 #define ARIZONA_SLIMRX6_RATE_SHIFT 11 /* SLIMRX6_RATE - [14:11] */
4196 #define ARIZONA_SLIMRX6_RATE_WIDTH 4 /* SLIMRX6_RATE - [14:11] */
4197 #define ARIZONA_SLIMRX5_RATE_MASK 0x0078 /* SLIMRX5_RATE - [6:3] */
4198 #define ARIZONA_SLIMRX5_RATE_SHIFT 3 /* SLIMRX5_RATE - [6:3] */
4199 #define ARIZONA_SLIMRX5_RATE_WIDTH 4 /* SLIMRX5_RATE - [6:3] */
4200
4201 /*
4202 * R1512 (0x5E8) - SLIMbus Rates 4
4203 */
4204 #define ARIZONA_SLIMRX8_RATE_MASK 0x7800 /* SLIMRX8_RATE - [14:11] */
4205 #define ARIZONA_SLIMRX8_RATE_SHIFT 11 /* SLIMRX8_RATE - [14:11] */
4206 #define ARIZONA_SLIMRX8_RATE_WIDTH 4 /* SLIMRX8_RATE - [14:11] */
4207 #define ARIZONA_SLIMRX7_RATE_MASK 0x0078 /* SLIMRX7_RATE - [6:3] */
4208 #define ARIZONA_SLIMRX7_RATE_SHIFT 3 /* SLIMRX7_RATE - [6:3] */
4209 #define ARIZONA_SLIMRX7_RATE_WIDTH 4 /* SLIMRX7_RATE - [6:3] */
4210
4211 /*
4212 * R1513 (0x5E9) - SLIMbus Rates 5
4213 */
4214 #define ARIZONA_SLIMTX2_RATE_MASK 0x7800 /* SLIMTX2_RATE - [14:11] */
4215 #define ARIZONA_SLIMTX2_RATE_SHIFT 11 /* SLIMTX2_RATE - [14:11] */
4216 #define ARIZONA_SLIMTX2_RATE_WIDTH 4 /* SLIMTX2_RATE - [14:11] */
4217 #define ARIZONA_SLIMTX1_RATE_MASK 0x0078 /* SLIMTX1_RATE - [6:3] */
4218 #define ARIZONA_SLIMTX1_RATE_SHIFT 3 /* SLIMTX1_RATE - [6:3] */
4219 #define ARIZONA_SLIMTX1_RATE_WIDTH 4 /* SLIMTX1_RATE - [6:3] */
4220
4221 /*
4222 * R1514 (0x5EA) - SLIMbus Rates 6
4223 */
4224 #define ARIZONA_SLIMTX4_RATE_MASK 0x7800 /* SLIMTX4_RATE - [14:11] */
4225 #define ARIZONA_SLIMTX4_RATE_SHIFT 11 /* SLIMTX4_RATE - [14:11] */
4226 #define ARIZONA_SLIMTX4_RATE_WIDTH 4 /* SLIMTX4_RATE - [14:11] */
4227 #define ARIZONA_SLIMTX3_RATE_MASK 0x0078 /* SLIMTX3_RATE - [6:3] */
4228 #define ARIZONA_SLIMTX3_RATE_SHIFT 3 /* SLIMTX3_RATE - [6:3] */
4229 #define ARIZONA_SLIMTX3_RATE_WIDTH 4 /* SLIMTX3_RATE - [6:3] */
4230
4231 /*
4232 * R1515 (0x5EB) - SLIMbus Rates 7
4233 */
4234 #define ARIZONA_SLIMTX6_RATE_MASK 0x7800 /* SLIMTX6_RATE - [14:11] */
4235 #define ARIZONA_SLIMTX6_RATE_SHIFT 11 /* SLIMTX6_RATE - [14:11] */
4236 #define ARIZONA_SLIMTX6_RATE_WIDTH 4 /* SLIMTX6_RATE - [14:11] */
4237 #define ARIZONA_SLIMTX5_RATE_MASK 0x0078 /* SLIMTX5_RATE - [6:3] */
4238 #define ARIZONA_SLIMTX5_RATE_SHIFT 3 /* SLIMTX5_RATE - [6:3] */
4239 #define ARIZONA_SLIMTX5_RATE_WIDTH 4 /* SLIMTX5_RATE - [6:3] */
4240
4241 /*
4242 * R1516 (0x5EC) - SLIMbus Rates 8
4243 */
4244 #define ARIZONA_SLIMTX8_RATE_MASK 0x7800 /* SLIMTX8_RATE - [14:11] */
4245 #define ARIZONA_SLIMTX8_RATE_SHIFT 11 /* SLIMTX8_RATE - [14:11] */
4246 #define ARIZONA_SLIMTX8_RATE_WIDTH 4 /* SLIMTX8_RATE - [14:11] */
4247 #define ARIZONA_SLIMTX7_RATE_MASK 0x0078 /* SLIMTX7_RATE - [6:3] */
4248 #define ARIZONA_SLIMTX7_RATE_SHIFT 3 /* SLIMTX7_RATE - [6:3] */
4249 #define ARIZONA_SLIMTX7_RATE_WIDTH 4 /* SLIMTX7_RATE - [6:3] */
4250
4251 /*
4252 * R1525 (0x5F5) - SLIMbus RX Channel Enable
4253 */
4254 #define ARIZONA_SLIMRX8_ENA 0x0080 /* SLIMRX8_ENA */
4255 #define ARIZONA_SLIMRX8_ENA_MASK 0x0080 /* SLIMRX8_ENA */
4256 #define ARIZONA_SLIMRX8_ENA_SHIFT 7 /* SLIMRX8_ENA */
4257 #define ARIZONA_SLIMRX8_ENA_WIDTH 1 /* SLIMRX8_ENA */
4258 #define ARIZONA_SLIMRX7_ENA 0x0040 /* SLIMRX7_ENA */
4259 #define ARIZONA_SLIMRX7_ENA_MASK 0x0040 /* SLIMRX7_ENA */
4260 #define ARIZONA_SLIMRX7_ENA_SHIFT 6 /* SLIMRX7_ENA */
4261 #define ARIZONA_SLIMRX7_ENA_WIDTH 1 /* SLIMRX7_ENA */
4262 #define ARIZONA_SLIMRX6_ENA 0x0020 /* SLIMRX6_ENA */
4263 #define ARIZONA_SLIMRX6_ENA_MASK 0x0020 /* SLIMRX6_ENA */
4264 #define ARIZONA_SLIMRX6_ENA_SHIFT 5 /* SLIMRX6_ENA */
4265 #define ARIZONA_SLIMRX6_ENA_WIDTH 1 /* SLIMRX6_ENA */
4266 #define ARIZONA_SLIMRX5_ENA 0x0010 /* SLIMRX5_ENA */
4267 #define ARIZONA_SLIMRX5_ENA_MASK 0x0010 /* SLIMRX5_ENA */
4268 #define ARIZONA_SLIMRX5_ENA_SHIFT 4 /* SLIMRX5_ENA */
4269 #define ARIZONA_SLIMRX5_ENA_WIDTH 1 /* SLIMRX5_ENA */
4270 #define ARIZONA_SLIMRX4_ENA 0x0008 /* SLIMRX4_ENA */
4271 #define ARIZONA_SLIMRX4_ENA_MASK 0x0008 /* SLIMRX4_ENA */
4272 #define ARIZONA_SLIMRX4_ENA_SHIFT 3 /* SLIMRX4_ENA */
4273 #define ARIZONA_SLIMRX4_ENA_WIDTH 1 /* SLIMRX4_ENA */
4274 #define ARIZONA_SLIMRX3_ENA 0x0004 /* SLIMRX3_ENA */
4275 #define ARIZONA_SLIMRX3_ENA_MASK 0x0004 /* SLIMRX3_ENA */
4276 #define ARIZONA_SLIMRX3_ENA_SHIFT 2 /* SLIMRX3_ENA */
4277 #define ARIZONA_SLIMRX3_ENA_WIDTH 1 /* SLIMRX3_ENA */
4278 #define ARIZONA_SLIMRX2_ENA 0x0002 /* SLIMRX2_ENA */
4279 #define ARIZONA_SLIMRX2_ENA_MASK 0x0002 /* SLIMRX2_ENA */
4280 #define ARIZONA_SLIMRX2_ENA_SHIFT 1 /* SLIMRX2_ENA */
4281 #define ARIZONA_SLIMRX2_ENA_WIDTH 1 /* SLIMRX2_ENA */
4282 #define ARIZONA_SLIMRX1_ENA 0x0001 /* SLIMRX1_ENA */
4283 #define ARIZONA_SLIMRX1_ENA_MASK 0x0001 /* SLIMRX1_ENA */
4284 #define ARIZONA_SLIMRX1_ENA_SHIFT 0 /* SLIMRX1_ENA */
4285 #define ARIZONA_SLIMRX1_ENA_WIDTH 1 /* SLIMRX1_ENA */
4286
4287 /*
4288 * R1526 (0x5F6) - SLIMbus TX Channel Enable
4289 */
4290 #define ARIZONA_SLIMTX8_ENA 0x0080 /* SLIMTX8_ENA */
4291 #define ARIZONA_SLIMTX8_ENA_MASK 0x0080 /* SLIMTX8_ENA */
4292 #define ARIZONA_SLIMTX8_ENA_SHIFT 7 /* SLIMTX8_ENA */
4293 #define ARIZONA_SLIMTX8_ENA_WIDTH 1 /* SLIMTX8_ENA */
4294 #define ARIZONA_SLIMTX7_ENA 0x0040 /* SLIMTX7_ENA */
4295 #define ARIZONA_SLIMTX7_ENA_MASK 0x0040 /* SLIMTX7_ENA */
4296 #define ARIZONA_SLIMTX7_ENA_SHIFT 6 /* SLIMTX7_ENA */
4297 #define ARIZONA_SLIMTX7_ENA_WIDTH 1 /* SLIMTX7_ENA */
4298 #define ARIZONA_SLIMTX6_ENA 0x0020 /* SLIMTX6_ENA */
4299 #define ARIZONA_SLIMTX6_ENA_MASK 0x0020 /* SLIMTX6_ENA */
4300 #define ARIZONA_SLIMTX6_ENA_SHIFT 5 /* SLIMTX6_ENA */
4301 #define ARIZONA_SLIMTX6_ENA_WIDTH 1 /* SLIMTX6_ENA */
4302 #define ARIZONA_SLIMTX5_ENA 0x0010 /* SLIMTX5_ENA */
4303 #define ARIZONA_SLIMTX5_ENA_MASK 0x0010 /* SLIMTX5_ENA */
4304 #define ARIZONA_SLIMTX5_ENA_SHIFT 4 /* SLIMTX5_ENA */
4305 #define ARIZONA_SLIMTX5_ENA_WIDTH 1 /* SLIMTX5_ENA */
4306 #define ARIZONA_SLIMTX4_ENA 0x0008 /* SLIMTX4_ENA */
4307 #define ARIZONA_SLIMTX4_ENA_MASK 0x0008 /* SLIMTX4_ENA */
4308 #define ARIZONA_SLIMTX4_ENA_SHIFT 3 /* SLIMTX4_ENA */
4309 #define ARIZONA_SLIMTX4_ENA_WIDTH 1 /* SLIMTX4_ENA */
4310 #define ARIZONA_SLIMTX3_ENA 0x0004 /* SLIMTX3_ENA */
4311 #define ARIZONA_SLIMTX3_ENA_MASK 0x0004 /* SLIMTX3_ENA */
4312 #define ARIZONA_SLIMTX3_ENA_SHIFT 2 /* SLIMTX3_ENA */
4313 #define ARIZONA_SLIMTX3_ENA_WIDTH 1 /* SLIMTX3_ENA */
4314 #define ARIZONA_SLIMTX2_ENA 0x0002 /* SLIMTX2_ENA */
4315 #define ARIZONA_SLIMTX2_ENA_MASK 0x0002 /* SLIMTX2_ENA */
4316 #define ARIZONA_SLIMTX2_ENA_SHIFT 1 /* SLIMTX2_ENA */
4317 #define ARIZONA_SLIMTX2_ENA_WIDTH 1 /* SLIMTX2_ENA */
4318 #define ARIZONA_SLIMTX1_ENA 0x0001 /* SLIMTX1_ENA */
4319 #define ARIZONA_SLIMTX1_ENA_MASK 0x0001 /* SLIMTX1_ENA */
4320 #define ARIZONA_SLIMTX1_ENA_SHIFT 0 /* SLIMTX1_ENA */
4321 #define ARIZONA_SLIMTX1_ENA_WIDTH 1 /* SLIMTX1_ENA */
4322
4323 /*
4324 * R1527 (0x5F7) - SLIMbus RX Port Status
4325 */
4326 #define ARIZONA_SLIMRX8_PORT_STS 0x0080 /* SLIMRX8_PORT_STS */
4327 #define ARIZONA_SLIMRX8_PORT_STS_MASK 0x0080 /* SLIMRX8_PORT_STS */
4328 #define ARIZONA_SLIMRX8_PORT_STS_SHIFT 7 /* SLIMRX8_PORT_STS */
4329 #define ARIZONA_SLIMRX8_PORT_STS_WIDTH 1 /* SLIMRX8_PORT_STS */
4330 #define ARIZONA_SLIMRX7_PORT_STS 0x0040 /* SLIMRX7_PORT_STS */
4331 #define ARIZONA_SLIMRX7_PORT_STS_MASK 0x0040 /* SLIMRX7_PORT_STS */
4332 #define ARIZONA_SLIMRX7_PORT_STS_SHIFT 6 /* SLIMRX7_PORT_STS */
4333 #define ARIZONA_SLIMRX7_PORT_STS_WIDTH 1 /* SLIMRX7_PORT_STS */
4334 #define ARIZONA_SLIMRX6_PORT_STS 0x0020 /* SLIMRX6_PORT_STS */
4335 #define ARIZONA_SLIMRX6_PORT_STS_MASK 0x0020 /* SLIMRX6_PORT_STS */
4336 #define ARIZONA_SLIMRX6_PORT_STS_SHIFT 5 /* SLIMRX6_PORT_STS */
4337 #define ARIZONA_SLIMRX6_PORT_STS_WIDTH 1 /* SLIMRX6_PORT_STS */
4338 #define ARIZONA_SLIMRX5_PORT_STS 0x0010 /* SLIMRX5_PORT_STS */
4339 #define ARIZONA_SLIMRX5_PORT_STS_MASK 0x0010 /* SLIMRX5_PORT_STS */
4340 #define ARIZONA_SLIMRX5_PORT_STS_SHIFT 4 /* SLIMRX5_PORT_STS */
4341 #define ARIZONA_SLIMRX5_PORT_STS_WIDTH 1 /* SLIMRX5_PORT_STS */
4342 #define ARIZONA_SLIMRX4_PORT_STS 0x0008 /* SLIMRX4_PORT_STS */
4343 #define ARIZONA_SLIMRX4_PORT_STS_MASK 0x0008 /* SLIMRX4_PORT_STS */
4344 #define ARIZONA_SLIMRX4_PORT_STS_SHIFT 3 /* SLIMRX4_PORT_STS */
4345 #define ARIZONA_SLIMRX4_PORT_STS_WIDTH 1 /* SLIMRX4_PORT_STS */
4346 #define ARIZONA_SLIMRX3_PORT_STS 0x0004 /* SLIMRX3_PORT_STS */
4347 #define ARIZONA_SLIMRX3_PORT_STS_MASK 0x0004 /* SLIMRX3_PORT_STS */
4348 #define ARIZONA_SLIMRX3_PORT_STS_SHIFT 2 /* SLIMRX3_PORT_STS */
4349 #define ARIZONA_SLIMRX3_PORT_STS_WIDTH 1 /* SLIMRX3_PORT_STS */
4350 #define ARIZONA_SLIMRX2_PORT_STS 0x0002 /* SLIMRX2_PORT_STS */
4351 #define ARIZONA_SLIMRX2_PORT_STS_MASK 0x0002 /* SLIMRX2_PORT_STS */
4352 #define ARIZONA_SLIMRX2_PORT_STS_SHIFT 1 /* SLIMRX2_PORT_STS */
4353 #define ARIZONA_SLIMRX2_PORT_STS_WIDTH 1 /* SLIMRX2_PORT_STS */
4354 #define ARIZONA_SLIMRX1_PORT_STS 0x0001 /* SLIMRX1_PORT_STS */
4355 #define ARIZONA_SLIMRX1_PORT_STS_MASK 0x0001 /* SLIMRX1_PORT_STS */
4356 #define ARIZONA_SLIMRX1_PORT_STS_SHIFT 0 /* SLIMRX1_PORT_STS */
4357 #define ARIZONA_SLIMRX1_PORT_STS_WIDTH 1 /* SLIMRX1_PORT_STS */
4358
4359 /*
4360 * R1528 (0x5F8) - SLIMbus TX Port Status
4361 */
4362 #define ARIZONA_SLIMTX8_PORT_STS 0x0080 /* SLIMTX8_PORT_STS */
4363 #define ARIZONA_SLIMTX8_PORT_STS_MASK 0x0080 /* SLIMTX8_PORT_STS */
4364 #define ARIZONA_SLIMTX8_PORT_STS_SHIFT 7 /* SLIMTX8_PORT_STS */
4365 #define ARIZONA_SLIMTX8_PORT_STS_WIDTH 1 /* SLIMTX8_PORT_STS */
4366 #define ARIZONA_SLIMTX7_PORT_STS 0x0040 /* SLIMTX7_PORT_STS */
4367 #define ARIZONA_SLIMTX7_PORT_STS_MASK 0x0040 /* SLIMTX7_PORT_STS */
4368 #define ARIZONA_SLIMTX7_PORT_STS_SHIFT 6 /* SLIMTX7_PORT_STS */
4369 #define ARIZONA_SLIMTX7_PORT_STS_WIDTH 1 /* SLIMTX7_PORT_STS */
4370 #define ARIZONA_SLIMTX6_PORT_STS 0x0020 /* SLIMTX6_PORT_STS */
4371 #define ARIZONA_SLIMTX6_PORT_STS_MASK 0x0020 /* SLIMTX6_PORT_STS */
4372 #define ARIZONA_SLIMTX6_PORT_STS_SHIFT 5 /* SLIMTX6_PORT_STS */
4373 #define ARIZONA_SLIMTX6_PORT_STS_WIDTH 1 /* SLIMTX6_PORT_STS */
4374 #define ARIZONA_SLIMTX5_PORT_STS 0x0010 /* SLIMTX5_PORT_STS */
4375 #define ARIZONA_SLIMTX5_PORT_STS_MASK 0x0010 /* SLIMTX5_PORT_STS */
4376 #define ARIZONA_SLIMTX5_PORT_STS_SHIFT 4 /* SLIMTX5_PORT_STS */
4377 #define ARIZONA_SLIMTX5_PORT_STS_WIDTH 1 /* SLIMTX5_PORT_STS */
4378 #define ARIZONA_SLIMTX4_PORT_STS 0x0008 /* SLIMTX4_PORT_STS */
4379 #define ARIZONA_SLIMTX4_PORT_STS_MASK 0x0008 /* SLIMTX4_PORT_STS */
4380 #define ARIZONA_SLIMTX4_PORT_STS_SHIFT 3 /* SLIMTX4_PORT_STS */
4381 #define ARIZONA_SLIMTX4_PORT_STS_WIDTH 1 /* SLIMTX4_PORT_STS */
4382 #define ARIZONA_SLIMTX3_PORT_STS 0x0004 /* SLIMTX3_PORT_STS */
4383 #define ARIZONA_SLIMTX3_PORT_STS_MASK 0x0004 /* SLIMTX3_PORT_STS */
4384 #define ARIZONA_SLIMTX3_PORT_STS_SHIFT 2 /* SLIMTX3_PORT_STS */
4385 #define ARIZONA_SLIMTX3_PORT_STS_WIDTH 1 /* SLIMTX3_PORT_STS */
4386 #define ARIZONA_SLIMTX2_PORT_STS 0x0002 /* SLIMTX2_PORT_STS */
4387 #define ARIZONA_SLIMTX2_PORT_STS_MASK 0x0002 /* SLIMTX2_PORT_STS */
4388 #define ARIZONA_SLIMTX2_PORT_STS_SHIFT 1 /* SLIMTX2_PORT_STS */
4389 #define ARIZONA_SLIMTX2_PORT_STS_WIDTH 1 /* SLIMTX2_PORT_STS */
4390 #define ARIZONA_SLIMTX1_PORT_STS 0x0001 /* SLIMTX1_PORT_STS */
4391 #define ARIZONA_SLIMTX1_PORT_STS_MASK 0x0001 /* SLIMTX1_PORT_STS */
4392 #define ARIZONA_SLIMTX1_PORT_STS_SHIFT 0 /* SLIMTX1_PORT_STS */
4393 #define ARIZONA_SLIMTX1_PORT_STS_WIDTH 1 /* SLIMTX1_PORT_STS */
4394
4395 /*
4396 * R3087 (0xC0F) - IRQ CTRL 1
4397 */
4398 #define ARIZONA_IRQ_POL 0x0400 /* IRQ_POL */
4399 #define ARIZONA_IRQ_POL_MASK 0x0400 /* IRQ_POL */
4400 #define ARIZONA_IRQ_POL_SHIFT 10 /* IRQ_POL */
4401 #define ARIZONA_IRQ_POL_WIDTH 1 /* IRQ_POL */
4402 #define ARIZONA_IRQ_OP_CFG 0x0200 /* IRQ_OP_CFG */
4403 #define ARIZONA_IRQ_OP_CFG_MASK 0x0200 /* IRQ_OP_CFG */
4404 #define ARIZONA_IRQ_OP_CFG_SHIFT 9 /* IRQ_OP_CFG */
4405 #define ARIZONA_IRQ_OP_CFG_WIDTH 1 /* IRQ_OP_CFG */
4406
4407 /*
4408 * R3088 (0xC10) - GPIO Debounce Config
4409 */
4410 #define ARIZONA_GP_DBTIME_MASK 0xF000 /* GP_DBTIME - [15:12] */
4411 #define ARIZONA_GP_DBTIME_SHIFT 12 /* GP_DBTIME - [15:12] */
4412 #define ARIZONA_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [15:12] */
4413
4414 /*
4415 * R3104 (0xC20) - Misc Pad Ctrl 1
4416 */
4417 #define ARIZONA_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */
4418 #define ARIZONA_LDO1ENA_PD_MASK 0x8000 /* LDO1ENA_PD */
4419 #define ARIZONA_LDO1ENA_PD_SHIFT 15 /* LDO1ENA_PD */
4420 #define ARIZONA_LDO1ENA_PD_WIDTH 1 /* LDO1ENA_PD */
4421 #define ARIZONA_MCLK2_PD 0x2000 /* MCLK2_PD */
4422 #define ARIZONA_MCLK2_PD_MASK 0x2000 /* MCLK2_PD */
4423 #define ARIZONA_MCLK2_PD_SHIFT 13 /* MCLK2_PD */
4424 #define ARIZONA_MCLK2_PD_WIDTH 1 /* MCLK2_PD */
4425 #define ARIZONA_RSTB_PU 0x0002 /* RSTB_PU */
4426 #define ARIZONA_RSTB_PU_MASK 0x0002 /* RSTB_PU */
4427 #define ARIZONA_RSTB_PU_SHIFT 1 /* RSTB_PU */
4428 #define ARIZONA_RSTB_PU_WIDTH 1 /* RSTB_PU */
4429
4430 /*
4431 * R3105 (0xC21) - Misc Pad Ctrl 2
4432 */
4433 #define ARIZONA_MCLK1_PD 0x1000 /* MCLK1_PD */
4434 #define ARIZONA_MCLK1_PD_MASK 0x1000 /* MCLK1_PD */
4435 #define ARIZONA_MCLK1_PD_SHIFT 12 /* MCLK1_PD */
4436 #define ARIZONA_MCLK1_PD_WIDTH 1 /* MCLK1_PD */
4437 #define ARIZONA_MICD_PD 0x0100 /* MICD_PD */
4438 #define ARIZONA_MICD_PD_MASK 0x0100 /* MICD_PD */
4439 #define ARIZONA_MICD_PD_SHIFT 8 /* MICD_PD */
4440 #define ARIZONA_MICD_PD_WIDTH 1 /* MICD_PD */
4441 #define ARIZONA_ADDR_PD 0x0001 /* ADDR_PD */
4442 #define ARIZONA_ADDR_PD_MASK 0x0001 /* ADDR_PD */
4443 #define ARIZONA_ADDR_PD_SHIFT 0 /* ADDR_PD */
4444 #define ARIZONA_ADDR_PD_WIDTH 1 /* ADDR_PD */
4445
4446 /*
4447 * R3106 (0xC22) - Misc Pad Ctrl 3
4448 */
4449 #define ARIZONA_DMICDAT4_PD 0x0008 /* DMICDAT4_PD */
4450 #define ARIZONA_DMICDAT4_PD_MASK 0x0008 /* DMICDAT4_PD */
4451 #define ARIZONA_DMICDAT4_PD_SHIFT 3 /* DMICDAT4_PD */
4452 #define ARIZONA_DMICDAT4_PD_WIDTH 1 /* DMICDAT4_PD */
4453 #define ARIZONA_DMICDAT3_PD 0x0004 /* DMICDAT3_PD */
4454 #define ARIZONA_DMICDAT3_PD_MASK 0x0004 /* DMICDAT3_PD */
4455 #define ARIZONA_DMICDAT3_PD_SHIFT 2 /* DMICDAT3_PD */
4456 #define ARIZONA_DMICDAT3_PD_WIDTH 1 /* DMICDAT3_PD */
4457 #define ARIZONA_DMICDAT2_PD 0x0002 /* DMICDAT2_PD */
4458 #define ARIZONA_DMICDAT2_PD_MASK 0x0002 /* DMICDAT2_PD */
4459 #define ARIZONA_DMICDAT2_PD_SHIFT 1 /* DMICDAT2_PD */
4460 #define ARIZONA_DMICDAT2_PD_WIDTH 1 /* DMICDAT2_PD */
4461 #define ARIZONA_DMICDAT1_PD 0x0001 /* DMICDAT1_PD */
4462 #define ARIZONA_DMICDAT1_PD_MASK 0x0001 /* DMICDAT1_PD */
4463 #define ARIZONA_DMICDAT1_PD_SHIFT 0 /* DMICDAT1_PD */
4464 #define ARIZONA_DMICDAT1_PD_WIDTH 1 /* DMICDAT1_PD */
4465
4466 /*
4467 * R3107 (0xC23) - Misc Pad Ctrl 4
4468 */
4469 #define ARIZONA_AIF1RXLRCLK_PU 0x0020 /* AIF1RXLRCLK_PU */
4470 #define ARIZONA_AIF1RXLRCLK_PU_MASK 0x0020 /* AIF1RXLRCLK_PU */
4471 #define ARIZONA_AIF1RXLRCLK_PU_SHIFT 5 /* AIF1RXLRCLK_PU */
4472 #define ARIZONA_AIF1RXLRCLK_PU_WIDTH 1 /* AIF1RXLRCLK_PU */
4473 #define ARIZONA_AIF1RXLRCLK_PD 0x0010 /* AIF1RXLRCLK_PD */
4474 #define ARIZONA_AIF1RXLRCLK_PD_MASK 0x0010 /* AIF1RXLRCLK_PD */
4475 #define ARIZONA_AIF1RXLRCLK_PD_SHIFT 4 /* AIF1RXLRCLK_PD */
4476 #define ARIZONA_AIF1RXLRCLK_PD_WIDTH 1 /* AIF1RXLRCLK_PD */
4477 #define ARIZONA_AIF1BCLK_PU 0x0008 /* AIF1BCLK_PU */
4478 #define ARIZONA_AIF1BCLK_PU_MASK 0x0008 /* AIF1BCLK_PU */
4479 #define ARIZONA_AIF1BCLK_PU_SHIFT 3 /* AIF1BCLK_PU */
4480 #define ARIZONA_AIF1BCLK_PU_WIDTH 1 /* AIF1BCLK_PU */
4481 #define ARIZONA_AIF1BCLK_PD 0x0004 /* AIF1BCLK_PD */
4482 #define ARIZONA_AIF1BCLK_PD_MASK 0x0004 /* AIF1BCLK_PD */
4483 #define ARIZONA_AIF1BCLK_PD_SHIFT 2 /* AIF1BCLK_PD */
4484 #define ARIZONA_AIF1BCLK_PD_WIDTH 1 /* AIF1BCLK_PD */
4485 #define ARIZONA_AIF1RXDAT_PU 0x0002 /* AIF1RXDAT_PU */
4486 #define ARIZONA_AIF1RXDAT_PU_MASK 0x0002 /* AIF1RXDAT_PU */
4487 #define ARIZONA_AIF1RXDAT_PU_SHIFT 1 /* AIF1RXDAT_PU */
4488 #define ARIZONA_AIF1RXDAT_PU_WIDTH 1 /* AIF1RXDAT_PU */
4489 #define ARIZONA_AIF1RXDAT_PD 0x0001 /* AIF1RXDAT_PD */
4490 #define ARIZONA_AIF1RXDAT_PD_MASK 0x0001 /* AIF1RXDAT_PD */
4491 #define ARIZONA_AIF1RXDAT_PD_SHIFT 0 /* AIF1RXDAT_PD */
4492 #define ARIZONA_AIF1RXDAT_PD_WIDTH 1 /* AIF1RXDAT_PD */
4493
4494 /*
4495 * R3108 (0xC24) - Misc Pad Ctrl 5
4496 */
4497 #define ARIZONA_AIF2RXLRCLK_PU 0x0020 /* AIF2RXLRCLK_PU */
4498 #define ARIZONA_AIF2RXLRCLK_PU_MASK 0x0020 /* AIF2RXLRCLK_PU */
4499 #define ARIZONA_AIF2RXLRCLK_PU_SHIFT 5 /* AIF2RXLRCLK_PU */
4500 #define ARIZONA_AIF2RXLRCLK_PU_WIDTH 1 /* AIF2RXLRCLK_PU */
4501 #define ARIZONA_AIF2RXLRCLK_PD 0x0010 /* AIF2RXLRCLK_PD */
4502 #define ARIZONA_AIF2RXLRCLK_PD_MASK 0x0010 /* AIF2RXLRCLK_PD */
4503 #define ARIZONA_AIF2RXLRCLK_PD_SHIFT 4 /* AIF2RXLRCLK_PD */
4504 #define ARIZONA_AIF2RXLRCLK_PD_WIDTH 1 /* AIF2RXLRCLK_PD */
4505 #define ARIZONA_AIF2BCLK_PU 0x0008 /* AIF2BCLK_PU */
4506 #define ARIZONA_AIF2BCLK_PU_MASK 0x0008 /* AIF2BCLK_PU */
4507 #define ARIZONA_AIF2BCLK_PU_SHIFT 3 /* AIF2BCLK_PU */
4508 #define ARIZONA_AIF2BCLK_PU_WIDTH 1 /* AIF2BCLK_PU */
4509 #define ARIZONA_AIF2BCLK_PD 0x0004 /* AIF2BCLK_PD */
4510 #define ARIZONA_AIF2BCLK_PD_MASK 0x0004 /* AIF2BCLK_PD */
4511 #define ARIZONA_AIF2BCLK_PD_SHIFT 2 /* AIF2BCLK_PD */
4512 #define ARIZONA_AIF2BCLK_PD_WIDTH 1 /* AIF2BCLK_PD */
4513 #define ARIZONA_AIF2RXDAT_PU 0x0002 /* AIF2RXDAT_PU */
4514 #define ARIZONA_AIF2RXDAT_PU_MASK 0x0002 /* AIF2RXDAT_PU */
4515 #define ARIZONA_AIF2RXDAT_PU_SHIFT 1 /* AIF2RXDAT_PU */
4516 #define ARIZONA_AIF2RXDAT_PU_WIDTH 1 /* AIF2RXDAT_PU */
4517 #define ARIZONA_AIF2RXDAT_PD 0x0001 /* AIF2RXDAT_PD */
4518 #define ARIZONA_AIF2RXDAT_PD_MASK 0x0001 /* AIF2RXDAT_PD */
4519 #define ARIZONA_AIF2RXDAT_PD_SHIFT 0 /* AIF2RXDAT_PD */
4520 #define ARIZONA_AIF2RXDAT_PD_WIDTH 1 /* AIF2RXDAT_PD */
4521
4522 /*
4523 * R3109 (0xC25) - Misc Pad Ctrl 6
4524 */
4525 #define ARIZONA_AIF3RXLRCLK_PU 0x0020 /* AIF3RXLRCLK_PU */
4526 #define ARIZONA_AIF3RXLRCLK_PU_MASK 0x0020 /* AIF3RXLRCLK_PU */
4527 #define ARIZONA_AIF3RXLRCLK_PU_SHIFT 5 /* AIF3RXLRCLK_PU */
4528 #define ARIZONA_AIF3RXLRCLK_PU_WIDTH 1 /* AIF3RXLRCLK_PU */
4529 #define ARIZONA_AIF3RXLRCLK_PD 0x0010 /* AIF3RXLRCLK_PD */
4530 #define ARIZONA_AIF3RXLRCLK_PD_MASK 0x0010 /* AIF3RXLRCLK_PD */
4531 #define ARIZONA_AIF3RXLRCLK_PD_SHIFT 4 /* AIF3RXLRCLK_PD */
4532 #define ARIZONA_AIF3RXLRCLK_PD_WIDTH 1 /* AIF3RXLRCLK_PD */
4533 #define ARIZONA_AIF3BCLK_PU 0x0008 /* AIF3BCLK_PU */
4534 #define ARIZONA_AIF3BCLK_PU_MASK 0x0008 /* AIF3BCLK_PU */
4535 #define ARIZONA_AIF3BCLK_PU_SHIFT 3 /* AIF3BCLK_PU */
4536 #define ARIZONA_AIF3BCLK_PU_WIDTH 1 /* AIF3BCLK_PU */
4537 #define ARIZONA_AIF3BCLK_PD 0x0004 /* AIF3BCLK_PD */
4538 #define ARIZONA_AIF3BCLK_PD_MASK 0x0004 /* AIF3BCLK_PD */
4539 #define ARIZONA_AIF3BCLK_PD_SHIFT 2 /* AIF3BCLK_PD */
4540 #define ARIZONA_AIF3BCLK_PD_WIDTH 1 /* AIF3BCLK_PD */
4541 #define ARIZONA_AIF3RXDAT_PU 0x0002 /* AIF3RXDAT_PU */
4542 #define ARIZONA_AIF3RXDAT_PU_MASK 0x0002 /* AIF3RXDAT_PU */
4543 #define ARIZONA_AIF3RXDAT_PU_SHIFT 1 /* AIF3RXDAT_PU */
4544 #define ARIZONA_AIF3RXDAT_PU_WIDTH 1 /* AIF3RXDAT_PU */
4545 #define ARIZONA_AIF3RXDAT_PD 0x0001 /* AIF3RXDAT_PD */
4546 #define ARIZONA_AIF3RXDAT_PD_MASK 0x0001 /* AIF3RXDAT_PD */
4547 #define ARIZONA_AIF3RXDAT_PD_SHIFT 0 /* AIF3RXDAT_PD */
4548 #define ARIZONA_AIF3RXDAT_PD_WIDTH 1 /* AIF3RXDAT_PD */
4549
4550 /*
4551 * R3328 (0xD00) - Interrupt Status 1
4552 */
4553 #define ARIZONA_GP4_EINT1 0x0008 /* GP4_EINT1 */
4554 #define ARIZONA_GP4_EINT1_MASK 0x0008 /* GP4_EINT1 */
4555 #define ARIZONA_GP4_EINT1_SHIFT 3 /* GP4_EINT1 */
4556 #define ARIZONA_GP4_EINT1_WIDTH 1 /* GP4_EINT1 */
4557 #define ARIZONA_GP3_EINT1 0x0004 /* GP3_EINT1 */
4558 #define ARIZONA_GP3_EINT1_MASK 0x0004 /* GP3_EINT1 */
4559 #define ARIZONA_GP3_EINT1_SHIFT 2 /* GP3_EINT1 */
4560 #define ARIZONA_GP3_EINT1_WIDTH 1 /* GP3_EINT1 */
4561 #define ARIZONA_GP2_EINT1 0x0002 /* GP2_EINT1 */
4562 #define ARIZONA_GP2_EINT1_MASK 0x0002 /* GP2_EINT1 */
4563 #define ARIZONA_GP2_EINT1_SHIFT 1 /* GP2_EINT1 */
4564 #define ARIZONA_GP2_EINT1_WIDTH 1 /* GP2_EINT1 */
4565 #define ARIZONA_GP1_EINT1 0x0001 /* GP1_EINT1 */
4566 #define ARIZONA_GP1_EINT1_MASK 0x0001 /* GP1_EINT1 */
4567 #define ARIZONA_GP1_EINT1_SHIFT 0 /* GP1_EINT1 */
4568 #define ARIZONA_GP1_EINT1_WIDTH 1 /* GP1_EINT1 */
4569
4570 /*
4571 * R3329 (0xD01) - Interrupt Status 2
4572 */
4573 #define ARIZONA_DSP4_RAM_RDY_EINT1 0x0800 /* DSP4_RAM_RDY_EINT1 */
4574 #define ARIZONA_DSP4_RAM_RDY_EINT1_MASK 0x0800 /* DSP4_RAM_RDY_EINT1 */
4575 #define ARIZONA_DSP4_RAM_RDY_EINT1_SHIFT 11 /* DSP4_RAM_RDY_EINT1 */
4576 #define ARIZONA_DSP4_RAM_RDY_EINT1_WIDTH 1 /* DSP4_RAM_RDY_EINT1 */
4577 #define ARIZONA_DSP3_RAM_RDY_EINT1 0x0400 /* DSP3_RAM_RDY_EINT1 */
4578 #define ARIZONA_DSP3_RAM_RDY_EINT1_MASK 0x0400 /* DSP3_RAM_RDY_EINT1 */
4579 #define ARIZONA_DSP3_RAM_RDY_EINT1_SHIFT 10 /* DSP3_RAM_RDY_EINT1 */
4580 #define ARIZONA_DSP3_RAM_RDY_EINT1_WIDTH 1 /* DSP3_RAM_RDY_EINT1 */
4581 #define ARIZONA_DSP2_RAM_RDY_EINT1 0x0200 /* DSP2_RAM_RDY_EINT1 */
4582 #define ARIZONA_DSP2_RAM_RDY_EINT1_MASK 0x0200 /* DSP2_RAM_RDY_EINT1 */
4583 #define ARIZONA_DSP2_RAM_RDY_EINT1_SHIFT 9 /* DSP2_RAM_RDY_EINT1 */
4584 #define ARIZONA_DSP2_RAM_RDY_EINT1_WIDTH 1 /* DSP2_RAM_RDY_EINT1 */
4585 #define ARIZONA_DSP1_RAM_RDY_EINT1 0x0100 /* DSP1_RAM_RDY_EINT1 */
4586 #define ARIZONA_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* DSP1_RAM_RDY_EINT1 */
4587 #define ARIZONA_DSP1_RAM_RDY_EINT1_SHIFT 8 /* DSP1_RAM_RDY_EINT1 */
4588 #define ARIZONA_DSP1_RAM_RDY_EINT1_WIDTH 1 /* DSP1_RAM_RDY_EINT1 */
4589 #define ARIZONA_DSP_IRQ8_EINT1 0x0080 /* DSP_IRQ8_EINT1 */
4590 #define ARIZONA_DSP_IRQ8_EINT1_MASK 0x0080 /* DSP_IRQ8_EINT1 */
4591 #define ARIZONA_DSP_IRQ8_EINT1_SHIFT 7 /* DSP_IRQ8_EINT1 */
4592 #define ARIZONA_DSP_IRQ8_EINT1_WIDTH 1 /* DSP_IRQ8_EINT1 */
4593 #define ARIZONA_DSP_IRQ7_EINT1 0x0040 /* DSP_IRQ7_EINT1 */
4594 #define ARIZONA_DSP_IRQ7_EINT1_MASK 0x0040 /* DSP_IRQ7_EINT1 */
4595 #define ARIZONA_DSP_IRQ7_EINT1_SHIFT 6 /* DSP_IRQ7_EINT1 */
4596 #define ARIZONA_DSP_IRQ7_EINT1_WIDTH 1 /* DSP_IRQ7_EINT1 */
4597 #define ARIZONA_DSP_IRQ6_EINT1 0x0020 /* DSP_IRQ6_EINT1 */
4598 #define ARIZONA_DSP_IRQ6_EINT1_MASK 0x0020 /* DSP_IRQ6_EINT1 */
4599 #define ARIZONA_DSP_IRQ6_EINT1_SHIFT 5 /* DSP_IRQ6_EINT1 */
4600 #define ARIZONA_DSP_IRQ6_EINT1_WIDTH 1 /* DSP_IRQ6_EINT1 */
4601 #define ARIZONA_DSP_IRQ5_EINT1 0x0010 /* DSP_IRQ5_EINT1 */
4602 #define ARIZONA_DSP_IRQ5_EINT1_MASK 0x0010 /* DSP_IRQ5_EINT1 */
4603 #define ARIZONA_DSP_IRQ5_EINT1_SHIFT 4 /* DSP_IRQ5_EINT1 */
4604 #define ARIZONA_DSP_IRQ5_EINT1_WIDTH 1 /* DSP_IRQ5_EINT1 */
4605 #define ARIZONA_DSP_IRQ4_EINT1 0x0008 /* DSP_IRQ4_EINT1 */
4606 #define ARIZONA_DSP_IRQ4_EINT1_MASK 0x0008 /* DSP_IRQ4_EINT1 */
4607 #define ARIZONA_DSP_IRQ4_EINT1_SHIFT 3 /* DSP_IRQ4_EINT1 */
4608 #define ARIZONA_DSP_IRQ4_EINT1_WIDTH 1 /* DSP_IRQ4_EINT1 */
4609 #define ARIZONA_DSP_IRQ3_EINT1 0x0004 /* DSP_IRQ3_EINT1 */
4610 #define ARIZONA_DSP_IRQ3_EINT1_MASK 0x0004 /* DSP_IRQ3_EINT1 */
4611 #define ARIZONA_DSP_IRQ3_EINT1_SHIFT 2 /* DSP_IRQ3_EINT1 */
4612 #define ARIZONA_DSP_IRQ3_EINT1_WIDTH 1 /* DSP_IRQ3_EINT1 */
4613 #define ARIZONA_DSP_IRQ2_EINT1 0x0002 /* DSP_IRQ2_EINT1 */
4614 #define ARIZONA_DSP_IRQ2_EINT1_MASK 0x0002 /* DSP_IRQ2_EINT1 */
4615 #define ARIZONA_DSP_IRQ2_EINT1_SHIFT 1 /* DSP_IRQ2_EINT1 */
4616 #define ARIZONA_DSP_IRQ2_EINT1_WIDTH 1 /* DSP_IRQ2_EINT1 */
4617 #define ARIZONA_DSP_IRQ1_EINT1 0x0001 /* DSP_IRQ1_EINT1 */
4618 #define ARIZONA_DSP_IRQ1_EINT1_MASK 0x0001 /* DSP_IRQ1_EINT1 */
4619 #define ARIZONA_DSP_IRQ1_EINT1_SHIFT 0 /* DSP_IRQ1_EINT1 */
4620 #define ARIZONA_DSP_IRQ1_EINT1_WIDTH 1 /* DSP_IRQ1_EINT1 */
4621
4622 /*
4623 * R3330 (0xD02) - Interrupt Status 3
4624 */
4625 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
4626 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
4627 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT1 */
4628 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT1 */
4629 #define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */
4630 #define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */
4631 #define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */
4632 #define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */
4633 #define ARIZONA_HPDET_EINT1 0x2000 /* HPDET_EINT1 */
4634 #define ARIZONA_HPDET_EINT1_MASK 0x2000 /* HPDET_EINT1 */
4635 #define ARIZONA_HPDET_EINT1_SHIFT 13 /* HPDET_EINT1 */
4636 #define ARIZONA_HPDET_EINT1_WIDTH 1 /* HPDET_EINT1 */
4637 #define ARIZONA_MICDET_EINT1 0x1000 /* MICDET_EINT1 */
4638 #define ARIZONA_MICDET_EINT1_MASK 0x1000 /* MICDET_EINT1 */
4639 #define ARIZONA_MICDET_EINT1_SHIFT 12 /* MICDET_EINT1 */
4640 #define ARIZONA_MICDET_EINT1_WIDTH 1 /* MICDET_EINT1 */
4641 #define ARIZONA_WSEQ_DONE_EINT1 0x0800 /* WSEQ_DONE_EINT1 */
4642 #define ARIZONA_WSEQ_DONE_EINT1_MASK 0x0800 /* WSEQ_DONE_EINT1 */
4643 #define ARIZONA_WSEQ_DONE_EINT1_SHIFT 11 /* WSEQ_DONE_EINT1 */
4644 #define ARIZONA_WSEQ_DONE_EINT1_WIDTH 1 /* WSEQ_DONE_EINT1 */
4645 #define ARIZONA_DRC2_SIG_DET_EINT1 0x0400 /* DRC2_SIG_DET_EINT1 */
4646 #define ARIZONA_DRC2_SIG_DET_EINT1_MASK 0x0400 /* DRC2_SIG_DET_EINT1 */
4647 #define ARIZONA_DRC2_SIG_DET_EINT1_SHIFT 10 /* DRC2_SIG_DET_EINT1 */
4648 #define ARIZONA_DRC2_SIG_DET_EINT1_WIDTH 1 /* DRC2_SIG_DET_EINT1 */
4649 #define ARIZONA_DRC1_SIG_DET_EINT1 0x0200 /* DRC1_SIG_DET_EINT1 */
4650 #define ARIZONA_DRC1_SIG_DET_EINT1_MASK 0x0200 /* DRC1_SIG_DET_EINT1 */
4651 #define ARIZONA_DRC1_SIG_DET_EINT1_SHIFT 9 /* DRC1_SIG_DET_EINT1 */
4652 #define ARIZONA_DRC1_SIG_DET_EINT1_WIDTH 1 /* DRC1_SIG_DET_EINT1 */
4653 #define ARIZONA_ASRC2_LOCK_EINT1 0x0100 /* ASRC2_LOCK_EINT1 */
4654 #define ARIZONA_ASRC2_LOCK_EINT1_MASK 0x0100 /* ASRC2_LOCK_EINT1 */
4655 #define ARIZONA_ASRC2_LOCK_EINT1_SHIFT 8 /* ASRC2_LOCK_EINT1 */
4656 #define ARIZONA_ASRC2_LOCK_EINT1_WIDTH 1 /* ASRC2_LOCK_EINT1 */
4657 #define ARIZONA_ASRC1_LOCK_EINT1 0x0080 /* ASRC1_LOCK_EINT1 */
4658 #define ARIZONA_ASRC1_LOCK_EINT1_MASK 0x0080 /* ASRC1_LOCK_EINT1 */
4659 #define ARIZONA_ASRC1_LOCK_EINT1_SHIFT 7 /* ASRC1_LOCK_EINT1 */
4660 #define ARIZONA_ASRC1_LOCK_EINT1_WIDTH 1 /* ASRC1_LOCK_EINT1 */
4661 #define ARIZONA_UNDERCLOCKED_EINT1 0x0040 /* UNDERCLOCKED_EINT1 */
4662 #define ARIZONA_UNDERCLOCKED_EINT1_MASK 0x0040 /* UNDERCLOCKED_EINT1 */
4663 #define ARIZONA_UNDERCLOCKED_EINT1_SHIFT 6 /* UNDERCLOCKED_EINT1 */
4664 #define ARIZONA_UNDERCLOCKED_EINT1_WIDTH 1 /* UNDERCLOCKED_EINT1 */
4665 #define ARIZONA_OVERCLOCKED_EINT1 0x0020 /* OVERCLOCKED_EINT1 */
4666 #define ARIZONA_OVERCLOCKED_EINT1_MASK 0x0020 /* OVERCLOCKED_EINT1 */
4667 #define ARIZONA_OVERCLOCKED_EINT1_SHIFT 5 /* OVERCLOCKED_EINT1 */
4668 #define ARIZONA_OVERCLOCKED_EINT1_WIDTH 1 /* OVERCLOCKED_EINT1 */
4669 #define ARIZONA_FLL2_LOCK_EINT1 0x0008 /* FLL2_LOCK_EINT1 */
4670 #define ARIZONA_FLL2_LOCK_EINT1_MASK 0x0008 /* FLL2_LOCK_EINT1 */
4671 #define ARIZONA_FLL2_LOCK_EINT1_SHIFT 3 /* FLL2_LOCK_EINT1 */
4672 #define ARIZONA_FLL2_LOCK_EINT1_WIDTH 1 /* FLL2_LOCK_EINT1 */
4673 #define ARIZONA_FLL1_LOCK_EINT1 0x0004 /* FLL1_LOCK_EINT1 */
4674 #define ARIZONA_FLL1_LOCK_EINT1_MASK 0x0004 /* FLL1_LOCK_EINT1 */
4675 #define ARIZONA_FLL1_LOCK_EINT1_SHIFT 2 /* FLL1_LOCK_EINT1 */
4676 #define ARIZONA_FLL1_LOCK_EINT1_WIDTH 1 /* FLL1_LOCK_EINT1 */
4677 #define ARIZONA_CLKGEN_ERR_EINT1 0x0002 /* CLKGEN_ERR_EINT1 */
4678 #define ARIZONA_CLKGEN_ERR_EINT1_MASK 0x0002 /* CLKGEN_ERR_EINT1 */
4679 #define ARIZONA_CLKGEN_ERR_EINT1_SHIFT 1 /* CLKGEN_ERR_EINT1 */
4680 #define ARIZONA_CLKGEN_ERR_EINT1_WIDTH 1 /* CLKGEN_ERR_EINT1 */
4681 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
4682 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT1 */
4683 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT1 */
4684 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT1_WIDTH 1 /* CLKGEN_ERR_ASYNC_EINT1 */
4685
4686 /*
4687 * R3331 (0xD03) - Interrupt Status 4
4688 */
4689 #define ARIZONA_ASRC_CFG_ERR_EINT1 0x8000 /* ASRC_CFG_ERR_EINT1 */
4690 #define ARIZONA_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* ASRC_CFG_ERR_EINT1 */
4691 #define ARIZONA_ASRC_CFG_ERR_EINT1_SHIFT 15 /* ASRC_CFG_ERR_EINT1 */
4692 #define ARIZONA_ASRC_CFG_ERR_EINT1_WIDTH 1 /* ASRC_CFG_ERR_EINT1 */
4693 #define ARIZONA_AIF3_ERR_EINT1 0x4000 /* AIF3_ERR_EINT1 */
4694 #define ARIZONA_AIF3_ERR_EINT1_MASK 0x4000 /* AIF3_ERR_EINT1 */
4695 #define ARIZONA_AIF3_ERR_EINT1_SHIFT 14 /* AIF3_ERR_EINT1 */
4696 #define ARIZONA_AIF3_ERR_EINT1_WIDTH 1 /* AIF3_ERR_EINT1 */
4697 #define ARIZONA_AIF2_ERR_EINT1 0x2000 /* AIF2_ERR_EINT1 */
4698 #define ARIZONA_AIF2_ERR_EINT1_MASK 0x2000 /* AIF2_ERR_EINT1 */
4699 #define ARIZONA_AIF2_ERR_EINT1_SHIFT 13 /* AIF2_ERR_EINT1 */
4700 #define ARIZONA_AIF2_ERR_EINT1_WIDTH 1 /* AIF2_ERR_EINT1 */
4701 #define ARIZONA_AIF1_ERR_EINT1 0x1000 /* AIF1_ERR_EINT1 */
4702 #define ARIZONA_AIF1_ERR_EINT1_MASK 0x1000 /* AIF1_ERR_EINT1 */
4703 #define ARIZONA_AIF1_ERR_EINT1_SHIFT 12 /* AIF1_ERR_EINT1 */
4704 #define ARIZONA_AIF1_ERR_EINT1_WIDTH 1 /* AIF1_ERR_EINT1 */
4705 #define ARIZONA_CTRLIF_ERR_EINT1 0x0800 /* CTRLIF_ERR_EINT1 */
4706 #define ARIZONA_CTRLIF_ERR_EINT1_MASK 0x0800 /* CTRLIF_ERR_EINT1 */
4707 #define ARIZONA_CTRLIF_ERR_EINT1_SHIFT 11 /* CTRLIF_ERR_EINT1 */
4708 #define ARIZONA_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */
4709 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
4710 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT1 */
4711 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* MIXER_DROPPED_SAMPLE_EINT1 */
4712 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT1 */
4713 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
4714 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT1 */
4715 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* ASYNC_CLK_ENA_LOW_EINT1 */
4716 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT1 */
4717 #define ARIZONA_SYSCLK_ENA_LOW_EINT1 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
4718 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT1 */
4719 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* SYSCLK_ENA_LOW_EINT1 */
4720 #define ARIZONA_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* SYSCLK_ENA_LOW_EINT1 */
4721 #define ARIZONA_ISRC1_CFG_ERR_EINT1 0x0080 /* ISRC1_CFG_ERR_EINT1 */
4722 #define ARIZONA_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* ISRC1_CFG_ERR_EINT1 */
4723 #define ARIZONA_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* ISRC1_CFG_ERR_EINT1 */
4724 #define ARIZONA_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* ISRC1_CFG_ERR_EINT1 */
4725 #define ARIZONA_ISRC2_CFG_ERR_EINT1 0x0040 /* ISRC2_CFG_ERR_EINT1 */
4726 #define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* ISRC2_CFG_ERR_EINT1 */
4727 #define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* ISRC2_CFG_ERR_EINT1 */
4728 #define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */
4729
4730 /*
4731 * R3332 (0xD04) - Interrupt Status 5
4732 */
4733 #define ARIZONA_BOOT_DONE_EINT1 0x0100 /* BOOT_DONE_EINT1 */
4734 #define ARIZONA_BOOT_DONE_EINT1_MASK 0x0100 /* BOOT_DONE_EINT1 */
4735 #define ARIZONA_BOOT_DONE_EINT1_SHIFT 8 /* BOOT_DONE_EINT1 */
4736 #define ARIZONA_BOOT_DONE_EINT1_WIDTH 1 /* BOOT_DONE_EINT1 */
4737 #define ARIZONA_DCS_DAC_DONE_EINT1 0x0080 /* DCS_DAC_DONE_EINT1 */
4738 #define ARIZONA_DCS_DAC_DONE_EINT1_MASK 0x0080 /* DCS_DAC_DONE_EINT1 */
4739 #define ARIZONA_DCS_DAC_DONE_EINT1_SHIFT 7 /* DCS_DAC_DONE_EINT1 */
4740 #define ARIZONA_DCS_DAC_DONE_EINT1_WIDTH 1 /* DCS_DAC_DONE_EINT1 */
4741 #define ARIZONA_DCS_HP_DONE_EINT1 0x0040 /* DCS_HP_DONE_EINT1 */
4742 #define ARIZONA_DCS_HP_DONE_EINT1_MASK 0x0040 /* DCS_HP_DONE_EINT1 */
4743 #define ARIZONA_DCS_HP_DONE_EINT1_SHIFT 6 /* DCS_HP_DONE_EINT1 */
4744 #define ARIZONA_DCS_HP_DONE_EINT1_WIDTH 1 /* DCS_HP_DONE_EINT1 */
4745 #define ARIZONA_FLL2_CLOCK_OK_EINT1 0x0002 /* FLL2_CLOCK_OK_EINT1 */
4746 #define ARIZONA_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* FLL2_CLOCK_OK_EINT1 */
4747 #define ARIZONA_FLL2_CLOCK_OK_EINT1_SHIFT 1 /* FLL2_CLOCK_OK_EINT1 */
4748 #define ARIZONA_FLL2_CLOCK_OK_EINT1_WIDTH 1 /* FLL2_CLOCK_OK_EINT1 */
4749 #define ARIZONA_FLL1_CLOCK_OK_EINT1 0x0001 /* FLL1_CLOCK_OK_EINT1 */
4750 #define ARIZONA_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* FLL1_CLOCK_OK_EINT1 */
4751 #define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* FLL1_CLOCK_OK_EINT1 */
4752 #define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* FLL1_CLOCK_OK_EINT1 */
4753
4754 /*
4755 * R3336 (0xD08) - Interrupt Status 1 Mask
4756 */
4757 #define ARIZONA_IM_GP4_EINT1 0x0008 /* IM_GP4_EINT1 */
4758 #define ARIZONA_IM_GP4_EINT1_MASK 0x0008 /* IM_GP4_EINT1 */
4759 #define ARIZONA_IM_GP4_EINT1_SHIFT 3 /* IM_GP4_EINT1 */
4760 #define ARIZONA_IM_GP4_EINT1_WIDTH 1 /* IM_GP4_EINT1 */
4761 #define ARIZONA_IM_GP3_EINT1 0x0004 /* IM_GP3_EINT1 */
4762 #define ARIZONA_IM_GP3_EINT1_MASK 0x0004 /* IM_GP3_EINT1 */
4763 #define ARIZONA_IM_GP3_EINT1_SHIFT 2 /* IM_GP3_EINT1 */
4764 #define ARIZONA_IM_GP3_EINT1_WIDTH 1 /* IM_GP3_EINT1 */
4765 #define ARIZONA_IM_GP2_EINT1 0x0002 /* IM_GP2_EINT1 */
4766 #define ARIZONA_IM_GP2_EINT1_MASK 0x0002 /* IM_GP2_EINT1 */
4767 #define ARIZONA_IM_GP2_EINT1_SHIFT 1 /* IM_GP2_EINT1 */
4768 #define ARIZONA_IM_GP2_EINT1_WIDTH 1 /* IM_GP2_EINT1 */
4769 #define ARIZONA_IM_GP1_EINT1 0x0001 /* IM_GP1_EINT1 */
4770 #define ARIZONA_IM_GP1_EINT1_MASK 0x0001 /* IM_GP1_EINT1 */
4771 #define ARIZONA_IM_GP1_EINT1_SHIFT 0 /* IM_GP1_EINT1 */
4772 #define ARIZONA_IM_GP1_EINT1_WIDTH 1 /* IM_GP1_EINT1 */
4773
4774 /*
4775 * R3337 (0xD09) - Interrupt Status 2 Mask
4776 */
4777 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
4778 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT1 */
4779 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_SHIFT 8 /* IM_DSP1_RAM_RDY_EINT1 */
4780 #define ARIZONA_IM_DSP1_RAM_RDY_EINT1_WIDTH 1 /* IM_DSP1_RAM_RDY_EINT1 */
4781 #define ARIZONA_IM_DSP_IRQ2_EINT1 0x0002 /* IM_DSP_IRQ2_EINT1 */
4782 #define ARIZONA_IM_DSP_IRQ2_EINT1_MASK 0x0002 /* IM_DSP_IRQ2_EINT1 */
4783 #define ARIZONA_IM_DSP_IRQ2_EINT1_SHIFT 1 /* IM_DSP_IRQ2_EINT1 */
4784 #define ARIZONA_IM_DSP_IRQ2_EINT1_WIDTH 1 /* IM_DSP_IRQ2_EINT1 */
4785 #define ARIZONA_IM_DSP_IRQ1_EINT1 0x0001 /* IM_DSP_IRQ1_EINT1 */
4786 #define ARIZONA_IM_DSP_IRQ1_EINT1_MASK 0x0001 /* IM_DSP_IRQ1_EINT1 */
4787 #define ARIZONA_IM_DSP_IRQ1_EINT1_SHIFT 0 /* IM_DSP_IRQ1_EINT1 */
4788 #define ARIZONA_IM_DSP_IRQ1_EINT1_WIDTH 1 /* IM_DSP_IRQ1_EINT1 */
4789
4790 /*
4791 * R3338 (0xD0A) - Interrupt Status 3 Mask
4792 */
4793 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4794 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4795 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4796 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
4797 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
4798 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
4799 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */
4800 #define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */
4801 #define ARIZONA_IM_HPDET_EINT1 0x2000 /* IM_HPDET_EINT1 */
4802 #define ARIZONA_IM_HPDET_EINT1_MASK 0x2000 /* IM_HPDET_EINT1 */
4803 #define ARIZONA_IM_HPDET_EINT1_SHIFT 13 /* IM_HPDET_EINT1 */
4804 #define ARIZONA_IM_HPDET_EINT1_WIDTH 1 /* IM_HPDET_EINT1 */
4805 #define ARIZONA_IM_MICDET_EINT1 0x1000 /* IM_MICDET_EINT1 */
4806 #define ARIZONA_IM_MICDET_EINT1_MASK 0x1000 /* IM_MICDET_EINT1 */
4807 #define ARIZONA_IM_MICDET_EINT1_SHIFT 12 /* IM_MICDET_EINT1 */
4808 #define ARIZONA_IM_MICDET_EINT1_WIDTH 1 /* IM_MICDET_EINT1 */
4809 #define ARIZONA_IM_WSEQ_DONE_EINT1 0x0800 /* IM_WSEQ_DONE_EINT1 */
4810 #define ARIZONA_IM_WSEQ_DONE_EINT1_MASK 0x0800 /* IM_WSEQ_DONE_EINT1 */
4811 #define ARIZONA_IM_WSEQ_DONE_EINT1_SHIFT 11 /* IM_WSEQ_DONE_EINT1 */
4812 #define ARIZONA_IM_WSEQ_DONE_EINT1_WIDTH 1 /* IM_WSEQ_DONE_EINT1 */
4813 #define ARIZONA_IM_DRC2_SIG_DET_EINT1 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
4814 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT1 */
4815 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_SHIFT 10 /* IM_DRC2_SIG_DET_EINT1 */
4816 #define ARIZONA_IM_DRC2_SIG_DET_EINT1_WIDTH 1 /* IM_DRC2_SIG_DET_EINT1 */
4817 #define ARIZONA_IM_DRC1_SIG_DET_EINT1 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
4818 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT1 */
4819 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_SHIFT 9 /* IM_DRC1_SIG_DET_EINT1 */
4820 #define ARIZONA_IM_DRC1_SIG_DET_EINT1_WIDTH 1 /* IM_DRC1_SIG_DET_EINT1 */
4821 #define ARIZONA_IM_ASRC2_LOCK_EINT1 0x0100 /* IM_ASRC2_LOCK_EINT1 */
4822 #define ARIZONA_IM_ASRC2_LOCK_EINT1_MASK 0x0100 /* IM_ASRC2_LOCK_EINT1 */
4823 #define ARIZONA_IM_ASRC2_LOCK_EINT1_SHIFT 8 /* IM_ASRC2_LOCK_EINT1 */
4824 #define ARIZONA_IM_ASRC2_LOCK_EINT1_WIDTH 1 /* IM_ASRC2_LOCK_EINT1 */
4825 #define ARIZONA_IM_ASRC1_LOCK_EINT1 0x0080 /* IM_ASRC1_LOCK_EINT1 */
4826 #define ARIZONA_IM_ASRC1_LOCK_EINT1_MASK 0x0080 /* IM_ASRC1_LOCK_EINT1 */
4827 #define ARIZONA_IM_ASRC1_LOCK_EINT1_SHIFT 7 /* IM_ASRC1_LOCK_EINT1 */
4828 #define ARIZONA_IM_ASRC1_LOCK_EINT1_WIDTH 1 /* IM_ASRC1_LOCK_EINT1 */
4829 #define ARIZONA_IM_UNDERCLOCKED_EINT1 0x0040 /* IM_UNDERCLOCKED_EINT1 */
4830 #define ARIZONA_IM_UNDERCLOCKED_EINT1_MASK 0x0040 /* IM_UNDERCLOCKED_EINT1 */
4831 #define ARIZONA_IM_UNDERCLOCKED_EINT1_SHIFT 6 /* IM_UNDERCLOCKED_EINT1 */
4832 #define ARIZONA_IM_UNDERCLOCKED_EINT1_WIDTH 1 /* IM_UNDERCLOCKED_EINT1 */
4833 #define ARIZONA_IM_OVERCLOCKED_EINT1 0x0020 /* IM_OVERCLOCKED_EINT1 */
4834 #define ARIZONA_IM_OVERCLOCKED_EINT1_MASK 0x0020 /* IM_OVERCLOCKED_EINT1 */
4835 #define ARIZONA_IM_OVERCLOCKED_EINT1_SHIFT 5 /* IM_OVERCLOCKED_EINT1 */
4836 #define ARIZONA_IM_OVERCLOCKED_EINT1_WIDTH 1 /* IM_OVERCLOCKED_EINT1 */
4837 #define ARIZONA_IM_FLL2_LOCK_EINT1 0x0008 /* IM_FLL2_LOCK_EINT1 */
4838 #define ARIZONA_IM_FLL2_LOCK_EINT1_MASK 0x0008 /* IM_FLL2_LOCK_EINT1 */
4839 #define ARIZONA_IM_FLL2_LOCK_EINT1_SHIFT 3 /* IM_FLL2_LOCK_EINT1 */
4840 #define ARIZONA_IM_FLL2_LOCK_EINT1_WIDTH 1 /* IM_FLL2_LOCK_EINT1 */
4841 #define ARIZONA_IM_FLL1_LOCK_EINT1 0x0004 /* IM_FLL1_LOCK_EINT1 */
4842 #define ARIZONA_IM_FLL1_LOCK_EINT1_MASK 0x0004 /* IM_FLL1_LOCK_EINT1 */
4843 #define ARIZONA_IM_FLL1_LOCK_EINT1_SHIFT 2 /* IM_FLL1_LOCK_EINT1 */
4844 #define ARIZONA_IM_FLL1_LOCK_EINT1_WIDTH 1 /* IM_FLL1_LOCK_EINT1 */
4845 #define ARIZONA_IM_CLKGEN_ERR_EINT1 0x0002 /* IM_CLKGEN_ERR_EINT1 */
4846 #define ARIZONA_IM_CLKGEN_ERR_EINT1_MASK 0x0002 /* IM_CLKGEN_ERR_EINT1 */
4847 #define ARIZONA_IM_CLKGEN_ERR_EINT1_SHIFT 1 /* IM_CLKGEN_ERR_EINT1 */
4848 #define ARIZONA_IM_CLKGEN_ERR_EINT1_WIDTH 1 /* IM_CLKGEN_ERR_EINT1 */
4849 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4850 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4851 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4852 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT1_WIDTH 1 /* IM_CLKGEN_ERR_ASYNC_EINT1 */
4853
4854 /*
4855 * R3339 (0xD0B) - Interrupt Status 4 Mask
4856 */
4857 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
4858 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT1 */
4859 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT1 */
4860 #define ARIZONA_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */
4861 #define ARIZONA_IM_AIF3_ERR_EINT1 0x4000 /* IM_AIF3_ERR_EINT1 */
4862 #define ARIZONA_IM_AIF3_ERR_EINT1_MASK 0x4000 /* IM_AIF3_ERR_EINT1 */
4863 #define ARIZONA_IM_AIF3_ERR_EINT1_SHIFT 14 /* IM_AIF3_ERR_EINT1 */
4864 #define ARIZONA_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */
4865 #define ARIZONA_IM_AIF2_ERR_EINT1 0x2000 /* IM_AIF2_ERR_EINT1 */
4866 #define ARIZONA_IM_AIF2_ERR_EINT1_MASK 0x2000 /* IM_AIF2_ERR_EINT1 */
4867 #define ARIZONA_IM_AIF2_ERR_EINT1_SHIFT 13 /* IM_AIF2_ERR_EINT1 */
4868 #define ARIZONA_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */
4869 #define ARIZONA_IM_AIF1_ERR_EINT1 0x1000 /* IM_AIF1_ERR_EINT1 */
4870 #define ARIZONA_IM_AIF1_ERR_EINT1_MASK 0x1000 /* IM_AIF1_ERR_EINT1 */
4871 #define ARIZONA_IM_AIF1_ERR_EINT1_SHIFT 12 /* IM_AIF1_ERR_EINT1 */
4872 #define ARIZONA_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */
4873 #define ARIZONA_IM_CTRLIF_ERR_EINT1 0x0800 /* IM_CTRLIF_ERR_EINT1 */
4874 #define ARIZONA_IM_CTRLIF_ERR_EINT1_MASK 0x0800 /* IM_CTRLIF_ERR_EINT1 */
4875 #define ARIZONA_IM_CTRLIF_ERR_EINT1_SHIFT 11 /* IM_CTRLIF_ERR_EINT1 */
4876 #define ARIZONA_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */
4877 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4878 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4879 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4880 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
4881 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4882 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4883 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4884 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
4885 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
4886 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT1 */
4887 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT1 */
4888 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */
4889 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
4890 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT1 */
4891 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT1 */
4892 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */
4893 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
4894 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
4895 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */
4896 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */
4897
4898 /*
4899 * R3340 (0xD0C) - Interrupt Status 5 Mask
4900 */
4901 #define ARIZONA_IM_BOOT_DONE_EINT1 0x0100 /* IM_BOOT_DONE_EINT1 */
4902 #define ARIZONA_IM_BOOT_DONE_EINT1_MASK 0x0100 /* IM_BOOT_DONE_EINT1 */
4903 #define ARIZONA_IM_BOOT_DONE_EINT1_SHIFT 8 /* IM_BOOT_DONE_EINT1 */
4904 #define ARIZONA_IM_BOOT_DONE_EINT1_WIDTH 1 /* IM_BOOT_DONE_EINT1 */
4905 #define ARIZONA_IM_DCS_DAC_DONE_EINT1 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
4906 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT1 */
4907 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_SHIFT 7 /* IM_DCS_DAC_DONE_EINT1 */
4908 #define ARIZONA_IM_DCS_DAC_DONE_EINT1_WIDTH 1 /* IM_DCS_DAC_DONE_EINT1 */
4909 #define ARIZONA_IM_DCS_HP_DONE_EINT1 0x0040 /* IM_DCS_HP_DONE_EINT1 */
4910 #define ARIZONA_IM_DCS_HP_DONE_EINT1_MASK 0x0040 /* IM_DCS_HP_DONE_EINT1 */
4911 #define ARIZONA_IM_DCS_HP_DONE_EINT1_SHIFT 6 /* IM_DCS_HP_DONE_EINT1 */
4912 #define ARIZONA_IM_DCS_HP_DONE_EINT1_WIDTH 1 /* IM_DCS_HP_DONE_EINT1 */
4913 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
4914 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT1 */
4915 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_SHIFT 1 /* IM_FLL2_CLOCK_OK_EINT1 */
4916 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL2_CLOCK_OK_EINT1 */
4917 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
4918 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT1 */
4919 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT1 */
4920 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT1 */
4921
4922 /*
4923 * R3343 (0xD0F) - Interrupt Control
4924 */
4925 #define ARIZONA_IM_IRQ1 0x0001 /* IM_IRQ1 */
4926 #define ARIZONA_IM_IRQ1_MASK 0x0001 /* IM_IRQ1 */
4927 #define ARIZONA_IM_IRQ1_SHIFT 0 /* IM_IRQ1 */
4928 #define ARIZONA_IM_IRQ1_WIDTH 1 /* IM_IRQ1 */
4929
4930 /*
4931 * R3344 (0xD10) - IRQ2 Status 1
4932 */
4933 #define ARIZONA_GP4_EINT2 0x0008 /* GP4_EINT2 */
4934 #define ARIZONA_GP4_EINT2_MASK 0x0008 /* GP4_EINT2 */
4935 #define ARIZONA_GP4_EINT2_SHIFT 3 /* GP4_EINT2 */
4936 #define ARIZONA_GP4_EINT2_WIDTH 1 /* GP4_EINT2 */
4937 #define ARIZONA_GP3_EINT2 0x0004 /* GP3_EINT2 */
4938 #define ARIZONA_GP3_EINT2_MASK 0x0004 /* GP3_EINT2 */
4939 #define ARIZONA_GP3_EINT2_SHIFT 2 /* GP3_EINT2 */
4940 #define ARIZONA_GP3_EINT2_WIDTH 1 /* GP3_EINT2 */
4941 #define ARIZONA_GP2_EINT2 0x0002 /* GP2_EINT2 */
4942 #define ARIZONA_GP2_EINT2_MASK 0x0002 /* GP2_EINT2 */
4943 #define ARIZONA_GP2_EINT2_SHIFT 1 /* GP2_EINT2 */
4944 #define ARIZONA_GP2_EINT2_WIDTH 1 /* GP2_EINT2 */
4945 #define ARIZONA_GP1_EINT2 0x0001 /* GP1_EINT2 */
4946 #define ARIZONA_GP1_EINT2_MASK 0x0001 /* GP1_EINT2 */
4947 #define ARIZONA_GP1_EINT2_SHIFT 0 /* GP1_EINT2 */
4948 #define ARIZONA_GP1_EINT2_WIDTH 1 /* GP1_EINT2 */
4949
4950 /*
4951 * R3345 (0xD11) - IRQ2 Status 2
4952 */
4953 #define ARIZONA_DSP1_RAM_RDY_EINT2 0x0100 /* DSP1_RAM_RDY_EINT2 */
4954 #define ARIZONA_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* DSP1_RAM_RDY_EINT2 */
4955 #define ARIZONA_DSP1_RAM_RDY_EINT2_SHIFT 8 /* DSP1_RAM_RDY_EINT2 */
4956 #define ARIZONA_DSP1_RAM_RDY_EINT2_WIDTH 1 /* DSP1_RAM_RDY_EINT2 */
4957 #define ARIZONA_DSP_IRQ2_EINT2 0x0002 /* DSP_IRQ2_EINT2 */
4958 #define ARIZONA_DSP_IRQ2_EINT2_MASK 0x0002 /* DSP_IRQ2_EINT2 */
4959 #define ARIZONA_DSP_IRQ2_EINT2_SHIFT 1 /* DSP_IRQ2_EINT2 */
4960 #define ARIZONA_DSP_IRQ2_EINT2_WIDTH 1 /* DSP_IRQ2_EINT2 */
4961 #define ARIZONA_DSP_IRQ1_EINT2 0x0001 /* DSP_IRQ1_EINT2 */
4962 #define ARIZONA_DSP_IRQ1_EINT2_MASK 0x0001 /* DSP_IRQ1_EINT2 */
4963 #define ARIZONA_DSP_IRQ1_EINT2_SHIFT 0 /* DSP_IRQ1_EINT2 */
4964 #define ARIZONA_DSP_IRQ1_EINT2_WIDTH 1 /* DSP_IRQ1_EINT2 */
4965
4966 /*
4967 * R3346 (0xD12) - IRQ2 Status 3
4968 */
4969 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
4970 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
4971 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT2 */
4972 #define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT2 */
4973 #define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */
4974 #define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */
4975 #define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */
4976 #define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */
4977 #define ARIZONA_HPDET_EINT2 0x2000 /* HPDET_EINT2 */
4978 #define ARIZONA_HPDET_EINT2_MASK 0x2000 /* HPDET_EINT2 */
4979 #define ARIZONA_HPDET_EINT2_SHIFT 13 /* HPDET_EINT2 */
4980 #define ARIZONA_HPDET_EINT2_WIDTH 1 /* HPDET_EINT2 */
4981 #define ARIZONA_MICDET_EINT2 0x1000 /* MICDET_EINT2 */
4982 #define ARIZONA_MICDET_EINT2_MASK 0x1000 /* MICDET_EINT2 */
4983 #define ARIZONA_MICDET_EINT2_SHIFT 12 /* MICDET_EINT2 */
4984 #define ARIZONA_MICDET_EINT2_WIDTH 1 /* MICDET_EINT2 */
4985 #define ARIZONA_WSEQ_DONE_EINT2 0x0800 /* WSEQ_DONE_EINT2 */
4986 #define ARIZONA_WSEQ_DONE_EINT2_MASK 0x0800 /* WSEQ_DONE_EINT2 */
4987 #define ARIZONA_WSEQ_DONE_EINT2_SHIFT 11 /* WSEQ_DONE_EINT2 */
4988 #define ARIZONA_WSEQ_DONE_EINT2_WIDTH 1 /* WSEQ_DONE_EINT2 */
4989 #define ARIZONA_DRC2_SIG_DET_EINT2 0x0400 /* DRC2_SIG_DET_EINT2 */
4990 #define ARIZONA_DRC2_SIG_DET_EINT2_MASK 0x0400 /* DRC2_SIG_DET_EINT2 */
4991 #define ARIZONA_DRC2_SIG_DET_EINT2_SHIFT 10 /* DRC2_SIG_DET_EINT2 */
4992 #define ARIZONA_DRC2_SIG_DET_EINT2_WIDTH 1 /* DRC2_SIG_DET_EINT2 */
4993 #define ARIZONA_DRC1_SIG_DET_EINT2 0x0200 /* DRC1_SIG_DET_EINT2 */
4994 #define ARIZONA_DRC1_SIG_DET_EINT2_MASK 0x0200 /* DRC1_SIG_DET_EINT2 */
4995 #define ARIZONA_DRC1_SIG_DET_EINT2_SHIFT 9 /* DRC1_SIG_DET_EINT2 */
4996 #define ARIZONA_DRC1_SIG_DET_EINT2_WIDTH 1 /* DRC1_SIG_DET_EINT2 */
4997 #define ARIZONA_ASRC2_LOCK_EINT2 0x0100 /* ASRC2_LOCK_EINT2 */
4998 #define ARIZONA_ASRC2_LOCK_EINT2_MASK 0x0100 /* ASRC2_LOCK_EINT2 */
4999 #define ARIZONA_ASRC2_LOCK_EINT2_SHIFT 8 /* ASRC2_LOCK_EINT2 */
5000 #define ARIZONA_ASRC2_LOCK_EINT2_WIDTH 1 /* ASRC2_LOCK_EINT2 */
5001 #define ARIZONA_ASRC1_LOCK_EINT2 0x0080 /* ASRC1_LOCK_EINT2 */
5002 #define ARIZONA_ASRC1_LOCK_EINT2_MASK 0x0080 /* ASRC1_LOCK_EINT2 */
5003 #define ARIZONA_ASRC1_LOCK_EINT2_SHIFT 7 /* ASRC1_LOCK_EINT2 */
5004 #define ARIZONA_ASRC1_LOCK_EINT2_WIDTH 1 /* ASRC1_LOCK_EINT2 */
5005 #define ARIZONA_UNDERCLOCKED_EINT2 0x0040 /* UNDERCLOCKED_EINT2 */
5006 #define ARIZONA_UNDERCLOCKED_EINT2_MASK 0x0040 /* UNDERCLOCKED_EINT2 */
5007 #define ARIZONA_UNDERCLOCKED_EINT2_SHIFT 6 /* UNDERCLOCKED_EINT2 */
5008 #define ARIZONA_UNDERCLOCKED_EINT2_WIDTH 1 /* UNDERCLOCKED_EINT2 */
5009 #define ARIZONA_OVERCLOCKED_EINT2 0x0020 /* OVERCLOCKED_EINT2 */
5010 #define ARIZONA_OVERCLOCKED_EINT2_MASK 0x0020 /* OVERCLOCKED_EINT2 */
5011 #define ARIZONA_OVERCLOCKED_EINT2_SHIFT 5 /* OVERCLOCKED_EINT2 */
5012 #define ARIZONA_OVERCLOCKED_EINT2_WIDTH 1 /* OVERCLOCKED_EINT2 */
5013 #define ARIZONA_FLL2_LOCK_EINT2 0x0008 /* FLL2_LOCK_EINT2 */
5014 #define ARIZONA_FLL2_LOCK_EINT2_MASK 0x0008 /* FLL2_LOCK_EINT2 */
5015 #define ARIZONA_FLL2_LOCK_EINT2_SHIFT 3 /* FLL2_LOCK_EINT2 */
5016 #define ARIZONA_FLL2_LOCK_EINT2_WIDTH 1 /* FLL2_LOCK_EINT2 */
5017 #define ARIZONA_FLL1_LOCK_EINT2 0x0004 /* FLL1_LOCK_EINT2 */
5018 #define ARIZONA_FLL1_LOCK_EINT2_MASK 0x0004 /* FLL1_LOCK_EINT2 */
5019 #define ARIZONA_FLL1_LOCK_EINT2_SHIFT 2 /* FLL1_LOCK_EINT2 */
5020 #define ARIZONA_FLL1_LOCK_EINT2_WIDTH 1 /* FLL1_LOCK_EINT2 */
5021 #define ARIZONA_CLKGEN_ERR_EINT2 0x0002 /* CLKGEN_ERR_EINT2 */
5022 #define ARIZONA_CLKGEN_ERR_EINT2_MASK 0x0002 /* CLKGEN_ERR_EINT2 */
5023 #define ARIZONA_CLKGEN_ERR_EINT2_SHIFT 1 /* CLKGEN_ERR_EINT2 */
5024 #define ARIZONA_CLKGEN_ERR_EINT2_WIDTH 1 /* CLKGEN_ERR_EINT2 */
5025 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
5026 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* CLKGEN_ERR_ASYNC_EINT2 */
5027 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* CLKGEN_ERR_ASYNC_EINT2 */
5028 #define ARIZONA_CLKGEN_ERR_ASYNC_EINT2_WIDTH 1 /* CLKGEN_ERR_ASYNC_EINT2 */
5029
5030 /*
5031 * R3347 (0xD13) - IRQ2 Status 4
5032 */
5033 #define ARIZONA_ASRC_CFG_ERR_EINT2 0x8000 /* ASRC_CFG_ERR_EINT2 */
5034 #define ARIZONA_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* ASRC_CFG_ERR_EINT2 */
5035 #define ARIZONA_ASRC_CFG_ERR_EINT2_SHIFT 15 /* ASRC_CFG_ERR_EINT2 */
5036 #define ARIZONA_ASRC_CFG_ERR_EINT2_WIDTH 1 /* ASRC_CFG_ERR_EINT2 */
5037 #define ARIZONA_AIF3_ERR_EINT2 0x4000 /* AIF3_ERR_EINT2 */
5038 #define ARIZONA_AIF3_ERR_EINT2_MASK 0x4000 /* AIF3_ERR_EINT2 */
5039 #define ARIZONA_AIF3_ERR_EINT2_SHIFT 14 /* AIF3_ERR_EINT2 */
5040 #define ARIZONA_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */
5041 #define ARIZONA_AIF2_ERR_EINT2 0x2000 /* AIF2_ERR_EINT2 */
5042 #define ARIZONA_AIF2_ERR_EINT2_MASK 0x2000 /* AIF2_ERR_EINT2 */
5043 #define ARIZONA_AIF2_ERR_EINT2_SHIFT 13 /* AIF2_ERR_EINT2 */
5044 #define ARIZONA_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */
5045 #define ARIZONA_AIF1_ERR_EINT2 0x1000 /* AIF1_ERR_EINT2 */
5046 #define ARIZONA_AIF1_ERR_EINT2_MASK 0x1000 /* AIF1_ERR_EINT2 */
5047 #define ARIZONA_AIF1_ERR_EINT2_SHIFT 12 /* AIF1_ERR_EINT2 */
5048 #define ARIZONA_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */
5049 #define ARIZONA_CTRLIF_ERR_EINT2 0x0800 /* CTRLIF_ERR_EINT2 */
5050 #define ARIZONA_CTRLIF_ERR_EINT2_MASK 0x0800 /* CTRLIF_ERR_EINT2 */
5051 #define ARIZONA_CTRLIF_ERR_EINT2_SHIFT 11 /* CTRLIF_ERR_EINT2 */
5052 #define ARIZONA_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */
5053 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
5054 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_EINT2 */
5055 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* MIXER_DROPPED_SAMPLE_EINT2 */
5056 #define ARIZONA_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */
5057 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
5058 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_EINT2 */
5059 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* ASYNC_CLK_ENA_LOW_EINT2 */
5060 #define ARIZONA_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */
5061 #define ARIZONA_SYSCLK_ENA_LOW_EINT2 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
5062 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* SYSCLK_ENA_LOW_EINT2 */
5063 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* SYSCLK_ENA_LOW_EINT2 */
5064 #define ARIZONA_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */
5065 #define ARIZONA_ISRC1_CFG_ERR_EINT2 0x0080 /* ISRC1_CFG_ERR_EINT2 */
5066 #define ARIZONA_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* ISRC1_CFG_ERR_EINT2 */
5067 #define ARIZONA_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* ISRC1_CFG_ERR_EINT2 */
5068 #define ARIZONA_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */
5069 #define ARIZONA_ISRC2_CFG_ERR_EINT2 0x0040 /* ISRC2_CFG_ERR_EINT2 */
5070 #define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* ISRC2_CFG_ERR_EINT2 */
5071 #define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* ISRC2_CFG_ERR_EINT2 */
5072 #define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */
5073
5074 /*
5075 * R3348 (0xD14) - IRQ2 Status 5
5076 */
5077 #define ARIZONA_BOOT_DONE_EINT2 0x0100 /* BOOT_DONE_EINT2 */
5078 #define ARIZONA_BOOT_DONE_EINT2_MASK 0x0100 /* BOOT_DONE_EINT2 */
5079 #define ARIZONA_BOOT_DONE_EINT2_SHIFT 8 /* BOOT_DONE_EINT2 */
5080 #define ARIZONA_BOOT_DONE_EINT2_WIDTH 1 /* BOOT_DONE_EINT2 */
5081 #define ARIZONA_DCS_DAC_DONE_EINT2 0x0080 /* DCS_DAC_DONE_EINT2 */
5082 #define ARIZONA_DCS_DAC_DONE_EINT2_MASK 0x0080 /* DCS_DAC_DONE_EINT2 */
5083 #define ARIZONA_DCS_DAC_DONE_EINT2_SHIFT 7 /* DCS_DAC_DONE_EINT2 */
5084 #define ARIZONA_DCS_DAC_DONE_EINT2_WIDTH 1 /* DCS_DAC_DONE_EINT2 */
5085 #define ARIZONA_DCS_HP_DONE_EINT2 0x0040 /* DCS_HP_DONE_EINT2 */
5086 #define ARIZONA_DCS_HP_DONE_EINT2_MASK 0x0040 /* DCS_HP_DONE_EINT2 */
5087 #define ARIZONA_DCS_HP_DONE_EINT2_SHIFT 6 /* DCS_HP_DONE_EINT2 */
5088 #define ARIZONA_DCS_HP_DONE_EINT2_WIDTH 1 /* DCS_HP_DONE_EINT2 */
5089 #define ARIZONA_FLL2_CLOCK_OK_EINT2 0x0002 /* FLL2_CLOCK_OK_EINT2 */
5090 #define ARIZONA_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* FLL2_CLOCK_OK_EINT2 */
5091 #define ARIZONA_FLL2_CLOCK_OK_EINT2_SHIFT 1 /* FLL2_CLOCK_OK_EINT2 */
5092 #define ARIZONA_FLL2_CLOCK_OK_EINT2_WIDTH 1 /* FLL2_CLOCK_OK_EINT2 */
5093 #define ARIZONA_FLL1_CLOCK_OK_EINT2 0x0001 /* FLL1_CLOCK_OK_EINT2 */
5094 #define ARIZONA_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* FLL1_CLOCK_OK_EINT2 */
5095 #define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* FLL1_CLOCK_OK_EINT2 */
5096 #define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* FLL1_CLOCK_OK_EINT2 */
5097
5098 /*
5099 * R3352 (0xD18) - IRQ2 Status 1 Mask
5100 */
5101 #define ARIZONA_IM_GP4_EINT2 0x0008 /* IM_GP4_EINT2 */
5102 #define ARIZONA_IM_GP4_EINT2_MASK 0x0008 /* IM_GP4_EINT2 */
5103 #define ARIZONA_IM_GP4_EINT2_SHIFT 3 /* IM_GP4_EINT2 */
5104 #define ARIZONA_IM_GP4_EINT2_WIDTH 1 /* IM_GP4_EINT2 */
5105 #define ARIZONA_IM_GP3_EINT2 0x0004 /* IM_GP3_EINT2 */
5106 #define ARIZONA_IM_GP3_EINT2_MASK 0x0004 /* IM_GP3_EINT2 */
5107 #define ARIZONA_IM_GP3_EINT2_SHIFT 2 /* IM_GP3_EINT2 */
5108 #define ARIZONA_IM_GP3_EINT2_WIDTH 1 /* IM_GP3_EINT2 */
5109 #define ARIZONA_IM_GP2_EINT2 0x0002 /* IM_GP2_EINT2 */
5110 #define ARIZONA_IM_GP2_EINT2_MASK 0x0002 /* IM_GP2_EINT2 */
5111 #define ARIZONA_IM_GP2_EINT2_SHIFT 1 /* IM_GP2_EINT2 */
5112 #define ARIZONA_IM_GP2_EINT2_WIDTH 1 /* IM_GP2_EINT2 */
5113 #define ARIZONA_IM_GP1_EINT2 0x0001 /* IM_GP1_EINT2 */
5114 #define ARIZONA_IM_GP1_EINT2_MASK 0x0001 /* IM_GP1_EINT2 */
5115 #define ARIZONA_IM_GP1_EINT2_SHIFT 0 /* IM_GP1_EINT2 */
5116 #define ARIZONA_IM_GP1_EINT2_WIDTH 1 /* IM_GP1_EINT2 */
5117
5118 /*
5119 * R3353 (0xD19) - IRQ2 Status 2 Mask
5120 */
5121 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
5122 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_MASK 0x0100 /* IM_DSP1_RAM_RDY_EINT2 */
5123 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_SHIFT 8 /* IM_DSP1_RAM_RDY_EINT2 */
5124 #define ARIZONA_IM_DSP1_RAM_RDY_EINT2_WIDTH 1 /* IM_DSP1_RAM_RDY_EINT2 */
5125 #define ARIZONA_IM_DSP_IRQ2_EINT2 0x0002 /* IM_DSP_IRQ2_EINT2 */
5126 #define ARIZONA_IM_DSP_IRQ2_EINT2_MASK 0x0002 /* IM_DSP_IRQ2_EINT2 */
5127 #define ARIZONA_IM_DSP_IRQ2_EINT2_SHIFT 1 /* IM_DSP_IRQ2_EINT2 */
5128 #define ARIZONA_IM_DSP_IRQ2_EINT2_WIDTH 1 /* IM_DSP_IRQ2_EINT2 */
5129 #define ARIZONA_IM_DSP_IRQ1_EINT2 0x0001 /* IM_DSP_IRQ1_EINT2 */
5130 #define ARIZONA_IM_DSP_IRQ1_EINT2_MASK 0x0001 /* IM_DSP_IRQ1_EINT2 */
5131 #define ARIZONA_IM_DSP_IRQ1_EINT2_SHIFT 0 /* IM_DSP_IRQ1_EINT2 */
5132 #define ARIZONA_IM_DSP_IRQ1_EINT2_WIDTH 1 /* IM_DSP_IRQ1_EINT2 */
5133
5134 /*
5135 * R3354 (0xD1A) - IRQ2 Status 3 Mask
5136 */
5137 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
5138 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
5139 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
5140 #define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
5141 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
5142 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
5143 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */
5144 #define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */
5145 #define ARIZONA_IM_HPDET_EINT2 0x2000 /* IM_HPDET_EINT2 */
5146 #define ARIZONA_IM_HPDET_EINT2_MASK 0x2000 /* IM_HPDET_EINT2 */
5147 #define ARIZONA_IM_HPDET_EINT2_SHIFT 13 /* IM_HPDET_EINT2 */
5148 #define ARIZONA_IM_HPDET_EINT2_WIDTH 1 /* IM_HPDET_EINT2 */
5149 #define ARIZONA_IM_MICDET_EINT2 0x1000 /* IM_MICDET_EINT2 */
5150 #define ARIZONA_IM_MICDET_EINT2_MASK 0x1000 /* IM_MICDET_EINT2 */
5151 #define ARIZONA_IM_MICDET_EINT2_SHIFT 12 /* IM_MICDET_EINT2 */
5152 #define ARIZONA_IM_MICDET_EINT2_WIDTH 1 /* IM_MICDET_EINT2 */
5153 #define ARIZONA_IM_WSEQ_DONE_EINT2 0x0800 /* IM_WSEQ_DONE_EINT2 */
5154 #define ARIZONA_IM_WSEQ_DONE_EINT2_MASK 0x0800 /* IM_WSEQ_DONE_EINT2 */
5155 #define ARIZONA_IM_WSEQ_DONE_EINT2_SHIFT 11 /* IM_WSEQ_DONE_EINT2 */
5156 #define ARIZONA_IM_WSEQ_DONE_EINT2_WIDTH 1 /* IM_WSEQ_DONE_EINT2 */
5157 #define ARIZONA_IM_DRC2_SIG_DET_EINT2 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
5158 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_MASK 0x0400 /* IM_DRC2_SIG_DET_EINT2 */
5159 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_SHIFT 10 /* IM_DRC2_SIG_DET_EINT2 */
5160 #define ARIZONA_IM_DRC2_SIG_DET_EINT2_WIDTH 1 /* IM_DRC2_SIG_DET_EINT2 */
5161 #define ARIZONA_IM_DRC1_SIG_DET_EINT2 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
5162 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_MASK 0x0200 /* IM_DRC1_SIG_DET_EINT2 */
5163 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_SHIFT 9 /* IM_DRC1_SIG_DET_EINT2 */
5164 #define ARIZONA_IM_DRC1_SIG_DET_EINT2_WIDTH 1 /* IM_DRC1_SIG_DET_EINT2 */
5165 #define ARIZONA_IM_ASRC2_LOCK_EINT2 0x0100 /* IM_ASRC2_LOCK_EINT2 */
5166 #define ARIZONA_IM_ASRC2_LOCK_EINT2_MASK 0x0100 /* IM_ASRC2_LOCK_EINT2 */
5167 #define ARIZONA_IM_ASRC2_LOCK_EINT2_SHIFT 8 /* IM_ASRC2_LOCK_EINT2 */
5168 #define ARIZONA_IM_ASRC2_LOCK_EINT2_WIDTH 1 /* IM_ASRC2_LOCK_EINT2 */
5169 #define ARIZONA_IM_ASRC1_LOCK_EINT2 0x0080 /* IM_ASRC1_LOCK_EINT2 */
5170 #define ARIZONA_IM_ASRC1_LOCK_EINT2_MASK 0x0080 /* IM_ASRC1_LOCK_EINT2 */
5171 #define ARIZONA_IM_ASRC1_LOCK_EINT2_SHIFT 7 /* IM_ASRC1_LOCK_EINT2 */
5172 #define ARIZONA_IM_ASRC1_LOCK_EINT2_WIDTH 1 /* IM_ASRC1_LOCK_EINT2 */
5173 #define ARIZONA_IM_UNDERCLOCKED_EINT2 0x0040 /* IM_UNDERCLOCKED_EINT2 */
5174 #define ARIZONA_IM_UNDERCLOCKED_EINT2_MASK 0x0040 /* IM_UNDERCLOCKED_EINT2 */
5175 #define ARIZONA_IM_UNDERCLOCKED_EINT2_SHIFT 6 /* IM_UNDERCLOCKED_EINT2 */
5176 #define ARIZONA_IM_UNDERCLOCKED_EINT2_WIDTH 1 /* IM_UNDERCLOCKED_EINT2 */
5177 #define ARIZONA_IM_OVERCLOCKED_EINT2 0x0020 /* IM_OVERCLOCKED_EINT2 */
5178 #define ARIZONA_IM_OVERCLOCKED_EINT2_MASK 0x0020 /* IM_OVERCLOCKED_EINT2 */
5179 #define ARIZONA_IM_OVERCLOCKED_EINT2_SHIFT 5 /* IM_OVERCLOCKED_EINT2 */
5180 #define ARIZONA_IM_OVERCLOCKED_EINT2_WIDTH 1 /* IM_OVERCLOCKED_EINT2 */
5181 #define ARIZONA_IM_FLL2_LOCK_EINT2 0x0008 /* IM_FLL2_LOCK_EINT2 */
5182 #define ARIZONA_IM_FLL2_LOCK_EINT2_MASK 0x0008 /* IM_FLL2_LOCK_EINT2 */
5183 #define ARIZONA_IM_FLL2_LOCK_EINT2_SHIFT 3 /* IM_FLL2_LOCK_EINT2 */
5184 #define ARIZONA_IM_FLL2_LOCK_EINT2_WIDTH 1 /* IM_FLL2_LOCK_EINT2 */
5185 #define ARIZONA_IM_FLL1_LOCK_EINT2 0x0004 /* IM_FLL1_LOCK_EINT2 */
5186 #define ARIZONA_IM_FLL1_LOCK_EINT2_MASK 0x0004 /* IM_FLL1_LOCK_EINT2 */
5187 #define ARIZONA_IM_FLL1_LOCK_EINT2_SHIFT 2 /* IM_FLL1_LOCK_EINT2 */
5188 #define ARIZONA_IM_FLL1_LOCK_EINT2_WIDTH 1 /* IM_FLL1_LOCK_EINT2 */
5189 #define ARIZONA_IM_CLKGEN_ERR_EINT2 0x0002 /* IM_CLKGEN_ERR_EINT2 */
5190 #define ARIZONA_IM_CLKGEN_ERR_EINT2_MASK 0x0002 /* IM_CLKGEN_ERR_EINT2 */
5191 #define ARIZONA_IM_CLKGEN_ERR_EINT2_SHIFT 1 /* IM_CLKGEN_ERR_EINT2 */
5192 #define ARIZONA_IM_CLKGEN_ERR_EINT2_WIDTH 1 /* IM_CLKGEN_ERR_EINT2 */
5193 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
5194 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_MASK 0x0001 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
5195 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_SHIFT 0 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
5196 #define ARIZONA_IM_CLKGEN_ERR_ASYNC_EINT2_WIDTH 1 /* IM_CLKGEN_ERR_ASYNC_EINT2 */
5197
5198 /*
5199 * R3355 (0xD1B) - IRQ2 Status 4 Mask
5200 */
5201 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
5202 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_MASK 0x8000 /* IM_ASRC_CFG_ERR_EINT2 */
5203 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_SHIFT 15 /* IM_ASRC_CFG_ERR_EINT2 */
5204 #define ARIZONA_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */
5205 #define ARIZONA_IM_AIF3_ERR_EINT2 0x4000 /* IM_AIF3_ERR_EINT2 */
5206 #define ARIZONA_IM_AIF3_ERR_EINT2_MASK 0x4000 /* IM_AIF3_ERR_EINT2 */
5207 #define ARIZONA_IM_AIF3_ERR_EINT2_SHIFT 14 /* IM_AIF3_ERR_EINT2 */
5208 #define ARIZONA_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */
5209 #define ARIZONA_IM_AIF2_ERR_EINT2 0x2000 /* IM_AIF2_ERR_EINT2 */
5210 #define ARIZONA_IM_AIF2_ERR_EINT2_MASK 0x2000 /* IM_AIF2_ERR_EINT2 */
5211 #define ARIZONA_IM_AIF2_ERR_EINT2_SHIFT 13 /* IM_AIF2_ERR_EINT2 */
5212 #define ARIZONA_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */
5213 #define ARIZONA_IM_AIF1_ERR_EINT2 0x1000 /* IM_AIF1_ERR_EINT2 */
5214 #define ARIZONA_IM_AIF1_ERR_EINT2_MASK 0x1000 /* IM_AIF1_ERR_EINT2 */
5215 #define ARIZONA_IM_AIF1_ERR_EINT2_SHIFT 12 /* IM_AIF1_ERR_EINT2 */
5216 #define ARIZONA_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */
5217 #define ARIZONA_IM_CTRLIF_ERR_EINT2 0x0800 /* IM_CTRLIF_ERR_EINT2 */
5218 #define ARIZONA_IM_CTRLIF_ERR_EINT2_MASK 0x0800 /* IM_CTRLIF_ERR_EINT2 */
5219 #define ARIZONA_IM_CTRLIF_ERR_EINT2_SHIFT 11 /* IM_CTRLIF_ERR_EINT2 */
5220 #define ARIZONA_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */
5221 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
5222 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0400 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
5223 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 10 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
5224 #define ARIZONA_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
5225 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
5226 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
5227 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 9 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
5228 #define ARIZONA_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
5229 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
5230 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0100 /* IM_SYSCLK_ENA_LOW_EINT2 */
5231 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 8 /* IM_SYSCLK_ENA_LOW_EINT2 */
5232 #define ARIZONA_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */
5233 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
5234 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC1_CFG_ERR_EINT2 */
5235 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC1_CFG_ERR_EINT2 */
5236 #define ARIZONA_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */
5237 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
5238 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
5239 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */
5240 #define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */
5241
5242 /*
5243 * R3356 (0xD1C) - IRQ2 Status 5 Mask
5244 */
5245
5246 #define ARIZONA_IM_BOOT_DONE_EINT2 0x0100 /* IM_BOOT_DONE_EINT2 */
5247 #define ARIZONA_IM_BOOT_DONE_EINT2_MASK 0x0100 /* IM_BOOT_DONE_EINT2 */
5248 #define ARIZONA_IM_BOOT_DONE_EINT2_SHIFT 8 /* IM_BOOT_DONE_EINT2 */
5249 #define ARIZONA_IM_BOOT_DONE_EINT2_WIDTH 1 /* IM_BOOT_DONE_EINT2 */
5250 #define ARIZONA_IM_DCS_DAC_DONE_EINT2 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
5251 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_MASK 0x0080 /* IM_DCS_DAC_DONE_EINT2 */
5252 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_SHIFT 7 /* IM_DCS_DAC_DONE_EINT2 */
5253 #define ARIZONA_IM_DCS_DAC_DONE_EINT2_WIDTH 1 /* IM_DCS_DAC_DONE_EINT2 */
5254 #define ARIZONA_IM_DCS_HP_DONE_EINT2 0x0040 /* IM_DCS_HP_DONE_EINT2 */
5255 #define ARIZONA_IM_DCS_HP_DONE_EINT2_MASK 0x0040 /* IM_DCS_HP_DONE_EINT2 */
5256 #define ARIZONA_IM_DCS_HP_DONE_EINT2_SHIFT 6 /* IM_DCS_HP_DONE_EINT2 */
5257 #define ARIZONA_IM_DCS_HP_DONE_EINT2_WIDTH 1 /* IM_DCS_HP_DONE_EINT2 */
5258 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
5259 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_MASK 0x0002 /* IM_FLL2_CLOCK_OK_EINT2 */
5260 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_SHIFT 1 /* IM_FLL2_CLOCK_OK_EINT2 */
5261 #define ARIZONA_IM_FLL2_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL2_CLOCK_OK_EINT2 */
5262 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
5263 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_MASK 0x0001 /* IM_FLL1_CLOCK_OK_EINT2 */
5264 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT2 */
5265 #define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT2 */
5266
5267 /*
5268 * R3359 (0xD1F) - IRQ2 Control
5269 */
5270 #define ARIZONA_IM_IRQ2 0x0001 /* IM_IRQ2 */
5271 #define ARIZONA_IM_IRQ2_MASK 0x0001 /* IM_IRQ2 */
5272 #define ARIZONA_IM_IRQ2_SHIFT 0 /* IM_IRQ2 */
5273 #define ARIZONA_IM_IRQ2_WIDTH 1 /* IM_IRQ2 */
5274
5275 /*
5276 * R3360 (0xD20) - Interrupt Raw Status 2
5277 */
5278 #define ARIZONA_DSP1_RAM_RDY_STS 0x0100 /* DSP1_RAM_RDY_STS */
5279 #define ARIZONA_DSP1_RAM_RDY_STS_MASK 0x0100 /* DSP1_RAM_RDY_STS */
5280 #define ARIZONA_DSP1_RAM_RDY_STS_SHIFT 8 /* DSP1_RAM_RDY_STS */
5281 #define ARIZONA_DSP1_RAM_RDY_STS_WIDTH 1 /* DSP1_RAM_RDY_STS */
5282 #define ARIZONA_DSP_IRQ2_STS 0x0002 /* DSP_IRQ2_STS */
5283 #define ARIZONA_DSP_IRQ2_STS_MASK 0x0002 /* DSP_IRQ2_STS */
5284 #define ARIZONA_DSP_IRQ2_STS_SHIFT 1 /* DSP_IRQ2_STS */
5285 #define ARIZONA_DSP_IRQ2_STS_WIDTH 1 /* DSP_IRQ2_STS */
5286 #define ARIZONA_DSP_IRQ1_STS 0x0001 /* DSP_IRQ1_STS */
5287 #define ARIZONA_DSP_IRQ1_STS_MASK 0x0001 /* DSP_IRQ1_STS */
5288 #define ARIZONA_DSP_IRQ1_STS_SHIFT 0 /* DSP_IRQ1_STS */
5289 #define ARIZONA_DSP_IRQ1_STS_WIDTH 1 /* DSP_IRQ1_STS */
5290
5291 /*
5292 * R3361 (0xD21) - Interrupt Raw Status 3
5293 */
5294 #define ARIZONA_SPK_SHUTDOWN_WARN_STS 0x8000 /* SPK_SHUTDOWN_WARN_STS */
5295 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK 0x8000 /* SPK_SHUTDOWN_WARN_STS */
5296 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT 15 /* SPK_SHUTDOWN_WARN_STS */
5297 #define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH 1 /* SPK_SHUTDOWN_WARN_STS */
5298 #define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */
5299 #define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */
5300 #define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */
5301 #define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */
5302 #define ARIZONA_HPDET_STS 0x2000 /* HPDET_STS */
5303 #define ARIZONA_HPDET_STS_MASK 0x2000 /* HPDET_STS */
5304 #define ARIZONA_HPDET_STS_SHIFT 13 /* HPDET_STS */
5305 #define ARIZONA_HPDET_STS_WIDTH 1 /* HPDET_STS */
5306 #define ARIZONA_MICDET_STS 0x1000 /* MICDET_STS */
5307 #define ARIZONA_MICDET_STS_MASK 0x1000 /* MICDET_STS */
5308 #define ARIZONA_MICDET_STS_SHIFT 12 /* MICDET_STS */
5309 #define ARIZONA_MICDET_STS_WIDTH 1 /* MICDET_STS */
5310 #define ARIZONA_WSEQ_DONE_STS 0x0800 /* WSEQ_DONE_STS */
5311 #define ARIZONA_WSEQ_DONE_STS_MASK 0x0800 /* WSEQ_DONE_STS */
5312 #define ARIZONA_WSEQ_DONE_STS_SHIFT 11 /* WSEQ_DONE_STS */
5313 #define ARIZONA_WSEQ_DONE_STS_WIDTH 1 /* WSEQ_DONE_STS */
5314 #define ARIZONA_DRC2_SIG_DET_STS 0x0400 /* DRC2_SIG_DET_STS */
5315 #define ARIZONA_DRC2_SIG_DET_STS_MASK 0x0400 /* DRC2_SIG_DET_STS */
5316 #define ARIZONA_DRC2_SIG_DET_STS_SHIFT 10 /* DRC2_SIG_DET_STS */
5317 #define ARIZONA_DRC2_SIG_DET_STS_WIDTH 1 /* DRC2_SIG_DET_STS */
5318 #define ARIZONA_DRC1_SIG_DET_STS 0x0200 /* DRC1_SIG_DET_STS */
5319 #define ARIZONA_DRC1_SIG_DET_STS_MASK 0x0200 /* DRC1_SIG_DET_STS */
5320 #define ARIZONA_DRC1_SIG_DET_STS_SHIFT 9 /* DRC1_SIG_DET_STS */
5321 #define ARIZONA_DRC1_SIG_DET_STS_WIDTH 1 /* DRC1_SIG_DET_STS */
5322 #define ARIZONA_ASRC2_LOCK_STS 0x0100 /* ASRC2_LOCK_STS */
5323 #define ARIZONA_ASRC2_LOCK_STS_MASK 0x0100 /* ASRC2_LOCK_STS */
5324 #define ARIZONA_ASRC2_LOCK_STS_SHIFT 8 /* ASRC2_LOCK_STS */
5325 #define ARIZONA_ASRC2_LOCK_STS_WIDTH 1 /* ASRC2_LOCK_STS */
5326 #define ARIZONA_ASRC1_LOCK_STS 0x0080 /* ASRC1_LOCK_STS */
5327 #define ARIZONA_ASRC1_LOCK_STS_MASK 0x0080 /* ASRC1_LOCK_STS */
5328 #define ARIZONA_ASRC1_LOCK_STS_SHIFT 7 /* ASRC1_LOCK_STS */
5329 #define ARIZONA_ASRC1_LOCK_STS_WIDTH 1 /* ASRC1_LOCK_STS */
5330 #define ARIZONA_UNDERCLOCKED_STS 0x0040 /* UNDERCLOCKED_STS */
5331 #define ARIZONA_UNDERCLOCKED_STS_MASK 0x0040 /* UNDERCLOCKED_STS */
5332 #define ARIZONA_UNDERCLOCKED_STS_SHIFT 6 /* UNDERCLOCKED_STS */
5333 #define ARIZONA_UNDERCLOCKED_STS_WIDTH 1 /* UNDERCLOCKED_STS */
5334 #define ARIZONA_OVERCLOCKED_STS 0x0020 /* OVERCLOCKED_STS */
5335 #define ARIZONA_OVERCLOCKED_STS_MASK 0x0020 /* OVERCLOCKED_STS */
5336 #define ARIZONA_OVERCLOCKED_STS_SHIFT 5 /* OVERCLOCKED_STS */
5337 #define ARIZONA_OVERCLOCKED_STS_WIDTH 1 /* OVERCLOCKED_STS */
5338 #define ARIZONA_FLL2_LOCK_STS 0x0008 /* FLL2_LOCK_STS */
5339 #define ARIZONA_FLL2_LOCK_STS_MASK 0x0008 /* FLL2_LOCK_STS */
5340 #define ARIZONA_FLL2_LOCK_STS_SHIFT 3 /* FLL2_LOCK_STS */
5341 #define ARIZONA_FLL2_LOCK_STS_WIDTH 1 /* FLL2_LOCK_STS */
5342 #define ARIZONA_FLL1_LOCK_STS 0x0004 /* FLL1_LOCK_STS */
5343 #define ARIZONA_FLL1_LOCK_STS_MASK 0x0004 /* FLL1_LOCK_STS */
5344 #define ARIZONA_FLL1_LOCK_STS_SHIFT 2 /* FLL1_LOCK_STS */
5345 #define ARIZONA_FLL1_LOCK_STS_WIDTH 1 /* FLL1_LOCK_STS */
5346 #define ARIZONA_CLKGEN_ERR_STS 0x0002 /* CLKGEN_ERR_STS */
5347 #define ARIZONA_CLKGEN_ERR_STS_MASK 0x0002 /* CLKGEN_ERR_STS */
5348 #define ARIZONA_CLKGEN_ERR_STS_SHIFT 1 /* CLKGEN_ERR_STS */
5349 #define ARIZONA_CLKGEN_ERR_STS_WIDTH 1 /* CLKGEN_ERR_STS */
5350 #define ARIZONA_CLKGEN_ERR_ASYNC_STS 0x0001 /* CLKGEN_ERR_ASYNC_STS */
5351 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_MASK 0x0001 /* CLKGEN_ERR_ASYNC_STS */
5352 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_SHIFT 0 /* CLKGEN_ERR_ASYNC_STS */
5353 #define ARIZONA_CLKGEN_ERR_ASYNC_STS_WIDTH 1 /* CLKGEN_ERR_ASYNC_STS */
5354
5355 /*
5356 * R3362 (0xD22) - Interrupt Raw Status 4
5357 */
5358 #define ARIZONA_ASRC_CFG_ERR_STS 0x8000 /* ASRC_CFG_ERR_STS */
5359 #define ARIZONA_ASRC_CFG_ERR_STS_MASK 0x8000 /* ASRC_CFG_ERR_STS */
5360 #define ARIZONA_ASRC_CFG_ERR_STS_SHIFT 15 /* ASRC_CFG_ERR_STS */
5361 #define ARIZONA_ASRC_CFG_ERR_STS_WIDTH 1 /* ASRC_CFG_ERR_STS */
5362 #define ARIZONA_AIF3_ERR_STS 0x4000 /* AIF3_ERR_STS */
5363 #define ARIZONA_AIF3_ERR_STS_MASK 0x4000 /* AIF3_ERR_STS */
5364 #define ARIZONA_AIF3_ERR_STS_SHIFT 14 /* AIF3_ERR_STS */
5365 #define ARIZONA_AIF3_ERR_STS_WIDTH 1 /* AIF3_ERR_STS */
5366 #define ARIZONA_AIF2_ERR_STS 0x2000 /* AIF2_ERR_STS */
5367 #define ARIZONA_AIF2_ERR_STS_MASK 0x2000 /* AIF2_ERR_STS */
5368 #define ARIZONA_AIF2_ERR_STS_SHIFT 13 /* AIF2_ERR_STS */
5369 #define ARIZONA_AIF2_ERR_STS_WIDTH 1 /* AIF2_ERR_STS */
5370 #define ARIZONA_AIF1_ERR_STS 0x1000 /* AIF1_ERR_STS */
5371 #define ARIZONA_AIF1_ERR_STS_MASK 0x1000 /* AIF1_ERR_STS */
5372 #define ARIZONA_AIF1_ERR_STS_SHIFT 12 /* AIF1_ERR_STS */
5373 #define ARIZONA_AIF1_ERR_STS_WIDTH 1 /* AIF1_ERR_STS */
5374 #define ARIZONA_CTRLIF_ERR_STS 0x0800 /* CTRLIF_ERR_STS */
5375 #define ARIZONA_CTRLIF_ERR_STS_MASK 0x0800 /* CTRLIF_ERR_STS */
5376 #define ARIZONA_CTRLIF_ERR_STS_SHIFT 11 /* CTRLIF_ERR_STS */
5377 #define ARIZONA_CTRLIF_ERR_STS_WIDTH 1 /* CTRLIF_ERR_STS */
5378 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
5379 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_MASK 0x0400 /* MIXER_DROPPED_SAMPLE_STS */
5380 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_SHIFT 10 /* MIXER_DROPPED_SAMPLE_STS */
5381 #define ARIZONA_MIXER_DROPPED_SAMPLE_STS_WIDTH 1 /* MIXER_DROPPED_SAMPLE_STS */
5382 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
5383 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_MASK 0x0200 /* ASYNC_CLK_ENA_LOW_STS */
5384 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_SHIFT 9 /* ASYNC_CLK_ENA_LOW_STS */
5385 #define ARIZONA_ASYNC_CLK_ENA_LOW_STS_WIDTH 1 /* ASYNC_CLK_ENA_LOW_STS */
5386 #define ARIZONA_SYSCLK_ENA_LOW_STS 0x0100 /* SYSCLK_ENA_LOW_STS */
5387 #define ARIZONA_SYSCLK_ENA_LOW_STS_MASK 0x0100 /* SYSCLK_ENA_LOW_STS */
5388 #define ARIZONA_SYSCLK_ENA_LOW_STS_SHIFT 8 /* SYSCLK_ENA_LOW_STS */
5389 #define ARIZONA_SYSCLK_ENA_LOW_STS_WIDTH 1 /* SYSCLK_ENA_LOW_STS */
5390 #define ARIZONA_ISRC1_CFG_ERR_STS 0x0080 /* ISRC1_CFG_ERR_STS */
5391 #define ARIZONA_ISRC1_CFG_ERR_STS_MASK 0x0080 /* ISRC1_CFG_ERR_STS */
5392 #define ARIZONA_ISRC1_CFG_ERR_STS_SHIFT 7 /* ISRC1_CFG_ERR_STS */
5393 #define ARIZONA_ISRC1_CFG_ERR_STS_WIDTH 1 /* ISRC1_CFG_ERR_STS */
5394 #define ARIZONA_ISRC2_CFG_ERR_STS 0x0040 /* ISRC2_CFG_ERR_STS */
5395 #define ARIZONA_ISRC2_CFG_ERR_STS_MASK 0x0040 /* ISRC2_CFG_ERR_STS */
5396 #define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT 6 /* ISRC2_CFG_ERR_STS */
5397 #define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH 1 /* ISRC2_CFG_ERR_STS */
5398
5399 /*
5400 * R3363 (0xD23) - Interrupt Raw Status 5
5401 */
5402 #define ARIZONA_BOOT_DONE_STS 0x0100 /* BOOT_DONE_STS */
5403 #define ARIZONA_BOOT_DONE_STS_MASK 0x0100 /* BOOT_DONE_STS */
5404 #define ARIZONA_BOOT_DONE_STS_SHIFT 8 /* BOOT_DONE_STS */
5405 #define ARIZONA_BOOT_DONE_STS_WIDTH 1 /* BOOT_DONE_STS */
5406 #define ARIZONA_DCS_DAC_DONE_STS 0x0080 /* DCS_DAC_DONE_STS */
5407 #define ARIZONA_DCS_DAC_DONE_STS_MASK 0x0080 /* DCS_DAC_DONE_STS */
5408 #define ARIZONA_DCS_DAC_DONE_STS_SHIFT 7 /* DCS_DAC_DONE_STS */
5409 #define ARIZONA_DCS_DAC_DONE_STS_WIDTH 1 /* DCS_DAC_DONE_STS */
5410 #define ARIZONA_DCS_HP_DONE_STS 0x0040 /* DCS_HP_DONE_STS */
5411 #define ARIZONA_DCS_HP_DONE_STS_MASK 0x0040 /* DCS_HP_DONE_STS */
5412 #define ARIZONA_DCS_HP_DONE_STS_SHIFT 6 /* DCS_HP_DONE_STS */
5413 #define ARIZONA_DCS_HP_DONE_STS_WIDTH 1 /* DCS_HP_DONE_STS */
5414 #define ARIZONA_FLL2_CLOCK_OK_STS 0x0002 /* FLL2_CLOCK_OK_STS */
5415 #define ARIZONA_FLL2_CLOCK_OK_STS_MASK 0x0002 /* FLL2_CLOCK_OK_STS */
5416 #define ARIZONA_FLL2_CLOCK_OK_STS_SHIFT 1 /* FLL2_CLOCK_OK_STS */
5417 #define ARIZONA_FLL2_CLOCK_OK_STS_WIDTH 1 /* FLL2_CLOCK_OK_STS */
5418 #define ARIZONA_FLL1_CLOCK_OK_STS 0x0001 /* FLL1_CLOCK_OK_STS */
5419 #define ARIZONA_FLL1_CLOCK_OK_STS_MASK 0x0001 /* FLL1_CLOCK_OK_STS */
5420 #define ARIZONA_FLL1_CLOCK_OK_STS_SHIFT 0 /* FLL1_CLOCK_OK_STS */
5421 #define ARIZONA_FLL1_CLOCK_OK_STS_WIDTH 1 /* FLL1_CLOCK_OK_STS */
5422
5423 /*
5424 * R3364 (0xD24) - Interrupt Raw Status 6
5425 */
5426 #define ARIZONA_PWM_OVERCLOCKED_STS 0x2000 /* PWM_OVERCLOCKED_STS */
5427 #define ARIZONA_PWM_OVERCLOCKED_STS_MASK 0x2000 /* PWM_OVERCLOCKED_STS */
5428 #define ARIZONA_PWM_OVERCLOCKED_STS_SHIFT 13 /* PWM_OVERCLOCKED_STS */
5429 #define ARIZONA_PWM_OVERCLOCKED_STS_WIDTH 1 /* PWM_OVERCLOCKED_STS */
5430 #define ARIZONA_FX_CORE_OVERCLOCKED_STS 0x1000 /* FX_CORE_OVERCLOCKED_STS */
5431 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_MASK 0x1000 /* FX_CORE_OVERCLOCKED_STS */
5432 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_SHIFT 12 /* FX_CORE_OVERCLOCKED_STS */
5433 #define ARIZONA_FX_CORE_OVERCLOCKED_STS_WIDTH 1 /* FX_CORE_OVERCLOCKED_STS */
5434 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
5435 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* DAC_SYS_OVERCLOCKED_STS */
5436 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_SHIFT 10 /* DAC_SYS_OVERCLOCKED_STS */
5437 #define ARIZONA_DAC_SYS_OVERCLOCKED_STS_WIDTH 1 /* DAC_SYS_OVERCLOCKED_STS */
5438 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
5439 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* DAC_WARP_OVERCLOCKED_STS */
5440 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_SHIFT 9 /* DAC_WARP_OVERCLOCKED_STS */
5441 #define ARIZONA_DAC_WARP_OVERCLOCKED_STS_WIDTH 1 /* DAC_WARP_OVERCLOCKED_STS */
5442 #define ARIZONA_ADC_OVERCLOCKED_STS 0x0100 /* ADC_OVERCLOCKED_STS */
5443 #define ARIZONA_ADC_OVERCLOCKED_STS_MASK 0x0100 /* ADC_OVERCLOCKED_STS */
5444 #define ARIZONA_ADC_OVERCLOCKED_STS_SHIFT 8 /* ADC_OVERCLOCKED_STS */
5445 #define ARIZONA_ADC_OVERCLOCKED_STS_WIDTH 1 /* ADC_OVERCLOCKED_STS */
5446 #define ARIZONA_MIXER_OVERCLOCKED_STS 0x0080 /* MIXER_OVERCLOCKED_STS */
5447 #define ARIZONA_MIXER_OVERCLOCKED_STS_MASK 0x0080 /* MIXER_OVERCLOCKED_STS */
5448 #define ARIZONA_MIXER_OVERCLOCKED_STS_SHIFT 7 /* MIXER_OVERCLOCKED_STS */
5449 #define ARIZONA_MIXER_OVERCLOCKED_STS_WIDTH 1 /* MIXER_OVERCLOCKED_STS */
5450 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
5451 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_MASK 0x0040 /* AIF3_ASYNC_OVERCLOCKED_STS */
5452 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_SHIFT 6 /* AIF3_ASYNC_OVERCLOCKED_STS */
5453 #define ARIZONA_AIF3_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF3_ASYNC_OVERCLOCKED_STS */
5454 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
5455 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_MASK 0x0020 /* AIF2_ASYNC_OVERCLOCKED_STS */
5456 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_SHIFT 5 /* AIF2_ASYNC_OVERCLOCKED_STS */
5457 #define ARIZONA_AIF2_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF2_ASYNC_OVERCLOCKED_STS */
5458 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
5459 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_MASK 0x0010 /* AIF1_ASYNC_OVERCLOCKED_STS */
5460 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_SHIFT 4 /* AIF1_ASYNC_OVERCLOCKED_STS */
5461 #define ARIZONA_AIF1_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF1_ASYNC_OVERCLOCKED_STS */
5462 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
5463 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_MASK 0x0008 /* AIF3_SYNC_OVERCLOCKED_STS */
5464 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_SHIFT 3 /* AIF3_SYNC_OVERCLOCKED_STS */
5465 #define ARIZONA_AIF3_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF3_SYNC_OVERCLOCKED_STS */
5466 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
5467 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_MASK 0x0004 /* AIF2_SYNC_OVERCLOCKED_STS */
5468 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_SHIFT 2 /* AIF2_SYNC_OVERCLOCKED_STS */
5469 #define ARIZONA_AIF2_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF2_SYNC_OVERCLOCKED_STS */
5470 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
5471 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_MASK 0x0002 /* AIF1_SYNC_OVERCLOCKED_STS */
5472 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_SHIFT 1 /* AIF1_SYNC_OVERCLOCKED_STS */
5473 #define ARIZONA_AIF1_SYNC_OVERCLOCKED_STS_WIDTH 1 /* AIF1_SYNC_OVERCLOCKED_STS */
5474 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
5475 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_MASK 0x0001 /* PAD_CTRL_OVERCLOCKED_STS */
5476 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_SHIFT 0 /* PAD_CTRL_OVERCLOCKED_STS */
5477 #define ARIZONA_PAD_CTRL_OVERCLOCKED_STS_WIDTH 1 /* PAD_CTRL_OVERCLOCKED_STS */
5478
5479 /*
5480 * R3365 (0xD25) - Interrupt Raw Status 7
5481 */
5482 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5483 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_MASK 0x8000 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5484 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_SHIFT 15 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5485 #define ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SUBSYS_OVERCLOCKED_STS */
5486 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5487 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_MASK 0x4000 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5488 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_SHIFT 14 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5489 #define ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_ASYNC_OVERCLOCKED_STS */
5490 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5491 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_MASK 0x2000 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5492 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_SHIFT 13 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5493 #define ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS_WIDTH 1 /* SLIMBUS_SYNC_OVERCLOCKED_STS */
5494 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5495 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_MASK 0x1000 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5496 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_SHIFT 12 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5497 #define ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_SYS_OVERCLOCKED_STS */
5498 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5499 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_MASK 0x0800 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5500 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_SHIFT 11 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5501 #define ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_ASYNC_WARP_OVERCLOCKED_STS */
5502 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5503 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_MASK 0x0400 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5504 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_SHIFT 10 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5505 #define ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_SYS_OVERCLOCKED_STS */
5506 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5507 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_MASK 0x0200 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5508 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_SHIFT 9 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5509 #define ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS_WIDTH 1 /* ASRC_SYNC_WARP_OVERCLOCKED_STS */
5510 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
5511 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
5512 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */
5513 #define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */
5514 #define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */
5515 #define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */
5516 #define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */
5517 #define ARIZONA_ISRC2_OVERCLOCKED_STS_WIDTH 1 /* ISRC2_OVERCLOCKED_STS */
5518 #define ARIZONA_ISRC1_OVERCLOCKED_STS 0x0001 /* ISRC1_OVERCLOCKED_STS */
5519 #define ARIZONA_ISRC1_OVERCLOCKED_STS_MASK 0x0001 /* ISRC1_OVERCLOCKED_STS */
5520 #define ARIZONA_ISRC1_OVERCLOCKED_STS_SHIFT 0 /* ISRC1_OVERCLOCKED_STS */
5521 #define ARIZONA_ISRC1_OVERCLOCKED_STS_WIDTH 1 /* ISRC1_OVERCLOCKED_STS */
5522
5523 /*
5524 * R3366 (0xD26) - Interrupt Raw Status 8
5525 */
5526 #define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */
5527 #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */
5528 #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT 10 /* AIF3_UNDERCLOCKED_STS */
5529 #define ARIZONA_AIF3_UNDERCLOCKED_STS_WIDTH 1 /* AIF3_UNDERCLOCKED_STS */
5530 #define ARIZONA_AIF2_UNDERCLOCKED_STS 0x0200 /* AIF2_UNDERCLOCKED_STS */
5531 #define ARIZONA_AIF2_UNDERCLOCKED_STS_MASK 0x0200 /* AIF2_UNDERCLOCKED_STS */
5532 #define ARIZONA_AIF2_UNDERCLOCKED_STS_SHIFT 9 /* AIF2_UNDERCLOCKED_STS */
5533 #define ARIZONA_AIF2_UNDERCLOCKED_STS_WIDTH 1 /* AIF2_UNDERCLOCKED_STS */
5534 #define ARIZONA_AIF1_UNDERCLOCKED_STS 0x0100 /* AIF1_UNDERCLOCKED_STS */
5535 #define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK 0x0100 /* AIF1_UNDERCLOCKED_STS */
5536 #define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT 8 /* AIF1_UNDERCLOCKED_STS */
5537 #define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH 1 /* AIF1_UNDERCLOCKED_STS */
5538 #define ARIZONA_ISRC2_UNDERCLOCKED_STS 0x0040 /* ISRC2_UNDERCLOCKED_STS */
5539 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK 0x0040 /* ISRC2_UNDERCLOCKED_STS */
5540 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT 6 /* ISRC2_UNDERCLOCKED_STS */
5541 #define ARIZONA_ISRC2_UNDERCLOCKED_STS_WIDTH 1 /* ISRC2_UNDERCLOCKED_STS */
5542 #define ARIZONA_ISRC1_UNDERCLOCKED_STS 0x0020 /* ISRC1_UNDERCLOCKED_STS */
5543 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_MASK 0x0020 /* ISRC1_UNDERCLOCKED_STS */
5544 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_SHIFT 5 /* ISRC1_UNDERCLOCKED_STS */
5545 #define ARIZONA_ISRC1_UNDERCLOCKED_STS_WIDTH 1 /* ISRC1_UNDERCLOCKED_STS */
5546 #define ARIZONA_FX_UNDERCLOCKED_STS 0x0010 /* FX_UNDERCLOCKED_STS */
5547 #define ARIZONA_FX_UNDERCLOCKED_STS_MASK 0x0010 /* FX_UNDERCLOCKED_STS */
5548 #define ARIZONA_FX_UNDERCLOCKED_STS_SHIFT 4 /* FX_UNDERCLOCKED_STS */
5549 #define ARIZONA_FX_UNDERCLOCKED_STS_WIDTH 1 /* FX_UNDERCLOCKED_STS */
5550 #define ARIZONA_ASRC_UNDERCLOCKED_STS 0x0008 /* ASRC_UNDERCLOCKED_STS */
5551 #define ARIZONA_ASRC_UNDERCLOCKED_STS_MASK 0x0008 /* ASRC_UNDERCLOCKED_STS */
5552 #define ARIZONA_ASRC_UNDERCLOCKED_STS_SHIFT 3 /* ASRC_UNDERCLOCKED_STS */
5553 #define ARIZONA_ASRC_UNDERCLOCKED_STS_WIDTH 1 /* ASRC_UNDERCLOCKED_STS */
5554 #define ARIZONA_DAC_UNDERCLOCKED_STS 0x0004 /* DAC_UNDERCLOCKED_STS */
5555 #define ARIZONA_DAC_UNDERCLOCKED_STS_MASK 0x0004 /* DAC_UNDERCLOCKED_STS */
5556 #define ARIZONA_DAC_UNDERCLOCKED_STS_SHIFT 2 /* DAC_UNDERCLOCKED_STS */
5557 #define ARIZONA_DAC_UNDERCLOCKED_STS_WIDTH 1 /* DAC_UNDERCLOCKED_STS */
5558 #define ARIZONA_ADC_UNDERCLOCKED_STS 0x0002 /* ADC_UNDERCLOCKED_STS */
5559 #define ARIZONA_ADC_UNDERCLOCKED_STS_MASK 0x0002 /* ADC_UNDERCLOCKED_STS */
5560 #define ARIZONA_ADC_UNDERCLOCKED_STS_SHIFT 1 /* ADC_UNDERCLOCKED_STS */
5561 #define ARIZONA_ADC_UNDERCLOCKED_STS_WIDTH 1 /* ADC_UNDERCLOCKED_STS */
5562 #define ARIZONA_MIXER_UNDERCLOCKED_STS 0x0001 /* MIXER_UNDERCLOCKED_STS */
5563 #define ARIZONA_MIXER_UNDERCLOCKED_STS_MASK 0x0001 /* MIXER_UNDERCLOCKED_STS */
5564 #define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */
5565 #define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH 1 /* MIXER_UNDERCLOCKED_STS */
5566
5567 /*
5568 * R3392 (0xD40) - IRQ Pin Status
5569 */
5570 #define ARIZONA_IRQ2_STS 0x0002 /* IRQ2_STS */
5571 #define ARIZONA_IRQ2_STS_MASK 0x0002 /* IRQ2_STS */
5572 #define ARIZONA_IRQ2_STS_SHIFT 1 /* IRQ2_STS */
5573 #define ARIZONA_IRQ2_STS_WIDTH 1 /* IRQ2_STS */
5574 #define ARIZONA_IRQ1_STS 0x0001 /* IRQ1_STS */
5575 #define ARIZONA_IRQ1_STS_MASK 0x0001 /* IRQ1_STS */
5576 #define ARIZONA_IRQ1_STS_SHIFT 0 /* IRQ1_STS */
5577 #define ARIZONA_IRQ1_STS_WIDTH 1 /* IRQ1_STS */
5578
5579 /*
5580 * R3393 (0xD41) - ADSP2 IRQ0
5581 */
5582 #define ARIZONA_DSP_IRQ2 0x0002 /* DSP_IRQ2 */
5583 #define ARIZONA_DSP_IRQ2_MASK 0x0002 /* DSP_IRQ2 */
5584 #define ARIZONA_DSP_IRQ2_SHIFT 1 /* DSP_IRQ2 */
5585 #define ARIZONA_DSP_IRQ2_WIDTH 1 /* DSP_IRQ2 */
5586 #define ARIZONA_DSP_IRQ1 0x0001 /* DSP_IRQ1 */
5587 #define ARIZONA_DSP_IRQ1_MASK 0x0001 /* DSP_IRQ1 */
5588 #define ARIZONA_DSP_IRQ1_SHIFT 0 /* DSP_IRQ1 */
5589 #define ARIZONA_DSP_IRQ1_WIDTH 1 /* DSP_IRQ1 */
5590
5591 /*
5592 * R3408 (0xD50) - AOD wkup and trig
5593 */
5594 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS 0x0080 /* MICD_CLAMP_FALL_TRIG_STS */
5595 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_MASK 0x0080 /* MICD_CLAMP_FALL_TRIG_STS */
5596 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_SHIFT 7 /* MICD_CLAMP_FALL_TRIG_STS */
5597 #define ARIZONA_MICD_CLAMP_FALL_TRIG_STS_WIDTH 1 /* MICD_CLAMP_FALL_TRIG_STS */
5598 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS 0x0040 /* MICD_CLAMP_RISE_TRIG_STS */
5599 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_MASK 0x0040 /* MICD_CLAMP_RISE_TRIG_STS */
5600 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_SHIFT 6 /* MICD_CLAMP_RISE_TRIG_STS */
5601 #define ARIZONA_MICD_CLAMP_RISE_TRIG_STS_WIDTH 1 /* MICD_CLAMP_RISE_TRIG_STS */
5602 #define ARIZONA_GP5_FALL_TRIG_STS 0x0020 /* GP5_FALL_TRIG_STS */
5603 #define ARIZONA_GP5_FALL_TRIG_STS_MASK 0x0020 /* GP5_FALL_TRIG_STS */
5604 #define ARIZONA_GP5_FALL_TRIG_STS_SHIFT 5 /* GP5_FALL_TRIG_STS */
5605 #define ARIZONA_GP5_FALL_TRIG_STS_WIDTH 1 /* GP5_FALL_TRIG_STS */
5606 #define ARIZONA_GP5_RISE_TRIG_STS 0x0010 /* GP5_RISE_TRIG_STS */
5607 #define ARIZONA_GP5_RISE_TRIG_STS_MASK 0x0010 /* GP5_RISE_TRIG_STS */
5608 #define ARIZONA_GP5_RISE_TRIG_STS_SHIFT 4 /* GP5_RISE_TRIG_STS */
5609 #define ARIZONA_GP5_RISE_TRIG_STS_WIDTH 1 /* GP5_RISE_TRIG_STS */
5610 #define ARIZONA_JD1_FALL_TRIG_STS 0x0008 /* JD1_FALL_TRIG_STS */
5611 #define ARIZONA_JD1_FALL_TRIG_STS_MASK 0x0008 /* JD1_FALL_TRIG_STS */
5612 #define ARIZONA_JD1_FALL_TRIG_STS_SHIFT 3 /* JD1_FALL_TRIG_STS */
5613 #define ARIZONA_JD1_FALL_TRIG_STS_WIDTH 1 /* JD1_FALL_TRIG_STS */
5614 #define ARIZONA_JD1_RISE_TRIG_STS 0x0004 /* JD1_RISE_TRIG_STS */
5615 #define ARIZONA_JD1_RISE_TRIG_STS_MASK 0x0004 /* JD1_RISE_TRIG_STS */
5616 #define ARIZONA_JD1_RISE_TRIG_STS_SHIFT 2 /* JD1_RISE_TRIG_STS */
5617 #define ARIZONA_JD1_RISE_TRIG_STS_WIDTH 1 /* JD1_RISE_TRIG_STS */
5618 #define ARIZONA_JD2_FALL_TRIG_STS 0x0002 /* JD2_FALL_TRIG_STS */
5619 #define ARIZONA_JD2_FALL_TRIG_STS_MASK 0x0002 /* JD2_FALL_TRIG_STS */
5620 #define ARIZONA_JD2_FALL_TRIG_STS_SHIFT 1 /* JD2_FALL_TRIG_STS */
5621 #define ARIZONA_JD2_FALL_TRIG_STS_WIDTH 1 /* JD2_FALL_TRIG_STS */
5622 #define ARIZONA_JD2_RISE_TRIG_STS 0x0001 /* JD2_RISE_TRIG_STS */
5623 #define ARIZONA_JD2_RISE_TRIG_STS_MASK 0x0001 /* JD2_RISE_TRIG_STS */
5624 #define ARIZONA_JD2_RISE_TRIG_STS_SHIFT 0 /* JD2_RISE_TRIG_STS */
5625 #define ARIZONA_JD2_RISE_TRIG_STS_WIDTH 1 /* JD2_RISE_TRIG_STS */
5626
5627 /*
5628 * R3409 (0xD51) - AOD IRQ1
5629 */
5630 #define ARIZONA_MICD_CLAMP_FALL_EINT1 0x0080 /* MICD_CLAMP_FALL_EINT1 */
5631 #define ARIZONA_MICD_CLAMP_FALL_EINT1_MASK 0x0080 /* MICD_CLAMP_FALL_EINT1 */
5632 #define ARIZONA_MICD_CLAMP_FALL_EINT1_SHIFT 7 /* MICD_CLAMP_FALL_EINT1 */
5633 #define ARIZONA_MICD_CLAMP_RISE_EINT1 0x0040 /* MICD_CLAMP_RISE_EINT1 */
5634 #define ARIZONA_MICD_CLAMP_RISE_EINT1_MASK 0x0040 /* MICD_CLAMP_RISE_EINT1 */
5635 #define ARIZONA_MICD_CLAMP_RISE_EINT1_SHIFT 6 /* MICD_CLAMP_RISE_EINT1 */
5636 #define ARIZONA_GP5_FALL_EINT1 0x0020 /* GP5_FALL_EINT1 */
5637 #define ARIZONA_GP5_FALL_EINT1_MASK 0x0020 /* GP5_FALL_EINT1 */
5638 #define ARIZONA_GP5_FALL_EINT1_SHIFT 5 /* GP5_FALL_EINT1 */
5639 #define ARIZONA_GP5_FALL_EINT1_WIDTH 1 /* GP5_FALL_EINT1 */
5640 #define ARIZONA_GP5_RISE_EINT1 0x0010 /* GP5_RISE_EINT1 */
5641 #define ARIZONA_GP5_RISE_EINT1_MASK 0x0010 /* GP5_RISE_EINT1 */
5642 #define ARIZONA_GP5_RISE_EINT1_SHIFT 4 /* GP5_RISE_EINT1 */
5643 #define ARIZONA_GP5_RISE_EINT1_WIDTH 1 /* GP5_RISE_EINT1 */
5644 #define ARIZONA_JD1_FALL_EINT1 0x0008 /* JD1_FALL_EINT1 */
5645 #define ARIZONA_JD1_FALL_EINT1_MASK 0x0008 /* JD1_FALL_EINT1 */
5646 #define ARIZONA_JD1_FALL_EINT1_SHIFT 3 /* JD1_FALL_EINT1 */
5647 #define ARIZONA_JD1_FALL_EINT1_WIDTH 1 /* JD1_FALL_EINT1 */
5648 #define ARIZONA_JD1_RISE_EINT1 0x0004 /* JD1_RISE_EINT1 */
5649 #define ARIZONA_JD1_RISE_EINT1_MASK 0x0004 /* JD1_RISE_EINT1 */
5650 #define ARIZONA_JD1_RISE_EINT1_SHIFT 2 /* JD1_RISE_EINT1 */
5651 #define ARIZONA_JD1_RISE_EINT1_WIDTH 1 /* JD1_RISE_EINT1 */
5652 #define ARIZONA_JD2_FALL_EINT1 0x0002 /* JD2_FALL_EINT1 */
5653 #define ARIZONA_JD2_FALL_EINT1_MASK 0x0002 /* JD2_FALL_EINT1 */
5654 #define ARIZONA_JD2_FALL_EINT1_SHIFT 1 /* JD2_FALL_EINT1 */
5655 #define ARIZONA_JD2_FALL_EINT1_WIDTH 1 /* JD2_FALL_EINT1 */
5656 #define ARIZONA_JD2_RISE_EINT1 0x0001 /* JD2_RISE_EINT1 */
5657 #define ARIZONA_JD2_RISE_EINT1_MASK 0x0001 /* JD2_RISE_EINT1 */
5658 #define ARIZONA_JD2_RISE_EINT1_SHIFT 0 /* JD2_RISE_EINT1 */
5659 #define ARIZONA_JD2_RISE_EINT1_WIDTH 1 /* JD2_RISE_EINT1 */
5660
5661 /*
5662 * R3410 (0xD52) - AOD IRQ2
5663 */
5664 #define ARIZONA_MICD_CLAMP_FALL_EINT2 0x0080 /* MICD_CLAMP_FALL_EINT2 */
5665 #define ARIZONA_MICD_CLAMP_FALL_EINT2_MASK 0x0080 /* MICD_CLAMP_FALL_EINT2 */
5666 #define ARIZONA_MICD_CLAMP_FALL_EINT2_SHIFT 7 /* MICD_CLAMP_FALL_EINT2 */
5667 #define ARIZONA_MICD_CLAMP_RISE_EINT2 0x0040 /* MICD_CLAMP_RISE_EINT2 */
5668 #define ARIZONA_MICD_CLAMP_RISE_EINT2_MASK 0x0040 /* MICD_CLAMP_RISE_EINT2 */
5669 #define ARIZONA_MICD_CLAMP_RISE_EINT2_SHIFT 6 /* MICD_CLAMP_RISE_EINT2 */
5670 #define ARIZONA_GP5_FALL_EINT2 0x0020 /* GP5_FALL_EINT2 */
5671 #define ARIZONA_GP5_FALL_EINT2_MASK 0x0020 /* GP5_FALL_EINT2 */
5672 #define ARIZONA_GP5_FALL_EINT2_SHIFT 5 /* GP5_FALL_EINT2 */
5673 #define ARIZONA_GP5_FALL_EINT2_WIDTH 1 /* GP5_FALL_EINT2 */
5674 #define ARIZONA_GP5_RISE_EINT2 0x0010 /* GP5_RISE_EINT2 */
5675 #define ARIZONA_GP5_RISE_EINT2_MASK 0x0010 /* GP5_RISE_EINT2 */
5676 #define ARIZONA_GP5_RISE_EINT2_SHIFT 4 /* GP5_RISE_EINT2 */
5677 #define ARIZONA_GP5_RISE_EINT2_WIDTH 1 /* GP5_RISE_EINT2 */
5678 #define ARIZONA_JD1_FALL_EINT2 0x0008 /* JD1_FALL_EINT2 */
5679 #define ARIZONA_JD1_FALL_EINT2_MASK 0x0008 /* JD1_FALL_EINT2 */
5680 #define ARIZONA_JD1_FALL_EINT2_SHIFT 3 /* JD1_FALL_EINT2 */
5681 #define ARIZONA_JD1_FALL_EINT2_WIDTH 1 /* JD1_FALL_EINT2 */
5682 #define ARIZONA_JD1_RISE_EINT2 0x0004 /* JD1_RISE_EINT2 */
5683 #define ARIZONA_JD1_RISE_EINT2_MASK 0x0004 /* JD1_RISE_EINT2 */
5684 #define ARIZONA_JD1_RISE_EINT2_SHIFT 2 /* JD1_RISE_EINT2 */
5685 #define ARIZONA_JD1_RISE_EINT2_WIDTH 1 /* JD1_RISE_EINT2 */
5686 #define ARIZONA_JD2_FALL_EINT2 0x0002 /* JD2_FALL_EINT2 */
5687 #define ARIZONA_JD2_FALL_EINT2_MASK 0x0002 /* JD2_FALL_EINT2 */
5688 #define ARIZONA_JD2_FALL_EINT2_SHIFT 1 /* JD2_FALL_EINT2 */
5689 #define ARIZONA_JD2_FALL_EINT2_WIDTH 1 /* JD2_FALL_EINT2 */
5690 #define ARIZONA_JD2_RISE_EINT2 0x0001 /* JD2_RISE_EINT2 */
5691 #define ARIZONA_JD2_RISE_EINT2_MASK 0x0001 /* JD2_RISE_EINT2 */
5692 #define ARIZONA_JD2_RISE_EINT2_SHIFT 0 /* JD2_RISE_EINT2 */
5693 #define ARIZONA_JD2_RISE_EINT2_WIDTH 1 /* JD2_RISE_EINT2 */
5694
5695 /*
5696 * R3411 (0xD53) - AOD IRQ Mask IRQ1
5697 */
5698 #define ARIZONA_IM_GP5_FALL_EINT1 0x0020 /* IM_GP5_FALL_EINT1 */
5699 #define ARIZONA_IM_GP5_FALL_EINT1_MASK 0x0020 /* IM_GP5_FALL_EINT1 */
5700 #define ARIZONA_IM_GP5_FALL_EINT1_SHIFT 5 /* IM_GP5_FALL_EINT1 */
5701 #define ARIZONA_IM_GP5_FALL_EINT1_WIDTH 1 /* IM_GP5_FALL_EINT1 */
5702 #define ARIZONA_IM_GP5_RISE_EINT1 0x0010 /* IM_GP5_RISE_EINT1 */
5703 #define ARIZONA_IM_GP5_RISE_EINT1_MASK 0x0010 /* IM_GP5_RISE_EINT1 */
5704 #define ARIZONA_IM_GP5_RISE_EINT1_SHIFT 4 /* IM_GP5_RISE_EINT1 */
5705 #define ARIZONA_IM_GP5_RISE_EINT1_WIDTH 1 /* IM_GP5_RISE_EINT1 */
5706 #define ARIZONA_IM_JD1_FALL_EINT1 0x0008 /* IM_JD1_FALL_EINT1 */
5707 #define ARIZONA_IM_JD1_FALL_EINT1_MASK 0x0008 /* IM_JD1_FALL_EINT1 */
5708 #define ARIZONA_IM_JD1_FALL_EINT1_SHIFT 3 /* IM_JD1_FALL_EINT1 */
5709 #define ARIZONA_IM_JD1_FALL_EINT1_WIDTH 1 /* IM_JD1_FALL_EINT1 */
5710 #define ARIZONA_IM_JD1_RISE_EINT1 0x0004 /* IM_JD1_RISE_EINT1 */
5711 #define ARIZONA_IM_JD1_RISE_EINT1_MASK 0x0004 /* IM_JD1_RISE_EINT1 */
5712 #define ARIZONA_IM_JD1_RISE_EINT1_SHIFT 2 /* IM_JD1_RISE_EINT1 */
5713 #define ARIZONA_IM_JD1_RISE_EINT1_WIDTH 1 /* IM_JD1_RISE_EINT1 */
5714 #define ARIZONA_IM_JD2_FALL_EINT1 0x0002 /* IM_JD2_FALL_EINT1 */
5715 #define ARIZONA_IM_JD2_FALL_EINT1_MASK 0x0002 /* IM_JD2_FALL_EINT1 */
5716 #define ARIZONA_IM_JD2_FALL_EINT1_SHIFT 1 /* IM_JD2_FALL_EINT1 */
5717 #define ARIZONA_IM_JD2_FALL_EINT1_WIDTH 1 /* IM_JD2_FALL_EINT1 */
5718 #define ARIZONA_IM_JD2_RISE_EINT1 0x0001 /* IM_JD2_RISE_EINT1 */
5719 #define ARIZONA_IM_JD2_RISE_EINT1_MASK 0x0001 /* IM_JD2_RISE_EINT1 */
5720 #define ARIZONA_IM_JD2_RISE_EINT1_SHIFT 0 /* IM_JD2_RISE_EINT1 */
5721 #define ARIZONA_IM_JD2_RISE_EINT1_WIDTH 1 /* IM_JD2_RISE_EINT1 */
5722
5723 /*
5724 * R3412 (0xD54) - AOD IRQ Mask IRQ2
5725 */
5726 #define ARIZONA_IM_GP5_FALL_EINT2 0x0020 /* IM_GP5_FALL_EINT2 */
5727 #define ARIZONA_IM_GP5_FALL_EINT2_MASK 0x0020 /* IM_GP5_FALL_EINT2 */
5728 #define ARIZONA_IM_GP5_FALL_EINT2_SHIFT 5 /* IM_GP5_FALL_EINT2 */
5729 #define ARIZONA_IM_GP5_FALL_EINT2_WIDTH 1 /* IM_GP5_FALL_EINT2 */
5730 #define ARIZONA_IM_GP5_RISE_EINT2 0x0010 /* IM_GP5_RISE_EINT2 */
5731 #define ARIZONA_IM_GP5_RISE_EINT2_MASK 0x0010 /* IM_GP5_RISE_EINT2 */
5732 #define ARIZONA_IM_GP5_RISE_EINT2_SHIFT 4 /* IM_GP5_RISE_EINT2 */
5733 #define ARIZONA_IM_GP5_RISE_EINT2_WIDTH 1 /* IM_GP5_RISE_EINT2 */
5734 #define ARIZONA_IM_JD1_FALL_EINT2 0x0008 /* IM_JD1_FALL_EINT2 */
5735 #define ARIZONA_IM_JD1_FALL_EINT2_MASK 0x0008 /* IM_JD1_FALL_EINT2 */
5736 #define ARIZONA_IM_JD1_FALL_EINT2_SHIFT 3 /* IM_JD1_FALL_EINT2 */
5737 #define ARIZONA_IM_JD1_FALL_EINT2_WIDTH 1 /* IM_JD1_FALL_EINT2 */
5738 #define ARIZONA_IM_JD1_RISE_EINT2 0x0004 /* IM_JD1_RISE_EINT2 */
5739 #define ARIZONA_IM_JD1_RISE_EINT2_MASK 0x0004 /* IM_JD1_RISE_EINT2 */
5740 #define ARIZONA_IM_JD1_RISE_EINT2_SHIFT 2 /* IM_JD1_RISE_EINT2 */
5741 #define ARIZONA_IM_JD1_RISE_EINT2_WIDTH 1 /* IM_JD1_RISE_EINT2 */
5742 #define ARIZONA_IM_JD2_FALL_EINT2 0x0002 /* IM_JD2_FALL_EINT2 */
5743 #define ARIZONA_IM_JD2_FALL_EINT2_MASK 0x0002 /* IM_JD2_FALL_EINT2 */
5744 #define ARIZONA_IM_JD2_FALL_EINT2_SHIFT 1 /* IM_JD2_FALL_EINT2 */
5745 #define ARIZONA_IM_JD2_FALL_EINT2_WIDTH 1 /* IM_JD2_FALL_EINT2 */
5746 #define ARIZONA_IM_JD2_RISE_EINT2 0x0001 /* IM_JD2_RISE_EINT2 */
5747 #define ARIZONA_IM_JD2_RISE_EINT2_MASK 0x0001 /* IM_JD2_RISE_EINT2 */
5748 #define ARIZONA_IM_JD2_RISE_EINT2_SHIFT 0 /* IM_JD2_RISE_EINT2 */
5749 #define ARIZONA_IM_JD2_RISE_EINT2_WIDTH 1 /* IM_JD2_RISE_EINT2 */
5750
5751 /*
5752 * R3413 (0xD55) - AOD IRQ Raw Status
5753 */
5754 #define ARIZONA_MICD_CLAMP_STS 0x0008 /* MICD_CLAMP_STS */
5755 #define ARIZONA_MICD_CLAMP_STS_MASK 0x0008 /* MICD_CLAMP_STS */
5756 #define ARIZONA_MICD_CLAMP_STS_SHIFT 3 /* MICD_CLAMP_STS */
5757 #define ARIZONA_MICD_CLAMP_STS_WIDTH 1 /* MICD_CLAMP_STS */
5758 #define ARIZONA_GP5_STS 0x0004 /* GP5_STS */
5759 #define ARIZONA_GP5_STS_MASK 0x0004 /* GP5_STS */
5760 #define ARIZONA_GP5_STS_SHIFT 2 /* GP5_STS */
5761 #define ARIZONA_GP5_STS_WIDTH 1 /* GP5_STS */
5762 #define ARIZONA_JD2_STS 0x0002 /* JD2_STS */
5763 #define ARIZONA_JD2_STS_MASK 0x0002 /* JD2_STS */
5764 #define ARIZONA_JD2_STS_SHIFT 1 /* JD2_STS */
5765 #define ARIZONA_JD2_STS_WIDTH 1 /* JD2_STS */
5766 #define ARIZONA_JD1_STS 0x0001 /* JD1_STS */
5767 #define ARIZONA_JD1_STS_MASK 0x0001 /* JD1_STS */
5768 #define ARIZONA_JD1_STS_SHIFT 0 /* JD1_STS */
5769 #define ARIZONA_JD1_STS_WIDTH 1 /* JD1_STS */
5770
5771 /*
5772 * R3414 (0xD56) - Jack detect debounce
5773 */
5774 #define ARIZONA_MICD_CLAMP_DB 0x0008 /* MICD_CLAMP_DB */
5775 #define ARIZONA_MICD_CLAMP_DB_MASK 0x0008 /* MICD_CLAMP_DB */
5776 #define ARIZONA_MICD_CLAMP_DB_SHIFT 3 /* MICD_CLAMP_DB */
5777 #define ARIZONA_MICD_CLAMP_DB_WIDTH 1 /* MICD_CLAMP_DB */
5778 #define ARIZONA_JD2_DB 0x0002 /* JD2_DB */
5779 #define ARIZONA_JD2_DB_MASK 0x0002 /* JD2_DB */
5780 #define ARIZONA_JD2_DB_SHIFT 1 /* JD2_DB */
5781 #define ARIZONA_JD2_DB_WIDTH 1 /* JD2_DB */
5782 #define ARIZONA_JD1_DB 0x0001 /* JD1_DB */
5783 #define ARIZONA_JD1_DB_MASK 0x0001 /* JD1_DB */
5784 #define ARIZONA_JD1_DB_SHIFT 0 /* JD1_DB */
5785 #define ARIZONA_JD1_DB_WIDTH 1 /* JD1_DB */
5786
5787 /*
5788 * R3584 (0xE00) - FX_Ctrl1
5789 */
5790 #define ARIZONA_FX_RATE_MASK 0x7800 /* FX_RATE - [14:11] */
5791 #define ARIZONA_FX_RATE_SHIFT 11 /* FX_RATE - [14:11] */
5792 #define ARIZONA_FX_RATE_WIDTH 4 /* FX_RATE - [14:11] */
5793
5794 /*
5795 * R3585 (0xE01) - FX_Ctrl2
5796 */
5797 #define ARIZONA_FX_STS_MASK 0xFFF0 /* FX_STS - [15:4] */
5798 #define ARIZONA_FX_STS_SHIFT 4 /* FX_STS - [15:4] */
5799 #define ARIZONA_FX_STS_WIDTH 12 /* FX_STS - [15:4] */
5800
5801 /*
5802 * R3600 (0xE10) - EQ1_1
5803 */
5804 #define ARIZONA_EQ1_B1_GAIN_MASK 0xF800 /* EQ1_B1_GAIN - [15:11] */
5805 #define ARIZONA_EQ1_B1_GAIN_SHIFT 11 /* EQ1_B1_GAIN - [15:11] */
5806 #define ARIZONA_EQ1_B1_GAIN_WIDTH 5 /* EQ1_B1_GAIN - [15:11] */
5807 #define ARIZONA_EQ1_B2_GAIN_MASK 0x07C0 /* EQ1_B2_GAIN - [10:6] */
5808 #define ARIZONA_EQ1_B2_GAIN_SHIFT 6 /* EQ1_B2_GAIN - [10:6] */
5809 #define ARIZONA_EQ1_B2_GAIN_WIDTH 5 /* EQ1_B2_GAIN - [10:6] */
5810 #define ARIZONA_EQ1_B3_GAIN_MASK 0x003E /* EQ1_B3_GAIN - [5:1] */
5811 #define ARIZONA_EQ1_B3_GAIN_SHIFT 1 /* EQ1_B3_GAIN - [5:1] */
5812 #define ARIZONA_EQ1_B3_GAIN_WIDTH 5 /* EQ1_B3_GAIN - [5:1] */
5813 #define ARIZONA_EQ1_ENA 0x0001 /* EQ1_ENA */
5814 #define ARIZONA_EQ1_ENA_MASK 0x0001 /* EQ1_ENA */
5815 #define ARIZONA_EQ1_ENA_SHIFT 0 /* EQ1_ENA */
5816 #define ARIZONA_EQ1_ENA_WIDTH 1 /* EQ1_ENA */
5817
5818 /*
5819 * R3601 (0xE11) - EQ1_2
5820 */
5821 #define ARIZONA_EQ1_B4_GAIN_MASK 0xF800 /* EQ1_B4_GAIN - [15:11] */
5822 #define ARIZONA_EQ1_B4_GAIN_SHIFT 11 /* EQ1_B4_GAIN - [15:11] */
5823 #define ARIZONA_EQ1_B4_GAIN_WIDTH 5 /* EQ1_B4_GAIN - [15:11] */
5824 #define ARIZONA_EQ1_B5_GAIN_MASK 0x07C0 /* EQ1_B5_GAIN - [10:6] */
5825 #define ARIZONA_EQ1_B5_GAIN_SHIFT 6 /* EQ1_B5_GAIN - [10:6] */
5826 #define ARIZONA_EQ1_B5_GAIN_WIDTH 5 /* EQ1_B5_GAIN - [10:6] */
5827 #define ARIZONA_EQ1_B1_MODE 0x0001 /* EQ1_B1_MODE */
5828 #define ARIZONA_EQ1_B1_MODE_MASK 0x0001 /* EQ1_B1_MODE */
5829 #define ARIZONA_EQ1_B1_MODE_SHIFT 0 /* EQ1_B1_MODE */
5830 #define ARIZONA_EQ1_B1_MODE_WIDTH 1 /* EQ1_B1_MODE */
5831
5832 /*
5833 * R3602 (0xE12) - EQ1_3
5834 */
5835 #define ARIZONA_EQ1_B1_A_MASK 0xFFFF /* EQ1_B1_A - [15:0] */
5836 #define ARIZONA_EQ1_B1_A_SHIFT 0 /* EQ1_B1_A - [15:0] */
5837 #define ARIZONA_EQ1_B1_A_WIDTH 16 /* EQ1_B1_A - [15:0] */
5838
5839 /*
5840 * R3603 (0xE13) - EQ1_4
5841 */
5842 #define ARIZONA_EQ1_B1_B_MASK 0xFFFF /* EQ1_B1_B - [15:0] */
5843 #define ARIZONA_EQ1_B1_B_SHIFT 0 /* EQ1_B1_B - [15:0] */
5844 #define ARIZONA_EQ1_B1_B_WIDTH 16 /* EQ1_B1_B - [15:0] */
5845
5846 /*
5847 * R3604 (0xE14) - EQ1_5
5848 */
5849 #define ARIZONA_EQ1_B1_PG_MASK 0xFFFF /* EQ1_B1_PG - [15:0] */
5850 #define ARIZONA_EQ1_B1_PG_SHIFT 0 /* EQ1_B1_PG - [15:0] */
5851 #define ARIZONA_EQ1_B1_PG_WIDTH 16 /* EQ1_B1_PG - [15:0] */
5852
5853 /*
5854 * R3605 (0xE15) - EQ1_6
5855 */
5856 #define ARIZONA_EQ1_B2_A_MASK 0xFFFF /* EQ1_B2_A - [15:0] */
5857 #define ARIZONA_EQ1_B2_A_SHIFT 0 /* EQ1_B2_A - [15:0] */
5858 #define ARIZONA_EQ1_B2_A_WIDTH 16 /* EQ1_B2_A - [15:0] */
5859
5860 /*
5861 * R3606 (0xE16) - EQ1_7
5862 */
5863 #define ARIZONA_EQ1_B2_B_MASK 0xFFFF /* EQ1_B2_B - [15:0] */
5864 #define ARIZONA_EQ1_B2_B_SHIFT 0 /* EQ1_B2_B - [15:0] */
5865 #define ARIZONA_EQ1_B2_B_WIDTH 16 /* EQ1_B2_B - [15:0] */
5866
5867 /*
5868 * R3607 (0xE17) - EQ1_8
5869 */
5870 #define ARIZONA_EQ1_B2_C_MASK 0xFFFF /* EQ1_B2_C - [15:0] */
5871 #define ARIZONA_EQ1_B2_C_SHIFT 0 /* EQ1_B2_C - [15:0] */
5872 #define ARIZONA_EQ1_B2_C_WIDTH 16 /* EQ1_B2_C - [15:0] */
5873
5874 /*
5875 * R3608 (0xE18) - EQ1_9
5876 */
5877 #define ARIZONA_EQ1_B2_PG_MASK 0xFFFF /* EQ1_B2_PG - [15:0] */
5878 #define ARIZONA_EQ1_B2_PG_SHIFT 0 /* EQ1_B2_PG - [15:0] */
5879 #define ARIZONA_EQ1_B2_PG_WIDTH 16 /* EQ1_B2_PG - [15:0] */
5880
5881 /*
5882 * R3609 (0xE19) - EQ1_10
5883 */
5884 #define ARIZONA_EQ1_B3_A_MASK 0xFFFF /* EQ1_B3_A - [15:0] */
5885 #define ARIZONA_EQ1_B3_A_SHIFT 0 /* EQ1_B3_A - [15:0] */
5886 #define ARIZONA_EQ1_B3_A_WIDTH 16 /* EQ1_B3_A - [15:0] */
5887
5888 /*
5889 * R3610 (0xE1A) - EQ1_11
5890 */
5891 #define ARIZONA_EQ1_B3_B_MASK 0xFFFF /* EQ1_B3_B - [15:0] */
5892 #define ARIZONA_EQ1_B3_B_SHIFT 0 /* EQ1_B3_B - [15:0] */
5893 #define ARIZONA_EQ1_B3_B_WIDTH 16 /* EQ1_B3_B - [15:0] */
5894
5895 /*
5896 * R3611 (0xE1B) - EQ1_12
5897 */
5898 #define ARIZONA_EQ1_B3_C_MASK 0xFFFF /* EQ1_B3_C - [15:0] */
5899 #define ARIZONA_EQ1_B3_C_SHIFT 0 /* EQ1_B3_C - [15:0] */
5900 #define ARIZONA_EQ1_B3_C_WIDTH 16 /* EQ1_B3_C - [15:0] */
5901
5902 /*
5903 * R3612 (0xE1C) - EQ1_13
5904 */
5905 #define ARIZONA_EQ1_B3_PG_MASK 0xFFFF /* EQ1_B3_PG - [15:0] */
5906 #define ARIZONA_EQ1_B3_PG_SHIFT 0 /* EQ1_B3_PG - [15:0] */
5907 #define ARIZONA_EQ1_B3_PG_WIDTH 16 /* EQ1_B3_PG - [15:0] */
5908
5909 /*
5910 * R3613 (0xE1D) - EQ1_14
5911 */
5912 #define ARIZONA_EQ1_B4_A_MASK 0xFFFF /* EQ1_B4_A - [15:0] */
5913 #define ARIZONA_EQ1_B4_A_SHIFT 0 /* EQ1_B4_A - [15:0] */
5914 #define ARIZONA_EQ1_B4_A_WIDTH 16 /* EQ1_B4_A - [15:0] */
5915
5916 /*
5917 * R3614 (0xE1E) - EQ1_15
5918 */
5919 #define ARIZONA_EQ1_B4_B_MASK 0xFFFF /* EQ1_B4_B - [15:0] */
5920 #define ARIZONA_EQ1_B4_B_SHIFT 0 /* EQ1_B4_B - [15:0] */
5921 #define ARIZONA_EQ1_B4_B_WIDTH 16 /* EQ1_B4_B - [15:0] */
5922
5923 /*
5924 * R3615 (0xE1F) - EQ1_16
5925 */
5926 #define ARIZONA_EQ1_B4_C_MASK 0xFFFF /* EQ1_B4_C - [15:0] */
5927 #define ARIZONA_EQ1_B4_C_SHIFT 0 /* EQ1_B4_C - [15:0] */
5928 #define ARIZONA_EQ1_B4_C_WIDTH 16 /* EQ1_B4_C - [15:0] */
5929
5930 /*
5931 * R3616 (0xE20) - EQ1_17
5932 */
5933 #define ARIZONA_EQ1_B4_PG_MASK 0xFFFF /* EQ1_B4_PG - [15:0] */
5934 #define ARIZONA_EQ1_B4_PG_SHIFT 0 /* EQ1_B4_PG - [15:0] */
5935 #define ARIZONA_EQ1_B4_PG_WIDTH 16 /* EQ1_B4_PG - [15:0] */
5936
5937 /*
5938 * R3617 (0xE21) - EQ1_18
5939 */
5940 #define ARIZONA_EQ1_B5_A_MASK 0xFFFF /* EQ1_B5_A - [15:0] */
5941 #define ARIZONA_EQ1_B5_A_SHIFT 0 /* EQ1_B5_A - [15:0] */
5942 #define ARIZONA_EQ1_B5_A_WIDTH 16 /* EQ1_B5_A - [15:0] */
5943
5944 /*
5945 * R3618 (0xE22) - EQ1_19
5946 */
5947 #define ARIZONA_EQ1_B5_B_MASK 0xFFFF /* EQ1_B5_B - [15:0] */
5948 #define ARIZONA_EQ1_B5_B_SHIFT 0 /* EQ1_B5_B - [15:0] */
5949 #define ARIZONA_EQ1_B5_B_WIDTH 16 /* EQ1_B5_B - [15:0] */
5950
5951 /*
5952 * R3619 (0xE23) - EQ1_20
5953 */
5954 #define ARIZONA_EQ1_B5_PG_MASK 0xFFFF /* EQ1_B5_PG - [15:0] */
5955 #define ARIZONA_EQ1_B5_PG_SHIFT 0 /* EQ1_B5_PG - [15:0] */
5956 #define ARIZONA_EQ1_B5_PG_WIDTH 16 /* EQ1_B5_PG - [15:0] */
5957
5958 /*
5959 * R3620 (0xE24) - EQ1_21
5960 */
5961 #define ARIZONA_EQ1_B1_C_MASK 0xFFFF /* EQ1_B1_C - [15:0] */
5962 #define ARIZONA_EQ1_B1_C_SHIFT 0 /* EQ1_B1_C - [15:0] */
5963 #define ARIZONA_EQ1_B1_C_WIDTH 16 /* EQ1_B1_C - [15:0] */
5964
5965 /*
5966 * R3622 (0xE26) - EQ2_1
5967 */
5968 #define ARIZONA_EQ2_B1_GAIN_MASK 0xF800 /* EQ2_B1_GAIN - [15:11] */
5969 #define ARIZONA_EQ2_B1_GAIN_SHIFT 11 /* EQ2_B1_GAIN - [15:11] */
5970 #define ARIZONA_EQ2_B1_GAIN_WIDTH 5 /* EQ2_B1_GAIN - [15:11] */
5971 #define ARIZONA_EQ2_B2_GAIN_MASK 0x07C0 /* EQ2_B2_GAIN - [10:6] */
5972 #define ARIZONA_EQ2_B2_GAIN_SHIFT 6 /* EQ2_B2_GAIN - [10:6] */
5973 #define ARIZONA_EQ2_B2_GAIN_WIDTH 5 /* EQ2_B2_GAIN - [10:6] */
5974 #define ARIZONA_EQ2_B3_GAIN_MASK 0x003E /* EQ2_B3_GAIN - [5:1] */
5975 #define ARIZONA_EQ2_B3_GAIN_SHIFT 1 /* EQ2_B3_GAIN - [5:1] */
5976 #define ARIZONA_EQ2_B3_GAIN_WIDTH 5 /* EQ2_B3_GAIN - [5:1] */
5977 #define ARIZONA_EQ2_ENA 0x0001 /* EQ2_ENA */
5978 #define ARIZONA_EQ2_ENA_MASK 0x0001 /* EQ2_ENA */
5979 #define ARIZONA_EQ2_ENA_SHIFT 0 /* EQ2_ENA */
5980 #define ARIZONA_EQ2_ENA_WIDTH 1 /* EQ2_ENA */
5981
5982 /*
5983 * R3623 (0xE27) - EQ2_2
5984 */
5985 #define ARIZONA_EQ2_B4_GAIN_MASK 0xF800 /* EQ2_B4_GAIN - [15:11] */
5986 #define ARIZONA_EQ2_B4_GAIN_SHIFT 11 /* EQ2_B4_GAIN - [15:11] */
5987 #define ARIZONA_EQ2_B4_GAIN_WIDTH 5 /* EQ2_B4_GAIN - [15:11] */
5988 #define ARIZONA_EQ2_B5_GAIN_MASK 0x07C0 /* EQ2_B5_GAIN - [10:6] */
5989 #define ARIZONA_EQ2_B5_GAIN_SHIFT 6 /* EQ2_B5_GAIN - [10:6] */
5990 #define ARIZONA_EQ2_B5_GAIN_WIDTH 5 /* EQ2_B5_GAIN - [10:6] */
5991 #define ARIZONA_EQ2_B1_MODE 0x0001 /* EQ2_B1_MODE */
5992 #define ARIZONA_EQ2_B1_MODE_MASK 0x0001 /* EQ2_B1_MODE */
5993 #define ARIZONA_EQ2_B1_MODE_SHIFT 0 /* EQ2_B1_MODE */
5994 #define ARIZONA_EQ2_B1_MODE_WIDTH 1 /* EQ2_B1_MODE */
5995
5996 /*
5997 * R3624 (0xE28) - EQ2_3
5998 */
5999 #define ARIZONA_EQ2_B1_A_MASK 0xFFFF /* EQ2_B1_A - [15:0] */
6000 #define ARIZONA_EQ2_B1_A_SHIFT 0 /* EQ2_B1_A - [15:0] */
6001 #define ARIZONA_EQ2_B1_A_WIDTH 16 /* EQ2_B1_A - [15:0] */
6002
6003 /*
6004 * R3625 (0xE29) - EQ2_4
6005 */
6006 #define ARIZONA_EQ2_B1_B_MASK 0xFFFF /* EQ2_B1_B - [15:0] */
6007 #define ARIZONA_EQ2_B1_B_SHIFT 0 /* EQ2_B1_B - [15:0] */
6008 #define ARIZONA_EQ2_B1_B_WIDTH 16 /* EQ2_B1_B - [15:0] */
6009
6010 /*
6011 * R3626 (0xE2A) - EQ2_5
6012 */
6013 #define ARIZONA_EQ2_B1_PG_MASK 0xFFFF /* EQ2_B1_PG - [15:0] */
6014 #define ARIZONA_EQ2_B1_PG_SHIFT 0 /* EQ2_B1_PG - [15:0] */
6015 #define ARIZONA_EQ2_B1_PG_WIDTH 16 /* EQ2_B1_PG - [15:0] */
6016
6017 /*
6018 * R3627 (0xE2B) - EQ2_6
6019 */
6020 #define ARIZONA_EQ2_B2_A_MASK 0xFFFF /* EQ2_B2_A - [15:0] */
6021 #define ARIZONA_EQ2_B2_A_SHIFT 0 /* EQ2_B2_A - [15:0] */
6022 #define ARIZONA_EQ2_B2_A_WIDTH 16 /* EQ2_B2_A - [15:0] */
6023
6024 /*
6025 * R3628 (0xE2C) - EQ2_7
6026 */
6027 #define ARIZONA_EQ2_B2_B_MASK 0xFFFF /* EQ2_B2_B - [15:0] */
6028 #define ARIZONA_EQ2_B2_B_SHIFT 0 /* EQ2_B2_B - [15:0] */
6029 #define ARIZONA_EQ2_B2_B_WIDTH 16 /* EQ2_B2_B - [15:0] */
6030
6031 /*
6032 * R3629 (0xE2D) - EQ2_8
6033 */
6034 #define ARIZONA_EQ2_B2_C_MASK 0xFFFF /* EQ2_B2_C - [15:0] */
6035 #define ARIZONA_EQ2_B2_C_SHIFT 0 /* EQ2_B2_C - [15:0] */
6036 #define ARIZONA_EQ2_B2_C_WIDTH 16 /* EQ2_B2_C - [15:0] */
6037
6038 /*
6039 * R3630 (0xE2E) - EQ2_9
6040 */
6041 #define ARIZONA_EQ2_B2_PG_MASK 0xFFFF /* EQ2_B2_PG - [15:0] */
6042 #define ARIZONA_EQ2_B2_PG_SHIFT 0 /* EQ2_B2_PG - [15:0] */
6043 #define ARIZONA_EQ2_B2_PG_WIDTH 16 /* EQ2_B2_PG - [15:0] */
6044
6045 /*
6046 * R3631 (0xE2F) - EQ2_10
6047 */
6048 #define ARIZONA_EQ2_B3_A_MASK 0xFFFF /* EQ2_B3_A - [15:0] */
6049 #define ARIZONA_EQ2_B3_A_SHIFT 0 /* EQ2_B3_A - [15:0] */
6050 #define ARIZONA_EQ2_B3_A_WIDTH 16 /* EQ2_B3_A - [15:0] */
6051
6052 /*
6053 * R3632 (0xE30) - EQ2_11
6054 */
6055 #define ARIZONA_EQ2_B3_B_MASK 0xFFFF /* EQ2_B3_B - [15:0] */
6056 #define ARIZONA_EQ2_B3_B_SHIFT 0 /* EQ2_B3_B - [15:0] */
6057 #define ARIZONA_EQ2_B3_B_WIDTH 16 /* EQ2_B3_B - [15:0] */
6058
6059 /*
6060 * R3633 (0xE31) - EQ2_12
6061 */
6062 #define ARIZONA_EQ2_B3_C_MASK 0xFFFF /* EQ2_B3_C - [15:0] */
6063 #define ARIZONA_EQ2_B3_C_SHIFT 0 /* EQ2_B3_C - [15:0] */
6064 #define ARIZONA_EQ2_B3_C_WIDTH 16 /* EQ2_B3_C - [15:0] */
6065
6066 /*
6067 * R3634 (0xE32) - EQ2_13
6068 */
6069 #define ARIZONA_EQ2_B3_PG_MASK 0xFFFF /* EQ2_B3_PG - [15:0] */
6070 #define ARIZONA_EQ2_B3_PG_SHIFT 0 /* EQ2_B3_PG - [15:0] */
6071 #define ARIZONA_EQ2_B3_PG_WIDTH 16 /* EQ2_B3_PG - [15:0] */
6072
6073 /*
6074 * R3635 (0xE33) - EQ2_14
6075 */
6076 #define ARIZONA_EQ2_B4_A_MASK 0xFFFF /* EQ2_B4_A - [15:0] */
6077 #define ARIZONA_EQ2_B4_A_SHIFT 0 /* EQ2_B4_A - [15:0] */
6078 #define ARIZONA_EQ2_B4_A_WIDTH 16 /* EQ2_B4_A - [15:0] */
6079
6080 /*
6081 * R3636 (0xE34) - EQ2_15
6082 */
6083 #define ARIZONA_EQ2_B4_B_MASK 0xFFFF /* EQ2_B4_B - [15:0] */
6084 #define ARIZONA_EQ2_B4_B_SHIFT 0 /* EQ2_B4_B - [15:0] */
6085 #define ARIZONA_EQ2_B4_B_WIDTH 16 /* EQ2_B4_B - [15:0] */
6086
6087 /*
6088 * R3637 (0xE35) - EQ2_16
6089 */
6090 #define ARIZONA_EQ2_B4_C_MASK 0xFFFF /* EQ2_B4_C - [15:0] */
6091 #define ARIZONA_EQ2_B4_C_SHIFT 0 /* EQ2_B4_C - [15:0] */
6092 #define ARIZONA_EQ2_B4_C_WIDTH 16 /* EQ2_B4_C - [15:0] */
6093
6094 /*
6095 * R3638 (0xE36) - EQ2_17
6096 */
6097 #define ARIZONA_EQ2_B4_PG_MASK 0xFFFF /* EQ2_B4_PG - [15:0] */
6098 #define ARIZONA_EQ2_B4_PG_SHIFT 0 /* EQ2_B4_PG - [15:0] */
6099 #define ARIZONA_EQ2_B4_PG_WIDTH 16 /* EQ2_B4_PG - [15:0] */
6100
6101 /*
6102 * R3639 (0xE37) - EQ2_18
6103 */
6104 #define ARIZONA_EQ2_B5_A_MASK 0xFFFF /* EQ2_B5_A - [15:0] */
6105 #define ARIZONA_EQ2_B5_A_SHIFT 0 /* EQ2_B5_A - [15:0] */
6106 #define ARIZONA_EQ2_B5_A_WIDTH 16 /* EQ2_B5_A - [15:0] */
6107
6108 /*
6109 * R3640 (0xE38) - EQ2_19
6110 */
6111 #define ARIZONA_EQ2_B5_B_MASK 0xFFFF /* EQ2_B5_B - [15:0] */
6112 #define ARIZONA_EQ2_B5_B_SHIFT 0 /* EQ2_B5_B - [15:0] */
6113 #define ARIZONA_EQ2_B5_B_WIDTH 16 /* EQ2_B5_B - [15:0] */
6114
6115 /*
6116 * R3641 (0xE39) - EQ2_20
6117 */
6118 #define ARIZONA_EQ2_B5_PG_MASK 0xFFFF /* EQ2_B5_PG - [15:0] */
6119 #define ARIZONA_EQ2_B5_PG_SHIFT 0 /* EQ2_B5_PG - [15:0] */
6120 #define ARIZONA_EQ2_B5_PG_WIDTH 16 /* EQ2_B5_PG - [15:0] */
6121
6122 /*
6123 * R3642 (0xE3A) - EQ2_21
6124 */
6125 #define ARIZONA_EQ2_B1_C_MASK 0xFFFF /* EQ2_B1_C - [15:0] */
6126 #define ARIZONA_EQ2_B1_C_SHIFT 0 /* EQ2_B1_C - [15:0] */
6127 #define ARIZONA_EQ2_B1_C_WIDTH 16 /* EQ2_B1_C - [15:0] */
6128
6129 /*
6130 * R3644 (0xE3C) - EQ3_1
6131 */
6132 #define ARIZONA_EQ3_B1_GAIN_MASK 0xF800 /* EQ3_B1_GAIN - [15:11] */
6133 #define ARIZONA_EQ3_B1_GAIN_SHIFT 11 /* EQ3_B1_GAIN - [15:11] */
6134 #define ARIZONA_EQ3_B1_GAIN_WIDTH 5 /* EQ3_B1_GAIN - [15:11] */
6135 #define ARIZONA_EQ3_B2_GAIN_MASK 0x07C0 /* EQ3_B2_GAIN - [10:6] */
6136 #define ARIZONA_EQ3_B2_GAIN_SHIFT 6 /* EQ3_B2_GAIN - [10:6] */
6137 #define ARIZONA_EQ3_B2_GAIN_WIDTH 5 /* EQ3_B2_GAIN - [10:6] */
6138 #define ARIZONA_EQ3_B3_GAIN_MASK 0x003E /* EQ3_B3_GAIN - [5:1] */
6139 #define ARIZONA_EQ3_B3_GAIN_SHIFT 1 /* EQ3_B3_GAIN - [5:1] */
6140 #define ARIZONA_EQ3_B3_GAIN_WIDTH 5 /* EQ3_B3_GAIN - [5:1] */
6141 #define ARIZONA_EQ3_ENA 0x0001 /* EQ3_ENA */
6142 #define ARIZONA_EQ3_ENA_MASK 0x0001 /* EQ3_ENA */
6143 #define ARIZONA_EQ3_ENA_SHIFT 0 /* EQ3_ENA */
6144 #define ARIZONA_EQ3_ENA_WIDTH 1 /* EQ3_ENA */
6145
6146 /*
6147 * R3645 (0xE3D) - EQ3_2
6148 */
6149 #define ARIZONA_EQ3_B4_GAIN_MASK 0xF800 /* EQ3_B4_GAIN - [15:11] */
6150 #define ARIZONA_EQ3_B4_GAIN_SHIFT 11 /* EQ3_B4_GAIN - [15:11] */
6151 #define ARIZONA_EQ3_B4_GAIN_WIDTH 5 /* EQ3_B4_GAIN - [15:11] */
6152 #define ARIZONA_EQ3_B5_GAIN_MASK 0x07C0 /* EQ3_B5_GAIN - [10:6] */
6153 #define ARIZONA_EQ3_B5_GAIN_SHIFT 6 /* EQ3_B5_GAIN - [10:6] */
6154 #define ARIZONA_EQ3_B5_GAIN_WIDTH 5 /* EQ3_B5_GAIN - [10:6] */
6155 #define ARIZONA_EQ3_B1_MODE 0x0001 /* EQ3_B1_MODE */
6156 #define ARIZONA_EQ3_B1_MODE_MASK 0x0001 /* EQ3_B1_MODE */
6157 #define ARIZONA_EQ3_B1_MODE_SHIFT 0 /* EQ3_B1_MODE */
6158 #define ARIZONA_EQ3_B1_MODE_WIDTH 1 /* EQ3_B1_MODE */
6159
6160 /*
6161 * R3646 (0xE3E) - EQ3_3
6162 */
6163 #define ARIZONA_EQ3_B1_A_MASK 0xFFFF /* EQ3_B1_A - [15:0] */
6164 #define ARIZONA_EQ3_B1_A_SHIFT 0 /* EQ3_B1_A - [15:0] */
6165 #define ARIZONA_EQ3_B1_A_WIDTH 16 /* EQ3_B1_A - [15:0] */
6166
6167 /*
6168 * R3647 (0xE3F) - EQ3_4
6169 */
6170 #define ARIZONA_EQ3_B1_B_MASK 0xFFFF /* EQ3_B1_B - [15:0] */
6171 #define ARIZONA_EQ3_B1_B_SHIFT 0 /* EQ3_B1_B - [15:0] */
6172 #define ARIZONA_EQ3_B1_B_WIDTH 16 /* EQ3_B1_B - [15:0] */
6173
6174 /*
6175 * R3648 (0xE40) - EQ3_5
6176 */
6177 #define ARIZONA_EQ3_B1_PG_MASK 0xFFFF /* EQ3_B1_PG - [15:0] */
6178 #define ARIZONA_EQ3_B1_PG_SHIFT 0 /* EQ3_B1_PG - [15:0] */
6179 #define ARIZONA_EQ3_B1_PG_WIDTH 16 /* EQ3_B1_PG - [15:0] */
6180
6181 /*
6182 * R3649 (0xE41) - EQ3_6
6183 */
6184 #define ARIZONA_EQ3_B2_A_MASK 0xFFFF /* EQ3_B2_A - [15:0] */
6185 #define ARIZONA_EQ3_B2_A_SHIFT 0 /* EQ3_B2_A - [15:0] */
6186 #define ARIZONA_EQ3_B2_A_WIDTH 16 /* EQ3_B2_A - [15:0] */
6187
6188 /*
6189 * R3650 (0xE42) - EQ3_7
6190 */
6191 #define ARIZONA_EQ3_B2_B_MASK 0xFFFF /* EQ3_B2_B - [15:0] */
6192 #define ARIZONA_EQ3_B2_B_SHIFT 0 /* EQ3_B2_B - [15:0] */
6193 #define ARIZONA_EQ3_B2_B_WIDTH 16 /* EQ3_B2_B - [15:0] */
6194
6195 /*
6196 * R3651 (0xE43) - EQ3_8
6197 */
6198 #define ARIZONA_EQ3_B2_C_MASK 0xFFFF /* EQ3_B2_C - [15:0] */
6199 #define ARIZONA_EQ3_B2_C_SHIFT 0 /* EQ3_B2_C - [15:0] */
6200 #define ARIZONA_EQ3_B2_C_WIDTH 16 /* EQ3_B2_C - [15:0] */
6201
6202 /*
6203 * R3652 (0xE44) - EQ3_9
6204 */
6205 #define ARIZONA_EQ3_B2_PG_MASK 0xFFFF /* EQ3_B2_PG - [15:0] */
6206 #define ARIZONA_EQ3_B2_PG_SHIFT 0 /* EQ3_B2_PG - [15:0] */
6207 #define ARIZONA_EQ3_B2_PG_WIDTH 16 /* EQ3_B2_PG - [15:0] */
6208
6209 /*
6210 * R3653 (0xE45) - EQ3_10
6211 */
6212 #define ARIZONA_EQ3_B3_A_MASK 0xFFFF /* EQ3_B3_A - [15:0] */
6213 #define ARIZONA_EQ3_B3_A_SHIFT 0 /* EQ3_B3_A - [15:0] */
6214 #define ARIZONA_EQ3_B3_A_WIDTH 16 /* EQ3_B3_A - [15:0] */
6215
6216 /*
6217 * R3654 (0xE46) - EQ3_11
6218 */
6219 #define ARIZONA_EQ3_B3_B_MASK 0xFFFF /* EQ3_B3_B - [15:0] */
6220 #define ARIZONA_EQ3_B3_B_SHIFT 0 /* EQ3_B3_B - [15:0] */
6221 #define ARIZONA_EQ3_B3_B_WIDTH 16 /* EQ3_B3_B - [15:0] */
6222
6223 /*
6224 * R3655 (0xE47) - EQ3_12
6225 */
6226 #define ARIZONA_EQ3_B3_C_MASK 0xFFFF /* EQ3_B3_C - [15:0] */
6227 #define ARIZONA_EQ3_B3_C_SHIFT 0 /* EQ3_B3_C - [15:0] */
6228 #define ARIZONA_EQ3_B3_C_WIDTH 16 /* EQ3_B3_C - [15:0] */
6229
6230 /*
6231 * R3656 (0xE48) - EQ3_13
6232 */
6233 #define ARIZONA_EQ3_B3_PG_MASK 0xFFFF /* EQ3_B3_PG - [15:0] */
6234 #define ARIZONA_EQ3_B3_PG_SHIFT 0 /* EQ3_B3_PG - [15:0] */
6235 #define ARIZONA_EQ3_B3_PG_WIDTH 16 /* EQ3_B3_PG - [15:0] */
6236
6237 /*
6238 * R3657 (0xE49) - EQ3_14
6239 */
6240 #define ARIZONA_EQ3_B4_A_MASK 0xFFFF /* EQ3_B4_A - [15:0] */
6241 #define ARIZONA_EQ3_B4_A_SHIFT 0 /* EQ3_B4_A - [15:0] */
6242 #define ARIZONA_EQ3_B4_A_WIDTH 16 /* EQ3_B4_A - [15:0] */
6243
6244 /*
6245 * R3658 (0xE4A) - EQ3_15
6246 */
6247 #define ARIZONA_EQ3_B4_B_MASK 0xFFFF /* EQ3_B4_B - [15:0] */
6248 #define ARIZONA_EQ3_B4_B_SHIFT 0 /* EQ3_B4_B - [15:0] */
6249 #define ARIZONA_EQ3_B4_B_WIDTH 16 /* EQ3_B4_B - [15:0] */
6250
6251 /*
6252 * R3659 (0xE4B) - EQ3_16
6253 */
6254 #define ARIZONA_EQ3_B4_C_MASK 0xFFFF /* EQ3_B4_C - [15:0] */
6255 #define ARIZONA_EQ3_B4_C_SHIFT 0 /* EQ3_B4_C - [15:0] */
6256 #define ARIZONA_EQ3_B4_C_WIDTH 16 /* EQ3_B4_C - [15:0] */
6257
6258 /*
6259 * R3660 (0xE4C) - EQ3_17
6260 */
6261 #define ARIZONA_EQ3_B4_PG_MASK 0xFFFF /* EQ3_B4_PG - [15:0] */
6262 #define ARIZONA_EQ3_B4_PG_SHIFT 0 /* EQ3_B4_PG - [15:0] */
6263 #define ARIZONA_EQ3_B4_PG_WIDTH 16 /* EQ3_B4_PG - [15:0] */
6264
6265 /*
6266 * R3661 (0xE4D) - EQ3_18
6267 */
6268 #define ARIZONA_EQ3_B5_A_MASK 0xFFFF /* EQ3_B5_A - [15:0] */
6269 #define ARIZONA_EQ3_B5_A_SHIFT 0 /* EQ3_B5_A - [15:0] */
6270 #define ARIZONA_EQ3_B5_A_WIDTH 16 /* EQ3_B5_A - [15:0] */
6271
6272 /*
6273 * R3662 (0xE4E) - EQ3_19
6274 */
6275 #define ARIZONA_EQ3_B5_B_MASK 0xFFFF /* EQ3_B5_B - [15:0] */
6276 #define ARIZONA_EQ3_B5_B_SHIFT 0 /* EQ3_B5_B - [15:0] */
6277 #define ARIZONA_EQ3_B5_B_WIDTH 16 /* EQ3_B5_B - [15:0] */
6278
6279 /*
6280 * R3663 (0xE4F) - EQ3_20
6281 */
6282 #define ARIZONA_EQ3_B5_PG_MASK 0xFFFF /* EQ3_B5_PG - [15:0] */
6283 #define ARIZONA_EQ3_B5_PG_SHIFT 0 /* EQ3_B5_PG - [15:0] */
6284 #define ARIZONA_EQ3_B5_PG_WIDTH 16 /* EQ3_B5_PG - [15:0] */
6285
6286 /*
6287 * R3664 (0xE50) - EQ3_21
6288 */
6289 #define ARIZONA_EQ3_B1_C_MASK 0xFFFF /* EQ3_B1_C - [15:0] */
6290 #define ARIZONA_EQ3_B1_C_SHIFT 0 /* EQ3_B1_C - [15:0] */
6291 #define ARIZONA_EQ3_B1_C_WIDTH 16 /* EQ3_B1_C - [15:0] */
6292
6293 /*
6294 * R3666 (0xE52) - EQ4_1
6295 */
6296 #define ARIZONA_EQ4_B1_GAIN_MASK 0xF800 /* EQ4_B1_GAIN - [15:11] */
6297 #define ARIZONA_EQ4_B1_GAIN_SHIFT 11 /* EQ4_B1_GAIN - [15:11] */
6298 #define ARIZONA_EQ4_B1_GAIN_WIDTH 5 /* EQ4_B1_GAIN - [15:11] */
6299 #define ARIZONA_EQ4_B2_GAIN_MASK 0x07C0 /* EQ4_B2_GAIN - [10:6] */
6300 #define ARIZONA_EQ4_B2_GAIN_SHIFT 6 /* EQ4_B2_GAIN - [10:6] */
6301 #define ARIZONA_EQ4_B2_GAIN_WIDTH 5 /* EQ4_B2_GAIN - [10:6] */
6302 #define ARIZONA_EQ4_B3_GAIN_MASK 0x003E /* EQ4_B3_GAIN - [5:1] */
6303 #define ARIZONA_EQ4_B3_GAIN_SHIFT 1 /* EQ4_B3_GAIN - [5:1] */
6304 #define ARIZONA_EQ4_B3_GAIN_WIDTH 5 /* EQ4_B3_GAIN - [5:1] */
6305 #define ARIZONA_EQ4_ENA 0x0001 /* EQ4_ENA */
6306 #define ARIZONA_EQ4_ENA_MASK 0x0001 /* EQ4_ENA */
6307 #define ARIZONA_EQ4_ENA_SHIFT 0 /* EQ4_ENA */
6308 #define ARIZONA_EQ4_ENA_WIDTH 1 /* EQ4_ENA */
6309
6310 /*
6311 * R3667 (0xE53) - EQ4_2
6312 */
6313 #define ARIZONA_EQ4_B4_GAIN_MASK 0xF800 /* EQ4_B4_GAIN - [15:11] */
6314 #define ARIZONA_EQ4_B4_GAIN_SHIFT 11 /* EQ4_B4_GAIN - [15:11] */
6315 #define ARIZONA_EQ4_B4_GAIN_WIDTH 5 /* EQ4_B4_GAIN - [15:11] */
6316 #define ARIZONA_EQ4_B5_GAIN_MASK 0x07C0 /* EQ4_B5_GAIN - [10:6] */
6317 #define ARIZONA_EQ4_B5_GAIN_SHIFT 6 /* EQ4_B5_GAIN - [10:6] */
6318 #define ARIZONA_EQ4_B5_GAIN_WIDTH 5 /* EQ4_B5_GAIN - [10:6] */
6319 #define ARIZONA_EQ4_B1_MODE 0x0001 /* EQ4_B1_MODE */
6320 #define ARIZONA_EQ4_B1_MODE_MASK 0x0001 /* EQ4_B1_MODE */
6321 #define ARIZONA_EQ4_B1_MODE_SHIFT 0 /* EQ4_B1_MODE */
6322 #define ARIZONA_EQ4_B1_MODE_WIDTH 1 /* EQ4_B1_MODE */
6323
6324 /*
6325 * R3668 (0xE54) - EQ4_3
6326 */
6327 #define ARIZONA_EQ4_B1_A_MASK 0xFFFF /* EQ4_B1_A - [15:0] */
6328 #define ARIZONA_EQ4_B1_A_SHIFT 0 /* EQ4_B1_A - [15:0] */
6329 #define ARIZONA_EQ4_B1_A_WIDTH 16 /* EQ4_B1_A - [15:0] */
6330
6331 /*
6332 * R3669 (0xE55) - EQ4_4
6333 */
6334 #define ARIZONA_EQ4_B1_B_MASK 0xFFFF /* EQ4_B1_B - [15:0] */
6335 #define ARIZONA_EQ4_B1_B_SHIFT 0 /* EQ4_B1_B - [15:0] */
6336 #define ARIZONA_EQ4_B1_B_WIDTH 16 /* EQ4_B1_B - [15:0] */
6337
6338 /*
6339 * R3670 (0xE56) - EQ4_5
6340 */
6341 #define ARIZONA_EQ4_B1_PG_MASK 0xFFFF /* EQ4_B1_PG - [15:0] */
6342 #define ARIZONA_EQ4_B1_PG_SHIFT 0 /* EQ4_B1_PG - [15:0] */
6343 #define ARIZONA_EQ4_B1_PG_WIDTH 16 /* EQ4_B1_PG - [15:0] */
6344
6345 /*
6346 * R3671 (0xE57) - EQ4_6
6347 */
6348 #define ARIZONA_EQ4_B2_A_MASK 0xFFFF /* EQ4_B2_A - [15:0] */
6349 #define ARIZONA_EQ4_B2_A_SHIFT 0 /* EQ4_B2_A - [15:0] */
6350 #define ARIZONA_EQ4_B2_A_WIDTH 16 /* EQ4_B2_A - [15:0] */
6351
6352 /*
6353 * R3672 (0xE58) - EQ4_7
6354 */
6355 #define ARIZONA_EQ4_B2_B_MASK 0xFFFF /* EQ4_B2_B - [15:0] */
6356 #define ARIZONA_EQ4_B2_B_SHIFT 0 /* EQ4_B2_B - [15:0] */
6357 #define ARIZONA_EQ4_B2_B_WIDTH 16 /* EQ4_B2_B - [15:0] */
6358
6359 /*
6360 * R3673 (0xE59) - EQ4_8
6361 */
6362 #define ARIZONA_EQ4_B2_C_MASK 0xFFFF /* EQ4_B2_C - [15:0] */
6363 #define ARIZONA_EQ4_B2_C_SHIFT 0 /* EQ4_B2_C - [15:0] */
6364 #define ARIZONA_EQ4_B2_C_WIDTH 16 /* EQ4_B2_C - [15:0] */
6365
6366 /*
6367 * R3674 (0xE5A) - EQ4_9
6368 */
6369 #define ARIZONA_EQ4_B2_PG_MASK 0xFFFF /* EQ4_B2_PG - [15:0] */
6370 #define ARIZONA_EQ4_B2_PG_SHIFT 0 /* EQ4_B2_PG - [15:0] */
6371 #define ARIZONA_EQ4_B2_PG_WIDTH 16 /* EQ4_B2_PG - [15:0] */
6372
6373 /*
6374 * R3675 (0xE5B) - EQ4_10
6375 */
6376 #define ARIZONA_EQ4_B3_A_MASK 0xFFFF /* EQ4_B3_A - [15:0] */
6377 #define ARIZONA_EQ4_B3_A_SHIFT 0 /* EQ4_B3_A - [15:0] */
6378 #define ARIZONA_EQ4_B3_A_WIDTH 16 /* EQ4_B3_A - [15:0] */
6379
6380 /*
6381 * R3676 (0xE5C) - EQ4_11
6382 */
6383 #define ARIZONA_EQ4_B3_B_MASK 0xFFFF /* EQ4_B3_B - [15:0] */
6384 #define ARIZONA_EQ4_B3_B_SHIFT 0 /* EQ4_B3_B - [15:0] */
6385 #define ARIZONA_EQ4_B3_B_WIDTH 16 /* EQ4_B3_B - [15:0] */
6386
6387 /*
6388 * R3677 (0xE5D) - EQ4_12
6389 */
6390 #define ARIZONA_EQ4_B3_C_MASK 0xFFFF /* EQ4_B3_C - [15:0] */
6391 #define ARIZONA_EQ4_B3_C_SHIFT 0 /* EQ4_B3_C - [15:0] */
6392 #define ARIZONA_EQ4_B3_C_WIDTH 16 /* EQ4_B3_C - [15:0] */
6393
6394 /*
6395 * R3678 (0xE5E) - EQ4_13
6396 */
6397 #define ARIZONA_EQ4_B3_PG_MASK 0xFFFF /* EQ4_B3_PG - [15:0] */
6398 #define ARIZONA_EQ4_B3_PG_SHIFT 0 /* EQ4_B3_PG - [15:0] */
6399 #define ARIZONA_EQ4_B3_PG_WIDTH 16 /* EQ4_B3_PG - [15:0] */
6400
6401 /*
6402 * R3679 (0xE5F) - EQ4_14
6403 */
6404 #define ARIZONA_EQ4_B4_A_MASK 0xFFFF /* EQ4_B4_A - [15:0] */
6405 #define ARIZONA_EQ4_B4_A_SHIFT 0 /* EQ4_B4_A - [15:0] */
6406 #define ARIZONA_EQ4_B4_A_WIDTH 16 /* EQ4_B4_A - [15:0] */
6407
6408 /*
6409 * R3680 (0xE60) - EQ4_15
6410 */
6411 #define ARIZONA_EQ4_B4_B_MASK 0xFFFF /* EQ4_B4_B - [15:0] */
6412 #define ARIZONA_EQ4_B4_B_SHIFT 0 /* EQ4_B4_B - [15:0] */
6413 #define ARIZONA_EQ4_B4_B_WIDTH 16 /* EQ4_B4_B - [15:0] */
6414
6415 /*
6416 * R3681 (0xE61) - EQ4_16
6417 */
6418 #define ARIZONA_EQ4_B4_C_MASK 0xFFFF /* EQ4_B4_C - [15:0] */
6419 #define ARIZONA_EQ4_B4_C_SHIFT 0 /* EQ4_B4_C - [15:0] */
6420 #define ARIZONA_EQ4_B4_C_WIDTH 16 /* EQ4_B4_C - [15:0] */
6421
6422 /*
6423 * R3682 (0xE62) - EQ4_17
6424 */
6425 #define ARIZONA_EQ4_B4_PG_MASK 0xFFFF /* EQ4_B4_PG - [15:0] */
6426 #define ARIZONA_EQ4_B4_PG_SHIFT 0 /* EQ4_B4_PG - [15:0] */
6427 #define ARIZONA_EQ4_B4_PG_WIDTH 16 /* EQ4_B4_PG - [15:0] */
6428
6429 /*
6430 * R3683 (0xE63) - EQ4_18
6431 */
6432 #define ARIZONA_EQ4_B5_A_MASK 0xFFFF /* EQ4_B5_A - [15:0] */
6433 #define ARIZONA_EQ4_B5_A_SHIFT 0 /* EQ4_B5_A - [15:0] */
6434 #define ARIZONA_EQ4_B5_A_WIDTH 16 /* EQ4_B5_A - [15:0] */
6435
6436 /*
6437 * R3684 (0xE64) - EQ4_19
6438 */
6439 #define ARIZONA_EQ4_B5_B_MASK 0xFFFF /* EQ4_B5_B - [15:0] */
6440 #define ARIZONA_EQ4_B5_B_SHIFT 0 /* EQ4_B5_B - [15:0] */
6441 #define ARIZONA_EQ4_B5_B_WIDTH 16 /* EQ4_B5_B - [15:0] */
6442
6443 /*
6444 * R3685 (0xE65) - EQ4_20
6445 */
6446 #define ARIZONA_EQ4_B5_PG_MASK 0xFFFF /* EQ4_B5_PG - [15:0] */
6447 #define ARIZONA_EQ4_B5_PG_SHIFT 0 /* EQ4_B5_PG - [15:0] */
6448 #define ARIZONA_EQ4_B5_PG_WIDTH 16 /* EQ4_B5_PG - [15:0] */
6449
6450 /*
6451 * R3686 (0xE66) - EQ4_21
6452 */
6453 #define ARIZONA_EQ4_B1_C_MASK 0xFFFF /* EQ4_B1_C - [15:0] */
6454 #define ARIZONA_EQ4_B1_C_SHIFT 0 /* EQ4_B1_C - [15:0] */
6455 #define ARIZONA_EQ4_B1_C_WIDTH 16 /* EQ4_B1_C - [15:0] */
6456
6457 /*
6458 * R3712 (0xE80) - DRC1 ctrl1
6459 */
6460 #define ARIZONA_DRC1_SIG_DET_RMS_MASK 0xF800 /* DRC1_SIG_DET_RMS - [15:11] */
6461 #define ARIZONA_DRC1_SIG_DET_RMS_SHIFT 11 /* DRC1_SIG_DET_RMS - [15:11] */
6462 #define ARIZONA_DRC1_SIG_DET_RMS_WIDTH 5 /* DRC1_SIG_DET_RMS - [15:11] */
6463 #define ARIZONA_DRC1_SIG_DET_PK_MASK 0x0600 /* DRC1_SIG_DET_PK - [10:9] */
6464 #define ARIZONA_DRC1_SIG_DET_PK_SHIFT 9 /* DRC1_SIG_DET_PK - [10:9] */
6465 #define ARIZONA_DRC1_SIG_DET_PK_WIDTH 2 /* DRC1_SIG_DET_PK - [10:9] */
6466 #define ARIZONA_DRC1_NG_ENA 0x0100 /* DRC1_NG_ENA */
6467 #define ARIZONA_DRC1_NG_ENA_MASK 0x0100 /* DRC1_NG_ENA */
6468 #define ARIZONA_DRC1_NG_ENA_SHIFT 8 /* DRC1_NG_ENA */
6469 #define ARIZONA_DRC1_NG_ENA_WIDTH 1 /* DRC1_NG_ENA */
6470 #define ARIZONA_DRC1_SIG_DET_MODE 0x0080 /* DRC1_SIG_DET_MODE */
6471 #define ARIZONA_DRC1_SIG_DET_MODE_MASK 0x0080 /* DRC1_SIG_DET_MODE */
6472 #define ARIZONA_DRC1_SIG_DET_MODE_SHIFT 7 /* DRC1_SIG_DET_MODE */
6473 #define ARIZONA_DRC1_SIG_DET_MODE_WIDTH 1 /* DRC1_SIG_DET_MODE */
6474 #define ARIZONA_DRC1_SIG_DET 0x0040 /* DRC1_SIG_DET */
6475 #define ARIZONA_DRC1_SIG_DET_MASK 0x0040 /* DRC1_SIG_DET */
6476 #define ARIZONA_DRC1_SIG_DET_SHIFT 6 /* DRC1_SIG_DET */
6477 #define ARIZONA_DRC1_SIG_DET_WIDTH 1 /* DRC1_SIG_DET */
6478 #define ARIZONA_DRC1_KNEE2_OP_ENA 0x0020 /* DRC1_KNEE2_OP_ENA */
6479 #define ARIZONA_DRC1_KNEE2_OP_ENA_MASK 0x0020 /* DRC1_KNEE2_OP_ENA */
6480 #define ARIZONA_DRC1_KNEE2_OP_ENA_SHIFT 5 /* DRC1_KNEE2_OP_ENA */
6481 #define ARIZONA_DRC1_KNEE2_OP_ENA_WIDTH 1 /* DRC1_KNEE2_OP_ENA */
6482 #define ARIZONA_DRC1_QR 0x0010 /* DRC1_QR */
6483 #define ARIZONA_DRC1_QR_MASK 0x0010 /* DRC1_QR */
6484 #define ARIZONA_DRC1_QR_SHIFT 4 /* DRC1_QR */
6485 #define ARIZONA_DRC1_QR_WIDTH 1 /* DRC1_QR */
6486 #define ARIZONA_DRC1_ANTICLIP 0x0008 /* DRC1_ANTICLIP */
6487 #define ARIZONA_DRC1_ANTICLIP_MASK 0x0008 /* DRC1_ANTICLIP */
6488 #define ARIZONA_DRC1_ANTICLIP_SHIFT 3 /* DRC1_ANTICLIP */
6489 #define ARIZONA_DRC1_ANTICLIP_WIDTH 1 /* DRC1_ANTICLIP */
6490 #define ARIZONA_DRC1L_ENA 0x0002 /* DRC1L_ENA */
6491 #define ARIZONA_DRC1L_ENA_MASK 0x0002 /* DRC1L_ENA */
6492 #define ARIZONA_DRC1L_ENA_SHIFT 1 /* DRC1L_ENA */
6493 #define ARIZONA_DRC1L_ENA_WIDTH 1 /* DRC1L_ENA */
6494 #define ARIZONA_DRC1R_ENA 0x0001 /* DRC1R_ENA */
6495 #define ARIZONA_DRC1R_ENA_MASK 0x0001 /* DRC1R_ENA */
6496 #define ARIZONA_DRC1R_ENA_SHIFT 0 /* DRC1R_ENA */
6497 #define ARIZONA_DRC1R_ENA_WIDTH 1 /* DRC1R_ENA */
6498
6499 /*
6500 * R3713 (0xE81) - DRC1 ctrl2
6501 */
6502 #define ARIZONA_DRC1_ATK_MASK 0x1E00 /* DRC1_ATK - [12:9] */
6503 #define ARIZONA_DRC1_ATK_SHIFT 9 /* DRC1_ATK - [12:9] */
6504 #define ARIZONA_DRC1_ATK_WIDTH 4 /* DRC1_ATK - [12:9] */
6505 #define ARIZONA_DRC1_DCY_MASK 0x01E0 /* DRC1_DCY - [8:5] */
6506 #define ARIZONA_DRC1_DCY_SHIFT 5 /* DRC1_DCY - [8:5] */
6507 #define ARIZONA_DRC1_DCY_WIDTH 4 /* DRC1_DCY - [8:5] */
6508 #define ARIZONA_DRC1_MINGAIN_MASK 0x001C /* DRC1_MINGAIN - [4:2] */
6509 #define ARIZONA_DRC1_MINGAIN_SHIFT 2 /* DRC1_MINGAIN - [4:2] */
6510 #define ARIZONA_DRC1_MINGAIN_WIDTH 3 /* DRC1_MINGAIN - [4:2] */
6511 #define ARIZONA_DRC1_MAXGAIN_MASK 0x0003 /* DRC1_MAXGAIN - [1:0] */
6512 #define ARIZONA_DRC1_MAXGAIN_SHIFT 0 /* DRC1_MAXGAIN - [1:0] */
6513 #define ARIZONA_DRC1_MAXGAIN_WIDTH 2 /* DRC1_MAXGAIN - [1:0] */
6514
6515 /*
6516 * R3714 (0xE82) - DRC1 ctrl3
6517 */
6518 #define ARIZONA_DRC1_NG_MINGAIN_MASK 0xF000 /* DRC1_NG_MINGAIN - [15:12] */
6519 #define ARIZONA_DRC1_NG_MINGAIN_SHIFT 12 /* DRC1_NG_MINGAIN - [15:12] */
6520 #define ARIZONA_DRC1_NG_MINGAIN_WIDTH 4 /* DRC1_NG_MINGAIN - [15:12] */
6521 #define ARIZONA_DRC1_NG_EXP_MASK 0x0C00 /* DRC1_NG_EXP - [11:10] */
6522 #define ARIZONA_DRC1_NG_EXP_SHIFT 10 /* DRC1_NG_EXP - [11:10] */
6523 #define ARIZONA_DRC1_NG_EXP_WIDTH 2 /* DRC1_NG_EXP - [11:10] */
6524 #define ARIZONA_DRC1_QR_THR_MASK 0x0300 /* DRC1_QR_THR - [9:8] */
6525 #define ARIZONA_DRC1_QR_THR_SHIFT 8 /* DRC1_QR_THR - [9:8] */
6526 #define ARIZONA_DRC1_QR_THR_WIDTH 2 /* DRC1_QR_THR - [9:8] */
6527 #define ARIZONA_DRC1_QR_DCY_MASK 0x00C0 /* DRC1_QR_DCY - [7:6] */
6528 #define ARIZONA_DRC1_QR_DCY_SHIFT 6 /* DRC1_QR_DCY - [7:6] */
6529 #define ARIZONA_DRC1_QR_DCY_WIDTH 2 /* DRC1_QR_DCY - [7:6] */
6530 #define ARIZONA_DRC1_HI_COMP_MASK 0x0038 /* DRC1_HI_COMP - [5:3] */
6531 #define ARIZONA_DRC1_HI_COMP_SHIFT 3 /* DRC1_HI_COMP - [5:3] */
6532 #define ARIZONA_DRC1_HI_COMP_WIDTH 3 /* DRC1_HI_COMP - [5:3] */
6533 #define ARIZONA_DRC1_LO_COMP_MASK 0x0007 /* DRC1_LO_COMP - [2:0] */
6534 #define ARIZONA_DRC1_LO_COMP_SHIFT 0 /* DRC1_LO_COMP - [2:0] */
6535 #define ARIZONA_DRC1_LO_COMP_WIDTH 3 /* DRC1_LO_COMP - [2:0] */
6536
6537 /*
6538 * R3715 (0xE83) - DRC1 ctrl4
6539 */
6540 #define ARIZONA_DRC1_KNEE_IP_MASK 0x07E0 /* DRC1_KNEE_IP - [10:5] */
6541 #define ARIZONA_DRC1_KNEE_IP_SHIFT 5 /* DRC1_KNEE_IP - [10:5] */
6542 #define ARIZONA_DRC1_KNEE_IP_WIDTH 6 /* DRC1_KNEE_IP - [10:5] */
6543 #define ARIZONA_DRC1_KNEE_OP_MASK 0x001F /* DRC1_KNEE_OP - [4:0] */
6544 #define ARIZONA_DRC1_KNEE_OP_SHIFT 0 /* DRC1_KNEE_OP - [4:0] */
6545 #define ARIZONA_DRC1_KNEE_OP_WIDTH 5 /* DRC1_KNEE_OP - [4:0] */
6546
6547 /*
6548 * R3716 (0xE84) - DRC1 ctrl5
6549 */
6550 #define ARIZONA_DRC1_KNEE2_IP_MASK 0x03E0 /* DRC1_KNEE2_IP - [9:5] */
6551 #define ARIZONA_DRC1_KNEE2_IP_SHIFT 5 /* DRC1_KNEE2_IP - [9:5] */
6552 #define ARIZONA_DRC1_KNEE2_IP_WIDTH 5 /* DRC1_KNEE2_IP - [9:5] */
6553 #define ARIZONA_DRC1_KNEE2_OP_MASK 0x001F /* DRC1_KNEE2_OP - [4:0] */
6554 #define ARIZONA_DRC1_KNEE2_OP_SHIFT 0 /* DRC1_KNEE2_OP - [4:0] */
6555 #define ARIZONA_DRC1_KNEE2_OP_WIDTH 5 /* DRC1_KNEE2_OP - [4:0] */
6556
6557 /*
6558 * R3721 (0xE89) - DRC2 ctrl1
6559 */
6560 #define ARIZONA_DRC2_SIG_DET_RMS_MASK 0xF800 /* DRC2_SIG_DET_RMS - [15:11] */
6561 #define ARIZONA_DRC2_SIG_DET_RMS_SHIFT 11 /* DRC2_SIG_DET_RMS - [15:11] */
6562 #define ARIZONA_DRC2_SIG_DET_RMS_WIDTH 5 /* DRC2_SIG_DET_RMS - [15:11] */
6563 #define ARIZONA_DRC2_SIG_DET_PK_MASK 0x0600 /* DRC2_SIG_DET_PK - [10:9] */
6564 #define ARIZONA_DRC2_SIG_DET_PK_SHIFT 9 /* DRC2_SIG_DET_PK - [10:9] */
6565 #define ARIZONA_DRC2_SIG_DET_PK_WIDTH 2 /* DRC2_SIG_DET_PK - [10:9] */
6566 #define ARIZONA_DRC2_NG_ENA 0x0100 /* DRC2_NG_ENA */
6567 #define ARIZONA_DRC2_NG_ENA_MASK 0x0100 /* DRC2_NG_ENA */
6568 #define ARIZONA_DRC2_NG_ENA_SHIFT 8 /* DRC2_NG_ENA */
6569 #define ARIZONA_DRC2_NG_ENA_WIDTH 1 /* DRC2_NG_ENA */
6570 #define ARIZONA_DRC2_SIG_DET_MODE 0x0080 /* DRC2_SIG_DET_MODE */
6571 #define ARIZONA_DRC2_SIG_DET_MODE_MASK 0x0080 /* DRC2_SIG_DET_MODE */
6572 #define ARIZONA_DRC2_SIG_DET_MODE_SHIFT 7 /* DRC2_SIG_DET_MODE */
6573 #define ARIZONA_DRC2_SIG_DET_MODE_WIDTH 1 /* DRC2_SIG_DET_MODE */
6574 #define ARIZONA_DRC2_SIG_DET 0x0040 /* DRC2_SIG_DET */
6575 #define ARIZONA_DRC2_SIG_DET_MASK 0x0040 /* DRC2_SIG_DET */
6576 #define ARIZONA_DRC2_SIG_DET_SHIFT 6 /* DRC2_SIG_DET */
6577 #define ARIZONA_DRC2_SIG_DET_WIDTH 1 /* DRC2_SIG_DET */
6578 #define ARIZONA_DRC2_KNEE2_OP_ENA 0x0020 /* DRC2_KNEE2_OP_ENA */
6579 #define ARIZONA_DRC2_KNEE2_OP_ENA_MASK 0x0020 /* DRC2_KNEE2_OP_ENA */
6580 #define ARIZONA_DRC2_KNEE2_OP_ENA_SHIFT 5 /* DRC2_KNEE2_OP_ENA */
6581 #define ARIZONA_DRC2_KNEE2_OP_ENA_WIDTH 1 /* DRC2_KNEE2_OP_ENA */
6582 #define ARIZONA_DRC2_QR 0x0010 /* DRC2_QR */
6583 #define ARIZONA_DRC2_QR_MASK 0x0010 /* DRC2_QR */
6584 #define ARIZONA_DRC2_QR_SHIFT 4 /* DRC2_QR */
6585 #define ARIZONA_DRC2_QR_WIDTH 1 /* DRC2_QR */
6586 #define ARIZONA_DRC2_ANTICLIP 0x0008 /* DRC2_ANTICLIP */
6587 #define ARIZONA_DRC2_ANTICLIP_MASK 0x0008 /* DRC2_ANTICLIP */
6588 #define ARIZONA_DRC2_ANTICLIP_SHIFT 3 /* DRC2_ANTICLIP */
6589 #define ARIZONA_DRC2_ANTICLIP_WIDTH 1 /* DRC2_ANTICLIP */
6590 #define ARIZONA_DRC2L_ENA 0x0002 /* DRC2L_ENA */
6591 #define ARIZONA_DRC2L_ENA_MASK 0x0002 /* DRC2L_ENA */
6592 #define ARIZONA_DRC2L_ENA_SHIFT 1 /* DRC2L_ENA */
6593 #define ARIZONA_DRC2L_ENA_WIDTH 1 /* DRC2L_ENA */
6594 #define ARIZONA_DRC2R_ENA 0x0001 /* DRC2R_ENA */
6595 #define ARIZONA_DRC2R_ENA_MASK 0x0001 /* DRC2R_ENA */
6596 #define ARIZONA_DRC2R_ENA_SHIFT 0 /* DRC2R_ENA */
6597 #define ARIZONA_DRC2R_ENA_WIDTH 1 /* DRC2R_ENA */
6598
6599 /*
6600 * R3722 (0xE8A) - DRC2 ctrl2
6601 */
6602 #define ARIZONA_DRC2_ATK_MASK 0x1E00 /* DRC2_ATK - [12:9] */
6603 #define ARIZONA_DRC2_ATK_SHIFT 9 /* DRC2_ATK - [12:9] */
6604 #define ARIZONA_DRC2_ATK_WIDTH 4 /* DRC2_ATK - [12:9] */
6605 #define ARIZONA_DRC2_DCY_MASK 0x01E0 /* DRC2_DCY - [8:5] */
6606 #define ARIZONA_DRC2_DCY_SHIFT 5 /* DRC2_DCY - [8:5] */
6607 #define ARIZONA_DRC2_DCY_WIDTH 4 /* DRC2_DCY - [8:5] */
6608 #define ARIZONA_DRC2_MINGAIN_MASK 0x001C /* DRC2_MINGAIN - [4:2] */
6609 #define ARIZONA_DRC2_MINGAIN_SHIFT 2 /* DRC2_MINGAIN - [4:2] */
6610 #define ARIZONA_DRC2_MINGAIN_WIDTH 3 /* DRC2_MINGAIN - [4:2] */
6611 #define ARIZONA_DRC2_MAXGAIN_MASK 0x0003 /* DRC2_MAXGAIN - [1:0] */
6612 #define ARIZONA_DRC2_MAXGAIN_SHIFT 0 /* DRC2_MAXGAIN - [1:0] */
6613 #define ARIZONA_DRC2_MAXGAIN_WIDTH 2 /* DRC2_MAXGAIN - [1:0] */
6614
6615 /*
6616 * R3723 (0xE8B) - DRC2 ctrl3
6617 */
6618 #define ARIZONA_DRC2_NG_MINGAIN_MASK 0xF000 /* DRC2_NG_MINGAIN - [15:12] */
6619 #define ARIZONA_DRC2_NG_MINGAIN_SHIFT 12 /* DRC2_NG_MINGAIN - [15:12] */
6620 #define ARIZONA_DRC2_NG_MINGAIN_WIDTH 4 /* DRC2_NG_MINGAIN - [15:12] */
6621 #define ARIZONA_DRC2_NG_EXP_MASK 0x0C00 /* DRC2_NG_EXP - [11:10] */
6622 #define ARIZONA_DRC2_NG_EXP_SHIFT 10 /* DRC2_NG_EXP - [11:10] */
6623 #define ARIZONA_DRC2_NG_EXP_WIDTH 2 /* DRC2_NG_EXP - [11:10] */
6624 #define ARIZONA_DRC2_QR_THR_MASK 0x0300 /* DRC2_QR_THR - [9:8] */
6625 #define ARIZONA_DRC2_QR_THR_SHIFT 8 /* DRC2_QR_THR - [9:8] */
6626 #define ARIZONA_DRC2_QR_THR_WIDTH 2 /* DRC2_QR_THR - [9:8] */
6627 #define ARIZONA_DRC2_QR_DCY_MASK 0x00C0 /* DRC2_QR_DCY - [7:6] */
6628 #define ARIZONA_DRC2_QR_DCY_SHIFT 6 /* DRC2_QR_DCY - [7:6] */
6629 #define ARIZONA_DRC2_QR_DCY_WIDTH 2 /* DRC2_QR_DCY - [7:6] */
6630 #define ARIZONA_DRC2_HI_COMP_MASK 0x0038 /* DRC2_HI_COMP - [5:3] */
6631 #define ARIZONA_DRC2_HI_COMP_SHIFT 3 /* DRC2_HI_COMP - [5:3] */
6632 #define ARIZONA_DRC2_HI_COMP_WIDTH 3 /* DRC2_HI_COMP - [5:3] */
6633 #define ARIZONA_DRC2_LO_COMP_MASK 0x0007 /* DRC2_LO_COMP - [2:0] */
6634 #define ARIZONA_DRC2_LO_COMP_SHIFT 0 /* DRC2_LO_COMP - [2:0] */
6635 #define ARIZONA_DRC2_LO_COMP_WIDTH 3 /* DRC2_LO_COMP - [2:0] */
6636
6637 /*
6638 * R3724 (0xE8C) - DRC2 ctrl4
6639 */
6640 #define ARIZONA_DRC2_KNEE_IP_MASK 0x07E0 /* DRC2_KNEE_IP - [10:5] */
6641 #define ARIZONA_DRC2_KNEE_IP_SHIFT 5 /* DRC2_KNEE_IP - [10:5] */
6642 #define ARIZONA_DRC2_KNEE_IP_WIDTH 6 /* DRC2_KNEE_IP - [10:5] */
6643 #define ARIZONA_DRC2_KNEE_OP_MASK 0x001F /* DRC2_KNEE_OP - [4:0] */
6644 #define ARIZONA_DRC2_KNEE_OP_SHIFT 0 /* DRC2_KNEE_OP - [4:0] */
6645 #define ARIZONA_DRC2_KNEE_OP_WIDTH 5 /* DRC2_KNEE_OP - [4:0] */
6646
6647 /*
6648 * R3725 (0xE8D) - DRC2 ctrl5
6649 */
6650 #define ARIZONA_DRC2_KNEE2_IP_MASK 0x03E0 /* DRC2_KNEE2_IP - [9:5] */
6651 #define ARIZONA_DRC2_KNEE2_IP_SHIFT 5 /* DRC2_KNEE2_IP - [9:5] */
6652 #define ARIZONA_DRC2_KNEE2_IP_WIDTH 5 /* DRC2_KNEE2_IP - [9:5] */
6653 #define ARIZONA_DRC2_KNEE2_OP_MASK 0x001F /* DRC2_KNEE2_OP - [4:0] */
6654 #define ARIZONA_DRC2_KNEE2_OP_SHIFT 0 /* DRC2_KNEE2_OP - [4:0] */
6655 #define ARIZONA_DRC2_KNEE2_OP_WIDTH 5 /* DRC2_KNEE2_OP - [4:0] */
6656
6657 /*
6658 * R3776 (0xEC0) - HPLPF1_1
6659 */
6660 #define ARIZONA_LHPF1_MODE 0x0002 /* LHPF1_MODE */
6661 #define ARIZONA_LHPF1_MODE_MASK 0x0002 /* LHPF1_MODE */
6662 #define ARIZONA_LHPF1_MODE_SHIFT 1 /* LHPF1_MODE */
6663 #define ARIZONA_LHPF1_MODE_WIDTH 1 /* LHPF1_MODE */
6664 #define ARIZONA_LHPF1_ENA 0x0001 /* LHPF1_ENA */
6665 #define ARIZONA_LHPF1_ENA_MASK 0x0001 /* LHPF1_ENA */
6666 #define ARIZONA_LHPF1_ENA_SHIFT 0 /* LHPF1_ENA */
6667 #define ARIZONA_LHPF1_ENA_WIDTH 1 /* LHPF1_ENA */
6668
6669 /*
6670 * R3777 (0xEC1) - HPLPF1_2
6671 */
6672 #define ARIZONA_LHPF1_COEFF_MASK 0xFFFF /* LHPF1_COEFF - [15:0] */
6673 #define ARIZONA_LHPF1_COEFF_SHIFT 0 /* LHPF1_COEFF - [15:0] */
6674 #define ARIZONA_LHPF1_COEFF_WIDTH 16 /* LHPF1_COEFF - [15:0] */
6675
6676 /*
6677 * R3780 (0xEC4) - HPLPF2_1
6678 */
6679 #define ARIZONA_LHPF2_MODE 0x0002 /* LHPF2_MODE */
6680 #define ARIZONA_LHPF2_MODE_MASK 0x0002 /* LHPF2_MODE */
6681 #define ARIZONA_LHPF2_MODE_SHIFT 1 /* LHPF2_MODE */
6682 #define ARIZONA_LHPF2_MODE_WIDTH 1 /* LHPF2_MODE */
6683 #define ARIZONA_LHPF2_ENA 0x0001 /* LHPF2_ENA */
6684 #define ARIZONA_LHPF2_ENA_MASK 0x0001 /* LHPF2_ENA */
6685 #define ARIZONA_LHPF2_ENA_SHIFT 0 /* LHPF2_ENA */
6686 #define ARIZONA_LHPF2_ENA_WIDTH 1 /* LHPF2_ENA */
6687
6688 /*
6689 * R3781 (0xEC5) - HPLPF2_2
6690 */
6691 #define ARIZONA_LHPF2_COEFF_MASK 0xFFFF /* LHPF2_COEFF - [15:0] */
6692 #define ARIZONA_LHPF2_COEFF_SHIFT 0 /* LHPF2_COEFF - [15:0] */
6693 #define ARIZONA_LHPF2_COEFF_WIDTH 16 /* LHPF2_COEFF - [15:0] */
6694
6695 /*
6696 * R3784 (0xEC8) - HPLPF3_1
6697 */
6698 #define ARIZONA_LHPF3_MODE 0x0002 /* LHPF3_MODE */
6699 #define ARIZONA_LHPF3_MODE_MASK 0x0002 /* LHPF3_MODE */
6700 #define ARIZONA_LHPF3_MODE_SHIFT 1 /* LHPF3_MODE */
6701 #define ARIZONA_LHPF3_MODE_WIDTH 1 /* LHPF3_MODE */
6702 #define ARIZONA_LHPF3_ENA 0x0001 /* LHPF3_ENA */
6703 #define ARIZONA_LHPF3_ENA_MASK 0x0001 /* LHPF3_ENA */
6704 #define ARIZONA_LHPF3_ENA_SHIFT 0 /* LHPF3_ENA */
6705 #define ARIZONA_LHPF3_ENA_WIDTH 1 /* LHPF3_ENA */
6706
6707 /*
6708 * R3785 (0xEC9) - HPLPF3_2
6709 */
6710 #define ARIZONA_LHPF3_COEFF_MASK 0xFFFF /* LHPF3_COEFF - [15:0] */
6711 #define ARIZONA_LHPF3_COEFF_SHIFT 0 /* LHPF3_COEFF - [15:0] */
6712 #define ARIZONA_LHPF3_COEFF_WIDTH 16 /* LHPF3_COEFF - [15:0] */
6713
6714 /*
6715 * R3788 (0xECC) - HPLPF4_1
6716 */
6717 #define ARIZONA_LHPF4_MODE 0x0002 /* LHPF4_MODE */
6718 #define ARIZONA_LHPF4_MODE_MASK 0x0002 /* LHPF4_MODE */
6719 #define ARIZONA_LHPF4_MODE_SHIFT 1 /* LHPF4_MODE */
6720 #define ARIZONA_LHPF4_MODE_WIDTH 1 /* LHPF4_MODE */
6721 #define ARIZONA_LHPF4_ENA 0x0001 /* LHPF4_ENA */
6722 #define ARIZONA_LHPF4_ENA_MASK 0x0001 /* LHPF4_ENA */
6723 #define ARIZONA_LHPF4_ENA_SHIFT 0 /* LHPF4_ENA */
6724 #define ARIZONA_LHPF4_ENA_WIDTH 1 /* LHPF4_ENA */
6725
6726 /*
6727 * R3789 (0xECD) - HPLPF4_2
6728 */
6729 #define ARIZONA_LHPF4_COEFF_MASK 0xFFFF /* LHPF4_COEFF - [15:0] */
6730 #define ARIZONA_LHPF4_COEFF_SHIFT 0 /* LHPF4_COEFF - [15:0] */
6731 #define ARIZONA_LHPF4_COEFF_WIDTH 16 /* LHPF4_COEFF - [15:0] */
6732
6733 /*
6734 * R3808 (0xEE0) - ASRC_ENABLE
6735 */
6736 #define ARIZONA_ASRC2L_ENA 0x0008 /* ASRC2L_ENA */
6737 #define ARIZONA_ASRC2L_ENA_MASK 0x0008 /* ASRC2L_ENA */
6738 #define ARIZONA_ASRC2L_ENA_SHIFT 3 /* ASRC2L_ENA */
6739 #define ARIZONA_ASRC2L_ENA_WIDTH 1 /* ASRC2L_ENA */
6740 #define ARIZONA_ASRC2R_ENA 0x0004 /* ASRC2R_ENA */
6741 #define ARIZONA_ASRC2R_ENA_MASK 0x0004 /* ASRC2R_ENA */
6742 #define ARIZONA_ASRC2R_ENA_SHIFT 2 /* ASRC2R_ENA */
6743 #define ARIZONA_ASRC2R_ENA_WIDTH 1 /* ASRC2R_ENA */
6744 #define ARIZONA_ASRC1L_ENA 0x0002 /* ASRC1L_ENA */
6745 #define ARIZONA_ASRC1L_ENA_MASK 0x0002 /* ASRC1L_ENA */
6746 #define ARIZONA_ASRC1L_ENA_SHIFT 1 /* ASRC1L_ENA */
6747 #define ARIZONA_ASRC1L_ENA_WIDTH 1 /* ASRC1L_ENA */
6748 #define ARIZONA_ASRC1R_ENA 0x0001 /* ASRC1R_ENA */
6749 #define ARIZONA_ASRC1R_ENA_MASK 0x0001 /* ASRC1R_ENA */
6750 #define ARIZONA_ASRC1R_ENA_SHIFT 0 /* ASRC1R_ENA */
6751 #define ARIZONA_ASRC1R_ENA_WIDTH 1 /* ASRC1R_ENA */
6752
6753 /*
6754 * R3810 (0xEE2) - ASRC_RATE1
6755 */
6756 #define ARIZONA_ASRC_RATE1_MASK 0x7800 /* ASRC_RATE1 - [14:11] */
6757 #define ARIZONA_ASRC_RATE1_SHIFT 11 /* ASRC_RATE1 - [14:11] */
6758 #define ARIZONA_ASRC_RATE1_WIDTH 4 /* ASRC_RATE1 - [14:11] */
6759
6760 /*
6761 * R3811 (0xEE3) - ASRC_RATE2
6762 */
6763 #define ARIZONA_ASRC_RATE2_MASK 0x7800 /* ASRC_RATE2 - [14:11] */
6764 #define ARIZONA_ASRC_RATE2_SHIFT 11 /* ASRC_RATE2 - [14:11] */
6765 #define ARIZONA_ASRC_RATE2_WIDTH 4 /* ASRC_RATE2 - [14:11] */
6766
6767 /*
6768 * R3824 (0xEF0) - ISRC 1 CTRL 1
6769 */
6770 #define ARIZONA_ISRC1_FSH_MASK 0x7800 /* ISRC1_FSH - [14:11] */
6771 #define ARIZONA_ISRC1_FSH_SHIFT 11 /* ISRC1_FSH - [14:11] */
6772 #define ARIZONA_ISRC1_FSH_WIDTH 4 /* ISRC1_FSH - [14:11] */
6773 #define ARIZONA_ISRC1_CLK_SEL_MASK 0x0700 /* ISRC1_CLK_SEL - [10:8] */
6774 #define ARIZONA_ISRC1_CLK_SEL_SHIFT 8 /* ISRC1_CLK_SEL - [10:8] */
6775 #define ARIZONA_ISRC1_CLK_SEL_WIDTH 3 /* ISRC1_CLK_SEL - [10:8] */
6776
6777 /*
6778 * R3825 (0xEF1) - ISRC 1 CTRL 2
6779 */
6780 #define ARIZONA_ISRC1_FSL_MASK 0x7800 /* ISRC1_FSL - [14:11] */
6781 #define ARIZONA_ISRC1_FSL_SHIFT 11 /* ISRC1_FSL - [14:11] */
6782 #define ARIZONA_ISRC1_FSL_WIDTH 4 /* ISRC1_FSL - [14:11] */
6783
6784 /*
6785 * R3826 (0xEF2) - ISRC 1 CTRL 3
6786 */
6787 #define ARIZONA_ISRC1_INT0_ENA 0x8000 /* ISRC1_INT0_ENA */
6788 #define ARIZONA_ISRC1_INT0_ENA_MASK 0x8000 /* ISRC1_INT0_ENA */
6789 #define ARIZONA_ISRC1_INT0_ENA_SHIFT 15 /* ISRC1_INT0_ENA */
6790 #define ARIZONA_ISRC1_INT0_ENA_WIDTH 1 /* ISRC1_INT0_ENA */
6791 #define ARIZONA_ISRC1_INT1_ENA 0x4000 /* ISRC1_INT1_ENA */
6792 #define ARIZONA_ISRC1_INT1_ENA_MASK 0x4000 /* ISRC1_INT1_ENA */
6793 #define ARIZONA_ISRC1_INT1_ENA_SHIFT 14 /* ISRC1_INT1_ENA */
6794 #define ARIZONA_ISRC1_INT1_ENA_WIDTH 1 /* ISRC1_INT1_ENA */
6795 #define ARIZONA_ISRC1_INT2_ENA 0x2000 /* ISRC1_INT2_ENA */
6796 #define ARIZONA_ISRC1_INT2_ENA_MASK 0x2000 /* ISRC1_INT2_ENA */
6797 #define ARIZONA_ISRC1_INT2_ENA_SHIFT 13 /* ISRC1_INT2_ENA */
6798 #define ARIZONA_ISRC1_INT2_ENA_WIDTH 1 /* ISRC1_INT2_ENA */
6799 #define ARIZONA_ISRC1_INT3_ENA 0x1000 /* ISRC1_INT3_ENA */
6800 #define ARIZONA_ISRC1_INT3_ENA_MASK 0x1000 /* ISRC1_INT3_ENA */
6801 #define ARIZONA_ISRC1_INT3_ENA_SHIFT 12 /* ISRC1_INT3_ENA */
6802 #define ARIZONA_ISRC1_INT3_ENA_WIDTH 1 /* ISRC1_INT3_ENA */
6803 #define ARIZONA_ISRC1_DEC0_ENA 0x0200 /* ISRC1_DEC0_ENA */
6804 #define ARIZONA_ISRC1_DEC0_ENA_MASK 0x0200 /* ISRC1_DEC0_ENA */
6805 #define ARIZONA_ISRC1_DEC0_ENA_SHIFT 9 /* ISRC1_DEC0_ENA */
6806 #define ARIZONA_ISRC1_DEC0_ENA_WIDTH 1 /* ISRC1_DEC0_ENA */
6807 #define ARIZONA_ISRC1_DEC1_ENA 0x0100 /* ISRC1_DEC1_ENA */
6808 #define ARIZONA_ISRC1_DEC1_ENA_MASK 0x0100 /* ISRC1_DEC1_ENA */
6809 #define ARIZONA_ISRC1_DEC1_ENA_SHIFT 8 /* ISRC1_DEC1_ENA */
6810 #define ARIZONA_ISRC1_DEC1_ENA_WIDTH 1 /* ISRC1_DEC1_ENA */
6811 #define ARIZONA_ISRC1_DEC2_ENA 0x0080 /* ISRC1_DEC2_ENA */
6812 #define ARIZONA_ISRC1_DEC2_ENA_MASK 0x0080 /* ISRC1_DEC2_ENA */
6813 #define ARIZONA_ISRC1_DEC2_ENA_SHIFT 7 /* ISRC1_DEC2_ENA */
6814 #define ARIZONA_ISRC1_DEC2_ENA_WIDTH 1 /* ISRC1_DEC2_ENA */
6815 #define ARIZONA_ISRC1_DEC3_ENA 0x0040 /* ISRC1_DEC3_ENA */
6816 #define ARIZONA_ISRC1_DEC3_ENA_MASK 0x0040 /* ISRC1_DEC3_ENA */
6817 #define ARIZONA_ISRC1_DEC3_ENA_SHIFT 6 /* ISRC1_DEC3_ENA */
6818 #define ARIZONA_ISRC1_DEC3_ENA_WIDTH 1 /* ISRC1_DEC3_ENA */
6819 #define ARIZONA_ISRC1_NOTCH_ENA 0x0001 /* ISRC1_NOTCH_ENA */
6820 #define ARIZONA_ISRC1_NOTCH_ENA_MASK 0x0001 /* ISRC1_NOTCH_ENA */
6821 #define ARIZONA_ISRC1_NOTCH_ENA_SHIFT 0 /* ISRC1_NOTCH_ENA */
6822 #define ARIZONA_ISRC1_NOTCH_ENA_WIDTH 1 /* ISRC1_NOTCH_ENA */
6823
6824 /*
6825 * R3827 (0xEF3) - ISRC 2 CTRL 1
6826 */
6827 #define ARIZONA_ISRC2_FSH_MASK 0x7800 /* ISRC2_FSH - [14:11] */
6828 #define ARIZONA_ISRC2_FSH_SHIFT 11 /* ISRC2_FSH - [14:11] */
6829 #define ARIZONA_ISRC2_FSH_WIDTH 4 /* ISRC2_FSH - [14:11] */
6830 #define ARIZONA_ISRC2_CLK_SEL_MASK 0x0700 /* ISRC2_CLK_SEL - [10:8] */
6831 #define ARIZONA_ISRC2_CLK_SEL_SHIFT 8 /* ISRC2_CLK_SEL - [10:8] */
6832 #define ARIZONA_ISRC2_CLK_SEL_WIDTH 3 /* ISRC2_CLK_SEL - [10:8] */
6833
6834 /*
6835 * R3828 (0xEF4) - ISRC 2 CTRL 2
6836 */
6837 #define ARIZONA_ISRC2_FSL_MASK 0x7800 /* ISRC2_FSL - [14:11] */
6838 #define ARIZONA_ISRC2_FSL_SHIFT 11 /* ISRC2_FSL - [14:11] */
6839 #define ARIZONA_ISRC2_FSL_WIDTH 4 /* ISRC2_FSL - [14:11] */
6840
6841 /*
6842 * R3829 (0xEF5) - ISRC 2 CTRL 3
6843 */
6844 #define ARIZONA_ISRC2_INT0_ENA 0x8000 /* ISRC2_INT0_ENA */
6845 #define ARIZONA_ISRC2_INT0_ENA_MASK 0x8000 /* ISRC2_INT0_ENA */
6846 #define ARIZONA_ISRC2_INT0_ENA_SHIFT 15 /* ISRC2_INT0_ENA */
6847 #define ARIZONA_ISRC2_INT0_ENA_WIDTH 1 /* ISRC2_INT0_ENA */
6848 #define ARIZONA_ISRC2_INT1_ENA 0x4000 /* ISRC2_INT1_ENA */
6849 #define ARIZONA_ISRC2_INT1_ENA_MASK 0x4000 /* ISRC2_INT1_ENA */
6850 #define ARIZONA_ISRC2_INT1_ENA_SHIFT 14 /* ISRC2_INT1_ENA */
6851 #define ARIZONA_ISRC2_INT1_ENA_WIDTH 1 /* ISRC2_INT1_ENA */
6852 #define ARIZONA_ISRC2_INT2_ENA 0x2000 /* ISRC2_INT2_ENA */
6853 #define ARIZONA_ISRC2_INT2_ENA_MASK 0x2000 /* ISRC2_INT2_ENA */
6854 #define ARIZONA_ISRC2_INT2_ENA_SHIFT 13 /* ISRC2_INT2_ENA */
6855 #define ARIZONA_ISRC2_INT2_ENA_WIDTH 1 /* ISRC2_INT2_ENA */
6856 #define ARIZONA_ISRC2_INT3_ENA 0x1000 /* ISRC2_INT3_ENA */
6857 #define ARIZONA_ISRC2_INT3_ENA_MASK 0x1000 /* ISRC2_INT3_ENA */
6858 #define ARIZONA_ISRC2_INT3_ENA_SHIFT 12 /* ISRC2_INT3_ENA */
6859 #define ARIZONA_ISRC2_INT3_ENA_WIDTH 1 /* ISRC2_INT3_ENA */
6860 #define ARIZONA_ISRC2_DEC0_ENA 0x0200 /* ISRC2_DEC0_ENA */
6861 #define ARIZONA_ISRC2_DEC0_ENA_MASK 0x0200 /* ISRC2_DEC0_ENA */
6862 #define ARIZONA_ISRC2_DEC0_ENA_SHIFT 9 /* ISRC2_DEC0_ENA */
6863 #define ARIZONA_ISRC2_DEC0_ENA_WIDTH 1 /* ISRC2_DEC0_ENA */
6864 #define ARIZONA_ISRC2_DEC1_ENA 0x0100 /* ISRC2_DEC1_ENA */
6865 #define ARIZONA_ISRC2_DEC1_ENA_MASK 0x0100 /* ISRC2_DEC1_ENA */
6866 #define ARIZONA_ISRC2_DEC1_ENA_SHIFT 8 /* ISRC2_DEC1_ENA */
6867 #define ARIZONA_ISRC2_DEC1_ENA_WIDTH 1 /* ISRC2_DEC1_ENA */
6868 #define ARIZONA_ISRC2_DEC2_ENA 0x0080 /* ISRC2_DEC2_ENA */
6869 #define ARIZONA_ISRC2_DEC2_ENA_MASK 0x0080 /* ISRC2_DEC2_ENA */
6870 #define ARIZONA_ISRC2_DEC2_ENA_SHIFT 7 /* ISRC2_DEC2_ENA */
6871 #define ARIZONA_ISRC2_DEC2_ENA_WIDTH 1 /* ISRC2_DEC2_ENA */
6872 #define ARIZONA_ISRC2_DEC3_ENA 0x0040 /* ISRC2_DEC3_ENA */
6873 #define ARIZONA_ISRC2_DEC3_ENA_MASK 0x0040 /* ISRC2_DEC3_ENA */
6874 #define ARIZONA_ISRC2_DEC3_ENA_SHIFT 6 /* ISRC2_DEC3_ENA */
6875 #define ARIZONA_ISRC2_DEC3_ENA_WIDTH 1 /* ISRC2_DEC3_ENA */
6876 #define ARIZONA_ISRC2_NOTCH_ENA 0x0001 /* ISRC2_NOTCH_ENA */
6877 #define ARIZONA_ISRC2_NOTCH_ENA_MASK 0x0001 /* ISRC2_NOTCH_ENA */
6878 #define ARIZONA_ISRC2_NOTCH_ENA_SHIFT 0 /* ISRC2_NOTCH_ENA */
6879 #define ARIZONA_ISRC2_NOTCH_ENA_WIDTH 1 /* ISRC2_NOTCH_ENA */
6880
6881 /*
6882 * R3830 (0xEF6) - ISRC 3 CTRL 1
6883 */
6884 #define ARIZONA_ISRC3_FSH_MASK 0x7800 /* ISRC3_FSH - [14:11] */
6885 #define ARIZONA_ISRC3_FSH_SHIFT 11 /* ISRC3_FSH - [14:11] */
6886 #define ARIZONA_ISRC3_FSH_WIDTH 4 /* ISRC3_FSH - [14:11] */
6887 #define ARIZONA_ISRC3_CLK_SEL_MASK 0x0700 /* ISRC3_CLK_SEL - [10:8] */
6888 #define ARIZONA_ISRC3_CLK_SEL_SHIFT 8 /* ISRC3_CLK_SEL - [10:8] */
6889 #define ARIZONA_ISRC3_CLK_SEL_WIDTH 3 /* ISRC3_CLK_SEL - [10:8] */
6890
6891 /*
6892 * R3831 (0xEF7) - ISRC 3 CTRL 2
6893 */
6894 #define ARIZONA_ISRC3_FSL_MASK 0x7800 /* ISRC3_FSL - [14:11] */
6895 #define ARIZONA_ISRC3_FSL_SHIFT 11 /* ISRC3_FSL - [14:11] */
6896 #define ARIZONA_ISRC3_FSL_WIDTH 4 /* ISRC3_FSL - [14:11] */
6897
6898 /*
6899 * R3832 (0xEF8) - ISRC 3 CTRL 3
6900 */
6901 #define ARIZONA_ISRC3_INT0_ENA 0x8000 /* ISRC3_INT0_ENA */
6902 #define ARIZONA_ISRC3_INT0_ENA_MASK 0x8000 /* ISRC3_INT0_ENA */
6903 #define ARIZONA_ISRC3_INT0_ENA_SHIFT 15 /* ISRC3_INT0_ENA */
6904 #define ARIZONA_ISRC3_INT0_ENA_WIDTH 1 /* ISRC3_INT0_ENA */
6905 #define ARIZONA_ISRC3_INT1_ENA 0x4000 /* ISRC3_INT1_ENA */
6906 #define ARIZONA_ISRC3_INT1_ENA_MASK 0x4000 /* ISRC3_INT1_ENA */
6907 #define ARIZONA_ISRC3_INT1_ENA_SHIFT 14 /* ISRC3_INT1_ENA */
6908 #define ARIZONA_ISRC3_INT1_ENA_WIDTH 1 /* ISRC3_INT1_ENA */
6909 #define ARIZONA_ISRC3_INT2_ENA 0x2000 /* ISRC3_INT2_ENA */
6910 #define ARIZONA_ISRC3_INT2_ENA_MASK 0x2000 /* ISRC3_INT2_ENA */
6911 #define ARIZONA_ISRC3_INT2_ENA_SHIFT 13 /* ISRC3_INT2_ENA */
6912 #define ARIZONA_ISRC3_INT2_ENA_WIDTH 1 /* ISRC3_INT2_ENA */
6913 #define ARIZONA_ISRC3_INT3_ENA 0x1000 /* ISRC3_INT3_ENA */
6914 #define ARIZONA_ISRC3_INT3_ENA_MASK 0x1000 /* ISRC3_INT3_ENA */
6915 #define ARIZONA_ISRC3_INT3_ENA_SHIFT 12 /* ISRC3_INT3_ENA */
6916 #define ARIZONA_ISRC3_INT3_ENA_WIDTH 1 /* ISRC3_INT3_ENA */
6917 #define ARIZONA_ISRC3_DEC0_ENA 0x0200 /* ISRC3_DEC0_ENA */
6918 #define ARIZONA_ISRC3_DEC0_ENA_MASK 0x0200 /* ISRC3_DEC0_ENA */
6919 #define ARIZONA_ISRC3_DEC0_ENA_SHIFT 9 /* ISRC3_DEC0_ENA */
6920 #define ARIZONA_ISRC3_DEC0_ENA_WIDTH 1 /* ISRC3_DEC0_ENA */
6921 #define ARIZONA_ISRC3_DEC1_ENA 0x0100 /* ISRC3_DEC1_ENA */
6922 #define ARIZONA_ISRC3_DEC1_ENA_MASK 0x0100 /* ISRC3_DEC1_ENA */
6923 #define ARIZONA_ISRC3_DEC1_ENA_SHIFT 8 /* ISRC3_DEC1_ENA */
6924 #define ARIZONA_ISRC3_DEC1_ENA_WIDTH 1 /* ISRC3_DEC1_ENA */
6925 #define ARIZONA_ISRC3_DEC2_ENA 0x0080 /* ISRC3_DEC2_ENA */
6926 #define ARIZONA_ISRC3_DEC2_ENA_MASK 0x0080 /* ISRC3_DEC2_ENA */
6927 #define ARIZONA_ISRC3_DEC2_ENA_SHIFT 7 /* ISRC3_DEC2_ENA */
6928 #define ARIZONA_ISRC3_DEC2_ENA_WIDTH 1 /* ISRC3_DEC2_ENA */
6929 #define ARIZONA_ISRC3_DEC3_ENA 0x0040 /* ISRC3_DEC3_ENA */
6930 #define ARIZONA_ISRC3_DEC3_ENA_MASK 0x0040 /* ISRC3_DEC3_ENA */
6931 #define ARIZONA_ISRC3_DEC3_ENA_SHIFT 6 /* ISRC3_DEC3_ENA */
6932 #define ARIZONA_ISRC3_DEC3_ENA_WIDTH 1 /* ISRC3_DEC3_ENA */
6933 #define ARIZONA_ISRC3_NOTCH_ENA 0x0001 /* ISRC3_NOTCH_ENA */
6934 #define ARIZONA_ISRC3_NOTCH_ENA_MASK 0x0001 /* ISRC3_NOTCH_ENA */
6935 #define ARIZONA_ISRC3_NOTCH_ENA_SHIFT 0 /* ISRC3_NOTCH_ENA */
6936 #define ARIZONA_ISRC3_NOTCH_ENA_WIDTH 1 /* ISRC3_NOTCH_ENA */
6937
6938 /*
6939 * R4352 (0x1100) - DSP1 Control 1
6940 */
6941 #define ARIZONA_DSP1_RATE_MASK 0x7800 /* DSP1_RATE - [14:11] */
6942 #define ARIZONA_DSP1_RATE_SHIFT 11 /* DSP1_RATE - [14:11] */
6943 #define ARIZONA_DSP1_RATE_WIDTH 4 /* DSP1_RATE - [14:11] */
6944 #define ARIZONA_DSP1_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
6945 #define ARIZONA_DSP1_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
6946 #define ARIZONA_DSP1_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
6947 #define ARIZONA_DSP1_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
6948 #define ARIZONA_DSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
6949 #define ARIZONA_DSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
6950 #define ARIZONA_DSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
6951 #define ARIZONA_DSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
6952 #define ARIZONA_DSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
6953 #define ARIZONA_DSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
6954 #define ARIZONA_DSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
6955 #define ARIZONA_DSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
6956 #define ARIZONA_DSP1_START 0x0001 /* DSP1_START */
6957 #define ARIZONA_DSP1_START_MASK 0x0001 /* DSP1_START */
6958 #define ARIZONA_DSP1_START_SHIFT 0 /* DSP1_START */
6959 #define ARIZONA_DSP1_START_WIDTH 1 /* DSP1_START */
6960
6961 /*
6962 * R4353 (0x1101) - DSP1 Clocking 1
6963 */
6964 #define ARIZONA_DSP1_CLK_SEL_MASK 0x0007 /* DSP1_CLK_SEL - [2:0] */
6965 #define ARIZONA_DSP1_CLK_SEL_SHIFT 0 /* DSP1_CLK_SEL - [2:0] */
6966 #define ARIZONA_DSP1_CLK_SEL_WIDTH 3 /* DSP1_CLK_SEL - [2:0] */
6967
6968 /*
6969 * R4356 (0x1104) - DSP1 Status 1
6970 */
6971 #define ARIZONA_DSP1_RAM_RDY 0x0001 /* DSP1_RAM_RDY */
6972 #define ARIZONA_DSP1_RAM_RDY_MASK 0x0001 /* DSP1_RAM_RDY */
6973 #define ARIZONA_DSP1_RAM_RDY_SHIFT 0 /* DSP1_RAM_RDY */
6974 #define ARIZONA_DSP1_RAM_RDY_WIDTH 1 /* DSP1_RAM_RDY */
6975
6976 /*
6977 * R4357 (0x1105) - DSP1 Status 2
6978 */
6979 #define ARIZONA_DSP1_PING_FULL 0x8000 /* DSP1_PING_FULL */
6980 #define ARIZONA_DSP1_PING_FULL_MASK 0x8000 /* DSP1_PING_FULL */
6981 #define ARIZONA_DSP1_PING_FULL_SHIFT 15 /* DSP1_PING_FULL */
6982 #define ARIZONA_DSP1_PING_FULL_WIDTH 1 /* DSP1_PING_FULL */
6983 #define ARIZONA_DSP1_PONG_FULL 0x4000 /* DSP1_PONG_FULL */
6984 #define ARIZONA_DSP1_PONG_FULL_MASK 0x4000 /* DSP1_PONG_FULL */
6985 #define ARIZONA_DSP1_PONG_FULL_SHIFT 14 /* DSP1_PONG_FULL */
6986 #define ARIZONA_DSP1_PONG_FULL_WIDTH 1 /* DSP1_PONG_FULL */
6987 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_MASK 0x00FF /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6988 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_SHIFT 0 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6989 #define ARIZONA_DSP1_WDMA_ACTIVE_CHANNELS_WIDTH 8 /* DSP1_WDMA_ACTIVE_CHANNELS - [7:0] */
6990
6991 #endif
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