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PCI: define PCI resource names in an 'enum'
[deliverable/linux.git] / include / linux / pci.h
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
19
20 #include <linux/pci_regs.h> /* The pci register defines */
21
22 /*
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
26 *
27 * 7:3 = slot
28 * 2:0 = function
29 */
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
33
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
40
41 #ifdef __KERNEL__
42
43 #include <linux/mod_devicetable.h>
44
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
54 #include <linux/io.h>
55
56 /* Include the ID list */
57 #include <linux/pci_ids.h>
58
59 /* pci_slot represents a physical slot */
60 struct pci_slot {
61 struct pci_bus *bus; /* The bus this slot is on */
62 struct list_head list; /* node in list of slots on this bus */
63 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
64 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
65 struct kobject kobj;
66 };
67
68 static inline const char *pci_slot_name(const struct pci_slot *slot)
69 {
70 return kobject_name(&slot->kobj);
71 }
72
73 /* File state for mmap()s on /proc/bus/pci/X/Y */
74 enum pci_mmap_state {
75 pci_mmap_io,
76 pci_mmap_mem
77 };
78
79 /* This defines the direction arg to the DMA mapping routines. */
80 #define PCI_DMA_BIDIRECTIONAL 0
81 #define PCI_DMA_TODEVICE 1
82 #define PCI_DMA_FROMDEVICE 2
83 #define PCI_DMA_NONE 3
84
85 /*
86 * For PCI devices, the region numbers are assigned this way:
87 */
88 enum {
89 /* #0-5: standard PCI resources */
90 PCI_STD_RESOURCES,
91 PCI_STD_RESOURCE_END = 5,
92
93 /* #6: expansion ROM resource */
94 PCI_ROM_RESOURCE,
95
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
98
99 PCI_BRIDGE_RESOURCES,
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
102
103 /* total resources associated with a PCI device */
104 PCI_NUM_RESOURCES,
105
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE
108 };
109
110 typedef int __bitwise pci_power_t;
111
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
119
120 /** The pci_channel state describes connectivity between the CPU and
121 * the pci device. If some PCI bus between here and the pci device
122 * has crashed or locked up, this info is reflected here.
123 */
124 typedef unsigned int __bitwise pci_channel_state_t;
125
126 enum pci_channel_state {
127 /* I/O channel is in normal state */
128 pci_channel_io_normal = (__force pci_channel_state_t) 1,
129
130 /* I/O to channel is blocked */
131 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
132
133 /* PCI card is dead */
134 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
135 };
136
137 typedef unsigned int __bitwise pcie_reset_state_t;
138
139 enum pcie_reset_state {
140 /* Reset is NOT asserted (Use to deassert reset) */
141 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
142
143 /* Use #PERST to reset PCI-E device */
144 pcie_warm_reset = (__force pcie_reset_state_t) 2,
145
146 /* Use PCI-E Hot Reset to reset device */
147 pcie_hot_reset = (__force pcie_reset_state_t) 3
148 };
149
150 typedef unsigned short __bitwise pci_dev_flags_t;
151 enum pci_dev_flags {
152 /* INTX_DISABLE in PCI_COMMAND register disables MSI
153 * generation too.
154 */
155 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
156 /* Device configuration is irrevocably lost if disabled into D3 */
157 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
158 };
159
160 enum pci_irq_reroute_variant {
161 INTEL_IRQ_REROUTE_VARIANT = 1,
162 MAX_IRQ_REROUTE_VARIANTS = 3
163 };
164
165 typedef unsigned short __bitwise pci_bus_flags_t;
166 enum pci_bus_flags {
167 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
168 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
169 };
170
171 struct pci_cap_saved_state {
172 struct hlist_node next;
173 char cap_nr;
174 u32 data[0];
175 };
176
177 struct pcie_link_state;
178 struct pci_vpd;
179
180 /*
181 * The pci_dev structure is used to describe PCI devices.
182 */
183 struct pci_dev {
184 struct list_head bus_list; /* node in per-bus list */
185 struct pci_bus *bus; /* bus this device is on */
186 struct pci_bus *subordinate; /* bus this device bridges to */
187
188 void *sysdata; /* hook for sys-specific extension */
189 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
190 struct pci_slot *slot; /* Physical slot this device is in */
191
192 unsigned int devfn; /* encoded device & function index */
193 unsigned short vendor;
194 unsigned short device;
195 unsigned short subsystem_vendor;
196 unsigned short subsystem_device;
197 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
198 u8 revision; /* PCI revision, low byte of class word */
199 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
200 u8 pcie_type; /* PCI-E device/port type */
201 u8 rom_base_reg; /* which config register controls the ROM */
202 u8 pin; /* which interrupt pin this device uses */
203
204 struct pci_driver *driver; /* which driver has allocated this device */
205 u64 dma_mask; /* Mask of the bits of bus address this
206 device implements. Normally this is
207 0xffffffff. You only need to change
208 this if your device has broken DMA
209 or supports 64-bit transfers. */
210
211 struct device_dma_parameters dma_parms;
212
213 pci_power_t current_state; /* Current operating state. In ACPI-speak,
214 this is D0-D3, D0 being fully functional,
215 and D3 being off. */
216 int pm_cap; /* PM capability offset in the
217 configuration space */
218 unsigned int pme_support:5; /* Bitmask of states from which PME#
219 can be generated */
220 unsigned int d1_support:1; /* Low power state D1 is supported */
221 unsigned int d2_support:1; /* Low power state D2 is supported */
222 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
223
224 #ifdef CONFIG_PCIEASPM
225 struct pcie_link_state *link_state; /* ASPM link state. */
226 #endif
227
228 pci_channel_state_t error_state; /* current connectivity state */
229 struct device dev; /* Generic device interface */
230
231 int cfg_size; /* Size of configuration space */
232
233 /*
234 * Instead of touching interrupt line and base address registers
235 * directly, use the values stored here. They might be different!
236 */
237 unsigned int irq;
238 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
239
240 /* These fields are used by common fixups */
241 unsigned int transparent:1; /* Transparent PCI bridge */
242 unsigned int multifunction:1;/* Part of multi-function device */
243 /* keep track of device state */
244 unsigned int is_added:1;
245 unsigned int is_busmaster:1; /* device is busmaster */
246 unsigned int no_msi:1; /* device may not use msi */
247 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
248 unsigned int broken_parity_status:1; /* Device generates false positive parity */
249 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
250 unsigned int msi_enabled:1;
251 unsigned int msix_enabled:1;
252 unsigned int ari_enabled:1; /* ARI forwarding */
253 unsigned int is_managed:1;
254 unsigned int is_pcie:1;
255 pci_dev_flags_t dev_flags;
256 atomic_t enable_cnt; /* pci_enable_device has been called */
257
258 u32 saved_config_space[16]; /* config space saved at suspend time */
259 struct hlist_head saved_cap_space;
260 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
261 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
262 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
263 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
264 #ifdef CONFIG_PCI_MSI
265 struct list_head msi_list;
266 #endif
267 struct pci_vpd *vpd;
268 };
269
270 extern struct pci_dev *alloc_pci_dev(void);
271
272 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
273 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
274 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
275
276 static inline int pci_channel_offline(struct pci_dev *pdev)
277 {
278 return (pdev->error_state != pci_channel_io_normal);
279 }
280
281 static inline struct pci_cap_saved_state *pci_find_saved_cap(
282 struct pci_dev *pci_dev, char cap)
283 {
284 struct pci_cap_saved_state *tmp;
285 struct hlist_node *pos;
286
287 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
288 if (tmp->cap_nr == cap)
289 return tmp;
290 }
291 return NULL;
292 }
293
294 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
295 struct pci_cap_saved_state *new_cap)
296 {
297 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
298 }
299
300 #ifndef PCI_BUS_NUM_RESOURCES
301 #define PCI_BUS_NUM_RESOURCES 16
302 #endif
303
304 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
305
306 struct pci_bus {
307 struct list_head node; /* node in list of buses */
308 struct pci_bus *parent; /* parent bus this bridge is on */
309 struct list_head children; /* list of child buses */
310 struct list_head devices; /* list of devices on this bus */
311 struct pci_dev *self; /* bridge device as seen by parent */
312 struct list_head slots; /* list of slots on this bus */
313 struct resource *resource[PCI_BUS_NUM_RESOURCES];
314 /* address space routed to this bus */
315
316 struct pci_ops *ops; /* configuration access functions */
317 void *sysdata; /* hook for sys-specific extension */
318 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
319
320 unsigned char number; /* bus number */
321 unsigned char primary; /* number of primary bridge */
322 unsigned char secondary; /* number of secondary bridge */
323 unsigned char subordinate; /* max number of subordinate buses */
324
325 char name[48];
326
327 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
328 pci_bus_flags_t bus_flags; /* Inherited by child busses */
329 struct device *bridge;
330 struct device dev;
331 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
332 struct bin_attribute *legacy_mem; /* legacy mem */
333 unsigned int is_added:1;
334 };
335
336 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
337 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
338
339 /*
340 * Error values that may be returned by PCI functions.
341 */
342 #define PCIBIOS_SUCCESSFUL 0x00
343 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
344 #define PCIBIOS_BAD_VENDOR_ID 0x83
345 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
346 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
347 #define PCIBIOS_SET_FAILED 0x88
348 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
349
350 /* Low-level architecture-dependent routines */
351
352 struct pci_ops {
353 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
354 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
355 };
356
357 /*
358 * ACPI needs to be able to access PCI config space before we've done a
359 * PCI bus scan and created pci_bus structures.
360 */
361 extern int raw_pci_read(unsigned int domain, unsigned int bus,
362 unsigned int devfn, int reg, int len, u32 *val);
363 extern int raw_pci_write(unsigned int domain, unsigned int bus,
364 unsigned int devfn, int reg, int len, u32 val);
365
366 struct pci_bus_region {
367 resource_size_t start;
368 resource_size_t end;
369 };
370
371 struct pci_dynids {
372 spinlock_t lock; /* protects list, index */
373 struct list_head list; /* for IDs added at runtime */
374 };
375
376 /* ---------------------------------------------------------------- */
377 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
378 * a set of callbacks in struct pci_error_handlers, then that device driver
379 * will be notified of PCI bus errors, and will be driven to recovery
380 * when an error occurs.
381 */
382
383 typedef unsigned int __bitwise pci_ers_result_t;
384
385 enum pci_ers_result {
386 /* no result/none/not supported in device driver */
387 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
388
389 /* Device driver can recover without slot reset */
390 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
391
392 /* Device driver wants slot to be reset. */
393 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
394
395 /* Device has completely failed, is unrecoverable */
396 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
397
398 /* Device driver is fully recovered and operational */
399 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
400 };
401
402 /* PCI bus error event callbacks */
403 struct pci_error_handlers {
404 /* PCI bus error detected on this device */
405 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
406 enum pci_channel_state error);
407
408 /* MMIO has been re-enabled, but not DMA */
409 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
410
411 /* PCI Express link has been reset */
412 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
413
414 /* PCI slot has been reset */
415 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
416
417 /* Device driver may resume normal operations */
418 void (*resume)(struct pci_dev *dev);
419 };
420
421 /* ---------------------------------------------------------------- */
422
423 struct module;
424 struct pci_driver {
425 struct list_head node;
426 char *name;
427 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
428 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
429 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
430 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
431 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
432 int (*resume_early) (struct pci_dev *dev);
433 int (*resume) (struct pci_dev *dev); /* Device woken up */
434 void (*shutdown) (struct pci_dev *dev);
435 struct pci_error_handlers *err_handler;
436 struct device_driver driver;
437 struct pci_dynids dynids;
438 };
439
440 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
441
442 /**
443 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
444 * @_table: device table name
445 *
446 * This macro is used to create a struct pci_device_id array (a device table)
447 * in a generic manner.
448 */
449 #define DEFINE_PCI_DEVICE_TABLE(_table) \
450 const struct pci_device_id _table[] __devinitconst
451
452 /**
453 * PCI_DEVICE - macro used to describe a specific pci device
454 * @vend: the 16 bit PCI Vendor ID
455 * @dev: the 16 bit PCI Device ID
456 *
457 * This macro is used to create a struct pci_device_id that matches a
458 * specific device. The subvendor and subdevice fields will be set to
459 * PCI_ANY_ID.
460 */
461 #define PCI_DEVICE(vend,dev) \
462 .vendor = (vend), .device = (dev), \
463 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
464
465 /**
466 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
467 * @dev_class: the class, subclass, prog-if triple for this device
468 * @dev_class_mask: the class mask for this device
469 *
470 * This macro is used to create a struct pci_device_id that matches a
471 * specific PCI class. The vendor, device, subvendor, and subdevice
472 * fields will be set to PCI_ANY_ID.
473 */
474 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
475 .class = (dev_class), .class_mask = (dev_class_mask), \
476 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
477 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
478
479 /**
480 * PCI_VDEVICE - macro used to describe a specific pci device in short form
481 * @vendor: the vendor name
482 * @device: the 16 bit PCI Device ID
483 *
484 * This macro is used to create a struct pci_device_id that matches a
485 * specific PCI device. The subvendor, and subdevice fields will be set
486 * to PCI_ANY_ID. The macro allows the next field to follow as the device
487 * private data.
488 */
489
490 #define PCI_VDEVICE(vendor, device) \
491 PCI_VENDOR_ID_##vendor, (device), \
492 PCI_ANY_ID, PCI_ANY_ID, 0, 0
493
494 /* these external functions are only available when PCI support is enabled */
495 #ifdef CONFIG_PCI
496
497 extern struct bus_type pci_bus_type;
498
499 /* Do NOT directly access these two variables, unless you are arch specific pci
500 * code, or pci core code. */
501 extern struct list_head pci_root_buses; /* list of all known PCI buses */
502 /* Some device drivers need know if pci is initiated */
503 extern int no_pci_devices(void);
504
505 void pcibios_fixup_bus(struct pci_bus *);
506 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
507 char *pcibios_setup(char *str);
508
509 /* Used only when drivers/pci/setup.c is used */
510 void pcibios_align_resource(void *, struct resource *, resource_size_t,
511 resource_size_t);
512 void pcibios_update_irq(struct pci_dev *, int irq);
513
514 /* Generic PCI functions used internally */
515
516 extern struct pci_bus *pci_find_bus(int domain, int busnr);
517 void pci_bus_add_devices(struct pci_bus *bus);
518 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
519 struct pci_ops *ops, void *sysdata);
520 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
521 void *sysdata)
522 {
523 struct pci_bus *root_bus;
524 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
525 if (root_bus)
526 pci_bus_add_devices(root_bus);
527 return root_bus;
528 }
529 struct pci_bus *pci_create_bus(struct device *parent, int bus,
530 struct pci_ops *ops, void *sysdata);
531 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
532 int busnr);
533 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
534 const char *name,
535 struct hotplug_slot *hotplug);
536 void pci_destroy_slot(struct pci_slot *slot);
537 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
538 int pci_scan_slot(struct pci_bus *bus, int devfn);
539 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
540 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
541 unsigned int pci_scan_child_bus(struct pci_bus *bus);
542 int __must_check pci_bus_add_device(struct pci_dev *dev);
543 void pci_read_bridge_bases(struct pci_bus *child);
544 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
545 struct resource *res);
546 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
547 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
548 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
549 extern void pci_dev_put(struct pci_dev *dev);
550 extern void pci_remove_bus(struct pci_bus *b);
551 extern void pci_remove_bus_device(struct pci_dev *dev);
552 extern void pci_stop_bus_device(struct pci_dev *dev);
553 void pci_setup_cardbus(struct pci_bus *bus);
554 extern void pci_sort_breadthfirst(void);
555
556 /* Generic PCI functions exported to card drivers */
557
558 #ifdef CONFIG_PCI_LEGACY
559 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
560 unsigned int device,
561 struct pci_dev *from);
562 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
563 unsigned int devfn);
564 #endif /* CONFIG_PCI_LEGACY */
565
566 enum pci_lost_interrupt_reason {
567 PCI_LOST_IRQ_NO_INFORMATION = 0,
568 PCI_LOST_IRQ_DISABLE_MSI,
569 PCI_LOST_IRQ_DISABLE_MSIX,
570 PCI_LOST_IRQ_DISABLE_ACPI,
571 };
572 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
573 int pci_find_capability(struct pci_dev *dev, int cap);
574 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
575 int pci_find_ext_capability(struct pci_dev *dev, int cap);
576 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
577 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
578 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
579
580 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
581 struct pci_dev *from);
582 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
583 unsigned int ss_vendor, unsigned int ss_device,
584 struct pci_dev *from);
585 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
586 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
587 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
588 int pci_dev_present(const struct pci_device_id *ids);
589
590 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
591 int where, u8 *val);
592 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
593 int where, u16 *val);
594 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
595 int where, u32 *val);
596 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
597 int where, u8 val);
598 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
599 int where, u16 val);
600 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
601 int where, u32 val);
602
603 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
604 {
605 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
606 }
607 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
608 {
609 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
610 }
611 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
612 u32 *val)
613 {
614 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
615 }
616 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
617 {
618 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
619 }
620 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
621 {
622 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
623 }
624 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
625 u32 val)
626 {
627 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
628 }
629
630 int __must_check pci_enable_device(struct pci_dev *dev);
631 int __must_check pci_enable_device_io(struct pci_dev *dev);
632 int __must_check pci_enable_device_mem(struct pci_dev *dev);
633 int __must_check pci_reenable_device(struct pci_dev *);
634 int __must_check pcim_enable_device(struct pci_dev *pdev);
635 void pcim_pin_device(struct pci_dev *pdev);
636
637 static inline int pci_is_managed(struct pci_dev *pdev)
638 {
639 return pdev->is_managed;
640 }
641
642 void pci_disable_device(struct pci_dev *dev);
643 void pci_set_master(struct pci_dev *dev);
644 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
645 #define HAVE_PCI_SET_MWI
646 int __must_check pci_set_mwi(struct pci_dev *dev);
647 int pci_try_set_mwi(struct pci_dev *dev);
648 void pci_clear_mwi(struct pci_dev *dev);
649 void pci_intx(struct pci_dev *dev, int enable);
650 void pci_msi_off(struct pci_dev *dev);
651 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
652 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
653 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
654 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
655 int pcix_get_max_mmrbc(struct pci_dev *dev);
656 int pcix_get_mmrbc(struct pci_dev *dev);
657 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
658 int pcie_get_readrq(struct pci_dev *dev);
659 int pcie_set_readrq(struct pci_dev *dev, int rq);
660 int pci_reset_function(struct pci_dev *dev);
661 int pci_execute_reset_function(struct pci_dev *dev);
662 void pci_update_resource(struct pci_dev *dev, int resno);
663 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
664 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
665
666 /* ROM control related routines */
667 int pci_enable_rom(struct pci_dev *pdev);
668 void pci_disable_rom(struct pci_dev *pdev);
669 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
670 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
671 size_t pci_get_rom_size(void __iomem *rom, size_t size);
672
673 /* Power management related routines */
674 int pci_save_state(struct pci_dev *dev);
675 int pci_restore_state(struct pci_dev *dev);
676 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
677 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
678 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
679 void pci_pme_active(struct pci_dev *dev, bool enable);
680 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
681 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
682 pci_power_t pci_target_state(struct pci_dev *dev);
683 int pci_prepare_to_sleep(struct pci_dev *dev);
684 int pci_back_from_sleep(struct pci_dev *dev);
685
686 /* Functions for PCI Hotplug drivers to use */
687 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
688
689 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
690 void pci_bus_assign_resources(struct pci_bus *bus);
691 void pci_bus_size_bridges(struct pci_bus *bus);
692 int pci_claim_resource(struct pci_dev *, int);
693 void pci_assign_unassigned_resources(void);
694 void pdev_enable_device(struct pci_dev *);
695 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
696 int pci_enable_resources(struct pci_dev *, int mask);
697 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
698 int (*)(struct pci_dev *, u8, u8));
699 #define HAVE_PCI_REQ_REGIONS 2
700 int __must_check pci_request_regions(struct pci_dev *, const char *);
701 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
702 void pci_release_regions(struct pci_dev *);
703 int __must_check pci_request_region(struct pci_dev *, int, const char *);
704 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
705 void pci_release_region(struct pci_dev *, int);
706 int pci_request_selected_regions(struct pci_dev *, int, const char *);
707 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
708 void pci_release_selected_regions(struct pci_dev *, int);
709
710 /* drivers/pci/bus.c */
711 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
712 struct resource *res, resource_size_t size,
713 resource_size_t align, resource_size_t min,
714 unsigned int type_mask,
715 void (*alignf)(void *, struct resource *,
716 resource_size_t, resource_size_t),
717 void *alignf_data);
718 void pci_enable_bridges(struct pci_bus *bus);
719
720 /* Proper probing supporting hot-pluggable devices */
721 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
722 const char *mod_name);
723
724 /*
725 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
726 */
727 #define pci_register_driver(driver) \
728 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
729
730 void pci_unregister_driver(struct pci_driver *dev);
731 void pci_remove_behind_bridge(struct pci_dev *dev);
732 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
733 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
734 struct pci_dev *dev);
735 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
736 int pass);
737
738 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
739 void *userdata);
740 int pci_cfg_space_size_ext(struct pci_dev *dev);
741 int pci_cfg_space_size(struct pci_dev *dev);
742 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
743
744 /* kmem_cache style wrapper around pci_alloc_consistent() */
745
746 #include <linux/dmapool.h>
747
748 #define pci_pool dma_pool
749 #define pci_pool_create(name, pdev, size, align, allocation) \
750 dma_pool_create(name, &pdev->dev, size, align, allocation)
751 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
752 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
753 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
754
755 enum pci_dma_burst_strategy {
756 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
757 strategy_parameter is N/A */
758 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
759 byte boundaries */
760 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
761 strategy_parameter byte boundaries */
762 };
763
764 struct msix_entry {
765 u32 vector; /* kernel uses to write allocated vector */
766 u16 entry; /* driver uses to specify entry, OS writes */
767 };
768
769
770 #ifndef CONFIG_PCI_MSI
771 static inline int pci_enable_msi(struct pci_dev *dev)
772 {
773 return -1;
774 }
775
776 static inline void pci_msi_shutdown(struct pci_dev *dev)
777 { }
778 static inline void pci_disable_msi(struct pci_dev *dev)
779 { }
780
781 static inline int pci_enable_msix(struct pci_dev *dev,
782 struct msix_entry *entries, int nvec)
783 {
784 return -1;
785 }
786
787 static inline void pci_msix_shutdown(struct pci_dev *dev)
788 { }
789 static inline void pci_disable_msix(struct pci_dev *dev)
790 { }
791
792 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
793 { }
794
795 static inline void pci_restore_msi_state(struct pci_dev *dev)
796 { }
797 static inline int pci_msi_enabled(void)
798 {
799 return 0;
800 }
801 #else
802 extern int pci_enable_msi(struct pci_dev *dev);
803 extern void pci_msi_shutdown(struct pci_dev *dev);
804 extern void pci_disable_msi(struct pci_dev *dev);
805 extern int pci_enable_msix(struct pci_dev *dev,
806 struct msix_entry *entries, int nvec);
807 extern void pci_msix_shutdown(struct pci_dev *dev);
808 extern void pci_disable_msix(struct pci_dev *dev);
809 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
810 extern void pci_restore_msi_state(struct pci_dev *dev);
811 extern int pci_msi_enabled(void);
812 #endif
813
814 #ifndef CONFIG_PCIEASPM
815 static inline int pcie_aspm_enabled(void)
816 {
817 return 0;
818 }
819 #else
820 extern int pcie_aspm_enabled(void);
821 #endif
822
823 #ifdef CONFIG_HT_IRQ
824 /* The functions a driver should call */
825 int ht_create_irq(struct pci_dev *dev, int idx);
826 void ht_destroy_irq(unsigned int irq);
827 #endif /* CONFIG_HT_IRQ */
828
829 extern void pci_block_user_cfg_access(struct pci_dev *dev);
830 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
831
832 /*
833 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
834 * a PCI domain is defined to be a set of PCI busses which share
835 * configuration space.
836 */
837 #ifdef CONFIG_PCI_DOMAINS
838 extern int pci_domains_supported;
839 #else
840 enum { pci_domains_supported = 0 };
841 static inline int pci_domain_nr(struct pci_bus *bus)
842 {
843 return 0;
844 }
845
846 static inline int pci_proc_domain(struct pci_bus *bus)
847 {
848 return 0;
849 }
850 #endif /* CONFIG_PCI_DOMAINS */
851
852 #else /* CONFIG_PCI is not enabled */
853
854 /*
855 * If the system does not have PCI, clearly these return errors. Define
856 * these as simple inline functions to avoid hair in drivers.
857 */
858
859 #define _PCI_NOP(o, s, t) \
860 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
861 int where, t val) \
862 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
863
864 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
865 _PCI_NOP(o, word, u16 x) \
866 _PCI_NOP(o, dword, u32 x)
867 _PCI_NOP_ALL(read, *)
868 _PCI_NOP_ALL(write,)
869
870 static inline struct pci_dev *pci_find_device(unsigned int vendor,
871 unsigned int device,
872 struct pci_dev *from)
873 {
874 return NULL;
875 }
876
877 static inline struct pci_dev *pci_find_slot(unsigned int bus,
878 unsigned int devfn)
879 {
880 return NULL;
881 }
882
883 static inline struct pci_dev *pci_get_device(unsigned int vendor,
884 unsigned int device,
885 struct pci_dev *from)
886 {
887 return NULL;
888 }
889
890 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
891 unsigned int device,
892 unsigned int ss_vendor,
893 unsigned int ss_device,
894 struct pci_dev *from)
895 {
896 return NULL;
897 }
898
899 static inline struct pci_dev *pci_get_class(unsigned int class,
900 struct pci_dev *from)
901 {
902 return NULL;
903 }
904
905 #define pci_dev_present(ids) (0)
906 #define no_pci_devices() (1)
907 #define pci_dev_put(dev) do { } while (0)
908
909 static inline void pci_set_master(struct pci_dev *dev)
910 { }
911
912 static inline int pci_enable_device(struct pci_dev *dev)
913 {
914 return -EIO;
915 }
916
917 static inline void pci_disable_device(struct pci_dev *dev)
918 { }
919
920 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
921 {
922 return -EIO;
923 }
924
925 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
926 {
927 return -EIO;
928 }
929
930 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
931 unsigned int size)
932 {
933 return -EIO;
934 }
935
936 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
937 unsigned long mask)
938 {
939 return -EIO;
940 }
941
942 static inline int pci_assign_resource(struct pci_dev *dev, int i)
943 {
944 return -EBUSY;
945 }
946
947 static inline int __pci_register_driver(struct pci_driver *drv,
948 struct module *owner)
949 {
950 return 0;
951 }
952
953 static inline int pci_register_driver(struct pci_driver *drv)
954 {
955 return 0;
956 }
957
958 static inline void pci_unregister_driver(struct pci_driver *drv)
959 { }
960
961 static inline int pci_find_capability(struct pci_dev *dev, int cap)
962 {
963 return 0;
964 }
965
966 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
967 int cap)
968 {
969 return 0;
970 }
971
972 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
973 {
974 return 0;
975 }
976
977 /* Power management related routines */
978 static inline int pci_save_state(struct pci_dev *dev)
979 {
980 return 0;
981 }
982
983 static inline int pci_restore_state(struct pci_dev *dev)
984 {
985 return 0;
986 }
987
988 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
989 {
990 return 0;
991 }
992
993 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
994 pm_message_t state)
995 {
996 return PCI_D0;
997 }
998
999 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1000 int enable)
1001 {
1002 return 0;
1003 }
1004
1005 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1006 {
1007 return -EIO;
1008 }
1009
1010 static inline void pci_release_regions(struct pci_dev *dev)
1011 { }
1012
1013 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1014
1015 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1016 { }
1017
1018 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1019 { }
1020
1021 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1022 { return NULL; }
1023
1024 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1025 unsigned int devfn)
1026 { return NULL; }
1027
1028 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1029 unsigned int devfn)
1030 { return NULL; }
1031
1032 #endif /* CONFIG_PCI */
1033
1034 /* Include architecture-dependent settings and functions */
1035
1036 #include <asm/pci.h>
1037
1038 /* these helpers provide future and backwards compatibility
1039 * for accessing popular PCI BAR info */
1040 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1041 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1042 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1043 #define pci_resource_len(dev,bar) \
1044 ((pci_resource_start((dev), (bar)) == 0 && \
1045 pci_resource_end((dev), (bar)) == \
1046 pci_resource_start((dev), (bar))) ? 0 : \
1047 \
1048 (pci_resource_end((dev), (bar)) - \
1049 pci_resource_start((dev), (bar)) + 1))
1050
1051 /* Similar to the helpers above, these manipulate per-pci_dev
1052 * driver-specific data. They are really just a wrapper around
1053 * the generic device structure functions of these calls.
1054 */
1055 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1056 {
1057 return dev_get_drvdata(&pdev->dev);
1058 }
1059
1060 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1061 {
1062 dev_set_drvdata(&pdev->dev, data);
1063 }
1064
1065 /* If you want to know what to call your pci_dev, ask this function.
1066 * Again, it's a wrapper around the generic device.
1067 */
1068 static inline const char *pci_name(struct pci_dev *pdev)
1069 {
1070 return dev_name(&pdev->dev);
1071 }
1072
1073
1074 /* Some archs don't want to expose struct resource to userland as-is
1075 * in sysfs and /proc
1076 */
1077 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1078 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1079 const struct resource *rsrc, resource_size_t *start,
1080 resource_size_t *end)
1081 {
1082 *start = rsrc->start;
1083 *end = rsrc->end;
1084 }
1085 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1086
1087
1088 /*
1089 * The world is not perfect and supplies us with broken PCI devices.
1090 * For at least a part of these bugs we need a work-around, so both
1091 * generic (drivers/pci/quirks.c) and per-architecture code can define
1092 * fixup hooks to be called for particular buggy devices.
1093 */
1094
1095 struct pci_fixup {
1096 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1097 void (*hook)(struct pci_dev *dev);
1098 };
1099
1100 enum pci_fixup_pass {
1101 pci_fixup_early, /* Before probing BARs */
1102 pci_fixup_header, /* After reading configuration header */
1103 pci_fixup_final, /* Final phase of device fixups */
1104 pci_fixup_enable, /* pci_enable_device() time */
1105 pci_fixup_resume, /* pci_device_resume() */
1106 pci_fixup_suspend, /* pci_device_suspend */
1107 pci_fixup_resume_early, /* pci_device_resume_early() */
1108 };
1109
1110 /* Anonymous variables would be nice... */
1111 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1112 static const struct pci_fixup __pci_fixup_##name __used \
1113 __attribute__((__section__(#section))) = { vendor, device, hook };
1114 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1115 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1116 vendor##device##hook, vendor, device, hook)
1117 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1118 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1119 vendor##device##hook, vendor, device, hook)
1120 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1121 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1122 vendor##device##hook, vendor, device, hook)
1123 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1124 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1125 vendor##device##hook, vendor, device, hook)
1126 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1127 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1128 resume##vendor##device##hook, vendor, device, hook)
1129 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1130 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1131 resume_early##vendor##device##hook, vendor, device, hook)
1132 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1133 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1134 suspend##vendor##device##hook, vendor, device, hook)
1135
1136
1137 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1138
1139 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1140 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1141 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1142 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1143 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1144 const char *name);
1145 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1146
1147 extern int pci_pci_problems;
1148 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1149 #define PCIPCI_TRITON 2
1150 #define PCIPCI_NATOMA 4
1151 #define PCIPCI_VIAETBF 8
1152 #define PCIPCI_VSFX 16
1153 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1154 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1155
1156 extern unsigned long pci_cardbus_io_size;
1157 extern unsigned long pci_cardbus_mem_size;
1158
1159 int pcibios_add_platform_entries(struct pci_dev *dev);
1160 void pcibios_disable_device(struct pci_dev *dev);
1161 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1162 enum pcie_reset_state state);
1163
1164 #ifdef CONFIG_PCI_MMCONFIG
1165 extern void __init pci_mmcfg_early_init(void);
1166 extern void __init pci_mmcfg_late_init(void);
1167 #else
1168 static inline void pci_mmcfg_early_init(void) { }
1169 static inline void pci_mmcfg_late_init(void) { }
1170 #endif
1171
1172 int pci_ext_cfg_avail(struct pci_dev *dev);
1173
1174 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1175
1176 #endif /* __KERNEL__ */
1177 #endif /* LINUX_PCI_H */
Linux kernel - Deliverables
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