include/linux/pci.h

   1 /*
   2  *      pci.h
   3  *
   4  *      PCI defines and function prototypes
   5  *      Copyright 1994, Drew Eckhardt
   6  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
   7  *
   8  *      For more information, please consult the following manuals (look at
   9  *      http://www.pcisig.com/ for how to get them):
  10  *
  11  *      PCI BIOS Specification
  12  *      PCI Local Bus Specification
  13  *      PCI to PCI Bridge Specification
  14  *      PCI System Design Guide
  15  */
  16
  17 #ifndef LINUX_PCI_H
  18 #define LINUX_PCI_H
  19
  20 /* Include the pci register defines */
  21 #include <linux/pci_regs.h>
  22
  23 /* Include the ID list */
  24 #include <linux/pci_ids.h>
  25
  26 /*
  27  * The PCI interface treats multi-function devices as independent
  28  * devices.  The slot/function address of each device is encoded
  29  * in a single byte as follows:
  30  *
  31  *      7:3 = slot
  32  *      2:0 = function
  33  */
  34 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  35 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
  36 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
  37
  38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
  39 #define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)
  40 #define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */
  41 #define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */
  42 #define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */
  43 #define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <linux/mod_devicetable.h>
  48
  49 #include <linux/types.h>
  50 #include <linux/ioport.h>
  51 #include <linux/list.h>
  52 #include <linux/compiler.h>
  53 #include <linux/errno.h>
  54 #include <asm/atomic.h>
  55 #include <linux/device.h>
  56
  57 /* File state for mmap()s on /proc/bus/pci/X/Y */
  58 enum pci_mmap_state {
  59         pci_mmap_io,
  60         pci_mmap_mem
  61 };
  62
  63 /* This defines the direction arg to the DMA mapping routines. */
  64 #define PCI_DMA_BIDIRECTIONAL   0
  65 #define PCI_DMA_TODEVICE        1
  66 #define PCI_DMA_FROMDEVICE      2
  67 #define PCI_DMA_NONE            3
  68
  69 #define DEVICE_COUNT_COMPATIBLE 4
  70 #define DEVICE_COUNT_RESOURCE   12
  71
  72 typedef int __bitwise pci_power_t;
  73
  74 #define PCI_D0          ((pci_power_t __force) 0)
  75 #define PCI_D1          ((pci_power_t __force) 1)
  76 #define PCI_D2          ((pci_power_t __force) 2)
  77 #define PCI_D3hot       ((pci_power_t __force) 3)
  78 #define PCI_D3cold      ((pci_power_t __force) 4)
  79 #define PCI_UNKNOWN     ((pci_power_t __force) 5)
  80 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
  81
  82 /** The pci_channel state describes connectivity between the CPU and
  83  *  the pci device.  If some PCI bus between here and the pci device
  84  *  has crashed or locked up, this info is reflected here.
  85  */
  86 typedef unsigned int __bitwise pci_channel_state_t;
  87
  88 enum pci_channel_state {
  89         /* I/O channel is in normal state */
  90         pci_channel_io_normal = (__force pci_channel_state_t) 1,
  91
  92         /* I/O to channel is blocked */
  93         pci_channel_io_frozen = (__force pci_channel_state_t) 2,
  94
  95         /* PCI card is dead */
  96         pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
  97 };
  98
  99 typedef unsigned short __bitwise pci_bus_flags_t;
 100 enum pci_bus_flags {
 101         PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
 102 };
 103
 104 struct pci_cap_saved_state {
 105         struct hlist_node next;
 106         char cap_nr;
 107         u32 data[0];
 108 };
 109
 110 /*
 111  * The pci_dev structure is used to describe PCI devices.
 112  */
 113 struct pci_dev {
 114         struct list_head global_list;   /* node in list of all PCI devices */
 115         struct list_head bus_list;      /* node in per-bus list */
 116         struct pci_bus  *bus;           /* bus this device is on */
 117         struct pci_bus  *subordinate;   /* bus this device bridges to */
 118
 119         void            *sysdata;       /* hook for sys-specific extension */
 120         struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
 121
 122         unsigned int    devfn;          /* encoded device & function index */
 123         unsigned short  vendor;
 124         unsigned short  device;
 125         unsigned short  subsystem_vendor;
 126         unsigned short  subsystem_device;
 127         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
 128         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
 129         u8              rom_base_reg;   /* which config register controls the ROM */
 130         u8              pin;            /* which interrupt pin this device uses */
 131
 132         struct pci_driver *driver;      /* which driver has allocated this device */
 133         u64             dma_mask;       /* Mask of the bits of bus address this
 134                                            device implements.  Normally this is
 135                                            0xffffffff.  You only need to change
 136                                            this if your device has broken DMA
 137                                            or supports 64-bit transfers.  */
 138
 139         pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
 140                                            this is D0-D3, D0 being fully functional,
 141                                            and D3 being off. */
 142
 143         pci_channel_state_t error_state;        /* current connectivity state */
 144         struct  device  dev;            /* Generic device interface */
 145
 146         /* device is compatible with these IDs */
 147         unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
 148         unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
 149
 150         int             cfg_size;       /* Size of configuration space */
 151
 152         /*
 153          * Instead of touching interrupt line and base address registers
 154          * directly, use the values stored here. They might be different!
 155          */
 156         unsigned int    irq;
 157         struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
 158
 159         /* These fields are used by common fixups */
 160         unsigned int    transparent:1;  /* Transparent PCI bridge */
 161         unsigned int    multifunction:1;/* Part of multi-function device */
 162         /* keep track of device state */
 163         unsigned int    is_busmaster:1; /* device is busmaster */
 164         unsigned int    no_msi:1;       /* device may not use msi */
 165         unsigned int    no_d1d2:1;   /* only allow d0 or d3 */
 166         unsigned int    block_ucfg_access:1;    /* userspace config space access is blocked */
 167         unsigned int    broken_parity_status:1; /* Device generates false positive parity */
 168         unsigned int    msi_enabled:1;
 169         unsigned int    msix_enabled:1;
 170         atomic_t        enable_cnt;     /* pci_enable_device has been called */
 171
 172         u32             saved_config_space[16]; /* config space saved at suspend time */
 173         struct hlist_head saved_cap_space;
 174         struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
 175         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
 176         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
 177 };
 178
 179 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
 180 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
 181 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
 182 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
 183
 184 static inline struct pci_cap_saved_state *pci_find_saved_cap(
 185         struct pci_dev *pci_dev,char cap)
 186 {
 187         struct pci_cap_saved_state *tmp;
 188         struct hlist_node *pos;
 189
 190         hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
 191                 if (tmp->cap_nr == cap)
 192                         return tmp;
 193         }
 194         return NULL;
 195 }
 196
 197 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
 198         struct pci_cap_saved_state *new_cap)
 199 {
 200         hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
 201 }
 202
 203 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
 204 {
 205         hlist_del(&cap->next);
 206 }
 207
 208 /*
 209  *  For PCI devices, the region numbers are assigned this way:
 210  *
 211  *      0-5     standard PCI regions
 212  *      6       expansion ROM
 213  *      7-10    bridges: address space assigned to buses behind the bridge
 214  */
 215
 216 #define PCI_ROM_RESOURCE        6
 217 #define PCI_BRIDGE_RESOURCES    7
 218 #define PCI_NUM_RESOURCES       11
 219
 220 #ifndef PCI_BUS_NUM_RESOURCES
 221 #define PCI_BUS_NUM_RESOURCES   8
 222 #endif
 223
 224 #define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */
 225
 226 struct pci_bus {
 227         struct list_head node;          /* node in list of buses */
 228         struct pci_bus  *parent;        /* parent bus this bridge is on */
 229         struct list_head children;      /* list of child buses */
 230         struct list_head devices;       /* list of devices on this bus */
 231         struct pci_dev  *self;          /* bridge device as seen by parent */
 232         struct resource *resource[PCI_BUS_NUM_RESOURCES];
 233                                         /* address space routed to this bus */
 234
 235         struct pci_ops  *ops;           /* configuration access functions */
 236         void            *sysdata;       /* hook for sys-specific extension */
 237         struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
 238
 239         unsigned char   number;         /* bus number */
 240         unsigned char   primary;        /* number of primary bridge */
 241         unsigned char   secondary;      /* number of secondary bridge */
 242         unsigned char   subordinate;    /* max number of subordinate buses */
 243
 244         char            name[48];
 245
 246         unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */
 247         pci_bus_flags_t bus_flags;      /* Inherited by child busses */
 248         struct device           *bridge;
 249         struct class_device     class_dev;
 250         struct bin_attribute    *legacy_io; /* legacy I/O for this bus */
 251         struct bin_attribute    *legacy_mem; /* legacy mem */
 252 };
 253
 254 #define pci_bus_b(n)    list_entry(n, struct pci_bus, node)
 255 #define to_pci_bus(n)   container_of(n, struct pci_bus, class_dev)
 256
 257 /*
 258  * Error values that may be returned by PCI functions.
 259  */
 260 #define PCIBIOS_SUCCESSFUL              0x00
 261 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
 262 #define PCIBIOS_BAD_VENDOR_ID           0x83
 263 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
 264 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
 265 #define PCIBIOS_SET_FAILED              0x88
 266 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
 267
 268 /* Low-level architecture-dependent routines */
 269
 270 struct pci_ops {
 271         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
 272         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
 273 };
 274
 275 struct pci_raw_ops {
 276         int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
 277                     int reg, int len, u32 *val);
 278         int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
 279                      int reg, int len, u32 val);
 280 };
 281
 282 extern struct pci_raw_ops *raw_pci_ops;
 283
 284 struct pci_bus_region {
 285         unsigned long start;
 286         unsigned long end;
 287 };
 288
 289 struct pci_dynids {
 290         spinlock_t lock;            /* protects list, index */
 291         struct list_head list;      /* for IDs added at runtime */
 292         unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
 293 };
 294
 295 /* ---------------------------------------------------------------- */
 296 /** PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides
 297  *  a set fof callbacks in struct pci_error_handlers, then that device driver
 298  *  will be notified of PCI bus errors, and will be driven to recovery
 299  *  when an error occurs.
 300  */
 301
 302 typedef unsigned int __bitwise pci_ers_result_t;
 303
 304 enum pci_ers_result {
 305         /* no result/none/not supported in device driver */
 306         PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
 307
 308         /* Device driver can recover without slot reset */
 309         PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
 310
 311         /* Device driver wants slot to be reset. */
 312         PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
 313
 314         /* Device has completely failed, is unrecoverable */
 315         PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
 316
 317         /* Device driver is fully recovered and operational */
 318         PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
 319 };
 320
 321 /* PCI bus error event callbacks */
 322 struct pci_error_handlers
 323 {
 324         /* PCI bus error detected on this device */
 325         pci_ers_result_t (*error_detected)(struct pci_dev *dev,
 326                               enum pci_channel_state error);
 327
 328         /* MMIO has been re-enabled, but not DMA */
 329         pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
 330
 331         /* PCI Express link has been reset */
 332         pci_ers_result_t (*link_reset)(struct pci_dev *dev);
 333
 334         /* PCI slot has been reset */
 335         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
 336
 337         /* Device driver may resume normal operations */
 338         void (*resume)(struct pci_dev *dev);
 339 };
 340
 341 /* ---------------------------------------------------------------- */
 342
 343 struct module;
 344 struct pci_driver {
 345         struct list_head node;
 346         char *name;
 347         const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */
 348         int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */
 349         void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */
 350         int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */
 351         int  (*suspend_late) (struct pci_dev *dev, pm_message_t state);
 352         int  (*resume_early) (struct pci_dev *dev);
 353         int  (*resume) (struct pci_dev *dev);                   /* Device woken up */
 354         int  (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable);   /* Enable wake event */
 355         void (*shutdown) (struct pci_dev *dev);
 356
 357         struct pci_error_handlers *err_handler;
 358         struct device_driver    driver;
 359         struct pci_dynids dynids;
 360
 361         int multithread_probe;
 362 };
 363
 364 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
 365
 366 /**
 367  * PCI_DEVICE - macro used to describe a specific pci device
 368  * @vend: the 16 bit PCI Vendor ID
 369  * @dev: the 16 bit PCI Device ID
 370  *
 371  * This macro is used to create a struct pci_device_id that matches a
 372  * specific device.  The subvendor and subdevice fields will be set to
 373  * PCI_ANY_ID.
 374  */
 375 #define PCI_DEVICE(vend,dev) \
 376         .vendor = (vend), .device = (dev), \
 377         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 378
 379 /**
 380  * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
 381  * @dev_class: the class, subclass, prog-if triple for this device
 382  * @dev_class_mask: the class mask for this device
 383  *
 384  * This macro is used to create a struct pci_device_id that matches a
 385  * specific PCI class.  The vendor, device, subvendor, and subdevice
 386  * fields will be set to PCI_ANY_ID.
 387  */
 388 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
 389         .class = (dev_class), .class_mask = (dev_class_mask), \
 390         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
 391         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 392
 393 /*
 394  * pci_module_init is obsolete, this stays here till we fix up all usages of it
 395  * in the tree.
 396  */
 397 #define pci_module_init pci_register_driver
 398
 399 /* these external functions are only available when PCI support is enabled */
 400 #ifdef CONFIG_PCI
 401
 402 extern struct bus_type pci_bus_type;
 403
 404 /* Do NOT directly access these two variables, unless you are arch specific pci
 405  * code, or pci core code. */
 406 extern struct list_head pci_root_buses; /* list of all known PCI buses */
 407 extern struct list_head pci_devices;    /* list of all devices */
 408
 409 void pcibios_fixup_bus(struct pci_bus *);
 410 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
 411 char *pcibios_setup (char *str);
 412
 413 /* Used only when drivers/pci/setup.c is used */
 414 void pcibios_align_resource(void *, struct resource *, resource_size_t,
 415                                 resource_size_t);
 416 void pcibios_update_irq(struct pci_dev *, int irq);
 417
 418 /* Generic PCI functions used internally */
 419
 420 extern struct pci_bus *pci_find_bus(int domain, int busnr);
 421 void pci_bus_add_devices(struct pci_bus *bus);
 422 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 423 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
 424 {
 425         struct pci_bus *root_bus;
 426         root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
 427         if (root_bus)
 428                 pci_bus_add_devices(root_bus);
 429         return root_bus;
 430 }
 431 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 432 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
 433 int pci_scan_slot(struct pci_bus *bus, int devfn);
 434 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
 435 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
 436 unsigned int pci_scan_child_bus(struct pci_bus *bus);
 437 int __must_check pci_bus_add_device(struct pci_dev *dev);
 438 void pci_read_bridge_bases(struct pci_bus *child);
 439 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
 440 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
 441 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
 442 extern void pci_dev_put(struct pci_dev *dev);
 443 extern void pci_remove_bus(struct pci_bus *b);
 444 extern void pci_remove_bus_device(struct pci_dev *dev);
 445 extern void pci_stop_bus_device(struct pci_dev *dev);
 446 void pci_setup_cardbus(struct pci_bus *bus);
 447 extern void pci_sort_breadthfirst(void);
 448
 449 /* Generic PCI functions exported to card drivers */
 450
 451 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 452 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 453 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
 454 int pci_find_capability (struct pci_dev *dev, int cap);
 455 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
 456 int pci_find_ext_capability (struct pci_dev *dev, int cap);
 457 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
 458
 459 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
 460                                 struct pci_dev *from);
 461 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
 462                                 struct pci_dev *from);
 463
 464 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 465                                 unsigned int ss_vendor, unsigned int ss_device,
 466                                 struct pci_dev *from);
 467 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
 468 struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);
 469 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
 470 int pci_dev_present(const struct pci_device_id *ids);
 471
 472 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
 473 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
 474 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
 475 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
 476 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
 477 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
 478
 479 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
 480 {
 481         return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
 482 }
 483 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
 484 {
 485         return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
 486 }
 487 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
 488 {
 489         return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
 490 }
 491 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
 492 {
 493         return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
 494 }
 495 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
 496 {
 497         return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
 498 }
 499 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
 500 {
 501         return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
 502 }
 503
 504 int __must_check pci_enable_device(struct pci_dev *dev);
 505 int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
 506 void pci_disable_device(struct pci_dev *dev);
 507 void pci_set_master(struct pci_dev *dev);
 508 #define HAVE_PCI_SET_MWI
 509 int __must_check pci_set_mwi(struct pci_dev *dev);
 510 void pci_clear_mwi(struct pci_dev *dev);
 511 void pci_intx(struct pci_dev *dev, int enable);
 512 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
 513 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
 514 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
 515 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
 516 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
 517 void pci_restore_bars(struct pci_dev *dev);
 518
 519 /* ROM control related routines */
 520 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
 521 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
 522 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
 523 void pci_remove_rom(struct pci_dev *pdev);
 524
 525 /* Power management related routines */
 526 int pci_save_state(struct pci_dev *dev);
 527 int pci_restore_state(struct pci_dev *dev);
 528 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 529 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 530 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
 531
 532 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
 533 void pci_bus_assign_resources(struct pci_bus *bus);
 534 void pci_bus_size_bridges(struct pci_bus *bus);
 535 int pci_claim_resource(struct pci_dev *, int);
 536 void pci_assign_unassigned_resources(void);
 537 void pdev_enable_device(struct pci_dev *);
 538 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
 539 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 540                     int (*)(struct pci_dev *, u8, u8));
 541 #define HAVE_PCI_REQ_REGIONS    2
 542 int __must_check pci_request_regions(struct pci_dev *, const char *);
 543 void pci_release_regions(struct pci_dev *);
 544 int __must_check pci_request_region(struct pci_dev *, int, const char *);
 545 void pci_release_region(struct pci_dev *, int);
 546
 547 /* drivers/pci/bus.c */
 548 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
 549                         struct resource *res, resource_size_t size,
 550                         resource_size_t align, resource_size_t min,
 551                         unsigned int type_mask,
 552                         void (*alignf)(void *, struct resource *,
 553                                 resource_size_t, resource_size_t),
 554                         void *alignf_data);
 555 void pci_enable_bridges(struct pci_bus *bus);
 556
 557 /* Proper probing supporting hot-pluggable devices */
 558 int __must_check __pci_register_driver(struct pci_driver *, struct module *);
 559 static inline int __must_check pci_register_driver(struct pci_driver *driver)
 560 {
 561         return __pci_register_driver(driver, THIS_MODULE);
 562 }
 563
 564 void pci_unregister_driver(struct pci_driver *);
 565 void pci_remove_behind_bridge(struct pci_dev *);
 566 struct pci_driver *pci_dev_driver(const struct pci_dev *);
 567 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
 568 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
 569 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
 570
 571 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
 572                   void *userdata);
 573 int pci_cfg_space_size(struct pci_dev *dev);
 574 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
 575
 576 /* kmem_cache style wrapper around pci_alloc_consistent() */
 577
 578 #include <linux/dmapool.h>
 579
 580 #define pci_pool dma_pool
 581 #define pci_pool_create(name, pdev, size, align, allocation) \
 582                 dma_pool_create(name, &pdev->dev, size, align, allocation)
 583 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
 584 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
 585 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
 586
 587 enum pci_dma_burst_strategy {
 588         PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
 589                                    strategy_parameter is N/A */
 590         PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
 591                                    byte boundaries */
 592         PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
 593                                    strategy_parameter byte boundaries */
 594 };
 595
 596 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
 597 extern struct pci_dev *isa_bridge;
 598 #endif
 599
 600 struct msix_entry {
 601         u16     vector; /* kernel uses to write allocated vector */
 602         u16     entry;  /* driver uses to specify entry, OS writes */
 603 };
 604
 605
 606 #ifndef CONFIG_PCI_MSI
 607 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
 608 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
 609 static inline void pci_disable_msi(struct pci_dev *dev) {}
 610 static inline int pci_enable_msix(struct pci_dev* dev,
 611         struct msix_entry *entries, int nvec) {return -1;}
 612 static inline void pci_disable_msix(struct pci_dev *dev) {}
 613 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
 614 #else
 615 extern void pci_scan_msi_device(struct pci_dev *dev);
 616 extern int pci_enable_msi(struct pci_dev *dev);
 617 extern void pci_disable_msi(struct pci_dev *dev);
 618 extern int pci_enable_msix(struct pci_dev* dev,
 619         struct msix_entry *entries, int nvec);
 620 extern void pci_disable_msix(struct pci_dev *dev);
 621 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
 622 #endif
 623
 624 #ifdef CONFIG_HT_IRQ
 625 /* The functions a driver should call */
 626 int  ht_create_irq(struct pci_dev *dev, int idx);
 627 void ht_destroy_irq(unsigned int irq);
 628 #endif /* CONFIG_HT_IRQ */
 629
 630 extern void pci_block_user_cfg_access(struct pci_dev *dev);
 631 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
 632
 633 /*
 634  * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
 635  * a PCI domain is defined to be a set of PCI busses which share
 636  * configuration space.
 637  */
 638 #ifndef CONFIG_PCI_DOMAINS
 639 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 640 static inline int pci_proc_domain(struct pci_bus *bus)
 641 {
 642         return 0;
 643 }
 644 #endif
 645
 646 #else /* CONFIG_PCI is not enabled */
 647
 648 /*
 649  *  If the system does not have PCI, clearly these return errors.  Define
 650  *  these as simple inline functions to avoid hair in drivers.
 651  */
 652
 653 #define _PCI_NOP(o,s,t) \
 654         static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
 655                 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
 656 #define _PCI_NOP_ALL(o,x)       _PCI_NOP(o,byte,u8 x) \
 657                                 _PCI_NOP(o,word,u16 x) \
 658                                 _PCI_NOP(o,dword,u32 x)
 659 _PCI_NOP_ALL(read, *)
 660 _PCI_NOP_ALL(write,)
 661
 662 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
 663 { return NULL; }
 664
 665 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
 666 { return NULL; }
 667
 668 static inline struct pci_dev *pci_get_device(unsigned int vendor,
 669                                 unsigned int device, struct pci_dev *from)
 670 { return NULL; }
 671
 672 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
 673                                 unsigned int device, struct pci_dev *from)
 674 { return NULL; }
 675
 676 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 677 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
 678 { return NULL; }
 679
 680 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
 681 { return NULL; }
 682
 683 #define pci_dev_present(ids)    (0)
 684 #define pci_dev_put(dev)        do { } while (0)
 685
 686 static inline void pci_set_master(struct pci_dev *dev) { }
 687 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
 688 static inline void pci_disable_device(struct pci_dev *dev) { }
 689 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
 690 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
 691 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
 692 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
 693 static inline void pci_unregister_driver(struct pci_driver *drv) { }
 694 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
 695 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
 696 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
 697 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
 698
 699 /* Power management related routines */
 700 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
 701 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
 702 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
 703 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
 704 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
 705
 706 #define isa_bridge      ((struct pci_dev *)NULL)
 707
 708 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
 709
 710 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
 711 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
 712
 713 #endif /* CONFIG_PCI */
 714
 715 /* Include architecture-dependent settings and functions */
 716
 717 #include <asm/pci.h>
 718
 719 /* these helpers provide future and backwards compatibility
 720  * for accessing popular PCI BAR info */
 721 #define pci_resource_start(dev,bar)   ((dev)->resource[(bar)].start)
 722 #define pci_resource_end(dev,bar)     ((dev)->resource[(bar)].end)
 723 #define pci_resource_flags(dev,bar)   ((dev)->resource[(bar)].flags)
 724 #define pci_resource_len(dev,bar) \
 725         ((pci_resource_start((dev),(bar)) == 0 &&       \
 726           pci_resource_end((dev),(bar)) ==              \
 727           pci_resource_start((dev),(bar))) ? 0 :        \
 728                                                         \
 729          (pci_resource_end((dev),(bar)) -               \
 730           pci_resource_start((dev),(bar)) + 1))
 731
 732 /* Similar to the helpers above, these manipulate per-pci_dev
 733  * driver-specific data.  They are really just a wrapper around
 734  * the generic device structure functions of these calls.
 735  */
 736 static inline void *pci_get_drvdata (struct pci_dev *pdev)
 737 {
 738         return dev_get_drvdata(&pdev->dev);
 739 }
 740
 741 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
 742 {
 743         dev_set_drvdata(&pdev->dev, data);
 744 }
 745
 746 /* If you want to know what to call your pci_dev, ask this function.
 747  * Again, it's a wrapper around the generic device.
 748  */
 749 static inline char *pci_name(struct pci_dev *pdev)
 750 {
 751         return pdev->dev.bus_id;
 752 }
 753
 754
 755 /* Some archs don't want to expose struct resource to userland as-is
 756  * in sysfs and /proc
 757  */
 758 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
 759 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
 760                 const struct resource *rsrc, resource_size_t *start,
 761                 resource_size_t *end)
 762 {
 763         *start = rsrc->start;
 764         *end = rsrc->end;
 765 }
 766 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
 767
 768
 769 /*
 770  *  The world is not perfect and supplies us with broken PCI devices.
 771  *  For at least a part of these bugs we need a work-around, so both
 772  *  generic (drivers/pci/quirks.c) and per-architecture code can define
 773  *  fixup hooks to be called for particular buggy devices.
 774  */
 775
 776 struct pci_fixup {
 777         u16 vendor, device;     /* You can use PCI_ANY_ID here of course */
 778         void (*hook)(struct pci_dev *dev);
 779 };
 780
 781 enum pci_fixup_pass {
 782         pci_fixup_early,        /* Before probing BARs */
 783         pci_fixup_header,       /* After reading configuration header */
 784         pci_fixup_final,        /* Final phase of device fixups */
 785         pci_fixup_enable,       /* pci_enable_device() time */
 786 };
 787
 788 /* Anonymous variables would be nice... */
 789 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook)  \
 790         static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
 791         __attribute__((__section__(#section))) = { vendor, device, hook };
 792 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
 793         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
 794                         vendor##device##hook, vendor, device, hook)
 795 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
 796         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
 797                         vendor##device##hook, vendor, device, hook)
 798 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
 799         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
 800                         vendor##device##hook, vendor, device, hook)
 801 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
 802         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
 803                         vendor##device##hook, vendor, device, hook)
 804
 805
 806 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
 807
 808 extern int pci_pci_problems;
 809 #define PCIPCI_FAIL             1       /* No PCI PCI DMA */
 810 #define PCIPCI_TRITON           2
 811 #define PCIPCI_NATOMA           4
 812 #define PCIPCI_VIAETBF          8
 813 #define PCIPCI_VSFX             16
 814 #define PCIPCI_ALIMAGIK         32      /* Need low latency setting */
 815 #define PCIAGP_FAIL             64      /* No PCI to AGP DMA */
 816
 817 #endif /* __KERNEL__ */
 818 #endif /* LINUX_PCI_H */