include/linux/platform_data/si5351.h

   1 /*
   2  * Si5351A/B/C programmable clock generator platform_data.
   3  */
   4
   5 #ifndef __LINUX_PLATFORM_DATA_SI5351_H__
   6 #define __LINUX_PLATFORM_DATA_SI5351_H__
   7
   8 /**
   9  * enum si5351_pll_src - Si5351 pll clock source
  10  * @SI5351_PLL_SRC_DEFAULT: default, do not change eeprom config
  11  * @SI5351_PLL_SRC_XTAL: pll source clock is XTAL input
  12  * @SI5351_PLL_SRC_CLKIN: pll source clock is CLKIN input (Si5351C only)
  13  */
  14 enum si5351_pll_src {
  15         SI5351_PLL_SRC_DEFAULT = 0,
  16         SI5351_PLL_SRC_XTAL = 1,
  17         SI5351_PLL_SRC_CLKIN = 2,
  18 };
  19
  20 /**
  21  * enum si5351_multisynth_src - Si5351 multisynth clock source
  22  * @SI5351_MULTISYNTH_SRC_DEFAULT: default, do not change eeprom config
  23  * @SI5351_MULTISYNTH_SRC_VCO0: multisynth source clock is VCO0
  24  * @SI5351_MULTISYNTH_SRC_VCO1: multisynth source clock is VCO1/VXCO
  25  */
  26 enum si5351_multisynth_src {
  27         SI5351_MULTISYNTH_SRC_DEFAULT = 0,
  28         SI5351_MULTISYNTH_SRC_VCO0 = 1,
  29         SI5351_MULTISYNTH_SRC_VCO1 = 2,
  30 };
  31
  32 /**
  33  * enum si5351_clkout_src - Si5351 clock output clock source
  34  * @SI5351_CLKOUT_SRC_DEFAULT: default, do not change eeprom config
  35  * @SI5351_CLKOUT_SRC_MSYNTH_N: clkout N source clock is multisynth N
  36  * @SI5351_CLKOUT_SRC_MSYNTH_0_4: clkout N source clock is multisynth 0 (N<4)
  37  *                                or 4 (N>=4)
  38  * @SI5351_CLKOUT_SRC_XTAL: clkout N source clock is XTAL
  39  * @SI5351_CLKOUT_SRC_CLKIN: clkout N source clock is CLKIN (Si5351C only)
  40  */
  41 enum si5351_clkout_src {
  42         SI5351_CLKOUT_SRC_DEFAULT = 0,
  43         SI5351_CLKOUT_SRC_MSYNTH_N = 1,
  44         SI5351_CLKOUT_SRC_MSYNTH_0_4 = 2,
  45         SI5351_CLKOUT_SRC_XTAL = 3,
  46         SI5351_CLKOUT_SRC_CLKIN = 4,
  47 };
  48
  49 /**
  50  * enum si5351_drive_strength - Si5351 clock output drive strength
  51  * @SI5351_DRIVE_DEFAULT: default, do not change eeprom config
  52  * @SI5351_DRIVE_2MA: 2mA clock output drive strength
  53  * @SI5351_DRIVE_4MA: 4mA clock output drive strength
  54  * @SI5351_DRIVE_6MA: 6mA clock output drive strength
  55  * @SI5351_DRIVE_8MA: 8mA clock output drive strength
  56  */
  57 enum si5351_drive_strength {
  58         SI5351_DRIVE_DEFAULT = 0,
  59         SI5351_DRIVE_2MA = 2,
  60         SI5351_DRIVE_4MA = 4,
  61         SI5351_DRIVE_6MA = 6,
  62         SI5351_DRIVE_8MA = 8,
  63 };
  64
  65 /**
  66  * enum si5351_disable_state - Si5351 clock output disable state
  67  * @SI5351_DISABLE_DEFAULT: default, do not change eeprom config
  68  * @SI5351_DISABLE_LOW: CLKx is set to a LOW state when disabled
  69  * @SI5351_DISABLE_HIGH: CLKx is set to a HIGH state when disabled
  70  * @SI5351_DISABLE_FLOATING: CLKx is set to a FLOATING state when
  71  *                              disabled
  72  * @SI5351_DISABLE_NEVER: CLKx is NEVER disabled
  73  */
  74 enum si5351_disable_state {
  75         SI5351_DISABLE_DEFAULT = 0,
  76         SI5351_DISABLE_LOW,
  77         SI5351_DISABLE_HIGH,
  78         SI5351_DISABLE_FLOATING,
  79         SI5351_DISABLE_NEVER,
  80 };
  81
  82 /**
  83  * struct si5351_clkout_config - Si5351 clock output configuration
  84  * @clkout: clkout number
  85  * @multisynth_src: multisynth source clock
  86  * @clkout_src: clkout source clock
  87  * @pll_master: if true, clkout can also change pll rate
  88  * @drive: output drive strength
  89  * @rate: initial clkout rate, or default if 0
  90  */
  91 struct si5351_clkout_config {
  92         enum si5351_multisynth_src multisynth_src;
  93         enum si5351_clkout_src clkout_src;
  94         enum si5351_drive_strength drive;
  95         enum si5351_disable_state disable_state;
  96         bool pll_master;
  97         unsigned long rate;
  98 };
  99
 100 /**
 101  * struct si5351_platform_data - Platform data for the Si5351 clock driver
 102  * @clk_xtal: xtal input clock
 103  * @clk_clkin: clkin input clock
 104  * @pll_src: array of pll source clock setting
 105  * @clkout: array of clkout configuration
 106  */
 107 struct si5351_platform_data {
 108         enum si5351_pll_src pll_src[2];
 109         struct si5351_clkout_config clkout[8];
 110 };
 111
 112 #endif