include/linux/serial_core.h

   1 /*
   2  *  linux/drivers/char/serial_core.h
   3  *
   4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #ifndef LINUX_SERIAL_CORE_H
  21 #define LINUX_SERIAL_CORE_H
  22
  23 /*
  24  * The type definitions.  These are from Ted Ts'o's serial.h
  25  */
  26 #define PORT_UNKNOWN    0
  27 #define PORT_8250       1
  28 #define PORT_16450      2
  29 #define PORT_16550      3
  30 #define PORT_16550A     4
  31 #define PORT_CIRRUS     5
  32 #define PORT_16650      6
  33 #define PORT_16650V2    7
  34 #define PORT_16750      8
  35 #define PORT_STARTECH   9
  36 #define PORT_16C950     10
  37 #define PORT_16654      11
  38 #define PORT_16850      12
  39 #define PORT_RSA        13
  40 #define PORT_NS16550A   14
  41 #define PORT_XSCALE     15
  42 #define PORT_RM9000     16      /* PMC-Sierra RM9xxx internal UART */
  43 #define PORT_MAX_8250   16      /* max port ID */
  44
  45 /*
  46  * ARM specific type numbers.  These are not currently guaranteed
  47  * to be implemented, and will change in the future.  These are
  48  * separate so any additions to the old serial.c that occur before
  49  * we are merged can be easily merged here.
  50  */
  51 #define PORT_PXA        31
  52 #define PORT_AMBA       32
  53 #define PORT_CLPS711X   33
  54 #define PORT_SA1100     34
  55 #define PORT_UART00     35
  56 #define PORT_21285      37
  57
  58 /* Sparc type numbers.  */
  59 #define PORT_SUNZILOG   38
  60 #define PORT_SUNSAB     39
  61
  62 /* DEC */
  63 #define PORT_DZ         46
  64 #define PORT_ZS         47
  65
  66 /* Parisc type numbers. */
  67 #define PORT_MUX        48
  68
  69 /* Atmel AT91 / AT32 SoC */
  70 #define PORT_ATMEL      49
  71
  72 /* Macintosh Zilog type numbers */
  73 #define PORT_MAC_ZILOG  50      /* m68k : not yet implemented */
  74 #define PORT_PMAC_ZILOG 51
  75
  76 /* SH-SCI */
  77 #define PORT_SCI        52
  78 #define PORT_SCIF       53
  79 #define PORT_IRDA       54
  80
  81 /* Samsung S3C2410 SoC and derivatives thereof */
  82 #define PORT_S3C2410    55
  83
  84 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
  85 #define PORT_IP22ZILOG  56
  86
  87 /* Sharp LH7a40x -- an ARM9 SoC series */
  88 #define PORT_LH7A40X    57
  89
  90 /* PPC CPM type number */
  91 #define PORT_CPM        58
  92
  93 /* MPC52xx type numbers */
  94 #define PORT_MPC52xx    59
  95
  96 /* IBM icom */
  97 #define PORT_ICOM       60
  98
  99 /* Samsung S3C2440 SoC */
 100 #define PORT_S3C2440    61
 101
 102 /* Motorola i.MX SoC */
 103 #define PORT_IMX        62
 104
 105 /* Marvell MPSC */
 106 #define PORT_MPSC       63
 107
 108 /* TXX9 type number */
 109 #define PORT_TXX9       64
 110
 111 /* NEC VR4100 series SIU/DSIU */
 112 #define PORT_VR41XX_SIU         65
 113 #define PORT_VR41XX_DSIU        66
 114
 115 /* Samsung S3C2400 SoC */
 116 #define PORT_S3C2400    67
 117
 118 /* M32R SIO */
 119 #define PORT_M32R_SIO   68
 120
 121 /*Digi jsm */
 122 #define PORT_JSM        69
 123
 124 #define PORT_PNX8XXX    70
 125
 126 /* Hilscher netx */
 127 #define PORT_NETX       71
 128
 129 /* SUN4V Hypervisor Console */
 130 #define PORT_SUNHV      72
 131
 132 #define PORT_S3C2412    73
 133
 134 /* Xilinx uartlite */
 135 #define PORT_UARTLITE   74
 136
 137 /* Blackfin bf5xx */
 138 #define PORT_BFIN       75
 139
 140 /* Micrel KS8695 */
 141 #define PORT_KS8695     76
 142
 143 /* Broadcom SB1250, etc. SOC */
 144 #define PORT_SB1250_DUART       77
 145
 146 /* Freescale ColdFire */
 147 #define PORT_MCF        78
 148
 149 /* Blackfin SPORT */
 150 #define PORT_BFIN_SPORT         79
 151
 152 /* MN10300 on-chip UART numbers */
 153 #define PORT_MN10300            80
 154 #define PORT_MN10300_CTS        81
 155
 156 #define PORT_SC26XX     82
 157
 158 /* SH-SCI */
 159 #define PORT_SCIFA      83
 160
 161 #define PORT_S3C6400    84
 162
 163 #ifdef __KERNEL__
 164
 165 #include <linux/compiler.h>
 166 #include <linux/interrupt.h>
 167 #include <linux/circ_buf.h>
 168 #include <linux/spinlock.h>
 169 #include <linux/sched.h>
 170 #include <linux/tty.h>
 171 #include <linux/mutex.h>
 172 #include <linux/sysrq.h>
 173
 174 struct uart_port;
 175 struct uart_info;
 176 struct serial_struct;
 177 struct device;
 178
 179 /*
 180  * This structure describes all the operations that can be
 181  * done on the physical hardware.
 182  */
 183 struct uart_ops {
 184         unsigned int    (*tx_empty)(struct uart_port *);
 185         void            (*set_mctrl)(struct uart_port *, unsigned int mctrl);
 186         unsigned int    (*get_mctrl)(struct uart_port *);
 187         void            (*stop_tx)(struct uart_port *);
 188         void            (*start_tx)(struct uart_port *);
 189         void            (*send_xchar)(struct uart_port *, char ch);
 190         void            (*stop_rx)(struct uart_port *);
 191         void            (*enable_ms)(struct uart_port *);
 192         void            (*break_ctl)(struct uart_port *, int ctl);
 193         int             (*startup)(struct uart_port *);
 194         void            (*shutdown)(struct uart_port *);
 195         void            (*flush_buffer)(struct uart_port *);
 196         void            (*set_termios)(struct uart_port *, struct ktermios *new,
 197                                        struct ktermios *old);
 198         void            (*set_ldisc)(struct uart_port *);
 199         void            (*pm)(struct uart_port *, unsigned int state,
 200                               unsigned int oldstate);
 201         int             (*set_wake)(struct uart_port *, unsigned int state);
 202
 203         /*
 204          * Return a string describing the type of the port
 205          */
 206         const char *(*type)(struct uart_port *);
 207
 208         /*
 209          * Release IO and memory resources used by the port.
 210          * This includes iounmap if necessary.
 211          */
 212         void            (*release_port)(struct uart_port *);
 213
 214         /*
 215          * Request IO and memory resources used by the port.
 216          * This includes iomapping the port if necessary.
 217          */
 218         int             (*request_port)(struct uart_port *);
 219         void            (*config_port)(struct uart_port *, int);
 220         int             (*verify_port)(struct uart_port *, struct serial_struct *);
 221         int             (*ioctl)(struct uart_port *, unsigned int, unsigned long);
 222 #ifdef CONFIG_CONSOLE_POLL
 223         void    (*poll_put_char)(struct uart_port *, unsigned char);
 224         int             (*poll_get_char)(struct uart_port *);
 225 #endif
 226 };
 227
 228 #define UART_CONFIG_TYPE        (1 << 0)
 229 #define UART_CONFIG_IRQ         (1 << 1)
 230
 231 struct uart_icount {
 232         __u32   cts;
 233         __u32   dsr;
 234         __u32   rng;
 235         __u32   dcd;
 236         __u32   rx;
 237         __u32   tx;
 238         __u32   frame;
 239         __u32   overrun;
 240         __u32   parity;
 241         __u32   brk;
 242         __u32   buf_overrun;
 243 };
 244
 245 typedef unsigned int __bitwise__ upf_t;
 246
 247 struct uart_port {
 248         spinlock_t              lock;                   /* port lock */
 249         unsigned long           iobase;                 /* in/out[bwl] */
 250         unsigned char __iomem   *membase;               /* read/write[bwl] */
 251         unsigned int            irq;                    /* irq number */
 252         unsigned int            uartclk;                /* base uart clock */
 253         unsigned int            fifosize;               /* tx fifo size */
 254         unsigned char           x_char;                 /* xon/xoff char */
 255         unsigned char           regshift;               /* reg offset shift */
 256         unsigned char           iotype;                 /* io access style */
 257         unsigned char           unused1;
 258
 259 #define UPIO_PORT               (0)
 260 #define UPIO_HUB6               (1)
 261 #define UPIO_MEM                (2)
 262 #define UPIO_MEM32              (3)
 263 #define UPIO_AU                 (4)                     /* Au1x00 type IO */
 264 #define UPIO_TSI                (5)                     /* Tsi108/109 type IO */
 265 #define UPIO_DWAPB              (6)                     /* DesignWare APB UART */
 266 #define UPIO_RM9000             (7)                     /* RM9000 type IO */
 267
 268         unsigned int            read_status_mask;       /* driver specific */
 269         unsigned int            ignore_status_mask;     /* driver specific */
 270         struct uart_info        *info;                  /* pointer to parent info */
 271         struct uart_icount      icount;                 /* statistics */
 272
 273         struct console          *cons;                  /* struct console, if any */
 274 #ifdef CONFIG_SERIAL_CORE_CONSOLE
 275         unsigned long           sysrq;                  /* sysrq timeout */
 276 #endif
 277
 278         upf_t                   flags;
 279
 280 #define UPF_FOURPORT            ((__force upf_t) (1 << 1))
 281 #define UPF_SAK                 ((__force upf_t) (1 << 2))
 282 #define UPF_SPD_MASK            ((__force upf_t) (0x1030))
 283 #define UPF_SPD_HI              ((__force upf_t) (0x0010))
 284 #define UPF_SPD_VHI             ((__force upf_t) (0x0020))
 285 #define UPF_SPD_CUST            ((__force upf_t) (0x0030))
 286 #define UPF_SPD_SHI             ((__force upf_t) (0x1000))
 287 #define UPF_SPD_WARP            ((__force upf_t) (0x1010))
 288 #define UPF_SKIP_TEST           ((__force upf_t) (1 << 6))
 289 #define UPF_AUTO_IRQ            ((__force upf_t) (1 << 7))
 290 #define UPF_HARDPPS_CD          ((__force upf_t) (1 << 11))
 291 #define UPF_LOW_LATENCY         ((__force upf_t) (1 << 13))
 292 #define UPF_BUGGY_UART          ((__force upf_t) (1 << 14))
 293 #define UPF_MAGIC_MULTIPLIER    ((__force upf_t) (1 << 16))
 294 #define UPF_CONS_FLOW           ((__force upf_t) (1 << 23))
 295 #define UPF_SHARE_IRQ           ((__force upf_t) (1 << 24))
 296 #define UPF_BOOT_AUTOCONF       ((__force upf_t) (1 << 28))
 297 #define UPF_FIXED_PORT          ((__force upf_t) (1 << 29))
 298 #define UPF_DEAD                ((__force upf_t) (1 << 30))
 299 #define UPF_IOREMAP             ((__force upf_t) (1 << 31))
 300
 301 #define UPF_CHANGE_MASK         ((__force upf_t) (0x17fff))
 302 #define UPF_USR_MASK            ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
 303
 304         unsigned int            mctrl;                  /* current modem ctrl settings */
 305         unsigned int            timeout;                /* character-based timeout */
 306         unsigned int            type;                   /* port type */
 307         const struct uart_ops   *ops;
 308         unsigned int            custom_divisor;
 309         unsigned int            line;                   /* port index */
 310         resource_size_t         mapbase;                /* for ioremap */
 311         struct device           *dev;                   /* parent device */
 312         unsigned char           hub6;                   /* this should be in the 8250 driver */
 313         unsigned char           suspended;
 314         unsigned char           unused[2];
 315         void                    *private_data;          /* generic platform data pointer */
 316 };
 317
 318 /*
 319  * This is the state information which is persistent across opens.
 320  * The low level driver must not to touch any elements contained
 321  * within.
 322  */
 323 struct uart_state {
 324         unsigned int            close_delay;            /* msec */
 325         unsigned int            closing_wait;           /* msec */
 326
 327 #define USF_CLOSING_WAIT_INF    (0)
 328 #define USF_CLOSING_WAIT_NONE   (~0U)
 329
 330         int                     count;
 331         int                     pm_state;
 332         struct uart_info        *info;
 333         struct uart_port        *port;
 334
 335         struct mutex            mutex;
 336 };
 337
 338 #define UART_XMIT_SIZE  PAGE_SIZE
 339
 340 typedef unsigned int __bitwise__ uif_t;
 341
 342 /*
 343  * This is the state information which is only valid when the port
 344  * is open; it may be freed by the core driver once the device has
 345  * been closed.  Either the low level driver or the core can modify
 346  * stuff here.
 347  */
 348 struct uart_info {
 349         struct tty_port         port;
 350         struct circ_buf         xmit;
 351         uif_t                   flags;
 352
 353 /*
 354  * Definitions for info->flags.  These are _private_ to serial_core, and
 355  * are specific to this structure.  They may be queried by low level drivers.
 356  *
 357  * FIXME: use the ASY_ definitions
 358  */
 359 #define UIF_CHECK_CD            ((__force uif_t) (1 << 25))
 360 #define UIF_CTS_FLOW            ((__force uif_t) (1 << 26))
 361 #define UIF_NORMAL_ACTIVE       ((__force uif_t) (1 << 29))
 362 #define UIF_INITIALIZED         ((__force uif_t) (1 << 31))
 363 #define UIF_SUSPENDED           ((__force uif_t) (1 << 30))
 364
 365         struct tasklet_struct   tlet;
 366         wait_queue_head_t       delta_msr_wait;
 367 };
 368
 369 /* number of characters left in xmit buffer before we ask for more */
 370 #define WAKEUP_CHARS            256
 371
 372 struct module;
 373 struct tty_driver;
 374
 375 struct uart_driver {
 376         struct module           *owner;
 377         const char              *driver_name;
 378         const char              *dev_name;
 379         int                      major;
 380         int                      minor;
 381         int                      nr;
 382         struct console          *cons;
 383
 384         /*
 385          * these are private; the low level driver should not
 386          * touch these; they should be initialised to NULL
 387          */
 388         struct uart_state       *state;
 389         struct tty_driver       *tty_driver;
 390 };
 391
 392 void uart_write_wakeup(struct uart_port *port);
 393
 394 /*
 395  * Baud rate helpers.
 396  */
 397 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
 398                          unsigned int baud);
 399 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
 400                                 struct ktermios *old, unsigned int min,
 401                                 unsigned int max);
 402 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
 403
 404 /*
 405  * Console helpers.
 406  */
 407 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
 408                                    struct console *c);
 409 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
 410                         int *flow);
 411 int uart_set_options(struct uart_port *port, struct console *co, int baud,
 412                      int parity, int bits, int flow);
 413 struct tty_driver *uart_console_device(struct console *co, int *index);
 414 void uart_console_write(struct uart_port *port, const char *s,
 415                         unsigned int count,
 416                         void (*putchar)(struct uart_port *, int));
 417
 418 /*
 419  * Port/driver registration/removal
 420  */
 421 int uart_register_driver(struct uart_driver *uart);
 422 void uart_unregister_driver(struct uart_driver *uart);
 423 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
 424 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
 425 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
 426
 427 /*
 428  * Power Management
 429  */
 430 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
 431 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 432
 433 #define uart_circ_empty(circ)           ((circ)->head == (circ)->tail)
 434 #define uart_circ_clear(circ)           ((circ)->head = (circ)->tail = 0)
 435
 436 #define uart_circ_chars_pending(circ)   \
 437         (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 438
 439 #define uart_circ_chars_free(circ)      \
 440         (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 441
 442 #define uart_tx_stopped(portp)          \
 443         ((portp)->info->port.tty->stopped || (portp)->info->port.tty->hw_stopped)
 444
 445 /*
 446  * The following are helper functions for the low level drivers.
 447  */
 448 static inline int
 449 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 450 {
 451 #ifdef SUPPORT_SYSRQ
 452         if (port->sysrq) {
 453                 if (ch && time_before(jiffies, port->sysrq)) {
 454                         handle_sysrq(ch, port->info ? port->info->port.tty : NULL);
 455                         port->sysrq = 0;
 456                         return 1;
 457                 }
 458                 port->sysrq = 0;
 459         }
 460 #endif
 461         return 0;
 462 }
 463 #ifndef SUPPORT_SYSRQ
 464 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
 465 #endif
 466
 467 /*
 468  * We do the SysRQ and SAK checking like this...
 469  */
 470 static inline int uart_handle_break(struct uart_port *port)
 471 {
 472         struct uart_info *info = port->info;
 473 #ifdef SUPPORT_SYSRQ
 474         if (port->cons && port->cons->index == port->line) {
 475                 if (!port->sysrq) {
 476                         port->sysrq = jiffies + HZ*5;
 477                         return 1;
 478                 }
 479                 port->sysrq = 0;
 480         }
 481 #endif
 482         if (port->flags & UPF_SAK)
 483                 do_SAK(info->port.tty);
 484         return 0;
 485 }
 486
 487 /**
 488  *      uart_handle_dcd_change - handle a change of carrier detect state
 489  *      @port: uart_port structure for the open port
 490  *      @status: new carrier detect status, nonzero if active
 491  */
 492 static inline void
 493 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
 494 {
 495         struct uart_info *info = port->info;
 496
 497         port->icount.dcd++;
 498
 499 #ifdef CONFIG_HARD_PPS
 500         if ((port->flags & UPF_HARDPPS_CD) && status)
 501                 hardpps();
 502 #endif
 503
 504         if (info->flags & UIF_CHECK_CD) {
 505                 if (status)
 506                         wake_up_interruptible(&info->port.open_wait);
 507                 else if (info->port.tty)
 508                         tty_hangup(info->port.tty);
 509         }
 510 }
 511
 512 /**
 513  *      uart_handle_cts_change - handle a change of clear-to-send state
 514  *      @port: uart_port structure for the open port
 515  *      @status: new clear to send status, nonzero if active
 516  */
 517 static inline void
 518 uart_handle_cts_change(struct uart_port *port, unsigned int status)
 519 {
 520         struct uart_info *info = port->info;
 521         struct tty_struct *tty = info->port.tty;
 522
 523         port->icount.cts++;
 524
 525         if (info->flags & UIF_CTS_FLOW) {
 526                 if (tty->hw_stopped) {
 527                         if (status) {
 528                                 tty->hw_stopped = 0;
 529                                 port->ops->start_tx(port);
 530                                 uart_write_wakeup(port);
 531                         }
 532                 } else {
 533                         if (!status) {
 534                                 tty->hw_stopped = 1;
 535                                 port->ops->stop_tx(port);
 536                         }
 537                 }
 538         }
 539 }
 540
 541 #include <linux/tty_flip.h>
 542
 543 static inline void
 544 uart_insert_char(struct uart_port *port, unsigned int status,
 545                  unsigned int overrun, unsigned int ch, unsigned int flag)
 546 {
 547         struct tty_struct *tty = port->info->port.tty;
 548
 549         if ((status & port->ignore_status_mask & ~overrun) == 0)
 550                 tty_insert_flip_char(tty, ch, flag);
 551
 552         /*
 553          * Overrun is special.  Since it's reported immediately,
 554          * it doesn't affect the current character.
 555          */
 556         if (status & ~port->ignore_status_mask & overrun)
 557                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 558 }
 559
 560 /*
 561  *      UART_ENABLE_MS - determine if port should enable modem status irqs
 562  */
 563 #define UART_ENABLE_MS(port,cflag)      ((port)->flags & UPF_HARDPPS_CD || \
 564                                          (cflag) & CRTSCTS || \
 565                                          !((cflag) & CLOCAL))
 566
 567 #endif
 568
 569 #endif /* LINUX_SERIAL_CORE_H */