4 #include <linux/list.h>
5 #include <linux/seq_file.h>
6 #include <linux/cpufreq.h>
13 void (*init
)(struct clk
*clk
);
14 int (*enable
)(struct clk
*clk
);
15 void (*disable
)(struct clk
*clk
);
16 unsigned long (*recalc
)(struct clk
*clk
);
17 int (*set_rate
)(struct clk
*clk
, unsigned long rate
, int algo_id
);
18 int (*set_parent
)(struct clk
*clk
, struct clk
*parent
);
19 long (*round_rate
)(struct clk
*clk
, unsigned long rate
);
23 struct list_head node
;
30 struct list_head children
;
31 struct list_head sibling
; /* node for children */
38 void __iomem
*enable_reg
;
39 unsigned int enable_bit
;
41 unsigned long arch_flags
;
43 struct dentry
*dentry
;
44 struct cpufreq_frequency_table
*freq_table
;
47 #define CLK_ENABLE_ON_INIT (1 << 0)
49 /* drivers/sh/clk.c */
50 unsigned long followparent_recalc(struct clk
*);
51 void recalculate_root_clocks(void);
52 void propagate_rate(struct clk
*);
53 int clk_reparent(struct clk
*child
, struct clk
*parent
);
54 int clk_register(struct clk
*);
55 void clk_unregister(struct clk
*);
56 void clk_enable_init_clocks(void);
59 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
61 * @rate: desired clock rate in Hz
62 * @algo_id: algorithm id to be passed down to ops->set_rate
64 * Returns success (0) or negative errno.
66 int clk_set_rate_ex(struct clk
*clk
, unsigned long rate
, int algo_id
);
88 struct clk_div_mult_table
{
89 unsigned int *divisors
;
90 unsigned int nr_divisors
;
91 unsigned int *multipliers
;
92 unsigned int nr_multipliers
;
95 struct cpufreq_frequency_table
;
96 void clk_rate_table_build(struct clk
*clk
,
97 struct cpufreq_frequency_table
*freq_table
,
99 struct clk_div_mult_table
*src_table
,
100 unsigned long *bitmap
);
102 long clk_rate_table_round(struct clk
*clk
,
103 struct cpufreq_frequency_table
*freq_table
,
106 int clk_rate_table_find(struct clk
*clk
,
107 struct cpufreq_frequency_table
*freq_table
,
110 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
113 .enable_reg = (void __iomem *)_enable_reg, \
114 .enable_bit = _enable_bit, \
118 int sh_clk_mstp32_register(struct clk
*clks
, int nr
);
120 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
123 .enable_reg = (void __iomem *)_reg, \
124 .enable_bit = _shift, \
125 .arch_flags = _div_bitmap, \
129 struct clk_div4_table
{
130 struct clk_div_mult_table
*div_mult_table
;
131 void (*kick
)(struct clk
*clk
);
134 int sh_clk_div4_register(struct clk
*clks
, int nr
,
135 struct clk_div4_table
*table
);
136 int sh_clk_div4_enable_register(struct clk
*clks
, int nr
,
137 struct clk_div4_table
*table
);
138 int sh_clk_div4_reparent_register(struct clk
*clks
, int nr
,
139 struct clk_div4_table
*table
);
141 #define SH_CLK_DIV6(_parent, _reg, _flags) \
144 .enable_reg = (void __iomem *)_reg, \
148 int sh_clk_div6_register(struct clk
*clks
, int nr
);
150 #endif /* __SH_CLOCK_H */
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