2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
25 * INTERFACES between SPI master-side drivers and SPI infrastructure.
26 * (There's no SPI slave support for Linux yet...)
28 extern struct bus_type spi_bus_type
;
31 * struct spi_device - Master side proxy for an SPI slave device
32 * @dev: Driver model representation of the device.
33 * @master: SPI controller used with the device.
34 * @max_speed_hz: Maximum clock rate to be used with this chip
35 * (on this board); may be changed by the device's driver.
36 * The spi_transfer.speed_hz can override this for each transfer.
37 * @chip_select: Chipselect, distinguishing chips handled by @master.
38 * @mode: The spi mode defines how data is clocked out and in.
39 * This may be changed by the device's driver.
40 * The "active low" default for chipselect mode can be overridden
41 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
42 * each word in a transfer (by specifying SPI_LSB_FIRST).
43 * @bits_per_word: Data transfers involve one or more words; word sizes
44 * like eight or 12 bits are common. In-memory wordsizes are
45 * powers of two bytes (e.g. 20 bit samples use 32 bits).
46 * This may be changed by the device's driver, or left at the
47 * default (0) indicating protocol words are eight bit bytes.
48 * The spi_transfer.bits_per_word can override this for each transfer.
49 * @irq: Negative, or the number passed to request_irq() to receive
50 * interrupts from this device.
51 * @controller_state: Controller's runtime state
52 * @controller_data: Board-specific definitions for controller, such as
53 * FIFO initialization parameters; from board_info.controller_data
54 * @modalias: Name of the driver to use with this device, or an alias
55 * for that name. This appears in the sysfs "modalias" attribute
56 * for driver coldplugging, and in uevents used for hotplugging
58 * A @spi_device is used to interchange data between an SPI slave
59 * (usually a discrete chip) and CPU memory.
61 * In @dev, the platform_data is used to hold information about this
62 * device that's meaningful to the device's protocol driver, but not
63 * to its controller. One example might be an identifier for a chip
64 * variant with slightly different functionality; another might be
65 * information about how this particular board wires the chip's pins.
69 struct spi_master
*master
;
73 #define SPI_CPHA 0x01 /* clock phase */
74 #define SPI_CPOL 0x02 /* clock polarity */
75 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
76 #define SPI_MODE_1 (0|SPI_CPHA)
77 #define SPI_MODE_2 (SPI_CPOL|0)
78 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
79 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
80 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
81 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
82 #define SPI_LOOP 0x20 /* loopback mode */
85 void *controller_state
;
86 void *controller_data
;
90 * likely need more hooks for more protocol options affecting how
91 * the controller talks to each chip, like:
92 * - memory packing (12 bit samples into low bits, others zeroed)
94 * - drop chipselect after each word
100 static inline struct spi_device
*to_spi_device(struct device
*dev
)
102 return dev
? container_of(dev
, struct spi_device
, dev
) : NULL
;
105 /* most drivers won't need to care about device refcounting */
106 static inline struct spi_device
*spi_dev_get(struct spi_device
*spi
)
108 return (spi
&& get_device(&spi
->dev
)) ? spi
: NULL
;
111 static inline void spi_dev_put(struct spi_device
*spi
)
114 put_device(&spi
->dev
);
117 /* ctldata is for the bus_master driver's runtime state */
118 static inline void *spi_get_ctldata(struct spi_device
*spi
)
120 return spi
->controller_state
;
123 static inline void spi_set_ctldata(struct spi_device
*spi
, void *state
)
125 spi
->controller_state
= state
;
128 /* device driver data */
130 static inline void spi_set_drvdata(struct spi_device
*spi
, void *data
)
132 dev_set_drvdata(&spi
->dev
, data
);
135 static inline void *spi_get_drvdata(struct spi_device
*spi
)
137 return dev_get_drvdata(&spi
->dev
);
145 * struct spi_driver - Host side "protocol" driver
146 * @probe: Binds this driver to the spi device. Drivers can verify
147 * that the device is actually present, and may need to configure
148 * characteristics (such as bits_per_word) which weren't needed for
149 * the initial configuration done during system setup.
150 * @remove: Unbinds this driver from the spi device
151 * @shutdown: Standard shutdown callback used during system state
152 * transitions such as powerdown/halt and kexec
153 * @suspend: Standard suspend callback used during system state transitions
154 * @resume: Standard resume callback used during system state transitions
155 * @driver: SPI device drivers should initialize the name and owner
156 * field of this structure.
158 * This represents the kind of device driver that uses SPI messages to
159 * interact with the hardware at the other end of a SPI link. It's called
160 * a "protocol" driver because it works through messages rather than talking
161 * directly to SPI hardware (which is what the underlying SPI controller
162 * driver does to pass those messages). These protocols are defined in the
163 * specification for the device(s) supported by the driver.
165 * As a rule, those device protocols represent the lowest level interface
166 * supported by a driver, and it will support upper level interfaces too.
167 * Examples of such upper levels include frameworks like MTD, networking,
168 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
171 int (*probe
)(struct spi_device
*spi
);
172 int (*remove
)(struct spi_device
*spi
);
173 void (*shutdown
)(struct spi_device
*spi
);
174 int (*suspend
)(struct spi_device
*spi
, pm_message_t mesg
);
175 int (*resume
)(struct spi_device
*spi
);
176 struct device_driver driver
;
179 static inline struct spi_driver
*to_spi_driver(struct device_driver
*drv
)
181 return drv
? container_of(drv
, struct spi_driver
, driver
) : NULL
;
184 extern int spi_register_driver(struct spi_driver
*sdrv
);
187 * spi_unregister_driver - reverse effect of spi_register_driver
188 * @sdrv: the driver to unregister
191 static inline void spi_unregister_driver(struct spi_driver
*sdrv
)
194 driver_unregister(&sdrv
->driver
);
199 * struct spi_master - interface to SPI master controller
200 * @dev: device interface to this driver
201 * @bus_num: board-specific (and often SOC-specific) identifier for a
202 * given SPI controller.
203 * @num_chipselect: chipselects are used to distinguish individual
204 * SPI slaves, and are numbered from zero to num_chipselects.
205 * each slave has a chipselect signal, but it's common that not
206 * every chipselect is connected to a slave.
207 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
208 * @setup: updates the device mode and clocking records used by a
209 * device's SPI controller; protocol code may call this. This
210 * must fail if an unrecognized or unsupported mode is requested.
211 * It's always safe to call this unless transfers are pending on
212 * the device whose settings are being modified.
213 * @transfer: adds a message to the controller's transfer queue.
214 * @cleanup: frees controller-specific state
216 * Each SPI master controller can communicate with one or more @spi_device
217 * children. These make a small bus, sharing MOSI, MISO and SCK signals
218 * but not chip select signals. Each device may be configured to use a
219 * different clock rate, since those shared signals are ignored unless
220 * the chip is selected.
222 * The driver for an SPI controller manages access to those devices through
223 * a queue of spi_message transactions, copying data between CPU memory and
224 * an SPI slave device. For each such message it queues, it calls the
225 * message's completion function when the transaction completes.
230 /* other than negative (== assign one dynamically), bus_num is fully
231 * board-specific. usually that simplifies to being SOC-specific.
232 * example: one SOC has three SPI controllers, numbered 0..2,
233 * and one board's schematics might show it using SPI-2. software
234 * would normally use bus_num=2 for that controller.
238 /* chipselects will be integral to many controllers; some others
239 * might use board-specific GPIOs.
243 /* some SPI controllers pose alignment requirements on DMAable
244 * buffers; let protocol drivers know about these requirements.
248 /* spi_device.mode flags understood by this controller driver */
251 /* Setup mode and clock, etc (spi driver may call many times).
253 * IMPORTANT: this may be called when transfers to another
254 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
255 * which could break those transfers.
257 int (*setup
)(struct spi_device
*spi
);
259 /* bidirectional bulk transfers
261 * + The transfer() method may not sleep; its main role is
262 * just to add the message to the queue.
263 * + For now there's no remove-from-queue operation, or
264 * any other request management
265 * + To a given spi_device, message queueing is pure fifo
267 * + The master's main job is to process its message queue,
268 * selecting a chip then transferring data
269 * + If there are multiple spi_device children, the i/o queue
270 * arbitration algorithm is unspecified (round robin, fifo,
271 * priority, reservations, preemption, etc)
273 * + Chipselect stays active during the entire message
274 * (unless modified by spi_transfer.cs_change != 0).
275 * + The message transfers use clock and SPI mode parameters
276 * previously established by setup() for this device
278 int (*transfer
)(struct spi_device
*spi
,
279 struct spi_message
*mesg
);
281 /* called on release() to free memory provided by spi_master */
282 void (*cleanup
)(struct spi_device
*spi
);
285 static inline void *spi_master_get_devdata(struct spi_master
*master
)
287 return dev_get_drvdata(&master
->dev
);
290 static inline void spi_master_set_devdata(struct spi_master
*master
, void *data
)
292 dev_set_drvdata(&master
->dev
, data
);
295 static inline struct spi_master
*spi_master_get(struct spi_master
*master
)
297 if (!master
|| !get_device(&master
->dev
))
302 static inline void spi_master_put(struct spi_master
*master
)
305 put_device(&master
->dev
);
309 /* the spi driver core manages memory for the spi_master classdev */
310 extern struct spi_master
*
311 spi_alloc_master(struct device
*host
, unsigned size
);
313 extern int spi_register_master(struct spi_master
*master
);
314 extern void spi_unregister_master(struct spi_master
*master
);
316 extern struct spi_master
*spi_busnum_to_master(u16 busnum
);
318 /*---------------------------------------------------------------------------*/
321 * I/O INTERFACE between SPI controller and protocol drivers
323 * Protocol drivers use a queue of spi_messages, each transferring data
324 * between the controller and memory buffers.
326 * The spi_messages themselves consist of a series of read+write transfer
327 * segments. Those segments always read the same number of bits as they
328 * write; but one or the other is easily ignored by passing a null buffer
329 * pointer. (This is unlike most types of I/O API, because SPI hardware
332 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
333 * up to the protocol driver, which guarantees the integrity of both (as
334 * well as the data buffers) for as long as the message is queued.
338 * struct spi_transfer - a read/write buffer pair
339 * @tx_buf: data to be written (dma-safe memory), or NULL
340 * @rx_buf: data to be read (dma-safe memory), or NULL
341 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
342 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
343 * @len: size of rx and tx buffers (in bytes)
344 * @speed_hz: Select a speed other than the device default for this
345 * transfer. If 0 the default (from @spi_device) is used.
346 * @bits_per_word: select a bits_per_word other than the device default
347 * for this transfer. If 0 the default (from @spi_device) is used.
348 * @cs_change: affects chipselect after this transfer completes
349 * @delay_usecs: microseconds to delay after this transfer before
350 * (optionally) changing the chipselect status, then starting
351 * the next transfer or completing this @spi_message.
352 * @transfer_list: transfers are sequenced through @spi_message.transfers
354 * SPI transfers always write the same number of bytes as they read.
355 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
356 * In some cases, they may also want to provide DMA addresses for
357 * the data being transferred; that may reduce overhead, when the
358 * underlying driver uses dma.
360 * If the transmit buffer is null, zeroes will be shifted out
361 * while filling @rx_buf. If the receive buffer is null, the data
362 * shifted in will be discarded. Only "len" bytes shift out (or in).
363 * It's an error to try to shift out a partial word. (For example, by
364 * shifting out three bytes with word size of sixteen or twenty bits;
365 * the former uses two bytes per word, the latter uses four bytes.)
367 * In-memory data values are always in native CPU byte order, translated
368 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
369 * for example when bits_per_word is sixteen, buffers are 2N bytes long
370 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
372 * When the word size of the SPI transfer is not a power-of-two multiple
373 * of eight bits, those in-memory words include extra bits. In-memory
374 * words are always seen by protocol drivers as right-justified, so the
375 * undefined (rx) or unused (tx) bits are always the most significant bits.
377 * All SPI transfers start with the relevant chipselect active. Normally
378 * it stays selected until after the last transfer in a message. Drivers
379 * can affect the chipselect signal using cs_change.
381 * (i) If the transfer isn't the last one in the message, this flag is
382 * used to make the chipselect briefly go inactive in the middle of the
383 * message. Toggling chipselect in this way may be needed to terminate
384 * a chip command, letting a single spi_message perform all of group of
385 * chip transactions together.
387 * (ii) When the transfer is the last one in the message, the chip may
388 * stay selected until the next transfer. On multi-device SPI busses
389 * with nothing blocking messages going to other devices, this is just
390 * a performance hint; starting a message to another device deselects
391 * this one. But in other cases, this can be used to ensure correctness.
392 * Some devices need protocol transactions to be built from a series of
393 * spi_message submissions, where the content of one message is determined
394 * by the results of previous messages and where the whole transaction
395 * ends when the chipselect goes intactive.
397 * The code that submits an spi_message (and its spi_transfers)
398 * to the lower layers is responsible for managing its memory.
399 * Zero-initialize every field you don't set up explicitly, to
400 * insulate against future API updates. After you submit a message
401 * and its transfers, ignore them until its completion callback.
403 struct spi_transfer
{
404 /* it's ok if tx_buf == rx_buf (right?)
405 * for MicroWire, one buffer must be null
406 * buffers must work with dma_*map_single() calls, unless
407 * spi_message.is_dma_mapped reports a pre-existing mapping
416 unsigned cs_change
:1;
421 struct list_head transfer_list
;
425 * struct spi_message - one multi-segment SPI transaction
426 * @transfers: list of transfer segments in this transaction
427 * @spi: SPI device to which the transaction is queued
428 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
429 * addresses for each transfer buffer
430 * @complete: called to report transaction completions
431 * @context: the argument to complete() when it's called
432 * @actual_length: the total number of bytes that were transferred in all
433 * successful segments
434 * @status: zero for success, else negative errno
435 * @queue: for use by whichever driver currently owns the message
436 * @state: for use by whichever driver currently owns the message
438 * A @spi_message is used to execute an atomic sequence of data transfers,
439 * each represented by a struct spi_transfer. The sequence is "atomic"
440 * in the sense that no other spi_message may use that SPI bus until that
441 * sequence completes. On some systems, many such sequences can execute as
442 * as single programmed DMA transfer. On all systems, these messages are
443 * queued, and might complete after transactions to other devices. Messages
444 * sent to a given spi_device are alway executed in FIFO order.
446 * The code that submits an spi_message (and its spi_transfers)
447 * to the lower layers is responsible for managing its memory.
448 * Zero-initialize every field you don't set up explicitly, to
449 * insulate against future API updates. After you submit a message
450 * and its transfers, ignore them until its completion callback.
453 struct list_head transfers
;
455 struct spi_device
*spi
;
457 unsigned is_dma_mapped
:1;
459 /* REVISIT: we might want a flag affecting the behavior of the
460 * last transfer ... allowing things like "read 16 bit length L"
461 * immediately followed by "read L bytes". Basically imposing
462 * a specific message scheduling algorithm.
464 * Some controller drivers (message-at-a-time queue processing)
465 * could provide that as their default scheduling algorithm. But
466 * others (with multi-message pipelines) could need a flag to
467 * tell them about such special cases.
470 /* completion is reported through a callback */
471 void (*complete
)(void *context
);
473 unsigned actual_length
;
476 /* for optional use by whatever driver currently owns the
477 * spi_message ... between calls to spi_async and then later
478 * complete(), that's the spi_master controller driver.
480 struct list_head queue
;
484 static inline void spi_message_init(struct spi_message
*m
)
486 memset(m
, 0, sizeof *m
);
487 INIT_LIST_HEAD(&m
->transfers
);
491 spi_message_add_tail(struct spi_transfer
*t
, struct spi_message
*m
)
493 list_add_tail(&t
->transfer_list
, &m
->transfers
);
497 spi_transfer_del(struct spi_transfer
*t
)
499 list_del(&t
->transfer_list
);
502 /* It's fine to embed message and transaction structures in other data
503 * structures so long as you don't free them while they're in use.
506 static inline struct spi_message
*spi_message_alloc(unsigned ntrans
, gfp_t flags
)
508 struct spi_message
*m
;
510 m
= kzalloc(sizeof(struct spi_message
)
511 + ntrans
* sizeof(struct spi_transfer
),
515 struct spi_transfer
*t
= (struct spi_transfer
*)(m
+ 1);
517 INIT_LIST_HEAD(&m
->transfers
);
518 for (i
= 0; i
< ntrans
; i
++, t
++)
519 spi_message_add_tail(t
, m
);
524 static inline void spi_message_free(struct spi_message
*m
)
529 extern int spi_setup(struct spi_device
*spi
);
532 * spi_async - asynchronous SPI transfer
533 * @spi: device with which data will be exchanged
534 * @message: describes the data transfers, including completion callback
535 * Context: any (irqs may be blocked, etc)
537 * This call may be used in_irq and other contexts which can't sleep,
538 * as well as from task contexts which can sleep.
540 * The completion callback is invoked in a context which can't sleep.
541 * Before that invocation, the value of message->status is undefined.
542 * When the callback is issued, message->status holds either zero (to
543 * indicate complete success) or a negative error code. After that
544 * callback returns, the driver which issued the transfer request may
545 * deallocate the associated memory; it's no longer in use by any SPI
546 * core or controller driver code.
548 * Note that although all messages to a spi_device are handled in
549 * FIFO order, messages may go to different devices in other orders.
550 * Some device might be higher priority, or have various "hard" access
551 * time requirements, for example.
553 * On detection of any fault during the transfer, processing of
554 * the entire message is aborted, and the device is deselected.
555 * Until returning from the associated message completion callback,
556 * no other spi_message queued to that device will be processed.
557 * (This rule applies equally to all the synchronous transfer calls,
558 * which are wrappers around this core asynchronous primitive.)
561 spi_async(struct spi_device
*spi
, struct spi_message
*message
)
564 return spi
->master
->transfer(spi
, message
);
567 /*---------------------------------------------------------------------------*/
569 /* All these synchronous SPI transfer routines are utilities layered
570 * over the core async transfer primitive. Here, "synchronous" means
571 * they will sleep uninterruptibly until the async transfer completes.
574 extern int spi_sync(struct spi_device
*spi
, struct spi_message
*message
);
577 * spi_write - SPI synchronous write
578 * @spi: device to which data will be written
580 * @len: data buffer size
583 * This writes the buffer and returns zero or a negative error code.
584 * Callable only from contexts that can sleep.
587 spi_write(struct spi_device
*spi
, const u8
*buf
, size_t len
)
589 struct spi_transfer t
= {
593 struct spi_message m
;
595 spi_message_init(&m
);
596 spi_message_add_tail(&t
, &m
);
597 return spi_sync(spi
, &m
);
601 * spi_read - SPI synchronous read
602 * @spi: device from which data will be read
604 * @len: data buffer size
607 * This reads the buffer and returns zero or a negative error code.
608 * Callable only from contexts that can sleep.
611 spi_read(struct spi_device
*spi
, u8
*buf
, size_t len
)
613 struct spi_transfer t
= {
617 struct spi_message m
;
619 spi_message_init(&m
);
620 spi_message_add_tail(&t
, &m
);
621 return spi_sync(spi
, &m
);
624 /* this copies txbuf and rxbuf data; for small transfers only! */
625 extern int spi_write_then_read(struct spi_device
*spi
,
626 const u8
*txbuf
, unsigned n_tx
,
627 u8
*rxbuf
, unsigned n_rx
);
630 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
631 * @spi: device with which data will be exchanged
632 * @cmd: command to be written before data is read back
635 * This returns the (unsigned) eight bit number returned by the
636 * device, or else a negative error code. Callable only from
637 * contexts that can sleep.
639 static inline ssize_t
spi_w8r8(struct spi_device
*spi
, u8 cmd
)
644 status
= spi_write_then_read(spi
, &cmd
, 1, &result
, 1);
646 /* return negative errno or unsigned value */
647 return (status
< 0) ? status
: result
;
651 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
652 * @spi: device with which data will be exchanged
653 * @cmd: command to be written before data is read back
656 * This returns the (unsigned) sixteen bit number returned by the
657 * device, or else a negative error code. Callable only from
658 * contexts that can sleep.
660 * The number is returned in wire-order, which is at least sometimes
663 static inline ssize_t
spi_w8r16(struct spi_device
*spi
, u8 cmd
)
668 status
= spi_write_then_read(spi
, &cmd
, 1, (u8
*) &result
, 2);
670 /* return negative errno or unsigned value */
671 return (status
< 0) ? status
: result
;
674 /*---------------------------------------------------------------------------*/
677 * INTERFACE between board init code and SPI infrastructure.
679 * No SPI driver ever sees these SPI device table segments, but
680 * it's how the SPI core (or adapters that get hotplugged) grows
681 * the driver model tree.
683 * As a rule, SPI devices can't be probed. Instead, board init code
684 * provides a table listing the devices which are present, with enough
685 * information to bind and set up the device's driver. There's basic
686 * support for nonstatic configurations too; enough to handle adding
687 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
691 * struct spi_board_info - board-specific template for a SPI device
692 * @modalias: Initializes spi_device.modalias; identifies the driver.
693 * @platform_data: Initializes spi_device.platform_data; the particular
694 * data stored there is driver-specific.
695 * @controller_data: Initializes spi_device.controller_data; some
696 * controllers need hints about hardware setup, e.g. for DMA.
697 * @irq: Initializes spi_device.irq; depends on how the board is wired.
698 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
699 * from the chip datasheet and board-specific signal quality issues.
700 * @bus_num: Identifies which spi_master parents the spi_device; unused
701 * by spi_new_device(), and otherwise depends on board wiring.
702 * @chip_select: Initializes spi_device.chip_select; depends on how
703 * the board is wired.
704 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
705 * wiring (some devices support both 3WIRE and standard modes), and
706 * possibly presence of an inverter in the chipselect path.
708 * When adding new SPI devices to the device tree, these structures serve
709 * as a partial device template. They hold information which can't always
710 * be determined by drivers. Information that probe() can establish (such
711 * as the default transfer wordsize) is not included here.
713 * These structures are used in two places. Their primary role is to
714 * be stored in tables of board-specific device descriptors, which are
715 * declared early in board initialization and then used (much later) to
716 * populate a controller's device tree after the that controller's driver
717 * initializes. A secondary (and atypical) role is as a parameter to
718 * spi_new_device() call, which happens after those controller drivers
719 * are active in some dynamic board configuration models.
721 struct spi_board_info
{
722 /* the device name and module name are coupled, like platform_bus;
723 * "modalias" is normally the driver name.
725 * platform_data goes to spi_device.dev.platform_data,
726 * controller_data goes to spi_device.controller_data,
730 const void *platform_data
;
731 void *controller_data
;
734 /* slower signaling on noisy or low voltage boards */
738 /* bus_num is board specific and matches the bus_num of some
739 * spi_master that will probably be registered later.
741 * chip_select reflects how this chip is wired to that master;
742 * it's less than num_chipselect.
747 /* mode becomes spi_device.mode, and is essential for chips
748 * where the default of SPI_CS_HIGH = 0 is wrong.
752 /* ... may need additional spi_device chip config data here.
753 * avoid stuff protocol drivers can set; but include stuff
754 * needed to behave without being bound to a driver:
755 * - quirks like clock rate mattering when not selected
761 spi_register_board_info(struct spi_board_info
const *info
, unsigned n
);
763 /* board init code may ignore whether SPI is configured or not */
765 spi_register_board_info(struct spi_board_info
const *info
, unsigned n
)
770 /* If you're hotplugging an adapter with devices (parport, usb, etc)
771 * use spi_new_device() to describe each device. You can also call
772 * spi_unregister_device() to start making that device vanish, but
773 * normally that would be handled by spi_unregister_master().
775 * You can also use spi_alloc_device() and spi_add_device() to use a two
776 * stage registration sequence for each spi_device. This gives the caller
777 * some more control over the spi_device structure before it is registered,
778 * but requires that caller to initialize fields that would otherwise
779 * be defined using the board info.
781 extern struct spi_device
*
782 spi_alloc_device(struct spi_master
*master
);
785 spi_add_device(struct spi_device
*spi
);
787 extern struct spi_device
*
788 spi_new_device(struct spi_master
*, struct spi_board_info
*);
791 spi_unregister_device(struct spi_device
*spi
)
794 device_unregister(&spi
->dev
);
797 #endif /* __LINUX_SPI_H */
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