include/linux/ssb/ssb.h

   1 #ifndef LINUX_SSB_H_
   2 #define LINUX_SSB_H_
   3
   4 #include <linux/device.h>
   5 #include <linux/list.h>
   6 #include <linux/types.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/pci.h>
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/dma-mapping.h>
  11
  12 #include <linux/ssb/ssb_regs.h>
  13
  14
  15 struct pcmcia_device;
  16 struct ssb_bus;
  17 struct ssb_driver;
  18
  19 struct ssb_sprom_core_pwr_info {
  20         u8 itssi_2g, itssi_5g;
  21         u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
  22         u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
  23 };
  24
  25 struct ssb_sprom {
  26         u8 revision;
  27         u8 il0mac[6];           /* MAC address for 802.11b/g */
  28         u8 et0mac[6];           /* MAC address for Ethernet */
  29         u8 et1mac[6];           /* MAC address for 802.11a */
  30         u8 et0phyaddr;          /* MII address for enet0 */
  31         u8 et1phyaddr;          /* MII address for enet1 */
  32         u8 et0mdcport;          /* MDIO for enet0 */
  33         u8 et1mdcport;          /* MDIO for enet1 */
  34         u16 board_rev;          /* Board revision number from SPROM. */
  35         u8 country_code;        /* Country Code */
  36         u16 leddc_on_time;      /* LED Powersave Duty Cycle On Count */
  37         u16 leddc_off_time;     /* LED Powersave Duty Cycle Off Count */
  38         u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  39         u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  40         u16 pa0b0;
  41         u16 pa0b1;
  42         u16 pa0b2;
  43         u16 pa1b0;
  44         u16 pa1b1;
  45         u16 pa1b2;
  46         u16 pa1lob0;
  47         u16 pa1lob1;
  48         u16 pa1lob2;
  49         u16 pa1hib0;
  50         u16 pa1hib1;
  51         u16 pa1hib2;
  52         u8 gpio0;               /* GPIO pin 0 */
  53         u8 gpio1;               /* GPIO pin 1 */
  54         u8 gpio2;               /* GPIO pin 2 */
  55         u8 gpio3;               /* GPIO pin 3 */
  56         u16 maxpwr_bg;          /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  57         u16 maxpwr_al;          /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  58         u16 maxpwr_a;           /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  59         u16 maxpwr_ah;          /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  60         u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  61         u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  62         u8 tri2g;               /* 2.4GHz TX isolation */
  63         u8 tri5gl;              /* 5.2GHz TX isolation */
  64         u8 tri5g;               /* 5.3GHz TX isolation */
  65         u8 tri5gh;              /* 5.8GHz TX isolation */
  66         u8 txpid2g[4];          /* 2GHz TX power index */
  67         u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
  68         u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
  69         u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
  70         u8 rxpo2g;              /* 2GHz RX power offset */
  71         u8 rxpo5g;              /* 5GHz RX power offset */
  72         u8 rssisav2g;           /* 2GHz RSSI params */
  73         u8 rssismc2g;
  74         u8 rssismf2g;
  75         u8 bxa2g;               /* 2GHz BX arch */
  76         u8 rssisav5g;           /* 5GHz RSSI params */
  77         u8 rssismc5g;
  78         u8 rssismf5g;
  79         u8 bxa5g;               /* 5GHz BX arch */
  80         u16 cck2gpo;            /* CCK power offset */
  81         u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  82         u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  83         u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  84         u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  85         u16 boardflags_lo;      /* Board flags (bits 0-15) */
  86         u16 boardflags_hi;      /* Board flags (bits 16-31) */
  87         u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  88         u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  89         /* TODO store board flags in a single u64 */
  90
  91         struct ssb_sprom_core_pwr_info core_pwr_info[4];
  92
  93         /* Antenna gain values for up to 4 antennas
  94          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  95          * loss in the connectors is bigger than the gain. */
  96         struct {
  97                 struct {
  98                         s8 a0, a1, a2, a3;
  99                 } ghz24;        /* 2.4GHz band */
 100                 struct {
 101                         s8 a0, a1, a2, a3;
 102                 } ghz5;         /* 5GHz band */
 103         } antenna_gain;
 104
 105         struct {
 106                 struct {
 107                         u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 108                 } ghz2;
 109                 struct {
 110                         u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 111                 } ghz5;
 112         } fem;
 113
 114         /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 115 };
 116
 117 /* Information about the PCB the circuitry is soldered on. */
 118 struct ssb_boardinfo {
 119         u16 vendor;
 120         u16 type;
 121         u8  rev;
 122 };
 123
 124
 125 struct ssb_device;
 126 /* Lowlevel read/write operations on the device MMIO.
 127  * Internal, don't use that outside of ssb. */
 128 struct ssb_bus_ops {
 129         u8 (*read8)(struct ssb_device *dev, u16 offset);
 130         u16 (*read16)(struct ssb_device *dev, u16 offset);
 131         u32 (*read32)(struct ssb_device *dev, u16 offset);
 132         void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 133         void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 134         void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 135 #ifdef CONFIG_SSB_BLOCKIO
 136         void (*block_read)(struct ssb_device *dev, void *buffer,
 137                            size_t count, u16 offset, u8 reg_width);
 138         void (*block_write)(struct ssb_device *dev, const void *buffer,
 139                             size_t count, u16 offset, u8 reg_width);
 140 #endif
 141 };
 142
 143
 144 /* Core-ID values. */
 145 #define SSB_DEV_CHIPCOMMON      0x800
 146 #define SSB_DEV_ILINE20         0x801
 147 #define SSB_DEV_SDRAM           0x803
 148 #define SSB_DEV_PCI             0x804
 149 #define SSB_DEV_MIPS            0x805
 150 #define SSB_DEV_ETHERNET        0x806
 151 #define SSB_DEV_V90             0x807
 152 #define SSB_DEV_USB11_HOSTDEV   0x808
 153 #define SSB_DEV_ADSL            0x809
 154 #define SSB_DEV_ILINE100        0x80A
 155 #define SSB_DEV_IPSEC           0x80B
 156 #define SSB_DEV_PCMCIA          0x80D
 157 #define SSB_DEV_INTERNAL_MEM    0x80E
 158 #define SSB_DEV_MEMC_SDRAM      0x80F
 159 #define SSB_DEV_EXTIF           0x811
 160 #define SSB_DEV_80211           0x812
 161 #define SSB_DEV_MIPS_3302       0x816
 162 #define SSB_DEV_USB11_HOST      0x817
 163 #define SSB_DEV_USB11_DEV       0x818
 164 #define SSB_DEV_USB20_HOST      0x819
 165 #define SSB_DEV_USB20_DEV       0x81A
 166 #define SSB_DEV_SDIO_HOST       0x81B
 167 #define SSB_DEV_ROBOSWITCH      0x81C
 168 #define SSB_DEV_PARA_ATA        0x81D
 169 #define SSB_DEV_SATA_XORDMA     0x81E
 170 #define SSB_DEV_ETHERNET_GBIT   0x81F
 171 #define SSB_DEV_PCIE            0x820
 172 #define SSB_DEV_MIMO_PHY        0x821
 173 #define SSB_DEV_SRAM_CTRLR      0x822
 174 #define SSB_DEV_MINI_MACPHY     0x823
 175 #define SSB_DEV_ARM_1176        0x824
 176 #define SSB_DEV_ARM_7TDMI       0x825
 177
 178 /* Vendor-ID values */
 179 #define SSB_VENDOR_BROADCOM     0x4243
 180
 181 /* Some kernel subsystems poke with dev->drvdata, so we must use the
 182  * following ugly workaround to get from struct device to struct ssb_device */
 183 struct __ssb_dev_wrapper {
 184         struct device dev;
 185         struct ssb_device *sdev;
 186 };
 187
 188 struct ssb_device {
 189         /* Having a copy of the ops pointer in each dev struct
 190          * is an optimization. */
 191         const struct ssb_bus_ops *ops;
 192
 193         struct device *dev, *dma_dev;
 194
 195         struct ssb_bus *bus;
 196         struct ssb_device_id id;
 197
 198         u8 core_index;
 199         unsigned int irq;
 200
 201         /* Internal-only stuff follows. */
 202         void *drvdata;          /* Per-device data */
 203         void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 204 };
 205
 206 /* Go from struct device to struct ssb_device. */
 207 static inline
 208 struct ssb_device * dev_to_ssb_dev(struct device *dev)
 209 {
 210         struct __ssb_dev_wrapper *wrap;
 211         wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 212         return wrap->sdev;
 213 }
 214
 215 /* Device specific user data */
 216 static inline
 217 void ssb_set_drvdata(struct ssb_device *dev, void *data)
 218 {
 219         dev->drvdata = data;
 220 }
 221 static inline
 222 void * ssb_get_drvdata(struct ssb_device *dev)
 223 {
 224         return dev->drvdata;
 225 }
 226
 227 /* Devicetype specific user data. This is per device-type (not per device) */
 228 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 229 static inline
 230 void * ssb_get_devtypedata(struct ssb_device *dev)
 231 {
 232         return dev->devtypedata;
 233 }
 234
 235
 236 struct ssb_driver {
 237         const char *name;
 238         const struct ssb_device_id *id_table;
 239
 240         int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 241         void (*remove)(struct ssb_device *dev);
 242         int (*suspend)(struct ssb_device *dev, pm_message_t state);
 243         int (*resume)(struct ssb_device *dev);
 244         void (*shutdown)(struct ssb_device *dev);
 245
 246         struct device_driver drv;
 247 };
 248 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 249
 250 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 251 #define ssb_driver_register(drv) \
 252         __ssb_driver_register(drv, THIS_MODULE)
 253
 254 extern void ssb_driver_unregister(struct ssb_driver *drv);
 255
 256
 257
 258
 259 enum ssb_bustype {
 260         SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 261         SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 262         SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 263         SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 264 };
 265
 266 /* board_vendor */
 267 #define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 268 #define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 269 #define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 270 /* board_type */
 271 #define SSB_BOARD_BCM94306MP    0x0418
 272 #define SSB_BOARD_BCM4309G      0x0421
 273 #define SSB_BOARD_BCM4306CB     0x0417
 274 #define SSB_BOARD_BCM4309MP     0x040C
 275 #define SSB_BOARD_MP4318        0x044A
 276 #define SSB_BOARD_BU4306        0x0416
 277 #define SSB_BOARD_BU4309        0x040A
 278 /* chip_package */
 279 #define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 280 #define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 281 #define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 282
 283 #include <linux/ssb/ssb_driver_chipcommon.h>
 284 #include <linux/ssb/ssb_driver_mips.h>
 285 #include <linux/ssb/ssb_driver_extif.h>
 286 #include <linux/ssb/ssb_driver_pci.h>
 287
 288 struct ssb_bus {
 289         /* The MMIO area. */
 290         void __iomem *mmio;
 291
 292         const struct ssb_bus_ops *ops;
 293
 294         /* The core currently mapped into the MMIO window.
 295          * Not valid on all host-buses. So don't use outside of SSB. */
 296         struct ssb_device *mapped_device;
 297         union {
 298                 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 299                 u8 mapped_pcmcia_seg;
 300                 /* Current SSB base address window for SDIO. */
 301                 u32 sdio_sbaddr;
 302         };
 303         /* Lock for core and segment switching.
 304          * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 305         spinlock_t bar_lock;
 306
 307         /* The host-bus this backplane is running on. */
 308         enum ssb_bustype bustype;
 309         /* Pointers to the host-bus. Check bustype before using any of these pointers. */
 310         union {
 311                 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 312                 struct pci_dev *host_pci;
 313                 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 314                 struct pcmcia_device *host_pcmcia;
 315                 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 316                 struct sdio_func *host_sdio;
 317         };
 318
 319         /* See enum ssb_quirks */
 320         unsigned int quirks;
 321
 322 #ifdef CONFIG_SSB_SPROM
 323         /* Mutex to protect the SPROM writing. */
 324         struct mutex sprom_mutex;
 325 #endif
 326
 327         /* ID information about the Chip. */
 328         u16 chip_id;
 329         u8 chip_rev;
 330         u16 sprom_offset;
 331         u16 sprom_size;         /* number of words in sprom */
 332         u8 chip_package;
 333
 334         /* List of devices (cores) on the backplane. */
 335         struct ssb_device devices[SSB_MAX_NR_CORES];
 336         u8 nr_devices;
 337
 338         /* Software ID number for this bus. */
 339         unsigned int busnumber;
 340
 341         /* The ChipCommon device (if available). */
 342         struct ssb_chipcommon chipco;
 343         /* The PCI-core device (if available). */
 344         struct ssb_pcicore pcicore;
 345         /* The MIPS-core device (if available). */
 346         struct ssb_mipscore mipscore;
 347         /* The EXTif-core device (if available). */
 348         struct ssb_extif extif;
 349
 350         /* The following structure elements are not available in early
 351          * SSB initialization. Though, they are available for regular
 352          * registered drivers at any stage. So be careful when
 353          * using them in the ssb core code. */
 354
 355         /* ID information about the PCB. */
 356         struct ssb_boardinfo boardinfo;
 357         /* Contents of the SPROM. */
 358         struct ssb_sprom sprom;
 359         /* If the board has a cardbus slot, this is set to true. */
 360         bool has_cardbus_slot;
 361
 362 #ifdef CONFIG_SSB_EMBEDDED
 363         /* Lock for GPIO register access. */
 364         spinlock_t gpio_lock;
 365 #endif /* EMBEDDED */
 366
 367         /* Internal-only stuff follows. Do not touch. */
 368         struct list_head list;
 369 #ifdef CONFIG_SSB_DEBUG
 370         /* Is the bus already powered up? */
 371         bool powered_up;
 372         int power_warn_count;
 373 #endif /* DEBUG */
 374 };
 375
 376 enum ssb_quirks {
 377         /* SDIO connected card requires performing a read after writing a 32-bit value */
 378         SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 379 };
 380
 381 /* The initialization-invariants. */
 382 struct ssb_init_invariants {
 383         /* Versioning information about the PCB. */
 384         struct ssb_boardinfo boardinfo;
 385         /* The SPROM information. That's either stored in an
 386          * EEPROM or NVRAM on the board. */
 387         struct ssb_sprom sprom;
 388         /* If the board has a cardbus slot, this is set to true. */
 389         bool has_cardbus_slot;
 390 };
 391 /* Type of function to fetch the invariants. */
 392 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 393                                      struct ssb_init_invariants *iv);
 394
 395 /* Register a SSB system bus. get_invariants() is called after the
 396  * basic system devices are initialized.
 397  * The invariants are usually fetched from some NVRAM.
 398  * Put the invariants into the struct pointed to by iv. */
 399 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 400                                    unsigned long baseaddr,
 401                                    ssb_invariants_func_t get_invariants);
 402 #ifdef CONFIG_SSB_PCIHOST
 403 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 404                                    struct pci_dev *host_pci);
 405 #endif /* CONFIG_SSB_PCIHOST */
 406 #ifdef CONFIG_SSB_PCMCIAHOST
 407 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 408                                       struct pcmcia_device *pcmcia_dev,
 409                                       unsigned long baseaddr);
 410 #endif /* CONFIG_SSB_PCMCIAHOST */
 411 #ifdef CONFIG_SSB_SDIOHOST
 412 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 413                                     struct sdio_func *sdio_func,
 414                                     unsigned int quirks);
 415 #endif /* CONFIG_SSB_SDIOHOST */
 416
 417
 418 extern void ssb_bus_unregister(struct ssb_bus *bus);
 419
 420 /* Does the device have an SPROM? */
 421 extern bool ssb_is_sprom_available(struct ssb_bus *bus);
 422
 423 /* Set a fallback SPROM.
 424  * See kdoc at the function definition for complete documentation. */
 425 extern int ssb_arch_register_fallback_sprom(
 426                 int (*sprom_callback)(struct ssb_bus *bus,
 427                 struct ssb_sprom *out));
 428
 429 /* Suspend a SSB bus.
 430  * Call this from the parent bus suspend routine. */
 431 extern int ssb_bus_suspend(struct ssb_bus *bus);
 432 /* Resume a SSB bus.
 433  * Call this from the parent bus resume routine. */
 434 extern int ssb_bus_resume(struct ssb_bus *bus);
 435
 436 extern u32 ssb_clockspeed(struct ssb_bus *bus);
 437
 438 /* Is the device enabled in hardware? */
 439 int ssb_device_is_enabled(struct ssb_device *dev);
 440 /* Enable a device and pass device-specific SSB_TMSLOW flags.
 441  * If no device-specific flags are available, use 0. */
 442 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 443 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 444 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 445
 446
 447 /* Device MMIO register read/write functions. */
 448 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 449 {
 450         return dev->ops->read8(dev, offset);
 451 }
 452 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 453 {
 454         return dev->ops->read16(dev, offset);
 455 }
 456 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 457 {
 458         return dev->ops->read32(dev, offset);
 459 }
 460 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 461 {
 462         dev->ops->write8(dev, offset, value);
 463 }
 464 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 465 {
 466         dev->ops->write16(dev, offset, value);
 467 }
 468 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 469 {
 470         dev->ops->write32(dev, offset, value);
 471 }
 472 #ifdef CONFIG_SSB_BLOCKIO
 473 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 474                                   size_t count, u16 offset, u8 reg_width)
 475 {
 476         dev->ops->block_read(dev, buffer, count, offset, reg_width);
 477 }
 478
 479 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 480                                    size_t count, u16 offset, u8 reg_width)
 481 {
 482         dev->ops->block_write(dev, buffer, count, offset, reg_width);
 483 }
 484 #endif /* CONFIG_SSB_BLOCKIO */
 485
 486
 487 /* The SSB DMA API. Use this API for any DMA operation on the device.
 488  * This API basically is a wrapper that calls the correct DMA API for
 489  * the host device type the SSB device is attached to. */
 490
 491 /* Translation (routing) bits that need to be ORed to DMA
 492  * addresses before they are given to a device. */
 493 extern u32 ssb_dma_translation(struct ssb_device *dev);
 494 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 495 #define SSB_DMA_TRANSLATION_SHIFT       30
 496
 497 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 498 {
 499 #ifdef CONFIG_SSB_DEBUG
 500         printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 501                "unsupported bustype %d\n", dev->bus->bustype);
 502 #endif /* DEBUG */
 503 }
 504
 505 #ifdef CONFIG_SSB_PCIHOST
 506 /* PCI-host wrapper driver */
 507 extern int ssb_pcihost_register(struct pci_driver *driver);
 508 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 509 {
 510         pci_unregister_driver(driver);
 511 }
 512
 513 static inline
 514 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 515 {
 516         if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 517                 pci_set_power_state(sdev->bus->host_pci, state);
 518 }
 519 #else
 520 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 521 {
 522 }
 523
 524 static inline
 525 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 526 {
 527 }
 528 #endif /* CONFIG_SSB_PCIHOST */
 529
 530
 531 /* If a driver is shutdown or suspended, call this to signal
 532  * that the bus may be completely powered down. SSB will decide,
 533  * if it's really time to power down the bus, based on if there
 534  * are other devices that want to run. */
 535 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 536 /* Before initializing and enabling a device, call this to power-up the bus.
 537  * If you want to allow use of dynamic-power-control, pass the flag.
 538  * Otherwise static always-on powercontrol will be used. */
 539 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 540
 541 extern void ssb_commit_settings(struct ssb_bus *bus);
 542
 543 /* Various helper functions */
 544 extern u32 ssb_admatch_base(u32 adm);
 545 extern u32 ssb_admatch_size(u32 adm);
 546
 547 /* PCI device mapping and fixup routines.
 548  * Called from the architecture pcibios init code.
 549  * These are only available on SSB_EMBEDDED configurations. */
 550 #ifdef CONFIG_SSB_EMBEDDED
 551 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 552 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 553 #endif /* CONFIG_SSB_EMBEDDED */
 554
 555 #endif /* LINUX_SSB_H_ */