7 /* Terminator for register set */
9 #define VGA_REGSET_END_VAL 0xFF
10 #define VGA_REGSET_END {VGA_REGSET_END_VAL, 0, 0}
18 /* ------------------------------------------------------------------------- */
20 #define SVGA_FORMAT_END_VAL 0xFFFF
21 #define SVGA_FORMAT_END {SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
23 struct svga_fb_format
{
26 struct fb_bitfield red
;
27 struct fb_bitfield green
;
28 struct fb_bitfield blue
;
29 struct fb_bitfield transp
;
39 struct svga_timing_regs
{
40 const struct vga_regset
*h_total_regs
;
41 const struct vga_regset
*h_display_regs
;
42 const struct vga_regset
*h_blank_start_regs
;
43 const struct vga_regset
*h_blank_end_regs
;
44 const struct vga_regset
*h_sync_start_regs
;
45 const struct vga_regset
*h_sync_end_regs
;
47 const struct vga_regset
*v_total_regs
;
48 const struct vga_regset
*v_display_regs
;
49 const struct vga_regset
*v_blank_start_regs
;
50 const struct vga_regset
*v_blank_end_regs
;
51 const struct vga_regset
*v_sync_start_regs
;
52 const struct vga_regset
*v_sync_end_regs
;
61 u16 r_max
; /* r_max < 32 */
68 /* Write a value to the attribute register */
70 static inline void svga_wattr(void __iomem
*regbase
, u8 index
, u8 data
)
72 vga_r(regbase
, VGA_IS1_RC
);
73 vga_w(regbase
, VGA_ATT_IW
, index
);
74 vga_w(regbase
, VGA_ATT_W
, data
);
77 /* Write a value to a sequence register with a mask */
79 static inline void svga_wseq_mask(void __iomem
*regbase
, u8 index
, u8 data
, u8 mask
)
81 vga_wseq(regbase
, index
, (data
& mask
) | (vga_rseq(regbase
, index
) & ~mask
));
84 /* Write a value to a CRT register with a mask */
86 static inline void svga_wcrt_mask(void __iomem
*regbase
, u8 index
, u8 data
, u8 mask
)
88 vga_wcrt(regbase
, index
, (data
& mask
) | (vga_rcrt(regbase
, index
) & ~mask
));
91 static inline int svga_primary_device(struct pci_dev
*dev
)
94 pci_read_config_word(dev
, PCI_COMMAND
, &flags
);
95 return (flags
& PCI_COMMAND_IO
);
99 void svga_wcrt_multi(void __iomem
*regbase
, const struct vga_regset
*regset
, u32 value
);
100 void svga_wseq_multi(void __iomem
*regbase
, const struct vga_regset
*regset
, u32 value
);
102 void svga_set_default_gfx_regs(void __iomem
*regbase
);
103 void svga_set_default_atc_regs(void __iomem
*regbase
);
104 void svga_set_default_seq_regs(void __iomem
*regbase
);
105 void svga_set_default_crt_regs(void __iomem
*regbase
);
106 void svga_set_textmode_vga_regs(void __iomem
*regbase
);
108 void svga_settile(struct fb_info
*info
, struct fb_tilemap
*map
);
109 void svga_tilecopy(struct fb_info
*info
, struct fb_tilearea
*area
);
110 void svga_tilefill(struct fb_info
*info
, struct fb_tilerect
*rect
);
111 void svga_tileblit(struct fb_info
*info
, struct fb_tileblit
*blit
);
112 void svga_tilecursor(void __iomem
*regbase
, struct fb_info
*info
, struct fb_tilecursor
*cursor
);
113 int svga_get_tilemax(struct fb_info
*info
);
114 void svga_get_caps(struct fb_info
*info
, struct fb_blit_caps
*caps
,
115 struct fb_var_screeninfo
*var
);
117 int svga_compute_pll(const struct svga_pll
*pll
, u32 f_wanted
, u16
*m
, u16
*n
, u16
*r
, int node
);
118 int svga_check_timings(const struct svga_timing_regs
*tm
, struct fb_var_screeninfo
*var
, int node
);
119 void svga_set_timings(void __iomem
*regbase
, const struct svga_timing_regs
*tm
, struct fb_var_screeninfo
*var
, u32 hmul
, u32 hdiv
, u32 vmul
, u32 vdiv
, u32 hborder
, int node
);
121 int svga_match_format(const struct svga_fb_format
*frm
, struct fb_var_screeninfo
*var
, struct fb_fix_screeninfo
*fix
);
123 #endif /* _LINUX_SVGA_H */
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