include/linux/usb/msm_hsusb.h

   1 /* linux/include/asm-arm/arch-msm/hsusb.h
   2  *
   3  * Copyright (C) 2008 Google, Inc.
   4  * Author: Brian Swetland <swetland@google.com>
   5  * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
   6  *
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #ifndef __ASM_ARCH_MSM_HSUSB_H
  19 #define __ASM_ARCH_MSM_HSUSB_H
  20
  21 #include <linux/types.h>
  22 #include <linux/usb/otg.h>
  23
  24 /**
  25  * Supported USB modes
  26  *
  27  * USB_PERIPHERAL       Only peripheral mode is supported.
  28  * USB_HOST             Only host mode is supported.
  29  * USB_OTG              OTG mode is supported.
  30  *
  31  */
  32 enum usb_mode_type {
  33         USB_NONE = 0,
  34         USB_PERIPHERAL,
  35         USB_HOST,
  36         USB_OTG,
  37 };
  38
  39 /**
  40  * OTG control
  41  *
  42  * OTG_NO_CONTROL       Id/VBUS notifications not required. Useful in host
  43  *                      only configuration.
  44  * OTG_PHY_CONTROL      Id/VBUS notifications comes form USB PHY.
  45  * OTG_PMIC_CONTROL     Id/VBUS notifications comes from PMIC hardware.
  46  * OTG_USER_CONTROL     Id/VBUS notifcations comes from User via sysfs.
  47  *
  48  */
  49 enum otg_control_type {
  50         OTG_NO_CONTROL = 0,
  51         OTG_PHY_CONTROL,
  52         OTG_PMIC_CONTROL,
  53         OTG_USER_CONTROL,
  54 };
  55
  56 /**
  57  * struct msm_otg_platform_data - platform device data
  58  *              for msm_otg driver.
  59  * @phy_init_seq: PHY configuration sequence. val, reg pairs
  60  *              terminated by -1.
  61  * @vbus_power: VBUS power on/off routine.
  62  * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
  63  * @mode: Supported mode (OTG/peripheral/host).
  64  * @otg_control: OTG switch controlled by user/Id pin
  65  * @default_mode: Default operational mode. Applicable only if
  66  *              OTG switch is controller by user.
  67  *
  68  */
  69 struct msm_otg_platform_data {
  70         int *phy_init_seq;
  71         void (*vbus_power)(bool on);
  72         unsigned power_budget;
  73         enum usb_mode_type mode;
  74         enum otg_control_type otg_control;
  75         enum usb_mode_type default_mode;
  76         void (*setup_gpio)(enum usb_otg_state state);
  77 };
  78
  79 /**
  80  * struct msm_otg: OTG driver data. Shared by HCD and DCD.
  81  * @otg: USB OTG Transceiver structure.
  82  * @pdata: otg device platform data.
  83  * @irq: IRQ number assigned for HSUSB controller.
  84  * @clk: clock struct of usb_hs_clk.
  85  * @pclk: clock struct of usb_hs_pclk.
  86  * @phy_reset_clk: clock struct of usb_phy_clk.
  87  * @core_clk: clock struct of usb_hs_core_clk.
  88  * @regs: ioremapped register base address.
  89  * @inputs: OTG state machine inputs(Id, SessValid etc).
  90  * @sm_work: OTG state machine work.
  91  * @in_lpm: indicates low power mode (LPM) state.
  92  * @async_int: Async interrupt arrived.
  93  *
  94  */
  95 struct msm_otg {
  96         struct otg_transceiver otg;
  97         struct msm_otg_platform_data *pdata;
  98         int irq;
  99         struct clk *clk;
 100         struct clk *pclk;
 101         struct clk *phy_reset_clk;
 102         struct clk *core_clk;
 103         void __iomem *regs;
 104 #define ID              0
 105 #define B_SESS_VLD      1
 106         unsigned long inputs;
 107         struct work_struct sm_work;
 108         atomic_t in_lpm;
 109         int async_int;
 110 };
 111
 112 #endif