2 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
4 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
5 be the destination register.
7 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
9 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
10 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
11 (TIC80_VECTOR): Define a flag bit for the flags. This one means
12 that the opcode can have two vector instructions in a single
13 32 bit word and we have to encode/decode both.
15 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
17 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
18 TIC80_OPERAND_RELATIVE for PC relative.
19 (TIC80_OPERAND_BASEREL): New flag bit for register
22 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
24 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
26 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
28 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
29 ":s" modifier for scaling.
31 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
33 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
34 (TIC80_OPERAND_M_LI): Ditto
36 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
38 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
39 (TIC80_OPERAND_CC): New define for condition code operand.
40 (TIC80_OPERAND_CR): New define for control register operand.
42 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
44 * tic80.h (struct tic80_opcode): Name changed.
45 (struct tic80_opcode): Remove format field.
46 (struct tic80_operand): Add insertion and extraction functions.
47 (TIC80_OPERAND_*): Remove old bogus values, start adding new
53 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
55 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
56 type IV instruction offsets.
60 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
65 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
67 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
69 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
71 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
72 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
74 * v850.h: Fix comment, v850_operand not powerpc_operand.
77 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
79 * mn10200.h: Flesh out structures and definitions needed by
80 the mn10200 assembler & disassembler.
82 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
84 * mips.h: Add mips16 definitions.
86 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
88 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
90 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
92 * mn10300.h (MN10300_OPERAND_PCREL): Define.
93 (MN10300_OPERAND_MEMADDR): Define.
95 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
97 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
99 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
101 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
103 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
105 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
107 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
109 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
111 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
113 * alpha.h: Don't include "bfd.h"; private relocation types are now
114 negative to minimize problems with shared libraries. Organize
115 instruction subsets by AMASK extensions and PALcode
117 (struct alpha_operand): Move flags slot for better packing.
120 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
122 * v850.h (V850_OPERAND_RELAX): New operand flag.
125 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
127 * mn10300.h (FMT_*): Move operand format definitions
130 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
132 * mn10300.h (MN10300_OPERAND_PAREN): Define.
134 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
136 * mn10300.h (mn10300_opcode): Add "format" field.
137 (MN10300_OPERAND_*): Define.
139 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
142 * mn10200.h, mn10300.h: New files.
144 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
146 * mn10x00.h: New file.
149 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
151 * v850.h: Add new flag to indicate this instruction uses a PC
155 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
157 * h8300.h (stmac): Add missing instruction.
160 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
162 * v850.h (v850_opcode): Remove "size" field. Add "memop"
165 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
167 * v850.h (V850_OPERAND_EP): Define.
169 * v850.h (v850_opcode): Add size field.
171 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
173 * v850.h (v850_operands): Add insert and extract fields, pointers
174 to functions used to handle unusual operand encoding.
175 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
176 V850_OPERAND_SIGNED): Defined.
178 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
180 * v850.h (v850_operands): Add flags field.
181 (OPERAND_REG, OPERAND_NUM): Defined.
183 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
188 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
190 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
191 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
192 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
193 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
194 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
197 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
199 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
200 a 3 bit space id instead of a 2 bit space id.
203 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
205 * d10v.h: Add some additional defines to support the
206 assembler in determining which operations can be done in parallel.
209 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
211 * h8300.h (SN): Define.
212 (eepmov.b): Renamed from "eepmov"
213 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
217 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
219 * d10v.h (OPERAND_SHIFT): New operand flag.
221 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
223 * d10v.h: Changes for divs, parallel-only instructions, and
226 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
228 * d10v.h (pd_reg): Define. Putting the definition here allows
229 the assembler and disassembler to share the same struct.
232 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
234 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
235 Williams <steve@icarus.com>.
238 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
243 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
245 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
247 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
249 * m68k.h (mcf5200): New macro.
250 Document names of coldfire control registers.
252 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
254 * h8300.h (SRC_IN_DST): Define.
256 * h8300.h (UNOP3): Mark the register operand in this insn
257 as a source operand, not a destination operand.
258 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
259 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
260 register operand with SRC_IN_DST.
262 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
266 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
268 * rs6k.h: Remove obsolete file.
270 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
272 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
273 fdivp, and fdivrp. Add ffreep.
275 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
277 * h8300.h: Reorder various #defines for readability.
278 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
279 (BITOP): Accept additional (unused) argument. All callers changed.
282 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
284 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
285 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
286 (BITOP, EBITOP): Handle new H8/S addressing modes for
288 (UNOP3): Handle new shift/rotate insns on the H8/S.
289 (insns using exr): New instructions.
290 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
292 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
294 * h8300.h (add.l): Undo Apr 5th change. The manual I had
297 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
299 * h8300.h (START): Remove.
300 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
301 and mov.l insns that can be relaxed.
303 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
305 * i386.h: Remove Abs32 from lcall.
307 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
309 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
311 Mark X,Y opcode letters as in use.
313 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
315 * sparc.h (F_FLOAT, F_FBR): Define.
317 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
319 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
321 (ABS8SRC,ABS8DST): Add ABS8MEM.
322 (add.l): Fix reg+reg variant.
323 (eepmov.w): Renamed from eepmovw.
324 (ldc,stc): Fix many cases.
326 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
328 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
330 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
332 * sparc.h (O): Mark operand letter as in use.
334 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
336 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
337 Mark operand letters uU as in use.
339 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
341 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
342 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
343 (SPARC_OPCODE_SUPPORTED): New macro.
344 (SPARC_OPCODE_CONFLICT_P): Rewrite.
347 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
349 * sparc.h (sparc_opcode_lookup_arch) Make return type in
350 declaration consistent with return type in definition.
352 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
354 * i386.h (i386_optab): Remove Data32 from pushf and popf.
356 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
358 * i386.h (i386_regtab): Add 80486 test registers.
360 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
362 * i960.h (I_HX): Define.
363 (i960_opcodes): Add HX instruction.
365 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
367 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
370 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
372 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
373 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
374 (bfd_* defines): Delete.
375 (sparc_opcode_archs): Replaces architecture_pname.
376 (sparc_opcode_lookup_arch): Declare.
377 (NUMOPCODES): Delete.
379 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
381 * sparc.h (enum sparc_architecture): Add v9a.
382 (ARCHITECTURES_CONFLICT_P): Update.
384 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
386 * i386.h: Added Pentium Pro instructions.
388 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
390 * m68k.h: Document new 'W' operand place.
392 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
394 * hppa.h: Add lci and syncdma instructions.
396 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
398 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
401 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
403 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
404 assembler's -mcom and -many switches.
406 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
408 * i386.h: Fix cmpxchg8b extension opcode description.
410 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
412 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
415 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
417 * m68k.h: Change comment: split type P into types 0, 1 and 2.
419 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
421 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
423 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
425 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
427 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
431 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
432 declarations. Remove F_ALIAS and flag field of struct
433 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
434 int. Make name and args fields of struct m68k_opcode const.
436 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
438 * sparc.h (F_NOTV9): Define.
440 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
442 * mips.h (INSN_4010): Define.
444 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
446 * m68k.h (TBL1): Reverse sense of "round" argument in result.
448 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
449 * m68k.h: Fix argument descriptions of coprocessor
450 instructions to allow only alterable operands where appropriate.
451 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
452 (m68k_opcode_aliases): Add more aliases.
455 Sat Apr 29 23:17:03 1995 Doug Evans <dje@chestnut.cygnus.com>
457 * arc.h (struct arc_opcode): New flag value ARC_OPCODE_COND_BRANCH.
458 (ARC_DELAY_{NONE,NORMAL,JUMP): Define delay slot types.
461 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
463 * m68k.h: Added explcitly short-sized conditional branches, and a
464 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
465 svr4-based configurations.
468 Wed Apr 12 08:54:32 1995 Doug Evans <dje@canuck.cygnus.com>
470 * arc.h (struct arc_opcode): New members next_asm, next_dis.
471 (ARC_HASH_OPCODE, ARC_HASH_ICODE): Define.
472 (ARC_OPCODE_NEXT_ASM, ARC_OPCODE_NEXT_DIS): Define.
473 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): Add prototypes.
475 Thu Apr 6 20:36:55 1995 Doug Evans <dje@chestnut.cygnus.com>
477 * arc.h (arc_get_opcode_mach): Define prototype.
480 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
482 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
483 * i386.h: added missing Data16/Data32 flags to a few instructions.
485 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
487 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
488 (OP_MASK_BCC, OP_SH_BCC): Define.
489 (OP_MASK_PREFX, OP_SH_PREFX): Define.
490 (OP_MASK_CCC, OP_SH_CCC): Define.
491 (INSN_READ_FPR_R): Define.
494 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
496 * m68k.h (enum m68k_architecture): Deleted.
497 (struct m68k_opcode_alias): New type.
498 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
499 matching constraints, values and flags. As a side effect of this,
500 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
501 as I know were never used, now may need re-examining.
502 (numopcodes): Now const.
503 (m68k_opcode_aliases, numaliases): New variables.
505 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
506 m68k_opcode_aliases; update declaration of m68k_opcodes.
509 Tue Mar 7 21:03:26 1995 Doug Evans <dje@chestnut.cygnus.com>
511 * arc.h (ARC_MACH_BIG): Define.
512 (ARC_MACH_MASK): Update.
513 (ARC_MACH_CPU_MASK): Define.
514 (ARC_OPCODE_CPU, ARC_OPVAL_CPU, ARC_HAVE_CPU): Likewise.
517 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
519 * hppa.h (delay_type): Delete unused enumeration.
520 (pa_opcode): Replace unused delayed field with an architecture
522 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
524 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
526 * mips.h (INSN_ISA4): Define.
528 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
530 * mips.h (M_DLA_AB, M_DLI): Define.
532 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
534 * hppa.h (fstwx): Fix single-bit error.
536 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
538 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
541 Mon Feb 13 11:05:00 1995 Doug Evans <dje@canuck.cygnus.com>
543 * arc.h (ARC_OPERAND_LIMM): New flag.
544 (ARC_OPERAND_ADDRESS): Likewise.
546 Thu Feb 9 18:55:59 1995 Doug Evans <dje@canuck.cygnus.com>
548 * arc.h (ARC_MACH_{BASE,HOST,GRAPHICS,AUDIO}): Define.
549 (ARC_MACH_MASK, ARC_OPCODE_MACH, ARC_OPVAL_MACH): Define.
550 (ARC_HAVE_MULT_SHIFT): Delete.
551 (ARC_HAVE_MACH): Define.
552 (struct arc_opcode): New field `flags'.
553 (struct arc_operand_value): Ditto.
554 (arc_opcode_supported): New function.
555 (arc_opval_supported): Ditto.
558 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
560 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
561 debug registers. From Charles Hannum (mycroft@netbsd.org).
563 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
565 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
567 * i386.h (MOV_AX_DISP32): New macro.
568 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
569 of several call/return instructions.
570 (ADDR_PREFIX_OPCODE): New macro.
572 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
574 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
576 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
577 it pointer to const char;
578 (struct vot, field `name'): ditto.
580 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
582 * vax.h: Supply and properly group all values in end sentinel.
584 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
586 * mips.h (INSN_ISA, INSN_4650): Define.
589 Mon Dec 19 12:15:52 1994 Doug Evans <dje@canuck.cygnus.com>
591 * arc.h: Misc. cleanup. Merge "modifiers" into flags field.
592 Support multiply/shift insns.
596 Tue Nov 29 17:52:41 1994 Doug Evans <dje@canuck.cygnus.com>
601 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
603 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
604 systems with a separate instruction and data cache, such as the
605 29040, these instructions take an optional argument.
607 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
609 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
612 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
614 * mips.h (INSN_STORE_MEMORY): Define.
616 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
618 * sparc.h: Document new operand type 'x'.
620 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
622 * i960.h (I_CX2): New instruction category. It includes
623 instructions available on Cx and Jx processors.
624 (I_JX): New instruction category, for JX-only instructions.
625 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
626 Jx-only instructions, in I_JX category.
628 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
630 * ns32k.h (endop): Made pointer const too.
632 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
634 * ns32k.h: Drop Q operand type as there is no correct use
635 for it. Add I and Z operand types which allow better checking.
637 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
639 * h8300.h (xor.l) :fix bit pattern.
640 (L_2): New size of operand.
643 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
645 * m68k.h: Move "trap" before "tpcc" to change disassembly.
647 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
649 * sparc.h: Include v9 definitions.
651 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
653 * m68k.h (m68060): Defined.
654 (m68040up, mfloat, mmmu): Include it.
655 (struct m68k_opcode): Widen `arch' field.
656 (m68k_opcodes): Updated for M68060. Removed comments that were
657 instructions commented out by "JF" years ago.
659 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
661 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
662 add a one-bit `flags' field.
663 (F_ALIAS): New macro.
665 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
667 * h8300.h (dec, inc): Get encoding right.
669 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
671 * ppc.h (struct powerpc_operand): Removed signedp field; just use
673 (PPC_OPERAND_SIGNED): Define.
674 (PPC_OPERAND_SIGNOPT): Define.
676 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
678 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
679 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
681 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
683 * i386.h: Reverse last change. It'll be handled in gas instead.
685 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
687 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
688 slower on the 486 and used the implicit shift count despite the
689 explicit operand. The one-operand form is still available to get
690 the shorter form with the implicit shift count.
692 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
694 * hppa.h: Fix typo in fstws arg string.
696 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
698 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
700 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
702 * ppc.h (PPC_OPCODE_601): Define.
704 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
706 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
707 (so we can determine valid completers for both addb and addb[tf].)
709 * hppa.h (xmpyu): No floating point format specifier for the
712 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
714 * ppc.h (PPC_OPERAND_NEXT): Define.
715 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
716 (struct powerpc_macro): Define.
717 (powerpc_macros, powerpc_num_macros): Declare.
719 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
721 * ppc.h: New file. Header file for PowerPC opcode table.
723 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
725 * hppa.h: More minor template fixes for sfu and copr (to allow
726 for easier disassembly).
728 * hppa.h: Fix templates for all the sfu and copr instructions.
730 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
732 * i386.h (push): Permit Imm16 operand too.
734 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
736 * h8300.h (andc): Exists in base arch.
738 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
740 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
741 * hppa.h: #undef NONE to avoid conflict with hiux include files.
743 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
745 * hppa.h: Add FP quadword store instructions.
747 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
749 * mips.h: (M_J_A): Added.
752 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
754 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
755 <mellon@pepper.ncd.com>.
757 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
759 * hppa.h: Immediate field in probei instructions is unsigned,
760 not low-sign extended.
762 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
764 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
766 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
768 * i386.h: Add "fxch" without operand.
770 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
772 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
774 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
776 * hppa.h: Add gfw and gfr to the opcode table.
778 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
780 * m88k.h: extended to handle m88110.
782 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
784 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
787 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
789 * i960.h (i960_opcodes): Properly bracket initializers.
791 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
793 * m88k.h (BOFLAG): rewrite to avoid nested comment.
795 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
797 * m68k.h (two): Protect second argument with parentheses.
799 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
801 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
802 Deleted old in/out instructions in "#if 0" section.
804 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
806 * i386.h (i386_optab): Properly bracket initializers.
808 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
810 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
811 Jeff Law, law@cs.utah.edu).
813 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
815 * i386.h (lcall): Accept Imm32 operand also.
817 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
819 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
822 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
824 * mips.h (INSN_*): Changed values. Removed unused definitions.
825 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
826 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
827 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
828 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
829 (M_*): Added new values for r6000 and r4000 macros.
830 (ANY_DELAY): Removed.
832 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
834 * mips.h: Added M_LI_S and M_LI_SS.
836 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
838 * h8300.h: Get some rare mov.bs correct.
840 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
842 * sparc.h: Don't define const ourself; rely on ansidecl.h having
845 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
847 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
848 jump instructions, for use in disassemblers.
850 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
852 * m88k.h: Make bitfields just unsigned, not unsigned long or
855 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
857 * hppa.h: New argument type 'y'. Use in various float instructions.
859 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
861 * hppa.h (break): First immediate field is unsigned.
863 * hppa.h: Add rfir instruction.
865 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
867 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
869 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
871 * mips.h: Reworked the hazard information somewhat, and fixed some
872 bugs in the instruction hazard descriptions.
874 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
876 * m88k.h: Corrected a couple of opcodes.
878 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
880 * mips.h: Replaced with version from Ralph Campbell and OSF. The
881 new version includes instruction hazard information, but is
882 otherwise reasonably similar.
884 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
886 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
888 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
890 Patches from Jeff Law, law@cs.utah.edu:
891 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
892 Make the tables be the same for the following instructions:
893 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
894 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
895 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
896 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
897 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
900 * hppa.h: Make new and old tables the same for "break", "mtctl",
901 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
902 Fix typo in last patch. Collapse several #ifdefs into a
905 * hppa.h: Delete remaining OLD_TABLE code. Bring some
906 of the comments up-to-date.
908 * hppa.h: Update "free list" of letters and update
909 comments describing each letter's function.
911 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
913 * h8300.h: checkpoint, includes H8/300-H opcodes.
915 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
917 * Patches from Jeffrey Law <law@cs.utah.edu>.
918 * hppa.h: Rework single precision FP
919 instructions so that they correctly disassemble code
922 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
924 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
925 mov to allow instructions like mov ss,xyz(ecx) to assemble.
927 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
929 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
930 gdb will define it for now.
932 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
934 * sparc.h: Don't end enumerator list with comma.
936 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
938 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
939 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
940 ("bc2t"): Correct typo.
941 ("[ls]wc[023]"): Use T rather than t.
942 ("c[0123]"): Define general coprocessor instructions.
944 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
946 * m68k.h: Move split point for gcc compilation more towards
949 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
951 * rs6k.h: Clean up instructions for primary opcode 19 (many were
952 simply wrong, ics, rfi, & rfsvc were missing).
953 Add "a" to opr_ext for "bb". Doc fix.
955 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
957 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
958 * mips.h: Add casts, to suppress warnings about shifting too much.
959 * m68k.h: Document the placement code '9'.
961 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
963 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
964 allows callers to break up the large initialized struct full of
965 opcodes into two half-sized ones. This permits GCC to compile
966 this module, since it takes exponential space for initializers.
967 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
969 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
971 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
972 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
973 initialized structs in it.
975 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
977 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
978 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
979 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
981 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
983 * mips.h: document "i" and "j" operands correctly.
985 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
987 * mips.h: Removed endianness dependency.
989 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
991 * h8300.h: include info on number of cycles per instruction.
993 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
995 * hppa.h: Move handy aliases to the front. Fix masks for extract
996 and deposit instructions.
998 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1000 * i386.h: accept shld and shrd both with and without the shift
1001 count argument, which is always %cl.
1003 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1005 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1006 (one_byte_segment_defaults, two_byte_segment_defaults,
1007 i386_prefixtab_end): Ditto.
1009 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1011 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1012 for operand 2; from John Carr, jfc@dsg.dec.com.
1014 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1016 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1017 always use 16-bit offsets. Makes calculated-size jump tables
1020 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1022 * i386.h: Fix one-operand forms of in* and out* patterns.
1024 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1026 * m68k.h: Added CPU32 support.
1028 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1030 * mips.h (break): Disassemble the argument. Patch from
1031 jonathan@cs.stanford.edu (Jonathan Stone).
1033 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1035 * m68k.h: merged Motorola and MIT syntax.
1037 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1039 * m68k.h (pmove): make the tests less strict, the 68k book is
1042 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1044 * m68k.h (m68ec030): Defined as alias for 68030.
1045 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1046 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1047 them. Tightened description of "fmovex" to distinguish it from
1048 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1049 up descriptions that claimed versions were available for chips not
1050 supporting them. Added "pmovefd".
1052 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1054 * m68k.h: fix where the . goes in divull
1056 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1058 * m68k.h: the cas2 instruction is supposed to be written with
1059 indirection on the last two operands, which can be either data or
1060 address registers. Added a new operand type 'r' which accepts
1061 either register type. Added new cases for cas2l and cas2w which
1062 use them. Corrected masks for cas2 which failed to recognize use
1063 of address register.
1065 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1067 * m68k.h: Merged in patches (mostly m68040-specific) from
1068 Colin Smith <colin@wrs.com>.
1070 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1071 base). Also cleaned up duplicates, re-ordered instructions for
1072 the sake of dis-assembling (so aliases come after standard names).
1073 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1075 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1077 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1080 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1082 * sparc.h: Moved tables to BFD library.
1084 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1086 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1088 * h8300.h: Finish filling in all the holes in the opcode table,
1089 so that the Lucid C compiler can digest this as well...
1091 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1093 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1094 Fix opcodes on various sizes of fild/fist instructions
1095 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1096 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1098 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1100 * h8300.h: Fill in all the holes in the opcode table so that the
1101 losing HPUX C compiler can digest this...
1103 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1105 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1106 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1108 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1110 * sparc.h: Add new architecture variant sparclite; add its scan
1111 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1113 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1115 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1118 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1120 * rs6k.h: New version from IBM (Metin).
1122 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1124 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1125 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1127 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1129 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1131 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1133 * m68k.h (one, two): Cast macro args to unsigned to suppress
1134 complaints from compiler and lint about integer overflow during
1137 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1139 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1141 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1143 * mips.h: Make bitfield layout depend on the HOST compiler,
1144 not on the TARGET system.
1146 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1148 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1149 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1150 <TRANLE@INTELLICORP.COM>.
1152 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1154 * h8300.h: turned op_type enum into #define list
1156 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1158 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1159 similar instructions -- they've been renamed to "fitoq", etc.
1160 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1161 number of arguments.
1162 * h8300.h: Remove extra ; which produces compiler warning.
1164 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1166 * sparc.h: fix opcode for tsubcctv.
1168 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1170 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1172 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1174 * sparc.h (nop): Made the 'lose' field be even tighter,
1175 so only a standard 'nop' is disassembled as a nop.
1177 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1179 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1180 disassembled as a nop.
1182 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1184 * sparc.h: fix a typo.
1186 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1188 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1189 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1190 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1194 version-control: never