14b2193d0468e7893e4256898e2cf9221358e1f0
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-05-12 Alan Modra <amodra@one.net.au>
2
3 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
4 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
5 and use InvMem as these insns must have register operands.
6
7 2001-05-04 Alan Modra <amodra@one.net.au>
8
9 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
10 and pextrw to swap reg/rm assignments.
11
12 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
13
14 * cris.h (enum cris_insn_version_usage): Correct comment for
15 cris_ver_v3p.
16
17 2001-03-24 Alan Modra <alan@linuxcare.com.au>
18
19 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
20 Add InvMem to first operand of "maskmovdqu".
21
22 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
23
24 * cris.h (ADD_PC_INCR_OPCODE): New macro.
25
26 2001-03-21 Kazu Hirata <kazu@hxi.com>
27
28 * h8300.h: Fix formatting.
29
30 2001-03-22 Alan Modra <alan@linuxcare.com.au>
31
32 * i386.h (i386_optab): Add paddq, psubq.
33
34 2001-03-19 Alan Modra <alan@linuxcare.com.au>
35
36 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
37
38 2001-02-28 Igor Shevlyakov <igor@windriver.com>
39
40 * m68k.h: new defines for Coldfire V4. Update mcf to know
41 about mcf5407.
42
43 2001-02-18 lars brinkhoff <lars@nocrew.org>
44
45 * pdp11.h: New file.
46
47 2001-02-12 Jan Hubicka <jh@suse.cz>
48
49 * i386.h (i386_optab): SSE integer converison instructions have
50 64bit versions on x86-64.
51
52 2001-02-10 Nick Clifton <nickc@redhat.com>
53
54 * mips.h: Remove extraneous whitespace. Formating change to allow
55 for future contribution.
56
57 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
58
59 * s390.h: New file.
60
61 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
62
63 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
64 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
65 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
66
67 2001-01-24 Karsten Keil <kkeil@suse.de>
68
69 * i386.h (i386_optab): Fix swapgs
70
71 2001-01-14 Alan Modra <alan@linuxcare.com.au>
72
73 * hppa.h: Describe new '<' and '>' operand types, and tidy
74 existing comments.
75 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
76 Remove duplicate "ldw j(s,b),x". Sort some entries.
77
78 2001-01-13 Jan Hubicka <jh@suse.cz>
79
80 * i386.h (i386_optab): Fix pusha and ret templates.
81
82 2001-01-11 Peter Targett <peter.targett@arccores.com>
83
84 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
85 definitions for masking cpu type.
86 (arc_ext_operand_value) New structure for storing extended
87 operands.
88 (ARC_OPERAND_*) Flags for operand values.
89
90 2001-01-10 Jan Hubicka <jh@suse.cz>
91
92 * i386.h (pinsrw): Add.
93 (pshufw): Remove.
94 (cvttpd2dq): Fix operands.
95 (cvttps2dq): Likewise.
96 (movq2q): Rename to movdq2q.
97
98 2001-01-10 Richard Schaal <richard.schaal@intel.com>
99
100 * i386.h: Correct movnti instruction.
101
102 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
103
104 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
105 of operands (unsigned char or unsigned short).
106 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
107 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
108
109 2001-01-05 Jan Hubicka <jh@suse.cz>
110
111 * i386.h (i386_optab): Make [sml]fence template to use immext field.
112
113 2001-01-03 Jan Hubicka <jh@suse.cz>
114
115 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
116 introduced by Pentium4
117
118 2000-12-30 Jan Hubicka <jh@suse.cz>
119
120 * i386.h (i386_optab): Add "rex*" instructions;
121 add swapgs; disable jmp/call far direct instructions for
122 64bit mode; add syscall and sysret; disable registers for 0xc6
123 template. Add 'q' suffixes to extendable instructions, disable
124 obsolete instructions, add new sign/zero extension ones.
125 (i386_regtab): Add extended registers.
126 (*Suf): Add No_qSuf.
127 (q_Suf, wlq_Suf, bwlq_Suf): New.
128
129 2000-12-20 Jan Hubicka <jh@suse.cz>
130
131 * i386.h (i386_optab): Replace "Imm" with "EncImm".
132 (i386_regtab): Add flags field.
133
134 2000-12-12 Nick Clifton <nickc@redhat.com>
135
136 * mips.h: Fix formatting.
137
138 2000-12-01 Chris Demetriou <cgd@sibyte.com>
139
140 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
141 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
142 OP_*_SYSCALL definitions.
143 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
144 19 bit wait codes.
145 (MIPS operand specifier comments): Remove 'm', add 'U' and
146 'J', and update the meaning of 'B' so that it's more general.
147
148 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
149 INSN_ISA5): Renumber, redefine to mean the ISA at which the
150 instruction was added.
151 (INSN_ISA32): New constant.
152 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
153 Renumber to avoid new and/or renumbered INSN_* constants.
154 (INSN_MIPS32): Delete.
155 (ISA_UNKNOWN): New constant to indicate unknown ISA.
156 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
157 ISA_MIPS32): New constants, defined to be the mask of INSN_*
158 constants available at that ISA level.
159 (CPU_UNKNOWN): New constant to indicate unknown CPU.
160 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
161 define it with a unique value.
162 (OPCODE_IS_MEMBER): Update for new ISA membership-related
163 constant meanings.
164
165 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
166 definitions.
167
168 * mips.h (CPU_SB1): New constant.
169
170 2000-10-20 Jakub Jelinek <jakub@redhat.com>
171
172 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
173 Note that '3' is used for siam operand.
174
175 2000-09-22 Jim Wilson <wilson@cygnus.com>
176
177 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
178
179 2000-09-13 Anders Norlander <anorland@acc.umu.se>
180
181 * mips.h: Use defines instead of hard-coded processor numbers.
182 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
183 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
184 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
185 CPU_4KC, CPU_4KM, CPU_4KP): Define..
186 (OPCODE_IS_MEMBER): Use new defines.
187 (OP_MASK_SEL, OP_SH_SEL): Define.
188 (OP_MASK_CODE20, OP_SH_CODE20): Define.
189 Add 'P' to used characters.
190 Use 'H' for coprocessor select field.
191 Use 'm' for 20 bit breakpoint code.
192 Document new arg characters and add to used characters.
193 (INSN_MIPS32): New define for MIPS32 extensions.
194 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
195
196 2000-09-05 Alan Modra <alan@linuxcare.com.au>
197
198 * hppa.h: Mention cz completer.
199
200 2000-08-16 Jim Wilson <wilson@cygnus.com>
201
202 * ia64.h (IA64_OPCODE_POSTINC): New.
203
204 2000-08-15 H.J. Lu <hjl@gnu.org>
205
206 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
207 IgnoreSize change.
208
209 2000-08-08 Jason Eckhardt <jle@cygnus.com>
210
211 * i860.h: Small formatting adjustments.
212
213 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
214
215 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
216 Move related opcodes closer to each other.
217 Minor changes in comments, list undefined opcodes.
218
219 2000-07-26 Dave Brolley <brolley@redhat.com>
220
221 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
222
223 2000-07-22 Jason Eckhardt <jle@cygnus.com>
224
225 * i860.h (btne, bte, bla): Changed these opcodes
226 to use sbroff ('r') instead of split16 ('s').
227 (J, K, L, M): New operand types for 16-bit aligned fields.
228 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
229 use I, J, K, L, M instead of just I.
230 (T, U): New operand types for split 16-bit aligned fields.
231 (st.x): Changed these opcodes to use S, T, U instead of just S.
232 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
233 exist on the i860.
234 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
235 (pfeq.ss, pfeq.dd): New opcodes.
236 (st.s): Fixed incorrect mask bits.
237 (fmlow): Fixed incorrect mask bits.
238 (fzchkl, pfzchkl): Fixed incorrect mask bits.
239 (faddz, pfaddz): Fixed incorrect mask bits.
240 (form, pform): Fixed incorrect mask bits.
241 (pfld.l): Fixed incorrect mask bits.
242 (fst.q): Fixed incorrect mask bits.
243 (all floating point opcodes): Fixed incorrect mask bits for
244 handling of dual bit.
245
246 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
247
248 cris.h: New file.
249
250 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
251
252 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
253 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
254 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
255 (AVR_ISA_M83): Define for ATmega83, ATmega85.
256 (espm): Remove, because ESPM removed in databook update.
257 (eicall, eijmp): Move to the end of opcode table.
258
259 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
260
261 * m68hc11.h: New file for support of Motorola 68hc11.
262
263 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
264
265 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
266
267 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
268
269 * avr.h: New file with AVR opcodes.
270
271 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
272
273 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
274
275 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
276
277 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
278
279 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
280
281 * i386.h: Use sl_FP, not sl_Suf for fild.
282
283 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
284
285 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
286 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
287 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
288 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
289
290 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
291
292 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
293
294 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
295 Alexander Sokolov <robocop@netlink.ru>
296
297 * i386.h (i386_optab): Add cpu_flags for all instructions.
298
299 2000-05-13 Alan Modra <alan@linuxcare.com.au>
300
301 From Gavin Romig-Koch <gavin@cygnus.com>
302 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
303
304 2000-05-04 Timothy Wall <twall@cygnus.com>
305
306 * tic54x.h: New.
307
308 2000-05-03 J.T. Conklin <jtc@redback.com>
309
310 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
311 (PPC_OPERAND_VR): New operand flag for vector registers.
312
313 2000-05-01 Kazu Hirata <kazu@hxi.com>
314
315 * h8300.h (EOP): Add missing initializer.
316
317 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
318
319 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
320 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
321 New operand types l,y,&,fe,fE,fx added to support above forms.
322 (pa_opcodes): Replaced usage of 'x' as source/target for
323 floating point double-word loads/stores with 'fx'.
324
325 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
326 David Mosberger <davidm@hpl.hp.com>
327 Timothy Wall <twall@cygnus.com>
328 Jim Wilson <wilson@cygnus.com>
329
330 * ia64.h: New file.
331
332 2000-03-27 Nick Clifton <nickc@cygnus.com>
333
334 * d30v.h (SHORT_A1): Fix value.
335 (SHORT_AR): Renumber so that it is at the end of the list of short
336 instructions, not the end of the list of long instructions.
337
338 2000-03-26 Alan Modra <alan@linuxcare.com>
339
340 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
341 problem isn't really specific to Unixware.
342 (OLDGCC_COMPAT): Define.
343 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
344 destination %st(0).
345 Fix lots of comments.
346
347 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
348
349 * d30v.h:
350 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
351 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
352 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
353 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
354 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
355 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
356 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
357
358 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
359
360 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
361 fistpd without suffix.
362
363 2000-02-24 Nick Clifton <nickc@cygnus.com>
364
365 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
366 'signed_overflow_ok_p'.
367 Delete prototypes for cgen_set_flags() and cgen_get_flags().
368
369 2000-02-24 Andrew Haley <aph@cygnus.com>
370
371 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
372 (CGEN_CPU_TABLE): flags: new field.
373 Add prototypes for new functions.
374
375 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
376
377 * i386.h: Add some more UNIXWARE_COMPAT comments.
378
379 2000-02-23 Linas Vepstas <linas@linas.org>
380
381 * i370.h: New file.
382
383 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
384
385 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
386 cannot be combined in parallel with ADD/SUBppp.
387
388 2000-02-22 Andrew Haley <aph@cygnus.com>
389
390 * mips.h: (OPCODE_IS_MEMBER): Add comment.
391
392 1999-12-30 Andrew Haley <aph@cygnus.com>
393
394 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
395 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
396 insns.
397
398 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
399
400 * i386.h: Qualify intel mode far call and jmp with x_Suf.
401
402 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
403
404 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
405 indirect jumps and calls. Add FF/3 call for intel mode.
406
407 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
408
409 * mn10300.h: Add new operand types. Add new instruction formats.
410
411 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
412
413 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
414 instruction.
415
416 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
417
418 * mips.h (INSN_ISA5): New.
419
420 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
421
422 * mips.h (OPCODE_IS_MEMBER): New.
423
424 1999-10-29 Nick Clifton <nickc@cygnus.com>
425
426 * d30v.h (SHORT_AR): Define.
427
428 1999-10-18 Michael Meissner <meissner@cygnus.com>
429
430 * alpha.h (alpha_num_opcodes): Convert to unsigned.
431 (alpha_num_operands): Ditto.
432
433 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
434
435 * hppa.h (pa_opcodes): Add load and store cache control to
436 instructions. Add ordered access load and store.
437
438 * hppa.h (pa_opcode): Add new entries for addb and addib.
439
440 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
441
442 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
443
444 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
445
446 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
447
448 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
449
450 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
451 and "be" using completer prefixes.
452
453 * hppa.h (pa_opcodes): Add initializers to silence compiler.
454
455 * hppa.h: Update comments about character usage.
456
457 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
458
459 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
460 up the new fstw & bve instructions.
461
462 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
463
464 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
465 instructions.
466
467 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
468
469 * hppa.h (pa_opcodes): Add long offset double word load/store
470 instructions.
471
472 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
473 stores.
474
475 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
476
477 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
478
479 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
480
481 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
482
483 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
484
485 * hppa.h (pa_opcodes): Add support for "b,l".
486
487 * hppa.h (pa_opcodes): Add support for "b,gate".
488
489 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
490
491 * hppa.h (pa_opcodes): Use 'fX' for first register operand
492 in xmpyu.
493
494 * hppa.h (pa_opcodes): Fix mask for probe and probei.
495
496 * hppa.h (pa_opcodes): Fix mask for depwi.
497
498 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
499
500 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
501 an explicit output argument.
502
503 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
504
505 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
506 Add a few PA2.0 loads and store variants.
507
508 1999-09-04 Steve Chamberlain <sac@pobox.com>
509
510 * pj.h: New file.
511
512 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
513
514 * i386.h (i386_regtab): Move %st to top of table, and split off
515 other fp reg entries.
516 (i386_float_regtab): To here.
517
518 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
519
520 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
521 by 'f'.
522
523 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
524 Add supporting args.
525
526 * hppa.h: Document new completers and args.
527 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
528 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
529 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
530 pmenb and pmdis.
531
532 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
533 hshr, hsub, mixh, mixw, permh.
534
535 * hppa.h (pa_opcodes): Change completers in instructions to
536 use 'c' prefix.
537
538 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
539 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
540
541 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
542 fnegabs to use 'I' instead of 'F'.
543
544 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
545
546 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
547 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
548 Alphabetically sort PIII insns.
549
550 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
551
552 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
553
554 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
555
556 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
557 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
558
559 * hppa.h: Document 64 bit condition completers.
560
561 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
562
563 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
564
565 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
566
567 * i386.h (i386_optab): Add DefaultSize modifier to all insns
568 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
569 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
570
571 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
572 Jeff Law <law@cygnus.com>
573
574 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
575
576 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
577
578 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
579 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
580
581 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
582
583 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
584
585 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
586
587 * hppa.h (struct pa_opcode): Add new field "flags".
588 (FLAGS_STRICT): Define.
589
590 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
591 Jeff Law <law@cygnus.com>
592
593 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
594
595 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
596
597 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
598
599 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
600 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
601 flag to fcomi and friends.
602
603 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
604
605 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
606 integer logical instructions.
607
608 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
609
610 * m68k.h: Document new formats `E', `G', `H' and new places `N',
611 `n', `o'.
612
613 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
614 and new places `m', `M', `h'.
615
616 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
617
618 * hppa.h (pa_opcodes): Add several processor specific system
619 instructions.
620
621 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
622
623 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
624 "addb", and "addib" to be used by the disassembler.
625
626 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
627
628 * i386.h (ReverseModrm): Remove all occurences.
629 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
630 movmskps, pextrw, pmovmskb, maskmovq.
631 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
632 ignore the data size prefix.
633
634 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
635 Mostly stolen from Doug Ledford <dledford@redhat.com>
636
637 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
638
639 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
640
641 1999-04-14 Doug Evans <devans@casey.cygnus.com>
642
643 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
644 (CGEN_ATTR_TYPE): Update.
645 (CGEN_ATTR_MASK): Number booleans starting at 0.
646 (CGEN_ATTR_VALUE): Update.
647 (CGEN_INSN_ATTR): Update.
648
649 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
650
651 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
652 instructions.
653
654 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
655
656 * hppa.h (bb, bvb): Tweak opcode/mask.
657
658
659 1999-03-22 Doug Evans <devans@casey.cygnus.com>
660
661 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
662 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
663 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
664 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
665 Delete member max_insn_size.
666 (enum cgen_cpu_open_arg): New enum.
667 (cpu_open): Update prototype.
668 (cpu_open_1): Declare.
669 (cgen_set_cpu): Delete.
670
671 1999-03-11 Doug Evans <devans@casey.cygnus.com>
672
673 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
674 (CGEN_OPERAND_NIL): New macro.
675 (CGEN_OPERAND): New member `type'.
676 (@arch@_cgen_operand_table): Delete decl.
677 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
678 (CGEN_OPERAND_TABLE): New struct.
679 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
680 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
681 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
682 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
683 {get,set}_{int,vma}_operand.
684 (@arch@_cgen_cpu_open): New arg `isa'.
685 (cgen_set_cpu): Ditto.
686
687 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
688
689 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
690
691 1999-02-25 Doug Evans <devans@casey.cygnus.com>
692
693 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
694 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
695 enum cgen_hw_type.
696 (CGEN_HW_TABLE): New struct.
697 (hw_table): Delete declaration.
698 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
699 to table entry to enum.
700 (CGEN_OPINST): Ditto.
701 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
702
703 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
704
705 * alpha.h (AXP_OPCODE_EV6): New.
706 (AXP_OPCODE_NOPAL): Include it.
707
708 1999-02-09 Doug Evans <devans@casey.cygnus.com>
709
710 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
711 All uses updated. New members int_insn_p, max_insn_size,
712 parse_operand,insert_operand,extract_operand,print_operand,
713 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
714 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
715 extract_handlers,print_handlers.
716 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
717 (CGEN_ATTR_BOOL_OFFSET): New macro.
718 (CGEN_ATTR_MASK): Subtract it to compute bit number.
719 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
720 (cgen_opcode_handler): Renamed from cgen_base.
721 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
722 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
723 all uses updated.
724 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
725 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
726 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
727 (CGEN_OPCODE,CGEN_IBASE): New types.
728 (CGEN_INSN): Rewrite.
729 (CGEN_{ASM,DIS}_HASH*): Delete.
730 (init_opcode_table,init_ibld_table): Declare.
731 (CGEN_INSN_ATTR): New type.
732
733 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
734
735 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
736 (x_FP, d_FP, dls_FP, sldx_FP): Define.
737 Change *Suf definitions to include x and d suffixes.
738 (movsx): Use w_Suf and b_Suf.
739 (movzx): Likewise.
740 (movs): Use bwld_Suf.
741 (fld): Change ordering. Use sld_FP.
742 (fild): Add Intel Syntax equivalent of fildq.
743 (fst): Use sld_FP.
744 (fist): Use sld_FP.
745 (fstp): Use sld_FP. Add x_FP version.
746 (fistp): LLongMem version for Intel Syntax.
747 (fcom, fcomp): Use sld_FP.
748 (fadd, fiadd, fsub): Use sld_FP.
749 (fsubr): Use sld_FP.
750 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
751
752 1999-01-27 Doug Evans <devans@casey.cygnus.com>
753
754 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
755 CGEN_MODE_UINT.
756
757 1999-01-16 Jeffrey A Law (law@cygnus.com)
758
759 * hppa.h (bv): Fix mask.
760
761 1999-01-05 Doug Evans <devans@casey.cygnus.com>
762
763 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
764 (CGEN_ATTR): Use it.
765 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
766 (CGEN_ATTR_TABLE): New member dfault.
767
768 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
769
770 * mips.h (MIPS16_INSN_BRANCH): New.
771
772 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
773
774 The following is part of a change made by Edith Epstein
775 <eepstein@sophia.cygnus.com> as part of a project to merge in
776 changes by HP; HP did not create ChangeLog entries.
777
778 * hppa.h (completer_chars): list of chars to not put a space
779 after.
780
781 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
782
783 * i386.h (i386_optab): Permit w suffix on processor control and
784 status word instructions.
785
786 1998-11-30 Doug Evans <devans@casey.cygnus.com>
787
788 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
789 (struct cgen_keyword_entry): Ditto.
790 (struct cgen_operand): Ditto.
791 (CGEN_IFLD): New typedef, with associated access macros.
792 (CGEN_IFMT): New typedef, with associated access macros.
793 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
794 (CGEN_IVALUE): New typedef.
795 (struct cgen_insn): Delete const on syntax,attrs members.
796 `format' now points to format data. Type of `value' is now
797 CGEN_IVALUE.
798 (struct cgen_opcode_table): New member ifld_table.
799
800 1998-11-18 Doug Evans <devans@casey.cygnus.com>
801
802 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
803 (CGEN_OPERAND_INSTANCE): New member `attrs'.
804 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
805 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
806 (cgen_opcode_table): Update type of dis_hash fn.
807 (extract_operand): Update type of `insn_value' arg.
808
809 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
810
811 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
812
813 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
814
815 * mips.h (INSN_MULT): Added.
816
817 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
818
819 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
820
821 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
822
823 * cgen.h (CGEN_INSN_INT): New typedef.
824 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
825 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
826 (CGEN_INSN_BYTES_PTR): New typedef.
827 (CGEN_EXTRACT_INFO): New typedef.
828 (cgen_insert_fn,cgen_extract_fn): Update.
829 (cgen_opcode_table): New member `insn_endian'.
830 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
831 (insert_operand,extract_operand): Update.
832 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
833
834 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
835
836 * cgen.h (CGEN_ATTR_BOOLS): New macro.
837 (struct CGEN_HW_ENTRY): New member `attrs'.
838 (CGEN_HW_ATTR): New macro.
839 (struct CGEN_OPERAND_INSTANCE): New member `name'.
840 (CGEN_INSN_INVALID_P): New macro.
841
842 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
843
844 * hppa.h: Add "fid".
845
846 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
847
848 From Robert Andrew Dale <rob@nb.net>
849 * i386.h (i386_optab): Add AMD 3DNow! instructions.
850 (AMD_3DNOW_OPCODE): Define.
851
852 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
853
854 * d30v.h (EITHER_BUT_PREFER_MU): Define.
855
856 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
857
858 * cgen.h (cgen_insn): #if 0 out element `cdx'.
859
860 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
861
862 Move all global state data into opcode table struct, and treat
863 opcode table as something that is "opened/closed".
864 * cgen.h (CGEN_OPCODE_DESC): New type.
865 (all fns): New first arg of opcode table descriptor.
866 (cgen_set_parse_operand_fn): Add prototype.
867 (cgen_current_machine,cgen_current_endian): Delete.
868 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
869 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
870 dis_hash_table,dis_hash_table_entries.
871 (opcode_open,opcode_close): Add prototypes.
872
873 * cgen.h (cgen_insn): New element `cdx'.
874
875 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
876
877 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
878
879 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
880
881 * mn10300.h: Add "no_match_operands" field for instructions.
882 (MN10300_MAX_OPERANDS): Define.
883
884 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
885
886 * cgen.h (cgen_macro_insn_count): Declare.
887
888 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
889
890 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
891 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
892 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
893 set_{int,vma}_operand.
894
895 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
896
897 * mn10300.h: Add "machine" field for instructions.
898 (MN103, AM30): Define machine types.
899
900 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
901
902 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
903
904 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
905
906 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
907
908 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
909
910 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
911 and ud2b.
912 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
913 those that happen to be implemented on pentiums.
914
915 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
916
917 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
918 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
919 with Size16|IgnoreSize or Size32|IgnoreSize.
920
921 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
922
923 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
924 (REPE): Rename to REPE_PREFIX_OPCODE.
925 (i386_regtab_end): Remove.
926 (i386_prefixtab, i386_prefixtab_end): Remove.
927 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
928 of md_begin.
929 (MAX_OPCODE_SIZE): Define.
930 (i386_optab_end): Remove.
931 (sl_Suf): Define.
932 (sl_FP): Use sl_Suf.
933
934 * i386.h (i386_optab): Allow 16 bit displacement for `mov
935 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
936 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
937 data32, dword, and adword prefixes.
938 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
939 regs.
940
941 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
942
943 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
944
945 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
946 register operands, because this is a common idiom. Flag them with
947 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
948 fdivrp because gcc erroneously generates them. Also flag with a
949 warning.
950
951 * i386.h: Add suffix modifiers to most insns, and tighter operand
952 checks in some cases. Fix a number of UnixWare compatibility
953 issues with float insns. Merge some floating point opcodes, using
954 new FloatMF modifier.
955 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
956 consistency.
957
958 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
959 IgnoreDataSize where appropriate.
960
961 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
962
963 * i386.h: (one_byte_segment_defaults): Remove.
964 (two_byte_segment_defaults): Remove.
965 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
966
967 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
968
969 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
970 (cgen_hw_lookup_by_num): Declare.
971
972 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
973
974 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
975 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
976
977 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
978
979 * cgen.h (cgen_asm_init_parse): Delete.
980 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
981 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
982
983 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
984
985 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
986 (cgen_asm_finish_insn): Update prototype.
987 (cgen_insn): New members num, data.
988 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
989 dis_hash, dis_hash_table_size moved to ...
990 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
991 All uses updated. New members asm_hash_p, dis_hash_p.
992 (CGEN_MINSN_EXPANSION): New struct.
993 (cgen_expand_macro_insn): Declare.
994 (cgen_macro_insn_count): Declare.
995 (get_insn_operands): Update prototype.
996 (lookup_get_insn_operands): Declare.
997
998 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
999
1000 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1001 regKludge. Add operands types for string instructions.
1002
1003 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1004
1005 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1006 table.
1007
1008 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1009
1010 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1011 for `gettext'.
1012
1013 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1014
1015 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1016 Add IsString flag to string instructions.
1017 (IS_STRING): Don't define.
1018 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1019 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1020 (SS_PREFIX_OPCODE): Define.
1021
1022 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1023
1024 * i386.h: Revert March 24 patch; no more LinearAddress.
1025
1026 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1027
1028 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1029 instructions, and instead add FWait opcode modifier. Add short
1030 form of fldenv and fstenv.
1031 (FWAIT_OPCODE): Define.
1032
1033 * i386.h (i386_optab): Change second operand constraint of `mov
1034 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1035 allow legal instructions such as `movl %gs,%esi'
1036
1037 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1038
1039 * h8300.h: Various changes to fully bracket initializers.
1040
1041 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1042
1043 * i386.h: Set LinearAddress for lidt and lgdt.
1044
1045 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1046
1047 * cgen.h (CGEN_BOOL_ATTR): New macro.
1048
1049 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1050
1051 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1052
1053 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1054
1055 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1056 (cgen_insn): Record syntax and format entries here, rather than
1057 separately.
1058
1059 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1060
1061 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1062
1063 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1064
1065 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1066 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1067 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1068
1069 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1070
1071 * cgen.h (lookup_insn): New argument alias_p.
1072
1073 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1074
1075 Fix rac to accept only a0:
1076 * d10v.h (OPERAND_ACC): Split into:
1077 (OPERAND_ACC0, OPERAND_ACC1) .
1078 (OPERAND_GPR): Define.
1079
1080 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1081
1082 * cgen.h (CGEN_FIELDS): Define here.
1083 (CGEN_HW_ENTRY): New member `type'.
1084 (hw_list): Delete decl.
1085 (enum cgen_mode): Declare.
1086 (CGEN_OPERAND): New member `hw'.
1087 (enum cgen_operand_instance_type): Declare.
1088 (CGEN_OPERAND_INSTANCE): New type.
1089 (CGEN_INSN): New member `operands'.
1090 (CGEN_OPCODE_DATA): Make hw_list const.
1091 (get_insn_operands,lookup_insn): Add prototypes for.
1092
1093 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1094
1095 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1096 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1097 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1098 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1099
1100 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1101
1102 * cgen.h: Correct typo in comment end marker.
1103
1104 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1105
1106 * tic30.h: New file.
1107
1108 Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1109
1110 * cgen.h: Add prototypes for cgen_save_fixups(),
1111 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1112 of cgen_asm_finish_insn() to return a char *.
1113
1114 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1115
1116 * cgen.h: Formatting changes to improve readability.
1117
1118 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1119
1120 * cgen.h (*): Clean up pass over `struct foo' usage.
1121 (CGEN_ATTR): Make unsigned char.
1122 (CGEN_ATTR_TYPE): Update.
1123 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1124 (cgen_base): Move member `attrs' to cgen_insn.
1125 (CGEN_KEYWORD): New member `null_entry'.
1126 (CGEN_{SYNTAX,FORMAT}): New types.
1127 (cgen_insn): Format and syntax separated from each other.
1128
1129 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1130
1131 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1132 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1133 flags_{used,set} long.
1134 (d30v_operand): Make flags field long.
1135
1136 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1137
1138 * m68k.h: Fix comment describing operand types.
1139
1140 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1141
1142 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1143 everything else after down.
1144
1145 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1146
1147 * d10v.h (OPERAND_FLAG): Split into:
1148 (OPERAND_FFLAG, OPERAND_CFLAG) .
1149
1150 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1151
1152 * mips.h (struct mips_opcode): Changed comments to reflect new
1153 field usage.
1154
1155 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1156
1157 * mips.h: Added to comments a quick-ref list of all assigned
1158 operand type characters.
1159 (OP_{MASK,SH}_PERFREG): New macros.
1160
1161 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1162
1163 * sparc.h: Add '_' and '/' for v9a asr's.
1164 Patch from David Miller <davem@vger.rutgers.edu>
1165
1166 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1167
1168 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1169 area are not available in the base model (H8/300).
1170
1171 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1172
1173 * m68k.h: Remove documentation of ` operand specifier.
1174
1175 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1176
1177 * m68k.h: Document q and v operand specifiers.
1178
1179 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1180
1181 * v850.h (struct v850_opcode): Add processors field.
1182 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1183 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1184 (PROCESSOR_V850EA): New bit constants.
1185
1186 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1187
1188 Merge changes from Martin Hunt:
1189
1190 * d30v.h: Allow up to 64 control registers. Add
1191 SHORT_A5S format.
1192
1193 * d30v.h (LONG_Db): New form for delayed branches.
1194
1195 * d30v.h: (LONG_Db): New form for repeati.
1196
1197 * d30v.h (SHORT_D2B): New form.
1198
1199 * d30v.h (SHORT_A2): New form.
1200
1201 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1202 registers are used. Needed for VLIW optimization.
1203
1204 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1205
1206 * cgen.h: Move assembler interface section
1207 up so cgen_parse_operand_result is defined for cgen_parse_address.
1208 (cgen_parse_address): Update prototype.
1209
1210 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1211
1212 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1213
1214 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1215
1216 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1217 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1218 <paubert@iram.es>.
1219
1220 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1221 <paubert@iram.es>.
1222
1223 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1224 <paubert@iram.es>.
1225
1226 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1227 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1228
1229 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1230
1231 * v850.h (V850_NOT_R0): New flag.
1232
1233 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1234
1235 * v850.h (struct v850_opcode): Remove flags field.
1236
1237 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1238
1239 * v850.h (struct v850_opcode): Add flags field.
1240 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1241 fields.
1242 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1243 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1244
1245 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1246
1247 * arc.h: New file.
1248
1249 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1250
1251 * sparc.h (sparc_opcodes): Declare as const.
1252
1253 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1254
1255 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1256 uses single or double precision floating point resources.
1257 (INSN_NO_ISA, INSN_ISA1): Define.
1258 (cpu specific INSN macros): Tweak into bitmasks outside the range
1259 of INSN_ISA field.
1260
1261 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1262
1263 * i386.h: Fix pand opcode.
1264
1265 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1266
1267 * mips.h: Widen INSN_ISA and move it to a more convenient
1268 bit position. Add INSN_3900.
1269
1270 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1271
1272 * mips.h (struct mips_opcode): added new field membership.
1273
1274 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1275
1276 * i386.h (movd): only Reg32 is allowed.
1277
1278 * i386.h: add fcomp and ud2. From Wayne Scott
1279 <wscott@ichips.intel.com>.
1280
1281 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1282
1283 * i386.h: Add MMX instructions.
1284
1285 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1286
1287 * i386.h: Remove W modifier from conditional move instructions.
1288
1289 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1290
1291 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1292 with no arguments to match that generated by the UnixWare
1293 assembler.
1294
1295 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1296
1297 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1298 (cgen_parse_operand_fn): Declare.
1299 (cgen_init_parse_operand): Declare.
1300 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1301 new argument `want'.
1302 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1303 (enum cgen_parse_operand_type): New enum.
1304
1305 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1306
1307 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1308
1309 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1310
1311 * cgen.h: New file.
1312
1313 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1314
1315 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1316 fdivrp.
1317
1318 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1319
1320 * v850.h (extract): Make unsigned.
1321
1322 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1323
1324 * i386.h: Add iclr.
1325
1326 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1327
1328 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1329 take a direction bit.
1330
1331 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1332
1333 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1334
1335 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1336
1337 * sparc.h: Include <ansidecl.h>. Update function declarations to
1338 use prototypes, and to use const when appropriate.
1339
1340 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1341
1342 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1343
1344 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1345
1346 * d10v.h: Change pre_defined_registers to
1347 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1348
1349 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1350
1351 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1352 Change mips_opcodes from const array to a pointer,
1353 and change bfd_mips_num_opcodes from const int to int,
1354 so that we can increase the size of the mips opcodes table
1355 dynamically.
1356
1357 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1358
1359 * d30v.h (FLAG_X): Remove unused flag.
1360
1361 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1362
1363 * d30v.h: New file.
1364
1365 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1366
1367 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1368 (PDS_VALUE): Macro to access value field of predefined symbols.
1369 (tic80_next_predefined_symbol): Add prototype.
1370
1371 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1372
1373 * tic80.h (tic80_symbol_to_value): Change prototype to match
1374 change in function, added class parameter.
1375
1376 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1377
1378 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1379 endmask fields, which are somewhat weird in that 0 and 32 are
1380 treated exactly the same.
1381
1382 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1383
1384 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1385 rather than a constant that is 2**X. Reorder them to put bits for
1386 operands that have symbolic names in the upper bits, so they can
1387 be packed into an int where the lower bits contain the value that
1388 corresponds to that symbolic name.
1389 (predefined_symbo): Add struct.
1390 (tic80_predefined_symbols): Declare array of translations.
1391 (tic80_num_predefined_symbols): Declare size of that array.
1392 (tic80_value_to_symbol): Declare function.
1393 (tic80_symbol_to_value): Declare function.
1394
1395 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1396
1397 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1398
1399 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1400
1401 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1402 be the destination register.
1403
1404 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1405
1406 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1407 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1408 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1409 that the opcode can have two vector instructions in a single
1410 32 bit word and we have to encode/decode both.
1411
1412 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1413
1414 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1415 TIC80_OPERAND_RELATIVE for PC relative.
1416 (TIC80_OPERAND_BASEREL): New flag bit for register
1417 base relative.
1418
1419 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1420
1421 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1422
1423 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1424
1425 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1426 ":s" modifier for scaling.
1427
1428 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1429
1430 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1431 (TIC80_OPERAND_M_LI): Ditto
1432
1433 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1434
1435 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1436 (TIC80_OPERAND_CC): New define for condition code operand.
1437 (TIC80_OPERAND_CR): New define for control register operand.
1438
1439 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1440
1441 * tic80.h (struct tic80_opcode): Name changed.
1442 (struct tic80_opcode): Remove format field.
1443 (struct tic80_operand): Add insertion and extraction functions.
1444 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1445 correct ones.
1446 (FMT_*): Ditto.
1447
1448 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1449
1450 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1451 type IV instruction offsets.
1452
1453 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1454
1455 * tic80.h: New file.
1456
1457 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1458
1459 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1460
1461 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1462
1463 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1464 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1465 * v850.h: Fix comment, v850_operand not powerpc_operand.
1466
1467 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1468
1469 * mn10200.h: Flesh out structures and definitions needed by
1470 the mn10200 assembler & disassembler.
1471
1472 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1473
1474 * mips.h: Add mips16 definitions.
1475
1476 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1477
1478 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1479
1480 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1481
1482 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1483 (MN10300_OPERAND_MEMADDR): Define.
1484
1485 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1486
1487 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1488
1489 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1492
1493 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1496
1497 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1498
1499 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1500
1501 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1502
1503 * alpha.h: Don't include "bfd.h"; private relocation types are now
1504 negative to minimize problems with shared libraries. Organize
1505 instruction subsets by AMASK extensions and PALcode
1506 implementation.
1507 (struct alpha_operand): Move flags slot for better packing.
1508
1509 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1510
1511 * v850.h (V850_OPERAND_RELAX): New operand flag.
1512
1513 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1514
1515 * mn10300.h (FMT_*): Move operand format definitions
1516 here.
1517
1518 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1519
1520 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1521
1522 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1523
1524 * mn10300.h (mn10300_opcode): Add "format" field.
1525 (MN10300_OPERAND_*): Define.
1526
1527 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1528
1529 * mn10x00.h: Delete.
1530 * mn10200.h, mn10300.h: New files.
1531
1532 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1533
1534 * mn10x00.h: New file.
1535
1536 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1537
1538 * v850.h: Add new flag to indicate this instruction uses a PC
1539 displacement.
1540
1541 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1542
1543 * h8300.h (stmac): Add missing instruction.
1544
1545 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1546
1547 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1548 field.
1549
1550 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1551
1552 * v850.h (V850_OPERAND_EP): Define.
1553
1554 * v850.h (v850_opcode): Add size field.
1555
1556 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1557
1558 * v850.h (v850_operands): Add insert and extract fields, pointers
1559 to functions used to handle unusual operand encoding.
1560 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1561 V850_OPERAND_SIGNED): Defined.
1562
1563 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1564
1565 * v850.h (v850_operands): Add flags field.
1566 (OPERAND_REG, OPERAND_NUM): Defined.
1567
1568 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1569
1570 * v850.h: New file.
1571
1572 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1573
1574 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1575 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1576 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1577 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1578 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1579 Defined.
1580
1581 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1584 a 3 bit space id instead of a 2 bit space id.
1585
1586 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1587
1588 * d10v.h: Add some additional defines to support the
1589 assembler in determining which operations can be done in parallel.
1590
1591 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1592
1593 * h8300.h (SN): Define.
1594 (eepmov.b): Renamed from "eepmov"
1595 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1596 with them.
1597
1598 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1599
1600 * d10v.h (OPERAND_SHIFT): New operand flag.
1601
1602 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1603
1604 * d10v.h: Changes for divs, parallel-only instructions, and
1605 signed numbers.
1606
1607 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1608
1609 * d10v.h (pd_reg): Define. Putting the definition here allows
1610 the assembler and disassembler to share the same struct.
1611
1612 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1613
1614 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1615 Williams <steve@icarus.com>.
1616
1617 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1618
1619 * d10v.h: New file.
1620
1621 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1622
1623 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1624
1625 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1626
1627 * m68k.h (mcf5200): New macro.
1628 Document names of coldfire control registers.
1629
1630 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1631
1632 * h8300.h (SRC_IN_DST): Define.
1633
1634 * h8300.h (UNOP3): Mark the register operand in this insn
1635 as a source operand, not a destination operand.
1636 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1637 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1638 register operand with SRC_IN_DST.
1639
1640 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1641
1642 * alpha.h: New file.
1643
1644 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1645
1646 * rs6k.h: Remove obsolete file.
1647
1648 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1649
1650 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1651 fdivp, and fdivrp. Add ffreep.
1652
1653 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1654
1655 * h8300.h: Reorder various #defines for readability.
1656 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1657 (BITOP): Accept additional (unused) argument. All callers changed.
1658 (EBITOP): Likewise.
1659 (O_LAST): Bump.
1660 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1661
1662 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1663 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1664 (BITOP, EBITOP): Handle new H8/S addressing modes for
1665 bit insns.
1666 (UNOP3): Handle new shift/rotate insns on the H8/S.
1667 (insns using exr): New instructions.
1668 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1669
1670 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1671
1672 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1673 was incorrect.
1674
1675 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1676
1677 * h8300.h (START): Remove.
1678 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1679 and mov.l insns that can be relaxed.
1680
1681 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1682
1683 * i386.h: Remove Abs32 from lcall.
1684
1685 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1686
1687 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1688 (SLCPOP): New macro.
1689 Mark X,Y opcode letters as in use.
1690
1691 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1692
1693 * sparc.h (F_FLOAT, F_FBR): Define.
1694
1695 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1696
1697 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1698 from all insns.
1699 (ABS8SRC,ABS8DST): Add ABS8MEM.
1700 (add.l): Fix reg+reg variant.
1701 (eepmov.w): Renamed from eepmovw.
1702 (ldc,stc): Fix many cases.
1703
1704 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1705
1706 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1707
1708 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1709
1710 * sparc.h (O): Mark operand letter as in use.
1711
1712 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1713
1714 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1715 Mark operand letters uU as in use.
1716
1717 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1718
1719 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1720 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1721 (SPARC_OPCODE_SUPPORTED): New macro.
1722 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1723 (F_NOTV9): Delete.
1724
1725 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1726
1727 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1728 declaration consistent with return type in definition.
1729
1730 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1731
1732 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1733
1734 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1735
1736 * i386.h (i386_regtab): Add 80486 test registers.
1737
1738 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1739
1740 * i960.h (I_HX): Define.
1741 (i960_opcodes): Add HX instruction.
1742
1743 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1744
1745 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1746 and fclex.
1747
1748 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1749
1750 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1751 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1752 (bfd_* defines): Delete.
1753 (sparc_opcode_archs): Replaces architecture_pname.
1754 (sparc_opcode_lookup_arch): Declare.
1755 (NUMOPCODES): Delete.
1756
1757 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1758
1759 * sparc.h (enum sparc_architecture): Add v9a.
1760 (ARCHITECTURES_CONFLICT_P): Update.
1761
1762 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1763
1764 * i386.h: Added Pentium Pro instructions.
1765
1766 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1767
1768 * m68k.h: Document new 'W' operand place.
1769
1770 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1771
1772 * hppa.h: Add lci and syncdma instructions.
1773
1774 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1775
1776 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1777 instructions.
1778
1779 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1780
1781 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1782 assembler's -mcom and -many switches.
1783
1784 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1785
1786 * i386.h: Fix cmpxchg8b extension opcode description.
1787
1788 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1789
1790 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1791 and register cr4.
1792
1793 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1796
1797 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1798
1799 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1800
1801 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1802
1803 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1804
1805 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1806
1807 * m68kmri.h: Remove.
1808
1809 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1810 declarations. Remove F_ALIAS and flag field of struct
1811 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1812 int. Make name and args fields of struct m68k_opcode const.
1813
1814 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1815
1816 * sparc.h (F_NOTV9): Define.
1817
1818 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1819
1820 * mips.h (INSN_4010): Define.
1821
1822 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1823
1824 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1825
1826 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1827 * m68k.h: Fix argument descriptions of coprocessor
1828 instructions to allow only alterable operands where appropriate.
1829 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1830 (m68k_opcode_aliases): Add more aliases.
1831
1832 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1833
1834 * m68k.h: Added explcitly short-sized conditional branches, and a
1835 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1836 svr4-based configurations.
1837
1838 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1839
1840 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1841 * i386.h: added missing Data16/Data32 flags to a few instructions.
1842
1843 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1844
1845 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1846 (OP_MASK_BCC, OP_SH_BCC): Define.
1847 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1848 (OP_MASK_CCC, OP_SH_CCC): Define.
1849 (INSN_READ_FPR_R): Define.
1850 (INSN_RFE): Delete.
1851
1852 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1853
1854 * m68k.h (enum m68k_architecture): Deleted.
1855 (struct m68k_opcode_alias): New type.
1856 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1857 matching constraints, values and flags. As a side effect of this,
1858 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1859 as I know were never used, now may need re-examining.
1860 (numopcodes): Now const.
1861 (m68k_opcode_aliases, numaliases): New variables.
1862 (endop): Deleted.
1863 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1864 m68k_opcode_aliases; update declaration of m68k_opcodes.
1865
1866 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1867
1868 * hppa.h (delay_type): Delete unused enumeration.
1869 (pa_opcode): Replace unused delayed field with an architecture
1870 field.
1871 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1872
1873 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1874
1875 * mips.h (INSN_ISA4): Define.
1876
1877 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1878
1879 * mips.h (M_DLA_AB, M_DLI): Define.
1880
1881 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1882
1883 * hppa.h (fstwx): Fix single-bit error.
1884
1885 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1886
1887 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1888
1889 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1890
1891 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1892 debug registers. From Charles Hannum (mycroft@netbsd.org).
1893
1894 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1895
1896 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1897 i386 support:
1898 * i386.h (MOV_AX_DISP32): New macro.
1899 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1900 of several call/return instructions.
1901 (ADDR_PREFIX_OPCODE): New macro.
1902
1903 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1904
1905 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1906
1907 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1908 char.
1909 (struct vot, field `name'): ditto.
1910
1911 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1912
1913 * vax.h: Supply and properly group all values in end sentinel.
1914
1915 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1916
1917 * mips.h (INSN_ISA, INSN_4650): Define.
1918
1919 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1920
1921 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1922 systems with a separate instruction and data cache, such as the
1923 29040, these instructions take an optional argument.
1924
1925 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1926
1927 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1928 INSN_TRAP.
1929
1930 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1931
1932 * mips.h (INSN_STORE_MEMORY): Define.
1933
1934 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1935
1936 * sparc.h: Document new operand type 'x'.
1937
1938 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1939
1940 * i960.h (I_CX2): New instruction category. It includes
1941 instructions available on Cx and Jx processors.
1942 (I_JX): New instruction category, for JX-only instructions.
1943 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1944 Jx-only instructions, in I_JX category.
1945
1946 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1947
1948 * ns32k.h (endop): Made pointer const too.
1949
1950 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1951
1952 * ns32k.h: Drop Q operand type as there is no correct use
1953 for it. Add I and Z operand types which allow better checking.
1954
1955 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1956
1957 * h8300.h (xor.l) :fix bit pattern.
1958 (L_2): New size of operand.
1959 (trapa): Use it.
1960
1961 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1964
1965 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1966
1967 * sparc.h: Include v9 definitions.
1968
1969 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1970
1971 * m68k.h (m68060): Defined.
1972 (m68040up, mfloat, mmmu): Include it.
1973 (struct m68k_opcode): Widen `arch' field.
1974 (m68k_opcodes): Updated for M68060. Removed comments that were
1975 instructions commented out by "JF" years ago.
1976
1977 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1978
1979 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1980 add a one-bit `flags' field.
1981 (F_ALIAS): New macro.
1982
1983 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1984
1985 * h8300.h (dec, inc): Get encoding right.
1986
1987 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1988
1989 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1990 a flag instead.
1991 (PPC_OPERAND_SIGNED): Define.
1992 (PPC_OPERAND_SIGNOPT): Define.
1993
1994 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1995
1996 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1997 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1998
1999 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2000
2001 * i386.h: Reverse last change. It'll be handled in gas instead.
2002
2003 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2004
2005 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2006 slower on the 486 and used the implicit shift count despite the
2007 explicit operand. The one-operand form is still available to get
2008 the shorter form with the implicit shift count.
2009
2010 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2011
2012 * hppa.h: Fix typo in fstws arg string.
2013
2014 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2015
2016 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2017
2018 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2019
2020 * ppc.h (PPC_OPCODE_601): Define.
2021
2022 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2023
2024 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2025 (so we can determine valid completers for both addb and addb[tf].)
2026
2027 * hppa.h (xmpyu): No floating point format specifier for the
2028 xmpyu instruction.
2029
2030 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2031
2032 * ppc.h (PPC_OPERAND_NEXT): Define.
2033 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2034 (struct powerpc_macro): Define.
2035 (powerpc_macros, powerpc_num_macros): Declare.
2036
2037 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2038
2039 * ppc.h: New file. Header file for PowerPC opcode table.
2040
2041 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2042
2043 * hppa.h: More minor template fixes for sfu and copr (to allow
2044 for easier disassembly).
2045
2046 * hppa.h: Fix templates for all the sfu and copr instructions.
2047
2048 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2049
2050 * i386.h (push): Permit Imm16 operand too.
2051
2052 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2053
2054 * h8300.h (andc): Exists in base arch.
2055
2056 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2057
2058 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2059 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2060
2061 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2062
2063 * hppa.h: Add FP quadword store instructions.
2064
2065 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2066
2067 * mips.h: (M_J_A): Added.
2068 (M_LA): Removed.
2069
2070 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2071
2072 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2073 <mellon@pepper.ncd.com>.
2074
2075 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2076
2077 * hppa.h: Immediate field in probei instructions is unsigned,
2078 not low-sign extended.
2079
2080 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2081
2082 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2083
2084 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2085
2086 * i386.h: Add "fxch" without operand.
2087
2088 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2089
2090 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2091
2092 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2093
2094 * hppa.h: Add gfw and gfr to the opcode table.
2095
2096 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2097
2098 * m88k.h: extended to handle m88110.
2099
2100 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2101
2102 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2103 addresses.
2104
2105 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2106
2107 * i960.h (i960_opcodes): Properly bracket initializers.
2108
2109 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2110
2111 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2112
2113 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2114
2115 * m68k.h (two): Protect second argument with parentheses.
2116
2117 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2118
2119 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2120 Deleted old in/out instructions in "#if 0" section.
2121
2122 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2123
2124 * i386.h (i386_optab): Properly bracket initializers.
2125
2126 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2127
2128 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2129 Jeff Law, law@cs.utah.edu).
2130
2131 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2132
2133 * i386.h (lcall): Accept Imm32 operand also.
2134
2135 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2136
2137 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2138 (M_DABS): Added.
2139
2140 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2141
2142 * mips.h (INSN_*): Changed values. Removed unused definitions.
2143 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2144 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2145 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2146 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2147 (M_*): Added new values for r6000 and r4000 macros.
2148 (ANY_DELAY): Removed.
2149
2150 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2151
2152 * mips.h: Added M_LI_S and M_LI_SS.
2153
2154 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2155
2156 * h8300.h: Get some rare mov.bs correct.
2157
2158 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2159
2160 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2161 been included.
2162
2163 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2164
2165 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2166 jump instructions, for use in disassemblers.
2167
2168 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2169
2170 * m88k.h: Make bitfields just unsigned, not unsigned long or
2171 unsigned short.
2172
2173 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2174
2175 * hppa.h: New argument type 'y'. Use in various float instructions.
2176
2177 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2178
2179 * hppa.h (break): First immediate field is unsigned.
2180
2181 * hppa.h: Add rfir instruction.
2182
2183 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2184
2185 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2186
2187 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2188
2189 * mips.h: Reworked the hazard information somewhat, and fixed some
2190 bugs in the instruction hazard descriptions.
2191
2192 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2193
2194 * m88k.h: Corrected a couple of opcodes.
2195
2196 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2197
2198 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2199 new version includes instruction hazard information, but is
2200 otherwise reasonably similar.
2201
2202 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2203
2204 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2205
2206 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2207
2208 Patches from Jeff Law, law@cs.utah.edu:
2209 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2210 Make the tables be the same for the following instructions:
2211 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2212 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2213 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2214 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2215 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2216 "fcmp", and "ftest".
2217
2218 * hppa.h: Make new and old tables the same for "break", "mtctl",
2219 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2220 Fix typo in last patch. Collapse several #ifdefs into a
2221 single #ifdef.
2222
2223 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2224 of the comments up-to-date.
2225
2226 * hppa.h: Update "free list" of letters and update
2227 comments describing each letter's function.
2228
2229 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2230
2231 * h8300.h: Lots of little fixes for the h8/300h.
2232
2233 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2234
2235 Support for H8/300-H
2236 * h8300.h: Lots of new opcodes.
2237
2238 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2239
2240 * h8300.h: checkpoint, includes H8/300-H opcodes.
2241
2242 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2243
2244 * Patches from Jeffrey Law <law@cs.utah.edu>.
2245 * hppa.h: Rework single precision FP
2246 instructions so that they correctly disassemble code
2247 PA1.1 code.
2248
2249 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2250
2251 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2252 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2253
2254 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2255
2256 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2257 gdb will define it for now.
2258
2259 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2260
2261 * sparc.h: Don't end enumerator list with comma.
2262
2263 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2264
2265 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2266 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2267 ("bc2t"): Correct typo.
2268 ("[ls]wc[023]"): Use T rather than t.
2269 ("c[0123]"): Define general coprocessor instructions.
2270
2271 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2272
2273 * m68k.h: Move split point for gcc compilation more towards
2274 middle.
2275
2276 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2277
2278 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2279 simply wrong, ics, rfi, & rfsvc were missing).
2280 Add "a" to opr_ext for "bb". Doc fix.
2281
2282 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2283
2284 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2285 * mips.h: Add casts, to suppress warnings about shifting too much.
2286 * m68k.h: Document the placement code '9'.
2287
2288 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2289
2290 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2291 allows callers to break up the large initialized struct full of
2292 opcodes into two half-sized ones. This permits GCC to compile
2293 this module, since it takes exponential space for initializers.
2294 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2295
2296 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2297
2298 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2299 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2300 initialized structs in it.
2301
2302 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2303
2304 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2305 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2306 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2307
2308 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2309
2310 * mips.h: document "i" and "j" operands correctly.
2311
2312 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2313
2314 * mips.h: Removed endianness dependency.
2315
2316 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2317
2318 * h8300.h: include info on number of cycles per instruction.
2319
2320 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2321
2322 * hppa.h: Move handy aliases to the front. Fix masks for extract
2323 and deposit instructions.
2324
2325 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2326
2327 * i386.h: accept shld and shrd both with and without the shift
2328 count argument, which is always %cl.
2329
2330 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2331
2332 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2333 (one_byte_segment_defaults, two_byte_segment_defaults,
2334 i386_prefixtab_end): Ditto.
2335
2336 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2337
2338 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2339 for operand 2; from John Carr, jfc@dsg.dec.com.
2340
2341 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2342
2343 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2344 always use 16-bit offsets. Makes calculated-size jump tables
2345 feasible.
2346
2347 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2348
2349 * i386.h: Fix one-operand forms of in* and out* patterns.
2350
2351 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2352
2353 * m68k.h: Added CPU32 support.
2354
2355 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2356
2357 * mips.h (break): Disassemble the argument. Patch from
2358 jonathan@cs.stanford.edu (Jonathan Stone).
2359
2360 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2361
2362 * m68k.h: merged Motorola and MIT syntax.
2363
2364 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2365
2366 * m68k.h (pmove): make the tests less strict, the 68k book is
2367 wrong.
2368
2369 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2370
2371 * m68k.h (m68ec030): Defined as alias for 68030.
2372 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2373 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2374 them. Tightened description of "fmovex" to distinguish it from
2375 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2376 up descriptions that claimed versions were available for chips not
2377 supporting them. Added "pmovefd".
2378
2379 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2380
2381 * m68k.h: fix where the . goes in divull
2382
2383 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2384
2385 * m68k.h: the cas2 instruction is supposed to be written with
2386 indirection on the last two operands, which can be either data or
2387 address registers. Added a new operand type 'r' which accepts
2388 either register type. Added new cases for cas2l and cas2w which
2389 use them. Corrected masks for cas2 which failed to recognize use
2390 of address register.
2391
2392 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2393
2394 * m68k.h: Merged in patches (mostly m68040-specific) from
2395 Colin Smith <colin@wrs.com>.
2396
2397 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2398 base). Also cleaned up duplicates, re-ordered instructions for
2399 the sake of dis-assembling (so aliases come after standard names).
2400 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2401
2402 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2403
2404 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2405 all missing .s
2406
2407 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2408
2409 * sparc.h: Moved tables to BFD library.
2410
2411 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2412
2413 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2414
2415 * h8300.h: Finish filling in all the holes in the opcode table,
2416 so that the Lucid C compiler can digest this as well...
2417
2418 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2419
2420 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2421 Fix opcodes on various sizes of fild/fist instructions
2422 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2423 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2424
2425 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2426
2427 * h8300.h: Fill in all the holes in the opcode table so that the
2428 losing HPUX C compiler can digest this...
2429
2430 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2431
2432 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2433 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2434
2435 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2436
2437 * sparc.h: Add new architecture variant sparclite; add its scan
2438 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2439
2440 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2441
2442 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2443 fy@lucid.com).
2444
2445 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2446
2447 * rs6k.h: New version from IBM (Metin).
2448
2449 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2450
2451 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2452 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2453
2454 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2455
2456 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2457
2458 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2459
2460 * m68k.h (one, two): Cast macro args to unsigned to suppress
2461 complaints from compiler and lint about integer overflow during
2462 shift.
2463
2464 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2465
2466 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2467
2468 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2469
2470 * mips.h: Make bitfield layout depend on the HOST compiler,
2471 not on the TARGET system.
2472
2473 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2474
2475 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2476 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2477 <TRANLE@INTELLICORP.COM>.
2478
2479 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2480
2481 * h8300.h: turned op_type enum into #define list
2482
2483 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2484
2485 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2486 similar instructions -- they've been renamed to "fitoq", etc.
2487 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2488 number of arguments.
2489 * h8300.h: Remove extra ; which produces compiler warning.
2490
2491 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2492
2493 * sparc.h: fix opcode for tsubcctv.
2494
2495 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2496
2497 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2498
2499 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2500
2501 * sparc.h (nop): Made the 'lose' field be even tighter,
2502 so only a standard 'nop' is disassembled as a nop.
2503
2504 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2505
2506 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2507 disassembled as a nop.
2508
2509 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2510
2511 * m68k.h, sparc.h: ANSIfy enums.
2512
2513 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2514
2515 * sparc.h: fix a typo.
2516
2517 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2518
2519 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2520 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2521 vax.h: Renamed from ../<foo>-opcode.h.
2522
2523 \f
2524 Local Variables:
2525 version-control: never
2526 End:
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