1c1cb558e87411e3db27370eaf4365794ccd6f22
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-03-22 Alan Modra <alan@linuxcare.com.au>
2
3 * i386.h (i386_optab): Add paddq, psubq.
4
5 2001-03-19 Alan Modra <alan@linuxcare.com.au>
6
7 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
8
9 2001-02-28 Igor Shevlyakov <igor@windriver.com>
10
11 * m68k.h: new defines for Coldfire V4. Update mcf to know
12 about mcf5407.
13
14 2001-02-18 lars brinkhoff <lars@nocrew.org>
15
16 * pdp11.h: New file.
17
18 2001-02-12 Jan Hubicka <jh@suse.cz>
19
20 * i386.h (i386_optab): SSE integer converison instructions have
21 64bit versions on x86-64.
22
23 2001-02-10 Nick Clifton <nickc@redhat.com>
24
25 * mips.h: Remove extraneous whitespace. Formating change to allow
26 for future contribution.
27
28 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
29
30 * s390.h: New file.
31
32 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
33
34 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
35 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
36 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
37
38 2001-01-24 Karsten Keil <kkeil@suse.de>
39
40 * i386.h (i386_optab): Fix swapgs
41
42 2001-01-14 Alan Modra <alan@linuxcare.com.au>
43
44 * hppa.h: Describe new '<' and '>' operand types, and tidy
45 existing comments.
46 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
47 Remove duplicate "ldw j(s,b),x". Sort some entries.
48
49 2001-01-13 Jan Hubicka <jh@suse.cz>
50
51 * i386.h (i386_optab): Fix pusha and ret templates.
52
53 2001-01-11 Peter Targett <peter.targett@arccores.com>
54
55 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
56 definitions for masking cpu type.
57 (arc_ext_operand_value) New structure for storing extended
58 operands.
59 (ARC_OPERAND_*) Flags for operand values.
60
61 2001-01-10 Jan Hubicka <jh@suse.cz>
62
63 * i386.h (pinsrw): Add.
64 (pshufw): Remove.
65 (cvttpd2dq): Fix operands.
66 (cvttps2dq): Likewise.
67 (movq2q): Rename to movdq2q.
68
69 2001-01-10 Richard Schaal <richard.schaal@intel.com>
70
71 * i386.h: Correct movnti instruction.
72
73 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
74
75 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
76 of operands (unsigned char or unsigned short).
77 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
78 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
79
80 2001-01-05 Jan Hubicka <jh@suse.cz>
81
82 * i386.h (i386_optab): Make [sml]fence template to use immext field.
83
84 2001-01-03 Jan Hubicka <jh@suse.cz>
85
86 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
87 introduced by Pentium4
88
89 2000-12-30 Jan Hubicka <jh@suse.cz>
90
91 * i386.h (i386_optab): Add "rex*" instructions;
92 add swapgs; disable jmp/call far direct instructions for
93 64bit mode; add syscall and sysret; disable registers for 0xc6
94 template. Add 'q' suffixes to extendable instructions, disable
95 obsolete instructions, add new sign/zero extension ones.
96 (i386_regtab): Add extended registers.
97 (*Suf): Add No_qSuf.
98 (q_Suf, wlq_Suf, bwlq_Suf): New.
99
100 2000-12-20 Jan Hubicka <jh@suse.cz>
101
102 * i386.h (i386_optab): Replace "Imm" with "EncImm".
103 (i386_regtab): Add flags field.
104
105 2000-12-12 Nick Clifton <nickc@redhat.com>
106
107 * mips.h: Fix formatting.
108
109 2000-12-01 Chris Demetriou <cgd@sibyte.com>
110
111 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
112 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
113 OP_*_SYSCALL definitions.
114 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
115 19 bit wait codes.
116 (MIPS operand specifier comments): Remove 'm', add 'U' and
117 'J', and update the meaning of 'B' so that it's more general.
118
119 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
120 INSN_ISA5): Renumber, redefine to mean the ISA at which the
121 instruction was added.
122 (INSN_ISA32): New constant.
123 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
124 Renumber to avoid new and/or renumbered INSN_* constants.
125 (INSN_MIPS32): Delete.
126 (ISA_UNKNOWN): New constant to indicate unknown ISA.
127 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
128 ISA_MIPS32): New constants, defined to be the mask of INSN_*
129 constants available at that ISA level.
130 (CPU_UNKNOWN): New constant to indicate unknown CPU.
131 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
132 define it with a unique value.
133 (OPCODE_IS_MEMBER): Update for new ISA membership-related
134 constant meanings.
135
136 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
137 definitions.
138
139 * mips.h (CPU_SB1): New constant.
140
141 2000-10-20 Jakub Jelinek <jakub@redhat.com>
142
143 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
144 Note that '3' is used for siam operand.
145
146 2000-09-22 Jim Wilson <wilson@cygnus.com>
147
148 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
149
150 2000-09-13 Anders Norlander <anorland@acc.umu.se>
151
152 * mips.h: Use defines instead of hard-coded processor numbers.
153 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
154 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
155 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
156 CPU_4KC, CPU_4KM, CPU_4KP): Define..
157 (OPCODE_IS_MEMBER): Use new defines.
158 (OP_MASK_SEL, OP_SH_SEL): Define.
159 (OP_MASK_CODE20, OP_SH_CODE20): Define.
160 Add 'P' to used characters.
161 Use 'H' for coprocessor select field.
162 Use 'm' for 20 bit breakpoint code.
163 Document new arg characters and add to used characters.
164 (INSN_MIPS32): New define for MIPS32 extensions.
165 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
166
167 2000-09-05 Alan Modra <alan@linuxcare.com.au>
168
169 * hppa.h: Mention cz completer.
170
171 2000-08-16 Jim Wilson <wilson@cygnus.com>
172
173 * ia64.h (IA64_OPCODE_POSTINC): New.
174
175 2000-08-15 H.J. Lu <hjl@gnu.org>
176
177 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
178 IgnoreSize change.
179
180 2000-08-08 Jason Eckhardt <jle@cygnus.com>
181
182 * i860.h: Small formatting adjustments.
183
184 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
185
186 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
187 Move related opcodes closer to each other.
188 Minor changes in comments, list undefined opcodes.
189
190 2000-07-26 Dave Brolley <brolley@redhat.com>
191
192 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
193
194 2000-07-22 Jason Eckhardt <jle@cygnus.com>
195
196 * i860.h (btne, bte, bla): Changed these opcodes
197 to use sbroff ('r') instead of split16 ('s').
198 (J, K, L, M): New operand types for 16-bit aligned fields.
199 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
200 use I, J, K, L, M instead of just I.
201 (T, U): New operand types for split 16-bit aligned fields.
202 (st.x): Changed these opcodes to use S, T, U instead of just S.
203 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
204 exist on the i860.
205 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
206 (pfeq.ss, pfeq.dd): New opcodes.
207 (st.s): Fixed incorrect mask bits.
208 (fmlow): Fixed incorrect mask bits.
209 (fzchkl, pfzchkl): Fixed incorrect mask bits.
210 (faddz, pfaddz): Fixed incorrect mask bits.
211 (form, pform): Fixed incorrect mask bits.
212 (pfld.l): Fixed incorrect mask bits.
213 (fst.q): Fixed incorrect mask bits.
214 (all floating point opcodes): Fixed incorrect mask bits for
215 handling of dual bit.
216
217 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
218
219 cris.h: New file.
220
221 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
222
223 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
224 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
225 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
226 (AVR_ISA_M83): Define for ATmega83, ATmega85.
227 (espm): Remove, because ESPM removed in databook update.
228 (eicall, eijmp): Move to the end of opcode table.
229
230 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
231
232 * m68hc11.h: New file for support of Motorola 68hc11.
233
234 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
235
236 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
237
238 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
239
240 * avr.h: New file with AVR opcodes.
241
242 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
243
244 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
245
246 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
247
248 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
249
250 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
251
252 * i386.h: Use sl_FP, not sl_Suf for fild.
253
254 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
255
256 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
257 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
258 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
259 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
260
261 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
262
263 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
264
265 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
266 Alexander Sokolov <robocop@netlink.ru>
267
268 * i386.h (i386_optab): Add cpu_flags for all instructions.
269
270 2000-05-13 Alan Modra <alan@linuxcare.com.au>
271
272 From Gavin Romig-Koch <gavin@cygnus.com>
273 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
274
275 2000-05-04 Timothy Wall <twall@cygnus.com>
276
277 * tic54x.h: New.
278
279 2000-05-03 J.T. Conklin <jtc@redback.com>
280
281 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
282 (PPC_OPERAND_VR): New operand flag for vector registers.
283
284 2000-05-01 Kazu Hirata <kazu@hxi.com>
285
286 * h8300.h (EOP): Add missing initializer.
287
288 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
289
290 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
291 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
292 New operand types l,y,&,fe,fE,fx added to support above forms.
293 (pa_opcodes): Replaced usage of 'x' as source/target for
294 floating point double-word loads/stores with 'fx'.
295
296 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
297 David Mosberger <davidm@hpl.hp.com>
298 Timothy Wall <twall@cygnus.com>
299 Jim Wilson <wilson@cygnus.com>
300
301 * ia64.h: New file.
302
303 2000-03-27 Nick Clifton <nickc@cygnus.com>
304
305 * d30v.h (SHORT_A1): Fix value.
306 (SHORT_AR): Renumber so that it is at the end of the list of short
307 instructions, not the end of the list of long instructions.
308
309 2000-03-26 Alan Modra <alan@linuxcare.com>
310
311 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
312 problem isn't really specific to Unixware.
313 (OLDGCC_COMPAT): Define.
314 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
315 destination %st(0).
316 Fix lots of comments.
317
318 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
319
320 * d30v.h:
321 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
322 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
323 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
324 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
325 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
326 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
327 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
328
329 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
330
331 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
332 fistpd without suffix.
333
334 2000-02-24 Nick Clifton <nickc@cygnus.com>
335
336 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
337 'signed_overflow_ok_p'.
338 Delete prototypes for cgen_set_flags() and cgen_get_flags().
339
340 2000-02-24 Andrew Haley <aph@cygnus.com>
341
342 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
343 (CGEN_CPU_TABLE): flags: new field.
344 Add prototypes for new functions.
345
346 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
347
348 * i386.h: Add some more UNIXWARE_COMPAT comments.
349
350 2000-02-23 Linas Vepstas <linas@linas.org>
351
352 * i370.h: New file.
353
354 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
355
356 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
357 cannot be combined in parallel with ADD/SUBppp.
358
359 2000-02-22 Andrew Haley <aph@cygnus.com>
360
361 * mips.h: (OPCODE_IS_MEMBER): Add comment.
362
363 1999-12-30 Andrew Haley <aph@cygnus.com>
364
365 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
366 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
367 insns.
368
369 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
370
371 * i386.h: Qualify intel mode far call and jmp with x_Suf.
372
373 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
374
375 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
376 indirect jumps and calls. Add FF/3 call for intel mode.
377
378 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
379
380 * mn10300.h: Add new operand types. Add new instruction formats.
381
382 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
383
384 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
385 instruction.
386
387 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
388
389 * mips.h (INSN_ISA5): New.
390
391 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
392
393 * mips.h (OPCODE_IS_MEMBER): New.
394
395 1999-10-29 Nick Clifton <nickc@cygnus.com>
396
397 * d30v.h (SHORT_AR): Define.
398
399 1999-10-18 Michael Meissner <meissner@cygnus.com>
400
401 * alpha.h (alpha_num_opcodes): Convert to unsigned.
402 (alpha_num_operands): Ditto.
403
404 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
405
406 * hppa.h (pa_opcodes): Add load and store cache control to
407 instructions. Add ordered access load and store.
408
409 * hppa.h (pa_opcode): Add new entries for addb and addib.
410
411 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
412
413 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
414
415 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
416
417 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
418
419 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
420
421 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
422 and "be" using completer prefixes.
423
424 * hppa.h (pa_opcodes): Add initializers to silence compiler.
425
426 * hppa.h: Update comments about character usage.
427
428 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
429
430 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
431 up the new fstw & bve instructions.
432
433 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
434
435 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
436 instructions.
437
438 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
439
440 * hppa.h (pa_opcodes): Add long offset double word load/store
441 instructions.
442
443 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
444 stores.
445
446 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
447
448 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
449
450 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
451
452 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
453
454 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
455
456 * hppa.h (pa_opcodes): Add support for "b,l".
457
458 * hppa.h (pa_opcodes): Add support for "b,gate".
459
460 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
461
462 * hppa.h (pa_opcodes): Use 'fX' for first register operand
463 in xmpyu.
464
465 * hppa.h (pa_opcodes): Fix mask for probe and probei.
466
467 * hppa.h (pa_opcodes): Fix mask for depwi.
468
469 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
470
471 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
472 an explicit output argument.
473
474 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
475
476 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
477 Add a few PA2.0 loads and store variants.
478
479 1999-09-04 Steve Chamberlain <sac@pobox.com>
480
481 * pj.h: New file.
482
483 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
484
485 * i386.h (i386_regtab): Move %st to top of table, and split off
486 other fp reg entries.
487 (i386_float_regtab): To here.
488
489 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
490
491 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
492 by 'f'.
493
494 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
495 Add supporting args.
496
497 * hppa.h: Document new completers and args.
498 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
499 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
500 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
501 pmenb and pmdis.
502
503 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
504 hshr, hsub, mixh, mixw, permh.
505
506 * hppa.h (pa_opcodes): Change completers in instructions to
507 use 'c' prefix.
508
509 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
510 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
511
512 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
513 fnegabs to use 'I' instead of 'F'.
514
515 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
516
517 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
518 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
519 Alphabetically sort PIII insns.
520
521 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
522
523 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
524
525 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
526
527 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
528 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
529
530 * hppa.h: Document 64 bit condition completers.
531
532 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
533
534 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
535
536 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
537
538 * i386.h (i386_optab): Add DefaultSize modifier to all insns
539 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
540 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
541
542 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
543 Jeff Law <law@cygnus.com>
544
545 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
546
547 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
548
549 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
550 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
551
552 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
553
554 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
555
556 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
557
558 * hppa.h (struct pa_opcode): Add new field "flags".
559 (FLAGS_STRICT): Define.
560
561 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
562 Jeff Law <law@cygnus.com>
563
564 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
565
566 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
567
568 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
569
570 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
571 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
572 flag to fcomi and friends.
573
574 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
575
576 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
577 integer logical instructions.
578
579 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
580
581 * m68k.h: Document new formats `E', `G', `H' and new places `N',
582 `n', `o'.
583
584 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
585 and new places `m', `M', `h'.
586
587 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
588
589 * hppa.h (pa_opcodes): Add several processor specific system
590 instructions.
591
592 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
593
594 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
595 "addb", and "addib" to be used by the disassembler.
596
597 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
598
599 * i386.h (ReverseModrm): Remove all occurences.
600 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
601 movmskps, pextrw, pmovmskb, maskmovq.
602 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
603 ignore the data size prefix.
604
605 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
606 Mostly stolen from Doug Ledford <dledford@redhat.com>
607
608 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
609
610 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
611
612 1999-04-14 Doug Evans <devans@casey.cygnus.com>
613
614 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
615 (CGEN_ATTR_TYPE): Update.
616 (CGEN_ATTR_MASK): Number booleans starting at 0.
617 (CGEN_ATTR_VALUE): Update.
618 (CGEN_INSN_ATTR): Update.
619
620 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
621
622 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
623 instructions.
624
625 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
626
627 * hppa.h (bb, bvb): Tweak opcode/mask.
628
629
630 1999-03-22 Doug Evans <devans@casey.cygnus.com>
631
632 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
633 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
634 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
635 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
636 Delete member max_insn_size.
637 (enum cgen_cpu_open_arg): New enum.
638 (cpu_open): Update prototype.
639 (cpu_open_1): Declare.
640 (cgen_set_cpu): Delete.
641
642 1999-03-11 Doug Evans <devans@casey.cygnus.com>
643
644 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
645 (CGEN_OPERAND_NIL): New macro.
646 (CGEN_OPERAND): New member `type'.
647 (@arch@_cgen_operand_table): Delete decl.
648 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
649 (CGEN_OPERAND_TABLE): New struct.
650 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
651 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
652 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
653 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
654 {get,set}_{int,vma}_operand.
655 (@arch@_cgen_cpu_open): New arg `isa'.
656 (cgen_set_cpu): Ditto.
657
658 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
659
660 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
661
662 1999-02-25 Doug Evans <devans@casey.cygnus.com>
663
664 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
665 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
666 enum cgen_hw_type.
667 (CGEN_HW_TABLE): New struct.
668 (hw_table): Delete declaration.
669 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
670 to table entry to enum.
671 (CGEN_OPINST): Ditto.
672 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
673
674 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
675
676 * alpha.h (AXP_OPCODE_EV6): New.
677 (AXP_OPCODE_NOPAL): Include it.
678
679 1999-02-09 Doug Evans <devans@casey.cygnus.com>
680
681 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
682 All uses updated. New members int_insn_p, max_insn_size,
683 parse_operand,insert_operand,extract_operand,print_operand,
684 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
685 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
686 extract_handlers,print_handlers.
687 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
688 (CGEN_ATTR_BOOL_OFFSET): New macro.
689 (CGEN_ATTR_MASK): Subtract it to compute bit number.
690 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
691 (cgen_opcode_handler): Renamed from cgen_base.
692 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
693 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
694 all uses updated.
695 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
696 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
697 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
698 (CGEN_OPCODE,CGEN_IBASE): New types.
699 (CGEN_INSN): Rewrite.
700 (CGEN_{ASM,DIS}_HASH*): Delete.
701 (init_opcode_table,init_ibld_table): Declare.
702 (CGEN_INSN_ATTR): New type.
703
704 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
705
706 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
707 (x_FP, d_FP, dls_FP, sldx_FP): Define.
708 Change *Suf definitions to include x and d suffixes.
709 (movsx): Use w_Suf and b_Suf.
710 (movzx): Likewise.
711 (movs): Use bwld_Suf.
712 (fld): Change ordering. Use sld_FP.
713 (fild): Add Intel Syntax equivalent of fildq.
714 (fst): Use sld_FP.
715 (fist): Use sld_FP.
716 (fstp): Use sld_FP. Add x_FP version.
717 (fistp): LLongMem version for Intel Syntax.
718 (fcom, fcomp): Use sld_FP.
719 (fadd, fiadd, fsub): Use sld_FP.
720 (fsubr): Use sld_FP.
721 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
722
723 1999-01-27 Doug Evans <devans@casey.cygnus.com>
724
725 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
726 CGEN_MODE_UINT.
727
728 1999-01-16 Jeffrey A Law (law@cygnus.com)
729
730 * hppa.h (bv): Fix mask.
731
732 1999-01-05 Doug Evans <devans@casey.cygnus.com>
733
734 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
735 (CGEN_ATTR): Use it.
736 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
737 (CGEN_ATTR_TABLE): New member dfault.
738
739 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
740
741 * mips.h (MIPS16_INSN_BRANCH): New.
742
743 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
744
745 The following is part of a change made by Edith Epstein
746 <eepstein@sophia.cygnus.com> as part of a project to merge in
747 changes by HP; HP did not create ChangeLog entries.
748
749 * hppa.h (completer_chars): list of chars to not put a space
750 after.
751
752 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
753
754 * i386.h (i386_optab): Permit w suffix on processor control and
755 status word instructions.
756
757 1998-11-30 Doug Evans <devans@casey.cygnus.com>
758
759 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
760 (struct cgen_keyword_entry): Ditto.
761 (struct cgen_operand): Ditto.
762 (CGEN_IFLD): New typedef, with associated access macros.
763 (CGEN_IFMT): New typedef, with associated access macros.
764 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
765 (CGEN_IVALUE): New typedef.
766 (struct cgen_insn): Delete const on syntax,attrs members.
767 `format' now points to format data. Type of `value' is now
768 CGEN_IVALUE.
769 (struct cgen_opcode_table): New member ifld_table.
770
771 1998-11-18 Doug Evans <devans@casey.cygnus.com>
772
773 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
774 (CGEN_OPERAND_INSTANCE): New member `attrs'.
775 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
776 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
777 (cgen_opcode_table): Update type of dis_hash fn.
778 (extract_operand): Update type of `insn_value' arg.
779
780 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
781
782 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
783
784 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
785
786 * mips.h (INSN_MULT): Added.
787
788 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
789
790 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
791
792 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
793
794 * cgen.h (CGEN_INSN_INT): New typedef.
795 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
796 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
797 (CGEN_INSN_BYTES_PTR): New typedef.
798 (CGEN_EXTRACT_INFO): New typedef.
799 (cgen_insert_fn,cgen_extract_fn): Update.
800 (cgen_opcode_table): New member `insn_endian'.
801 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
802 (insert_operand,extract_operand): Update.
803 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
804
805 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
806
807 * cgen.h (CGEN_ATTR_BOOLS): New macro.
808 (struct CGEN_HW_ENTRY): New member `attrs'.
809 (CGEN_HW_ATTR): New macro.
810 (struct CGEN_OPERAND_INSTANCE): New member `name'.
811 (CGEN_INSN_INVALID_P): New macro.
812
813 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
814
815 * hppa.h: Add "fid".
816
817 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
818
819 From Robert Andrew Dale <rob@nb.net>
820 * i386.h (i386_optab): Add AMD 3DNow! instructions.
821 (AMD_3DNOW_OPCODE): Define.
822
823 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
824
825 * d30v.h (EITHER_BUT_PREFER_MU): Define.
826
827 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
828
829 * cgen.h (cgen_insn): #if 0 out element `cdx'.
830
831 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
832
833 Move all global state data into opcode table struct, and treat
834 opcode table as something that is "opened/closed".
835 * cgen.h (CGEN_OPCODE_DESC): New type.
836 (all fns): New first arg of opcode table descriptor.
837 (cgen_set_parse_operand_fn): Add prototype.
838 (cgen_current_machine,cgen_current_endian): Delete.
839 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
840 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
841 dis_hash_table,dis_hash_table_entries.
842 (opcode_open,opcode_close): Add prototypes.
843
844 * cgen.h (cgen_insn): New element `cdx'.
845
846 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
847
848 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
849
850 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
851
852 * mn10300.h: Add "no_match_operands" field for instructions.
853 (MN10300_MAX_OPERANDS): Define.
854
855 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
856
857 * cgen.h (cgen_macro_insn_count): Declare.
858
859 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
860
861 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
862 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
863 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
864 set_{int,vma}_operand.
865
866 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
867
868 * mn10300.h: Add "machine" field for instructions.
869 (MN103, AM30): Define machine types.
870
871 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
872
873 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
874
875 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
876
877 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
878
879 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
880
881 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
882 and ud2b.
883 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
884 those that happen to be implemented on pentiums.
885
886 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
887
888 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
889 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
890 with Size16|IgnoreSize or Size32|IgnoreSize.
891
892 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
893
894 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
895 (REPE): Rename to REPE_PREFIX_OPCODE.
896 (i386_regtab_end): Remove.
897 (i386_prefixtab, i386_prefixtab_end): Remove.
898 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
899 of md_begin.
900 (MAX_OPCODE_SIZE): Define.
901 (i386_optab_end): Remove.
902 (sl_Suf): Define.
903 (sl_FP): Use sl_Suf.
904
905 * i386.h (i386_optab): Allow 16 bit displacement for `mov
906 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
907 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
908 data32, dword, and adword prefixes.
909 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
910 regs.
911
912 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
913
914 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
915
916 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
917 register operands, because this is a common idiom. Flag them with
918 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
919 fdivrp because gcc erroneously generates them. Also flag with a
920 warning.
921
922 * i386.h: Add suffix modifiers to most insns, and tighter operand
923 checks in some cases. Fix a number of UnixWare compatibility
924 issues with float insns. Merge some floating point opcodes, using
925 new FloatMF modifier.
926 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
927 consistency.
928
929 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
930 IgnoreDataSize where appropriate.
931
932 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
933
934 * i386.h: (one_byte_segment_defaults): Remove.
935 (two_byte_segment_defaults): Remove.
936 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
937
938 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
939
940 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
941 (cgen_hw_lookup_by_num): Declare.
942
943 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
944
945 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
946 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
947
948 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
949
950 * cgen.h (cgen_asm_init_parse): Delete.
951 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
952 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
953
954 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
955
956 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
957 (cgen_asm_finish_insn): Update prototype.
958 (cgen_insn): New members num, data.
959 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
960 dis_hash, dis_hash_table_size moved to ...
961 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
962 All uses updated. New members asm_hash_p, dis_hash_p.
963 (CGEN_MINSN_EXPANSION): New struct.
964 (cgen_expand_macro_insn): Declare.
965 (cgen_macro_insn_count): Declare.
966 (get_insn_operands): Update prototype.
967 (lookup_get_insn_operands): Declare.
968
969 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
970
971 * i386.h (i386_optab): Change iclrKludge and imulKludge to
972 regKludge. Add operands types for string instructions.
973
974 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
975
976 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
977 table.
978
979 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
980
981 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
982 for `gettext'.
983
984 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
985
986 * i386.h: Remove NoModrm flag from all insns: it's never checked.
987 Add IsString flag to string instructions.
988 (IS_STRING): Don't define.
989 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
990 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
991 (SS_PREFIX_OPCODE): Define.
992
993 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
994
995 * i386.h: Revert March 24 patch; no more LinearAddress.
996
997 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
998
999 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1000 instructions, and instead add FWait opcode modifier. Add short
1001 form of fldenv and fstenv.
1002 (FWAIT_OPCODE): Define.
1003
1004 * i386.h (i386_optab): Change second operand constraint of `mov
1005 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1006 allow legal instructions such as `movl %gs,%esi'
1007
1008 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1009
1010 * h8300.h: Various changes to fully bracket initializers.
1011
1012 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1013
1014 * i386.h: Set LinearAddress for lidt and lgdt.
1015
1016 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1017
1018 * cgen.h (CGEN_BOOL_ATTR): New macro.
1019
1020 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1021
1022 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1023
1024 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1025
1026 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1027 (cgen_insn): Record syntax and format entries here, rather than
1028 separately.
1029
1030 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1031
1032 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1033
1034 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1035
1036 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1037 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1038 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1039
1040 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1041
1042 * cgen.h (lookup_insn): New argument alias_p.
1043
1044 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1045
1046 Fix rac to accept only a0:
1047 * d10v.h (OPERAND_ACC): Split into:
1048 (OPERAND_ACC0, OPERAND_ACC1) .
1049 (OPERAND_GPR): Define.
1050
1051 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1052
1053 * cgen.h (CGEN_FIELDS): Define here.
1054 (CGEN_HW_ENTRY): New member `type'.
1055 (hw_list): Delete decl.
1056 (enum cgen_mode): Declare.
1057 (CGEN_OPERAND): New member `hw'.
1058 (enum cgen_operand_instance_type): Declare.
1059 (CGEN_OPERAND_INSTANCE): New type.
1060 (CGEN_INSN): New member `operands'.
1061 (CGEN_OPCODE_DATA): Make hw_list const.
1062 (get_insn_operands,lookup_insn): Add prototypes for.
1063
1064 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1065
1066 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1067 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1068 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1069 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1070
1071 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1072
1073 * cgen.h: Correct typo in comment end marker.
1074
1075 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1076
1077 * tic30.h: New file.
1078
1079 Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1080
1081 * cgen.h: Add prototypes for cgen_save_fixups(),
1082 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1083 of cgen_asm_finish_insn() to return a char *.
1084
1085 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1086
1087 * cgen.h: Formatting changes to improve readability.
1088
1089 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1090
1091 * cgen.h (*): Clean up pass over `struct foo' usage.
1092 (CGEN_ATTR): Make unsigned char.
1093 (CGEN_ATTR_TYPE): Update.
1094 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1095 (cgen_base): Move member `attrs' to cgen_insn.
1096 (CGEN_KEYWORD): New member `null_entry'.
1097 (CGEN_{SYNTAX,FORMAT}): New types.
1098 (cgen_insn): Format and syntax separated from each other.
1099
1100 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1101
1102 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1103 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1104 flags_{used,set} long.
1105 (d30v_operand): Make flags field long.
1106
1107 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1108
1109 * m68k.h: Fix comment describing operand types.
1110
1111 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1112
1113 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1114 everything else after down.
1115
1116 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1117
1118 * d10v.h (OPERAND_FLAG): Split into:
1119 (OPERAND_FFLAG, OPERAND_CFLAG) .
1120
1121 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1122
1123 * mips.h (struct mips_opcode): Changed comments to reflect new
1124 field usage.
1125
1126 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1127
1128 * mips.h: Added to comments a quick-ref list of all assigned
1129 operand type characters.
1130 (OP_{MASK,SH}_PERFREG): New macros.
1131
1132 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1133
1134 * sparc.h: Add '_' and '/' for v9a asr's.
1135 Patch from David Miller <davem@vger.rutgers.edu>
1136
1137 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1138
1139 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1140 area are not available in the base model (H8/300).
1141
1142 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1143
1144 * m68k.h: Remove documentation of ` operand specifier.
1145
1146 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1147
1148 * m68k.h: Document q and v operand specifiers.
1149
1150 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1151
1152 * v850.h (struct v850_opcode): Add processors field.
1153 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1154 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1155 (PROCESSOR_V850EA): New bit constants.
1156
1157 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1158
1159 Merge changes from Martin Hunt:
1160
1161 * d30v.h: Allow up to 64 control registers. Add
1162 SHORT_A5S format.
1163
1164 * d30v.h (LONG_Db): New form for delayed branches.
1165
1166 * d30v.h: (LONG_Db): New form for repeati.
1167
1168 * d30v.h (SHORT_D2B): New form.
1169
1170 * d30v.h (SHORT_A2): New form.
1171
1172 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1173 registers are used. Needed for VLIW optimization.
1174
1175 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1176
1177 * cgen.h: Move assembler interface section
1178 up so cgen_parse_operand_result is defined for cgen_parse_address.
1179 (cgen_parse_address): Update prototype.
1180
1181 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1182
1183 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1184
1185 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1186
1187 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1188 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1189 <paubert@iram.es>.
1190
1191 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1192 <paubert@iram.es>.
1193
1194 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1195 <paubert@iram.es>.
1196
1197 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1198 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1199
1200 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1201
1202 * v850.h (V850_NOT_R0): New flag.
1203
1204 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1205
1206 * v850.h (struct v850_opcode): Remove flags field.
1207
1208 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1209
1210 * v850.h (struct v850_opcode): Add flags field.
1211 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1212 fields.
1213 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1214 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1215
1216 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1217
1218 * arc.h: New file.
1219
1220 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1221
1222 * sparc.h (sparc_opcodes): Declare as const.
1223
1224 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1225
1226 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1227 uses single or double precision floating point resources.
1228 (INSN_NO_ISA, INSN_ISA1): Define.
1229 (cpu specific INSN macros): Tweak into bitmasks outside the range
1230 of INSN_ISA field.
1231
1232 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1233
1234 * i386.h: Fix pand opcode.
1235
1236 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1237
1238 * mips.h: Widen INSN_ISA and move it to a more convenient
1239 bit position. Add INSN_3900.
1240
1241 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1242
1243 * mips.h (struct mips_opcode): added new field membership.
1244
1245 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1246
1247 * i386.h (movd): only Reg32 is allowed.
1248
1249 * i386.h: add fcomp and ud2. From Wayne Scott
1250 <wscott@ichips.intel.com>.
1251
1252 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1253
1254 * i386.h: Add MMX instructions.
1255
1256 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1257
1258 * i386.h: Remove W modifier from conditional move instructions.
1259
1260 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1261
1262 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1263 with no arguments to match that generated by the UnixWare
1264 assembler.
1265
1266 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1267
1268 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1269 (cgen_parse_operand_fn): Declare.
1270 (cgen_init_parse_operand): Declare.
1271 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1272 new argument `want'.
1273 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1274 (enum cgen_parse_operand_type): New enum.
1275
1276 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1277
1278 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1279
1280 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1281
1282 * cgen.h: New file.
1283
1284 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1285
1286 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1287 fdivrp.
1288
1289 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1290
1291 * v850.h (extract): Make unsigned.
1292
1293 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1294
1295 * i386.h: Add iclr.
1296
1297 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1298
1299 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1300 take a direction bit.
1301
1302 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1303
1304 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1305
1306 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1307
1308 * sparc.h: Include <ansidecl.h>. Update function declarations to
1309 use prototypes, and to use const when appropriate.
1310
1311 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1312
1313 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1314
1315 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1316
1317 * d10v.h: Change pre_defined_registers to
1318 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1319
1320 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1321
1322 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1323 Change mips_opcodes from const array to a pointer,
1324 and change bfd_mips_num_opcodes from const int to int,
1325 so that we can increase the size of the mips opcodes table
1326 dynamically.
1327
1328 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1329
1330 * d30v.h (FLAG_X): Remove unused flag.
1331
1332 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1333
1334 * d30v.h: New file.
1335
1336 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1337
1338 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1339 (PDS_VALUE): Macro to access value field of predefined symbols.
1340 (tic80_next_predefined_symbol): Add prototype.
1341
1342 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1343
1344 * tic80.h (tic80_symbol_to_value): Change prototype to match
1345 change in function, added class parameter.
1346
1347 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1348
1349 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1350 endmask fields, which are somewhat weird in that 0 and 32 are
1351 treated exactly the same.
1352
1353 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1354
1355 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1356 rather than a constant that is 2**X. Reorder them to put bits for
1357 operands that have symbolic names in the upper bits, so they can
1358 be packed into an int where the lower bits contain the value that
1359 corresponds to that symbolic name.
1360 (predefined_symbo): Add struct.
1361 (tic80_predefined_symbols): Declare array of translations.
1362 (tic80_num_predefined_symbols): Declare size of that array.
1363 (tic80_value_to_symbol): Declare function.
1364 (tic80_symbol_to_value): Declare function.
1365
1366 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1367
1368 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1369
1370 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1371
1372 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1373 be the destination register.
1374
1375 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1376
1377 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1378 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1379 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1380 that the opcode can have two vector instructions in a single
1381 32 bit word and we have to encode/decode both.
1382
1383 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1384
1385 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1386 TIC80_OPERAND_RELATIVE for PC relative.
1387 (TIC80_OPERAND_BASEREL): New flag bit for register
1388 base relative.
1389
1390 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1391
1392 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1393
1394 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1395
1396 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1397 ":s" modifier for scaling.
1398
1399 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1400
1401 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1402 (TIC80_OPERAND_M_LI): Ditto
1403
1404 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1405
1406 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1407 (TIC80_OPERAND_CC): New define for condition code operand.
1408 (TIC80_OPERAND_CR): New define for control register operand.
1409
1410 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1411
1412 * tic80.h (struct tic80_opcode): Name changed.
1413 (struct tic80_opcode): Remove format field.
1414 (struct tic80_operand): Add insertion and extraction functions.
1415 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1416 correct ones.
1417 (FMT_*): Ditto.
1418
1419 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1420
1421 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1422 type IV instruction offsets.
1423
1424 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1425
1426 * tic80.h: New file.
1427
1428 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1429
1430 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1431
1432 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1433
1434 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1435 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1436 * v850.h: Fix comment, v850_operand not powerpc_operand.
1437
1438 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1439
1440 * mn10200.h: Flesh out structures and definitions needed by
1441 the mn10200 assembler & disassembler.
1442
1443 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1444
1445 * mips.h: Add mips16 definitions.
1446
1447 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1448
1449 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1450
1451 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1452
1453 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1454 (MN10300_OPERAND_MEMADDR): Define.
1455
1456 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1457
1458 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1459
1460 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1461
1462 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1463
1464 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1465
1466 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1467
1468 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1469
1470 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1471
1472 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1473
1474 * alpha.h: Don't include "bfd.h"; private relocation types are now
1475 negative to minimize problems with shared libraries. Organize
1476 instruction subsets by AMASK extensions and PALcode
1477 implementation.
1478 (struct alpha_operand): Move flags slot for better packing.
1479
1480 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1481
1482 * v850.h (V850_OPERAND_RELAX): New operand flag.
1483
1484 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1485
1486 * mn10300.h (FMT_*): Move operand format definitions
1487 here.
1488
1489 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1492
1493 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * mn10300.h (mn10300_opcode): Add "format" field.
1496 (MN10300_OPERAND_*): Define.
1497
1498 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1499
1500 * mn10x00.h: Delete.
1501 * mn10200.h, mn10300.h: New files.
1502
1503 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1504
1505 * mn10x00.h: New file.
1506
1507 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1508
1509 * v850.h: Add new flag to indicate this instruction uses a PC
1510 displacement.
1511
1512 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1513
1514 * h8300.h (stmac): Add missing instruction.
1515
1516 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1517
1518 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1519 field.
1520
1521 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1522
1523 * v850.h (V850_OPERAND_EP): Define.
1524
1525 * v850.h (v850_opcode): Add size field.
1526
1527 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1528
1529 * v850.h (v850_operands): Add insert and extract fields, pointers
1530 to functions used to handle unusual operand encoding.
1531 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1532 V850_OPERAND_SIGNED): Defined.
1533
1534 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1535
1536 * v850.h (v850_operands): Add flags field.
1537 (OPERAND_REG, OPERAND_NUM): Defined.
1538
1539 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1540
1541 * v850.h: New file.
1542
1543 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1544
1545 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1546 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1547 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1548 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1549 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1550 Defined.
1551
1552 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1555 a 3 bit space id instead of a 2 bit space id.
1556
1557 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1558
1559 * d10v.h: Add some additional defines to support the
1560 assembler in determining which operations can be done in parallel.
1561
1562 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1563
1564 * h8300.h (SN): Define.
1565 (eepmov.b): Renamed from "eepmov"
1566 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1567 with them.
1568
1569 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1570
1571 * d10v.h (OPERAND_SHIFT): New operand flag.
1572
1573 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1574
1575 * d10v.h: Changes for divs, parallel-only instructions, and
1576 signed numbers.
1577
1578 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1579
1580 * d10v.h (pd_reg): Define. Putting the definition here allows
1581 the assembler and disassembler to share the same struct.
1582
1583 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1584
1585 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1586 Williams <steve@icarus.com>.
1587
1588 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1589
1590 * d10v.h: New file.
1591
1592 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1593
1594 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1595
1596 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1597
1598 * m68k.h (mcf5200): New macro.
1599 Document names of coldfire control registers.
1600
1601 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1602
1603 * h8300.h (SRC_IN_DST): Define.
1604
1605 * h8300.h (UNOP3): Mark the register operand in this insn
1606 as a source operand, not a destination operand.
1607 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1608 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1609 register operand with SRC_IN_DST.
1610
1611 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1612
1613 * alpha.h: New file.
1614
1615 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1616
1617 * rs6k.h: Remove obsolete file.
1618
1619 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1620
1621 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1622 fdivp, and fdivrp. Add ffreep.
1623
1624 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1625
1626 * h8300.h: Reorder various #defines for readability.
1627 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1628 (BITOP): Accept additional (unused) argument. All callers changed.
1629 (EBITOP): Likewise.
1630 (O_LAST): Bump.
1631 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1632
1633 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1634 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1635 (BITOP, EBITOP): Handle new H8/S addressing modes for
1636 bit insns.
1637 (UNOP3): Handle new shift/rotate insns on the H8/S.
1638 (insns using exr): New instructions.
1639 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1640
1641 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1642
1643 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1644 was incorrect.
1645
1646 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1647
1648 * h8300.h (START): Remove.
1649 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1650 and mov.l insns that can be relaxed.
1651
1652 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1653
1654 * i386.h: Remove Abs32 from lcall.
1655
1656 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1657
1658 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1659 (SLCPOP): New macro.
1660 Mark X,Y opcode letters as in use.
1661
1662 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1663
1664 * sparc.h (F_FLOAT, F_FBR): Define.
1665
1666 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1667
1668 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1669 from all insns.
1670 (ABS8SRC,ABS8DST): Add ABS8MEM.
1671 (add.l): Fix reg+reg variant.
1672 (eepmov.w): Renamed from eepmovw.
1673 (ldc,stc): Fix many cases.
1674
1675 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1676
1677 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1678
1679 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1680
1681 * sparc.h (O): Mark operand letter as in use.
1682
1683 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1684
1685 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1686 Mark operand letters uU as in use.
1687
1688 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1689
1690 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1691 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1692 (SPARC_OPCODE_SUPPORTED): New macro.
1693 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1694 (F_NOTV9): Delete.
1695
1696 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1697
1698 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1699 declaration consistent with return type in definition.
1700
1701 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1702
1703 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1704
1705 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1706
1707 * i386.h (i386_regtab): Add 80486 test registers.
1708
1709 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1710
1711 * i960.h (I_HX): Define.
1712 (i960_opcodes): Add HX instruction.
1713
1714 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1715
1716 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1717 and fclex.
1718
1719 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1720
1721 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1722 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1723 (bfd_* defines): Delete.
1724 (sparc_opcode_archs): Replaces architecture_pname.
1725 (sparc_opcode_lookup_arch): Declare.
1726 (NUMOPCODES): Delete.
1727
1728 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1729
1730 * sparc.h (enum sparc_architecture): Add v9a.
1731 (ARCHITECTURES_CONFLICT_P): Update.
1732
1733 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1734
1735 * i386.h: Added Pentium Pro instructions.
1736
1737 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1738
1739 * m68k.h: Document new 'W' operand place.
1740
1741 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1742
1743 * hppa.h: Add lci and syncdma instructions.
1744
1745 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1746
1747 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1748 instructions.
1749
1750 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1751
1752 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1753 assembler's -mcom and -many switches.
1754
1755 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1756
1757 * i386.h: Fix cmpxchg8b extension opcode description.
1758
1759 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1760
1761 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1762 and register cr4.
1763
1764 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1767
1768 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1769
1770 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1771
1772 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1773
1774 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1775
1776 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1777
1778 * m68kmri.h: Remove.
1779
1780 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1781 declarations. Remove F_ALIAS and flag field of struct
1782 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1783 int. Make name and args fields of struct m68k_opcode const.
1784
1785 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1786
1787 * sparc.h (F_NOTV9): Define.
1788
1789 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1790
1791 * mips.h (INSN_4010): Define.
1792
1793 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1794
1795 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1796
1797 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1798 * m68k.h: Fix argument descriptions of coprocessor
1799 instructions to allow only alterable operands where appropriate.
1800 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1801 (m68k_opcode_aliases): Add more aliases.
1802
1803 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1804
1805 * m68k.h: Added explcitly short-sized conditional branches, and a
1806 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1807 svr4-based configurations.
1808
1809 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1810
1811 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1812 * i386.h: added missing Data16/Data32 flags to a few instructions.
1813
1814 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1815
1816 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1817 (OP_MASK_BCC, OP_SH_BCC): Define.
1818 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1819 (OP_MASK_CCC, OP_SH_CCC): Define.
1820 (INSN_READ_FPR_R): Define.
1821 (INSN_RFE): Delete.
1822
1823 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1824
1825 * m68k.h (enum m68k_architecture): Deleted.
1826 (struct m68k_opcode_alias): New type.
1827 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1828 matching constraints, values and flags. As a side effect of this,
1829 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1830 as I know were never used, now may need re-examining.
1831 (numopcodes): Now const.
1832 (m68k_opcode_aliases, numaliases): New variables.
1833 (endop): Deleted.
1834 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1835 m68k_opcode_aliases; update declaration of m68k_opcodes.
1836
1837 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1838
1839 * hppa.h (delay_type): Delete unused enumeration.
1840 (pa_opcode): Replace unused delayed field with an architecture
1841 field.
1842 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1843
1844 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1845
1846 * mips.h (INSN_ISA4): Define.
1847
1848 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1849
1850 * mips.h (M_DLA_AB, M_DLI): Define.
1851
1852 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1853
1854 * hppa.h (fstwx): Fix single-bit error.
1855
1856 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1857
1858 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1859
1860 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1861
1862 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1863 debug registers. From Charles Hannum (mycroft@netbsd.org).
1864
1865 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1866
1867 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1868 i386 support:
1869 * i386.h (MOV_AX_DISP32): New macro.
1870 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1871 of several call/return instructions.
1872 (ADDR_PREFIX_OPCODE): New macro.
1873
1874 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1875
1876 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1877
1878 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1879 char.
1880 (struct vot, field `name'): ditto.
1881
1882 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1883
1884 * vax.h: Supply and properly group all values in end sentinel.
1885
1886 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1887
1888 * mips.h (INSN_ISA, INSN_4650): Define.
1889
1890 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1891
1892 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1893 systems with a separate instruction and data cache, such as the
1894 29040, these instructions take an optional argument.
1895
1896 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1897
1898 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1899 INSN_TRAP.
1900
1901 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1902
1903 * mips.h (INSN_STORE_MEMORY): Define.
1904
1905 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1906
1907 * sparc.h: Document new operand type 'x'.
1908
1909 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1910
1911 * i960.h (I_CX2): New instruction category. It includes
1912 instructions available on Cx and Jx processors.
1913 (I_JX): New instruction category, for JX-only instructions.
1914 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1915 Jx-only instructions, in I_JX category.
1916
1917 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1918
1919 * ns32k.h (endop): Made pointer const too.
1920
1921 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1922
1923 * ns32k.h: Drop Q operand type as there is no correct use
1924 for it. Add I and Z operand types which allow better checking.
1925
1926 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1927
1928 * h8300.h (xor.l) :fix bit pattern.
1929 (L_2): New size of operand.
1930 (trapa): Use it.
1931
1932 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1933
1934 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1935
1936 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1937
1938 * sparc.h: Include v9 definitions.
1939
1940 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1941
1942 * m68k.h (m68060): Defined.
1943 (m68040up, mfloat, mmmu): Include it.
1944 (struct m68k_opcode): Widen `arch' field.
1945 (m68k_opcodes): Updated for M68060. Removed comments that were
1946 instructions commented out by "JF" years ago.
1947
1948 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1949
1950 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1951 add a one-bit `flags' field.
1952 (F_ALIAS): New macro.
1953
1954 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1955
1956 * h8300.h (dec, inc): Get encoding right.
1957
1958 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1959
1960 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1961 a flag instead.
1962 (PPC_OPERAND_SIGNED): Define.
1963 (PPC_OPERAND_SIGNOPT): Define.
1964
1965 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1966
1967 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1968 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1969
1970 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1971
1972 * i386.h: Reverse last change. It'll be handled in gas instead.
1973
1974 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1975
1976 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1977 slower on the 486 and used the implicit shift count despite the
1978 explicit operand. The one-operand form is still available to get
1979 the shorter form with the implicit shift count.
1980
1981 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1982
1983 * hppa.h: Fix typo in fstws arg string.
1984
1985 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1986
1987 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1988
1989 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1990
1991 * ppc.h (PPC_OPCODE_601): Define.
1992
1993 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1994
1995 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1996 (so we can determine valid completers for both addb and addb[tf].)
1997
1998 * hppa.h (xmpyu): No floating point format specifier for the
1999 xmpyu instruction.
2000
2001 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2002
2003 * ppc.h (PPC_OPERAND_NEXT): Define.
2004 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2005 (struct powerpc_macro): Define.
2006 (powerpc_macros, powerpc_num_macros): Declare.
2007
2008 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2009
2010 * ppc.h: New file. Header file for PowerPC opcode table.
2011
2012 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2013
2014 * hppa.h: More minor template fixes for sfu and copr (to allow
2015 for easier disassembly).
2016
2017 * hppa.h: Fix templates for all the sfu and copr instructions.
2018
2019 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2020
2021 * i386.h (push): Permit Imm16 operand too.
2022
2023 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2024
2025 * h8300.h (andc): Exists in base arch.
2026
2027 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2028
2029 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2030 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2031
2032 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2033
2034 * hppa.h: Add FP quadword store instructions.
2035
2036 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2037
2038 * mips.h: (M_J_A): Added.
2039 (M_LA): Removed.
2040
2041 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2042
2043 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2044 <mellon@pepper.ncd.com>.
2045
2046 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2047
2048 * hppa.h: Immediate field in probei instructions is unsigned,
2049 not low-sign extended.
2050
2051 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2052
2053 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2054
2055 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2056
2057 * i386.h: Add "fxch" without operand.
2058
2059 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2060
2061 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2062
2063 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2064
2065 * hppa.h: Add gfw and gfr to the opcode table.
2066
2067 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2068
2069 * m88k.h: extended to handle m88110.
2070
2071 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2072
2073 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2074 addresses.
2075
2076 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2077
2078 * i960.h (i960_opcodes): Properly bracket initializers.
2079
2080 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2081
2082 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2083
2084 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2085
2086 * m68k.h (two): Protect second argument with parentheses.
2087
2088 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2089
2090 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2091 Deleted old in/out instructions in "#if 0" section.
2092
2093 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2094
2095 * i386.h (i386_optab): Properly bracket initializers.
2096
2097 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2098
2099 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2100 Jeff Law, law@cs.utah.edu).
2101
2102 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2103
2104 * i386.h (lcall): Accept Imm32 operand also.
2105
2106 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2107
2108 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2109 (M_DABS): Added.
2110
2111 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2112
2113 * mips.h (INSN_*): Changed values. Removed unused definitions.
2114 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2115 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2116 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2117 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2118 (M_*): Added new values for r6000 and r4000 macros.
2119 (ANY_DELAY): Removed.
2120
2121 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2122
2123 * mips.h: Added M_LI_S and M_LI_SS.
2124
2125 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2126
2127 * h8300.h: Get some rare mov.bs correct.
2128
2129 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2130
2131 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2132 been included.
2133
2134 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2135
2136 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2137 jump instructions, for use in disassemblers.
2138
2139 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2140
2141 * m88k.h: Make bitfields just unsigned, not unsigned long or
2142 unsigned short.
2143
2144 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2145
2146 * hppa.h: New argument type 'y'. Use in various float instructions.
2147
2148 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2149
2150 * hppa.h (break): First immediate field is unsigned.
2151
2152 * hppa.h: Add rfir instruction.
2153
2154 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2155
2156 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2157
2158 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2159
2160 * mips.h: Reworked the hazard information somewhat, and fixed some
2161 bugs in the instruction hazard descriptions.
2162
2163 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2164
2165 * m88k.h: Corrected a couple of opcodes.
2166
2167 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2168
2169 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2170 new version includes instruction hazard information, but is
2171 otherwise reasonably similar.
2172
2173 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2174
2175 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2176
2177 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2178
2179 Patches from Jeff Law, law@cs.utah.edu:
2180 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2181 Make the tables be the same for the following instructions:
2182 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2183 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2184 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2185 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2186 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2187 "fcmp", and "ftest".
2188
2189 * hppa.h: Make new and old tables the same for "break", "mtctl",
2190 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2191 Fix typo in last patch. Collapse several #ifdefs into a
2192 single #ifdef.
2193
2194 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2195 of the comments up-to-date.
2196
2197 * hppa.h: Update "free list" of letters and update
2198 comments describing each letter's function.
2199
2200 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2201
2202 * h8300.h: Lots of little fixes for the h8/300h.
2203
2204 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2205
2206 Support for H8/300-H
2207 * h8300.h: Lots of new opcodes.
2208
2209 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2210
2211 * h8300.h: checkpoint, includes H8/300-H opcodes.
2212
2213 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2214
2215 * Patches from Jeffrey Law <law@cs.utah.edu>.
2216 * hppa.h: Rework single precision FP
2217 instructions so that they correctly disassemble code
2218 PA1.1 code.
2219
2220 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2221
2222 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2223 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2224
2225 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2226
2227 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2228 gdb will define it for now.
2229
2230 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2231
2232 * sparc.h: Don't end enumerator list with comma.
2233
2234 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2235
2236 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2237 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2238 ("bc2t"): Correct typo.
2239 ("[ls]wc[023]"): Use T rather than t.
2240 ("c[0123]"): Define general coprocessor instructions.
2241
2242 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2243
2244 * m68k.h: Move split point for gcc compilation more towards
2245 middle.
2246
2247 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2248
2249 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2250 simply wrong, ics, rfi, & rfsvc were missing).
2251 Add "a" to opr_ext for "bb". Doc fix.
2252
2253 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2254
2255 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2256 * mips.h: Add casts, to suppress warnings about shifting too much.
2257 * m68k.h: Document the placement code '9'.
2258
2259 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2260
2261 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2262 allows callers to break up the large initialized struct full of
2263 opcodes into two half-sized ones. This permits GCC to compile
2264 this module, since it takes exponential space for initializers.
2265 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2266
2267 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2268
2269 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2270 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2271 initialized structs in it.
2272
2273 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2274
2275 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2276 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2277 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2278
2279 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2280
2281 * mips.h: document "i" and "j" operands correctly.
2282
2283 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2284
2285 * mips.h: Removed endianness dependency.
2286
2287 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2288
2289 * h8300.h: include info on number of cycles per instruction.
2290
2291 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2292
2293 * hppa.h: Move handy aliases to the front. Fix masks for extract
2294 and deposit instructions.
2295
2296 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2297
2298 * i386.h: accept shld and shrd both with and without the shift
2299 count argument, which is always %cl.
2300
2301 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2302
2303 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2304 (one_byte_segment_defaults, two_byte_segment_defaults,
2305 i386_prefixtab_end): Ditto.
2306
2307 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2308
2309 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2310 for operand 2; from John Carr, jfc@dsg.dec.com.
2311
2312 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2313
2314 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2315 always use 16-bit offsets. Makes calculated-size jump tables
2316 feasible.
2317
2318 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2319
2320 * i386.h: Fix one-operand forms of in* and out* patterns.
2321
2322 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2323
2324 * m68k.h: Added CPU32 support.
2325
2326 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2327
2328 * mips.h (break): Disassemble the argument. Patch from
2329 jonathan@cs.stanford.edu (Jonathan Stone).
2330
2331 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2332
2333 * m68k.h: merged Motorola and MIT syntax.
2334
2335 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2336
2337 * m68k.h (pmove): make the tests less strict, the 68k book is
2338 wrong.
2339
2340 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2341
2342 * m68k.h (m68ec030): Defined as alias for 68030.
2343 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2344 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2345 them. Tightened description of "fmovex" to distinguish it from
2346 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2347 up descriptions that claimed versions were available for chips not
2348 supporting them. Added "pmovefd".
2349
2350 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2351
2352 * m68k.h: fix where the . goes in divull
2353
2354 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2355
2356 * m68k.h: the cas2 instruction is supposed to be written with
2357 indirection on the last two operands, which can be either data or
2358 address registers. Added a new operand type 'r' which accepts
2359 either register type. Added new cases for cas2l and cas2w which
2360 use them. Corrected masks for cas2 which failed to recognize use
2361 of address register.
2362
2363 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2364
2365 * m68k.h: Merged in patches (mostly m68040-specific) from
2366 Colin Smith <colin@wrs.com>.
2367
2368 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2369 base). Also cleaned up duplicates, re-ordered instructions for
2370 the sake of dis-assembling (so aliases come after standard names).
2371 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2372
2373 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2374
2375 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2376 all missing .s
2377
2378 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2379
2380 * sparc.h: Moved tables to BFD library.
2381
2382 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2383
2384 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2385
2386 * h8300.h: Finish filling in all the holes in the opcode table,
2387 so that the Lucid C compiler can digest this as well...
2388
2389 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2390
2391 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2392 Fix opcodes on various sizes of fild/fist instructions
2393 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2394 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2395
2396 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2397
2398 * h8300.h: Fill in all the holes in the opcode table so that the
2399 losing HPUX C compiler can digest this...
2400
2401 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2402
2403 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2404 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2405
2406 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2407
2408 * sparc.h: Add new architecture variant sparclite; add its scan
2409 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2410
2411 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2412
2413 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2414 fy@lucid.com).
2415
2416 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2417
2418 * rs6k.h: New version from IBM (Metin).
2419
2420 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2421
2422 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2423 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2424
2425 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2426
2427 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2428
2429 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2430
2431 * m68k.h (one, two): Cast macro args to unsigned to suppress
2432 complaints from compiler and lint about integer overflow during
2433 shift.
2434
2435 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2436
2437 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2438
2439 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2440
2441 * mips.h: Make bitfield layout depend on the HOST compiler,
2442 not on the TARGET system.
2443
2444 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2445
2446 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2447 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2448 <TRANLE@INTELLICORP.COM>.
2449
2450 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2451
2452 * h8300.h: turned op_type enum into #define list
2453
2454 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2455
2456 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2457 similar instructions -- they've been renamed to "fitoq", etc.
2458 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2459 number of arguments.
2460 * h8300.h: Remove extra ; which produces compiler warning.
2461
2462 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2463
2464 * sparc.h: fix opcode for tsubcctv.
2465
2466 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2467
2468 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2469
2470 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2471
2472 * sparc.h (nop): Made the 'lose' field be even tighter,
2473 so only a standard 'nop' is disassembled as a nop.
2474
2475 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2476
2477 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2478 disassembled as a nop.
2479
2480 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2481
2482 * m68k.h, sparc.h: ANSIfy enums.
2483
2484 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2485
2486 * sparc.h: fix a typo.
2487
2488 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2489
2490 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2491 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2492 vax.h: Renamed from ../<foo>-opcode.h.
2493
2494 \f
2495 Local Variables:
2496 version-control: never
2497 End:
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