gas/
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386.h (i386_optab): Support Intel Precott New Instructions.
4
5 2003-06-10 Gary Hade <garyhade@us.ibm.com>
6
7 * ppc.h (PPC_OPERAND_DQ): Define.
8
9 2003-06-10 Richard Sandiford <rsandifo@redhat.com>
10
11 * h8300.h (IMM4_NS, IMM8_NS): New.
12 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
13 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
14
15 2003-06-03 Michael Snyder <msnyder@redhat.com>
16
17 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
18 (ldc): Split ccr ops from exr ops (which are only available
19 on H8S or H8SX).
20 (stc): Ditto.
21 (andc, orc, xorc): Ditto.
22 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
23
24 2003-06-03 Michael Snyder <msnyder@redhat.com>
25 and Bernd Schmidt <bernds@redhat.com>
26 and Alexandre Oliva <aoliva@redhat.com>
27 * h8300.h: Add support for h8300sx instruction set.
28
29 2003-05-23 Jason Eckhardt <jle@rice.edu>
30
31 * i860.h (expand_type): Add XP_ONLY.
32 (scyc.b): New XP instruction.
33 (ldio.l): Likewise.
34 (ldio.s): Likewise.
35 (ldio.b): Likewise.
36 (ldint.l): Likewise.
37 (ldint.s): Likewise.
38 (ldint.b): Likewise.
39 (stio.l): Likewise.
40 (stio.s): Likewise.
41 (stio.b): Likewise.
42 (pfld.q): Likewise.
43
44 2003-05-20 Jason Eckhardt <jle@rice.edu>
45
46 * i860.h (flush): Set lower 3 bits properly and use 'L'
47 for the immediate operand type instead of 'i'.
48
49 2003-05-20 Jason Eckhardt <jle@rice.edu>
50
51 * i860.h (fzchks): Both S and R bits must be set.
52 (pfzchks): Likewise.
53 (faddp): Likewise.
54 (pfaddp): Likewise.
55 (fix.ss): Remove (invalid instruction).
56 (pfix.ss): Likewise.
57 (ftrunc.ss): Likewise.
58 (pftrunc.ss): Likewise.
59
60 2003-05-18 Jason Eckhardt <jle@rice.edu>
61
62 * i860.h (form, pform): Add missing .dd suffix.
63
64 2003-05-13 Stephane Carrez <stcarrez@nerim.fr>
65
66 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
67
68 2003-04-07 Michael Snyder <msnyder@redhat.com>
69
70 * h8300.h (ldc/stc): Fix up src/dst swaps.
71
72 2003-04-09 J. Grant <jg-binutils@jguk.org>
73
74 * mips.h: Correct comment typo.
75
76 2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
77
78 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
79 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
80 (s390_opcode): Remove architecture. Add modes and min_cpu.
81
82 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
83
84 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
85 processing.
86
87 2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
88
89 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
90
91 2003-01-23 Alan Modra <amodra@bigpond.net.au>
92
93 * m68hc11.h (cpu6812s): Define.
94
95 2003-01-07 Chris Demetriou <cgd@broadcom.com>
96
97 * mips.h: Fix missing space in comment.
98 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
99 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
100 by four bits.
101
102 2003-01-02 Chris Demetriou <cgd@broadcom.com>
103
104 * mips.h: Update copyright years to include 2002 (which had
105 been missed previously) and 2003. Make comments about "+A",
106 "+B", and "+C" operand types more descriptive.
107
108 2002-12-31 Chris Demetriou <cgd@broadcom.com>
109
110 * mips.h: Note that the "+D" operand type name is now used.
111
112 2002-12-30 Chris Demetriou <cgd@broadcom.com>
113
114 * mips.h: Document "+" as the start of two-character operand
115 type names, and add new "K", "+A", "+B", and "+C" operand types.
116 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
117 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
118 defines.
119
120 2002-12-24 Dmitry Diky <diwil@mail.ru>
121
122 * msp430.h: New file. Defines msp430 opcodes.
123
124 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
125
126 * h8300.h: Added some more pseudo opcodes for system call
127 processing.
128
129 2002-12-19 Chris Demetriou <cgd@broadcom.com>
130
131 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
132 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
133 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
134 (OP_OP_SDC2, OP_OP_SDC3): Define.
135
136 2002-12-16 Alan Modra <amodra@bigpond.net.au>
137
138 * hppa.h (completer_chars): #if 0 out.
139
140 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
141 "default_args".
142 (struct not_wot): Constify "args".
143 (struct not): Constify "name".
144 (numopcodes): Delete.
145 (endop): Delete.
146
147 2002-12-13 Alan Modra <amodra@bigpond.net.au>
148
149 * pj.h (pj_opc_info_t): Add union.
150
151 2002-12-04 David Mosberger <davidm@hpl.hp.com>
152
153 * ia64.h: Fix copyright message.
154 (IA64_OPND_AR_CSD): New operand kind.
155
156 2002-12-03 Richard Henderson <rth@redhat.com>
157
158 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
159
160 2002-12-03 Alan Modra <amodra@bigpond.net.au>
161
162 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
163 Constify "leaf" and "multi".
164
165 2002-11-19 Klee Dienes <kdienes@apple.com>
166
167 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
168 fields.
169 (h8_opcodes). Modify initializer and initializer macros to no
170 longer initialize the removed fields.
171
172 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
173
174 * tic4x.h (c4x_insts): Fixed LDHI constraint
175
176 2002-11-18 Klee Dienes <kdienes@apple.com>
177
178 * h8300.h (h8_opcode): Remove 'length' field.
179 (h8_opcodes): Mark as 'const' (both the declaration and
180 definition). Modify initializer and initializer macros to no
181 longer initialize the length field.
182
183 2002-11-18 Klee Dienes <kdienes@apple.com>
184
185 * arc.h (arc_ext_opcodes): Declare as extern.
186 (arc_ext_operands): Declare as extern.
187 * i860.h (i860_opcodes): Declare as const.
188
189 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
190
191 * tic4x.h: File reordering. Added enhanced opcodes.
192
193 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
194
195 * tic4x.h: Major rewrite of entire file. Define instruction
196 classes, and put each instruction into a class.
197
198 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
199
200 * tic4x.h: Added new opcodes and corrected some bugs. Add support
201 for new DSP types.
202
203 2002-10-14 Alan Modra <amodra@bigpond.net.au>
204
205 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
206
207 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
208 Ken Raeburn <raeburn@cygnus.com>
209 Aldy Hernandez <aldyh@redhat.com>
210 Eric Christopher <echristo@redhat.com>
211 Richard Sandiford <rsandifo@redhat.com>
212
213 * mips.h: Update comment for new opcodes.
214 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
215 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
216 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
217 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
218 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
219 Don't match CPU_R4111 with INSN_4100.
220
221 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
222
223 From matthew green <mrg@redhat.com>
224
225 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
226 instructions.
227 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
228 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
229 e500x2 Integer select, branch locking, performance monitor,
230 cache locking and machine check APUs, respectively.
231 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
232 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
233
234 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
235
236 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
237 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
238 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
239 memory banks.
240 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
241
242 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
243
244 * mips.h (INSN_MIPS16): New define.
245
246 2002-07-08 Alan Modra <amodra@bigpond.net.au>
247
248 * i386.h: Remove IgnoreSize from movsx and movzx.
249
250 2002-06-08 Alan Modra <amodra@bigpond.net.au>
251
252 * a29k.h: Replace CONST with const.
253 (CONST): Don't define.
254 * convex.h: Replace CONST with const.
255 (CONST): Don't define.
256 * dlx.h: Replace CONST with const.
257 * or32.h (CONST): Don't define.
258
259 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
260
261 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
262 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
263 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
264 (INSN_MDMX): New constants, for MDMX support.
265 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
266
267 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
268
269 * dlx.h: New file.
270
271 2002-05-25 Alan Modra <amodra@bigpond.net.au>
272
273 * ia64.h: Use #include "" instead of <> for local header files.
274 * sparc.h: Likewise.
275
276 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
277
278 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
279
280 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
281
282 * h8300.h: Corrected defs of all control regs
283 and eepmov instr.
284
285 2002-04-11 Alan Modra <amodra@bigpond.net.au>
286
287 * i386.h: Add intel mode cmpsd and movsd.
288 Put them before SSE2 insns, so that rep prefix works.
289
290 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
291
292 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
293 instructions.
294 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
295 may be passed along with the ISA bitmask.
296
297 2002-03-05 Paul Koning <pkoning@equallogic.com>
298
299 * pdp11.h: Add format codes for float instruction formats.
300
301 2002-02-25 Alan Modra <amodra@bigpond.net.au>
302
303 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
304
305 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
306
307 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
308
309 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
310
311 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
312 (xchg): Fix.
313 (in, out): Disable 64bit operands.
314 (call, jmp): Avoid REX prefixes.
315 (jcxz): Prohibit in 64bit mode
316 (jrcxz, loop): Add 64bit variants.
317 (movq): Fix patterns.
318 (movmskps, pextrw, pinstrw): Add 64bit variants.
319
320 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
321
322 * or32.h: New file.
323
324 2002-01-22 Graydon Hoare <graydon@redhat.com>
325
326 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
327 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
328
329 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
330
331 * h8300.h: Comment typo fix.
332
333 2002-01-03 matthew green <mrg@redhat.com>
334
335 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
336 (PPC_OPCODE_BOOKE64): Likewise.
337
338 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
339
340 * hppa.h (call, ret): Move to end of table.
341 (addb, addib): PA2.0 variants should have been PA2.0W.
342 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
343 happy.
344 (fldw, fldd, fstw, fstd, bb): Likewise.
345 (short loads/stores): Tweak format specifier slightly to keep
346 disassembler happy.
347 (indexed loads/stores): Likewise.
348 (absolute loads/stores): Likewise.
349
350 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
351
352 * d10v.h (OPERAND_NOSP): New macro.
353
354 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
355
356 * d10v.h (OPERAND_SP): New macro.
357
358 2001-11-15 Alan Modra <amodra@bigpond.net.au>
359
360 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
361
362 2001-11-11 Timothy Wall <twall@alum.mit.edu>
363
364 * tic54x.h: Revise opcode layout; don't really need a separate
365 structure for parallel opcodes.
366
367 2001-11-13 Zack Weinberg <zack@codesourcery.com>
368 Alan Modra <amodra@bigpond.net.au>
369
370 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
371 accept WordReg.
372
373 2001-11-04 Chris Demetriou <cgd@broadcom.com>
374
375 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
376
377 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
378
379 * mmix.h: New file.
380
381 2001-10-18 Chris Demetriou <cgd@broadcom.com>
382
383 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
384 of the expression, to make source code merging easier.
385
386 2001-10-17 Chris Demetriou <cgd@broadcom.com>
387
388 * mips.h: Sort coprocessor instruction argument characters
389 in comment, add a few more words of description for "H".
390
391 2001-10-17 Chris Demetriou <cgd@broadcom.com>
392
393 * mips.h (INSN_SB1): New cpu-specific instruction bit.
394 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
395 if cpu is CPU_SB1.
396
397 2001-10-17 matthew green <mrg@redhat.com>
398
399 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
400
401 2001-10-12 matthew green <mrg@redhat.com>
402
403 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
404 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
405 instructions, respectively.
406
407 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
408
409 * v850.h: Remove spurious comment.
410
411 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
412
413 * h8300.h: Fix compile time warning messages
414
415 2001-09-04 Richard Henderson <rth@redhat.com>
416
417 * alpha.h (struct alpha_operand): Pack elements into bitfields.
418
419 2001-08-31 Eric Christopher <echristo@redhat.com>
420
421 * mips.h: Remove CPU_MIPS32_4K.
422
423 2001-08-27 Torbjorn Granlund <tege@swox.com>
424
425 * ppc.h (PPC_OPERAND_DS): Define.
426
427 2001-08-25 Andreas Jaeger <aj@suse.de>
428
429 * d30v.h: Fix declaration of reg_name_cnt.
430
431 * d10v.h: Fix declaration of d10v_reg_name_cnt.
432
433 * arc.h: Add prototypes from opcodes/arc-opc.c.
434
435 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
436
437 * mips.h (INSN_10000): Define.
438 (OPCODE_IS_MEMBER): Check for INSN_10000.
439
440 2001-08-10 Alan Modra <amodra@one.net.au>
441
442 * ppc.h: Revert 2001-08-08.
443
444 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
445
446 * mips.h (INSN_GP32): Remove.
447 (OPCODE_IS_MEMBER): Remove gp32 parameter.
448 (M_MOVE): New macro identifier.
449
450 2001-08-08 Alan Modra <amodra@one.net.au>
451
452 1999-10-25 Torbjorn Granlund <tege@swox.com>
453 * ppc.h (struct powerpc_operand): New field `reloc'.
454
455 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
456
457 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
458
459 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
460
461 * cgen.h (CGEN_INSN): Add regex support.
462 (build_insn_regex): Declare.
463
464 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
465
466 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
467 (cgen_cpu_desc): Ditto.
468
469 2001-07-07 Ben Elliston <bje@redhat.com>
470
471 * m88k.h: Clean up and reformat. Remove unused code.
472
473 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
474
475 * cgen.h (cgen_keyword): Add nonalpha_chars field.
476
477 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
478
479 * mips.h (CPU_R12000): Define.
480
481 2001-05-23 John Healy <jhealy@redhat.com>
482
483 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
484
485 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
486
487 * mips.h (INSN_ISA_MASK): Define.
488
489 2001-05-12 Alan Modra <amodra@one.net.au>
490
491 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
492 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
493 and use InvMem as these insns must have register operands.
494
495 2001-05-04 Alan Modra <amodra@one.net.au>
496
497 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
498 and pextrw to swap reg/rm assignments.
499
500 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
501
502 * cris.h (enum cris_insn_version_usage): Correct comment for
503 cris_ver_v3p.
504
505 2001-03-24 Alan Modra <alan@linuxcare.com.au>
506
507 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
508 Add InvMem to first operand of "maskmovdqu".
509
510 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
511
512 * cris.h (ADD_PC_INCR_OPCODE): New macro.
513
514 2001-03-21 Kazu Hirata <kazu@hxi.com>
515
516 * h8300.h: Fix formatting.
517
518 2001-03-22 Alan Modra <alan@linuxcare.com.au>
519
520 * i386.h (i386_optab): Add paddq, psubq.
521
522 2001-03-19 Alan Modra <alan@linuxcare.com.au>
523
524 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
525
526 2001-02-28 Igor Shevlyakov <igor@windriver.com>
527
528 * m68k.h: new defines for Coldfire V4. Update mcf to know
529 about mcf5407.
530
531 2001-02-18 lars brinkhoff <lars@nocrew.org>
532
533 * pdp11.h: New file.
534
535 2001-02-12 Jan Hubicka <jh@suse.cz>
536
537 * i386.h (i386_optab): SSE integer converison instructions have
538 64bit versions on x86-64.
539
540 2001-02-10 Nick Clifton <nickc@redhat.com>
541
542 * mips.h: Remove extraneous whitespace. Formating change to allow
543 for future contribution.
544
545 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
546
547 * s390.h: New file.
548
549 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
550
551 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
552 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
553 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
554
555 2001-01-24 Karsten Keil <kkeil@suse.de>
556
557 * i386.h (i386_optab): Fix swapgs
558
559 2001-01-14 Alan Modra <alan@linuxcare.com.au>
560
561 * hppa.h: Describe new '<' and '>' operand types, and tidy
562 existing comments.
563 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
564 Remove duplicate "ldw j(s,b),x". Sort some entries.
565
566 2001-01-13 Jan Hubicka <jh@suse.cz>
567
568 * i386.h (i386_optab): Fix pusha and ret templates.
569
570 2001-01-11 Peter Targett <peter.targett@arccores.com>
571
572 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
573 definitions for masking cpu type.
574 (arc_ext_operand_value) New structure for storing extended
575 operands.
576 (ARC_OPERAND_*) Flags for operand values.
577
578 2001-01-10 Jan Hubicka <jh@suse.cz>
579
580 * i386.h (pinsrw): Add.
581 (pshufw): Remove.
582 (cvttpd2dq): Fix operands.
583 (cvttps2dq): Likewise.
584 (movq2q): Rename to movdq2q.
585
586 2001-01-10 Richard Schaal <richard.schaal@intel.com>
587
588 * i386.h: Correct movnti instruction.
589
590 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
591
592 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
593 of operands (unsigned char or unsigned short).
594 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
595 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
596
597 2001-01-05 Jan Hubicka <jh@suse.cz>
598
599 * i386.h (i386_optab): Make [sml]fence template to use immext field.
600
601 2001-01-03 Jan Hubicka <jh@suse.cz>
602
603 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
604 introduced by Pentium4
605
606 2000-12-30 Jan Hubicka <jh@suse.cz>
607
608 * i386.h (i386_optab): Add "rex*" instructions;
609 add swapgs; disable jmp/call far direct instructions for
610 64bit mode; add syscall and sysret; disable registers for 0xc6
611 template. Add 'q' suffixes to extendable instructions, disable
612 obsolete instructions, add new sign/zero extension ones.
613 (i386_regtab): Add extended registers.
614 (*Suf): Add No_qSuf.
615 (q_Suf, wlq_Suf, bwlq_Suf): New.
616
617 2000-12-20 Jan Hubicka <jh@suse.cz>
618
619 * i386.h (i386_optab): Replace "Imm" with "EncImm".
620 (i386_regtab): Add flags field.
621
622 2000-12-12 Nick Clifton <nickc@redhat.com>
623
624 * mips.h: Fix formatting.
625
626 2000-12-01 Chris Demetriou <cgd@sibyte.com>
627
628 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
629 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
630 OP_*_SYSCALL definitions.
631 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
632 19 bit wait codes.
633 (MIPS operand specifier comments): Remove 'm', add 'U' and
634 'J', and update the meaning of 'B' so that it's more general.
635
636 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
637 INSN_ISA5): Renumber, redefine to mean the ISA at which the
638 instruction was added.
639 (INSN_ISA32): New constant.
640 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
641 Renumber to avoid new and/or renumbered INSN_* constants.
642 (INSN_MIPS32): Delete.
643 (ISA_UNKNOWN): New constant to indicate unknown ISA.
644 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
645 ISA_MIPS32): New constants, defined to be the mask of INSN_*
646 constants available at that ISA level.
647 (CPU_UNKNOWN): New constant to indicate unknown CPU.
648 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
649 define it with a unique value.
650 (OPCODE_IS_MEMBER): Update for new ISA membership-related
651 constant meanings.
652
653 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
654 definitions.
655
656 * mips.h (CPU_SB1): New constant.
657
658 2000-10-20 Jakub Jelinek <jakub@redhat.com>
659
660 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
661 Note that '3' is used for siam operand.
662
663 2000-09-22 Jim Wilson <wilson@cygnus.com>
664
665 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
666
667 2000-09-13 Anders Norlander <anorland@acc.umu.se>
668
669 * mips.h: Use defines instead of hard-coded processor numbers.
670 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
671 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
672 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
673 CPU_4KC, CPU_4KM, CPU_4KP): Define..
674 (OPCODE_IS_MEMBER): Use new defines.
675 (OP_MASK_SEL, OP_SH_SEL): Define.
676 (OP_MASK_CODE20, OP_SH_CODE20): Define.
677 Add 'P' to used characters.
678 Use 'H' for coprocessor select field.
679 Use 'm' for 20 bit breakpoint code.
680 Document new arg characters and add to used characters.
681 (INSN_MIPS32): New define for MIPS32 extensions.
682 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
683
684 2000-09-05 Alan Modra <alan@linuxcare.com.au>
685
686 * hppa.h: Mention cz completer.
687
688 2000-08-16 Jim Wilson <wilson@cygnus.com>
689
690 * ia64.h (IA64_OPCODE_POSTINC): New.
691
692 2000-08-15 H.J. Lu <hjl@gnu.org>
693
694 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
695 IgnoreSize change.
696
697 2000-08-08 Jason Eckhardt <jle@cygnus.com>
698
699 * i860.h: Small formatting adjustments.
700
701 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
702
703 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
704 Move related opcodes closer to each other.
705 Minor changes in comments, list undefined opcodes.
706
707 2000-07-26 Dave Brolley <brolley@redhat.com>
708
709 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
710
711 2000-07-22 Jason Eckhardt <jle@cygnus.com>
712
713 * i860.h (btne, bte, bla): Changed these opcodes
714 to use sbroff ('r') instead of split16 ('s').
715 (J, K, L, M): New operand types for 16-bit aligned fields.
716 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
717 use I, J, K, L, M instead of just I.
718 (T, U): New operand types for split 16-bit aligned fields.
719 (st.x): Changed these opcodes to use S, T, U instead of just S.
720 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
721 exist on the i860.
722 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
723 (pfeq.ss, pfeq.dd): New opcodes.
724 (st.s): Fixed incorrect mask bits.
725 (fmlow): Fixed incorrect mask bits.
726 (fzchkl, pfzchkl): Fixed incorrect mask bits.
727 (faddz, pfaddz): Fixed incorrect mask bits.
728 (form, pform): Fixed incorrect mask bits.
729 (pfld.l): Fixed incorrect mask bits.
730 (fst.q): Fixed incorrect mask bits.
731 (all floating point opcodes): Fixed incorrect mask bits for
732 handling of dual bit.
733
734 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
735
736 cris.h: New file.
737
738 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
739
740 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
741 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
742 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
743 (AVR_ISA_M83): Define for ATmega83, ATmega85.
744 (espm): Remove, because ESPM removed in databook update.
745 (eicall, eijmp): Move to the end of opcode table.
746
747 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
748
749 * m68hc11.h: New file for support of Motorola 68hc11.
750
751 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
752
753 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
754
755 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
756
757 * avr.h: New file with AVR opcodes.
758
759 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
760
761 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
762
763 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
764
765 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
766
767 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
768
769 * i386.h: Use sl_FP, not sl_Suf for fild.
770
771 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
772
773 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
774 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
775 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
776 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
777
778 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
779
780 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
781
782 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
783 Alexander Sokolov <robocop@netlink.ru>
784
785 * i386.h (i386_optab): Add cpu_flags for all instructions.
786
787 2000-05-13 Alan Modra <alan@linuxcare.com.au>
788
789 From Gavin Romig-Koch <gavin@cygnus.com>
790 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
791
792 2000-05-04 Timothy Wall <twall@cygnus.com>
793
794 * tic54x.h: New.
795
796 2000-05-03 J.T. Conklin <jtc@redback.com>
797
798 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
799 (PPC_OPERAND_VR): New operand flag for vector registers.
800
801 2000-05-01 Kazu Hirata <kazu@hxi.com>
802
803 * h8300.h (EOP): Add missing initializer.
804
805 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
806
807 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
808 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
809 New operand types l,y,&,fe,fE,fx added to support above forms.
810 (pa_opcodes): Replaced usage of 'x' as source/target for
811 floating point double-word loads/stores with 'fx'.
812
813 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
814 David Mosberger <davidm@hpl.hp.com>
815 Timothy Wall <twall@cygnus.com>
816 Jim Wilson <wilson@cygnus.com>
817
818 * ia64.h: New file.
819
820 2000-03-27 Nick Clifton <nickc@cygnus.com>
821
822 * d30v.h (SHORT_A1): Fix value.
823 (SHORT_AR): Renumber so that it is at the end of the list of short
824 instructions, not the end of the list of long instructions.
825
826 2000-03-26 Alan Modra <alan@linuxcare.com>
827
828 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
829 problem isn't really specific to Unixware.
830 (OLDGCC_COMPAT): Define.
831 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
832 destination %st(0).
833 Fix lots of comments.
834
835 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
836
837 * d30v.h:
838 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
839 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
840 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
841 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
842 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
843 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
844 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
845
846 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
847
848 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
849 fistpd without suffix.
850
851 2000-02-24 Nick Clifton <nickc@cygnus.com>
852
853 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
854 'signed_overflow_ok_p'.
855 Delete prototypes for cgen_set_flags() and cgen_get_flags().
856
857 2000-02-24 Andrew Haley <aph@cygnus.com>
858
859 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
860 (CGEN_CPU_TABLE): flags: new field.
861 Add prototypes for new functions.
862
863 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
864
865 * i386.h: Add some more UNIXWARE_COMPAT comments.
866
867 2000-02-23 Linas Vepstas <linas@linas.org>
868
869 * i370.h: New file.
870
871 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
872
873 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
874 cannot be combined in parallel with ADD/SUBppp.
875
876 2000-02-22 Andrew Haley <aph@cygnus.com>
877
878 * mips.h: (OPCODE_IS_MEMBER): Add comment.
879
880 1999-12-30 Andrew Haley <aph@cygnus.com>
881
882 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
883 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
884 insns.
885
886 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
887
888 * i386.h: Qualify intel mode far call and jmp with x_Suf.
889
890 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
891
892 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
893 indirect jumps and calls. Add FF/3 call for intel mode.
894
895 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
896
897 * mn10300.h: Add new operand types. Add new instruction formats.
898
899 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
900
901 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
902 instruction.
903
904 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
905
906 * mips.h (INSN_ISA5): New.
907
908 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
909
910 * mips.h (OPCODE_IS_MEMBER): New.
911
912 1999-10-29 Nick Clifton <nickc@cygnus.com>
913
914 * d30v.h (SHORT_AR): Define.
915
916 1999-10-18 Michael Meissner <meissner@cygnus.com>
917
918 * alpha.h (alpha_num_opcodes): Convert to unsigned.
919 (alpha_num_operands): Ditto.
920
921 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
922
923 * hppa.h (pa_opcodes): Add load and store cache control to
924 instructions. Add ordered access load and store.
925
926 * hppa.h (pa_opcode): Add new entries for addb and addib.
927
928 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
929
930 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
931
932 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
933
934 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
935
936 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
937
938 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
939 and "be" using completer prefixes.
940
941 * hppa.h (pa_opcodes): Add initializers to silence compiler.
942
943 * hppa.h: Update comments about character usage.
944
945 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
946
947 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
948 up the new fstw & bve instructions.
949
950 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
951
952 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
953 instructions.
954
955 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
956
957 * hppa.h (pa_opcodes): Add long offset double word load/store
958 instructions.
959
960 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
961 stores.
962
963 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
964
965 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
966
967 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
968
969 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
970
971 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
972
973 * hppa.h (pa_opcodes): Add support for "b,l".
974
975 * hppa.h (pa_opcodes): Add support for "b,gate".
976
977 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
978
979 * hppa.h (pa_opcodes): Use 'fX' for first register operand
980 in xmpyu.
981
982 * hppa.h (pa_opcodes): Fix mask for probe and probei.
983
984 * hppa.h (pa_opcodes): Fix mask for depwi.
985
986 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
987
988 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
989 an explicit output argument.
990
991 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
992
993 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
994 Add a few PA2.0 loads and store variants.
995
996 1999-09-04 Steve Chamberlain <sac@pobox.com>
997
998 * pj.h: New file.
999
1000 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1001
1002 * i386.h (i386_regtab): Move %st to top of table, and split off
1003 other fp reg entries.
1004 (i386_float_regtab): To here.
1005
1006 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1007
1008 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1009 by 'f'.
1010
1011 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1012 Add supporting args.
1013
1014 * hppa.h: Document new completers and args.
1015 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1016 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1017 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1018 pmenb and pmdis.
1019
1020 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
1021 hshr, hsub, mixh, mixw, permh.
1022
1023 * hppa.h (pa_opcodes): Change completers in instructions to
1024 use 'c' prefix.
1025
1026 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1027 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1028
1029 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1030 fnegabs to use 'I' instead of 'F'.
1031
1032 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1033
1034 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1035 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1036 Alphabetically sort PIII insns.
1037
1038 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1039
1040 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1041
1042 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1043
1044 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1045 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1046
1047 * hppa.h: Document 64 bit condition completers.
1048
1049 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1050
1051 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1052
1053 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1054
1055 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1056 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1057 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1058
1059 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1060 Jeff Law <law@cygnus.com>
1061
1062 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1063
1064 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1065
1066 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1067 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1068
1069 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1070
1071 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1072
1073 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1074
1075 * hppa.h (struct pa_opcode): Add new field "flags".
1076 (FLAGS_STRICT): Define.
1077
1078 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1079 Jeff Law <law@cygnus.com>
1080
1081 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1082
1083 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1084
1085 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1086
1087 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1088 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1089 flag to fcomi and friends.
1090
1091 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1092
1093 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1094 integer logical instructions.
1095
1096 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1097
1098 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1099 `n', `o'.
1100
1101 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1102 and new places `m', `M', `h'.
1103
1104 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1105
1106 * hppa.h (pa_opcodes): Add several processor specific system
1107 instructions.
1108
1109 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1110
1111 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1112 "addb", and "addib" to be used by the disassembler.
1113
1114 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1115
1116 * i386.h (ReverseModrm): Remove all occurences.
1117 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1118 movmskps, pextrw, pmovmskb, maskmovq.
1119 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1120 ignore the data size prefix.
1121
1122 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1123 Mostly stolen from Doug Ledford <dledford@redhat.com>
1124
1125 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1126
1127 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1128
1129 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1130
1131 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1132 (CGEN_ATTR_TYPE): Update.
1133 (CGEN_ATTR_MASK): Number booleans starting at 0.
1134 (CGEN_ATTR_VALUE): Update.
1135 (CGEN_INSN_ATTR): Update.
1136
1137 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1138
1139 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1140 instructions.
1141
1142 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1143
1144 * hppa.h (bb, bvb): Tweak opcode/mask.
1145
1146
1147 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1148
1149 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1150 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1151 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1152 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1153 Delete member max_insn_size.
1154 (enum cgen_cpu_open_arg): New enum.
1155 (cpu_open): Update prototype.
1156 (cpu_open_1): Declare.
1157 (cgen_set_cpu): Delete.
1158
1159 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1160
1161 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1162 (CGEN_OPERAND_NIL): New macro.
1163 (CGEN_OPERAND): New member `type'.
1164 (@arch@_cgen_operand_table): Delete decl.
1165 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1166 (CGEN_OPERAND_TABLE): New struct.
1167 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1168 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1169 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1170 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1171 {get,set}_{int,vma}_operand.
1172 (@arch@_cgen_cpu_open): New arg `isa'.
1173 (cgen_set_cpu): Ditto.
1174
1175 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1176
1177 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1178
1179 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1180
1181 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1182 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1183 enum cgen_hw_type.
1184 (CGEN_HW_TABLE): New struct.
1185 (hw_table): Delete declaration.
1186 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1187 to table entry to enum.
1188 (CGEN_OPINST): Ditto.
1189 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1190
1191 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1192
1193 * alpha.h (AXP_OPCODE_EV6): New.
1194 (AXP_OPCODE_NOPAL): Include it.
1195
1196 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1197
1198 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1199 All uses updated. New members int_insn_p, max_insn_size,
1200 parse_operand,insert_operand,extract_operand,print_operand,
1201 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1202 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1203 extract_handlers,print_handlers.
1204 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1205 (CGEN_ATTR_BOOL_OFFSET): New macro.
1206 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1207 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1208 (cgen_opcode_handler): Renamed from cgen_base.
1209 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1210 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1211 all uses updated.
1212 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1213 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1214 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1215 (CGEN_OPCODE,CGEN_IBASE): New types.
1216 (CGEN_INSN): Rewrite.
1217 (CGEN_{ASM,DIS}_HASH*): Delete.
1218 (init_opcode_table,init_ibld_table): Declare.
1219 (CGEN_INSN_ATTR): New type.
1220
1221 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1222
1223 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1224 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1225 Change *Suf definitions to include x and d suffixes.
1226 (movsx): Use w_Suf and b_Suf.
1227 (movzx): Likewise.
1228 (movs): Use bwld_Suf.
1229 (fld): Change ordering. Use sld_FP.
1230 (fild): Add Intel Syntax equivalent of fildq.
1231 (fst): Use sld_FP.
1232 (fist): Use sld_FP.
1233 (fstp): Use sld_FP. Add x_FP version.
1234 (fistp): LLongMem version for Intel Syntax.
1235 (fcom, fcomp): Use sld_FP.
1236 (fadd, fiadd, fsub): Use sld_FP.
1237 (fsubr): Use sld_FP.
1238 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1239
1240 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1241
1242 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1243 CGEN_MODE_UINT.
1244
1245 1999-01-16 Jeffrey A Law (law@cygnus.com)
1246
1247 * hppa.h (bv): Fix mask.
1248
1249 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1250
1251 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1252 (CGEN_ATTR): Use it.
1253 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1254 (CGEN_ATTR_TABLE): New member dfault.
1255
1256 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1257
1258 * mips.h (MIPS16_INSN_BRANCH): New.
1259
1260 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1261
1262 The following is part of a change made by Edith Epstein
1263 <eepstein@sophia.cygnus.com> as part of a project to merge in
1264 changes by HP; HP did not create ChangeLog entries.
1265
1266 * hppa.h (completer_chars): list of chars to not put a space
1267 after.
1268
1269 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * i386.h (i386_optab): Permit w suffix on processor control and
1272 status word instructions.
1273
1274 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1275
1276 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1277 (struct cgen_keyword_entry): Ditto.
1278 (struct cgen_operand): Ditto.
1279 (CGEN_IFLD): New typedef, with associated access macros.
1280 (CGEN_IFMT): New typedef, with associated access macros.
1281 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1282 (CGEN_IVALUE): New typedef.
1283 (struct cgen_insn): Delete const on syntax,attrs members.
1284 `format' now points to format data. Type of `value' is now
1285 CGEN_IVALUE.
1286 (struct cgen_opcode_table): New member ifld_table.
1287
1288 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1289
1290 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1291 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1292 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1293 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1294 (cgen_opcode_table): Update type of dis_hash fn.
1295 (extract_operand): Update type of `insn_value' arg.
1296
1297 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1298
1299 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1300
1301 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1302
1303 * mips.h (INSN_MULT): Added.
1304
1305 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1306
1307 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1308
1309 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1310
1311 * cgen.h (CGEN_INSN_INT): New typedef.
1312 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1313 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1314 (CGEN_INSN_BYTES_PTR): New typedef.
1315 (CGEN_EXTRACT_INFO): New typedef.
1316 (cgen_insert_fn,cgen_extract_fn): Update.
1317 (cgen_opcode_table): New member `insn_endian'.
1318 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1319 (insert_operand,extract_operand): Update.
1320 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1321
1322 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1323
1324 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1325 (struct CGEN_HW_ENTRY): New member `attrs'.
1326 (CGEN_HW_ATTR): New macro.
1327 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1328 (CGEN_INSN_INVALID_P): New macro.
1329
1330 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1331
1332 * hppa.h: Add "fid".
1333
1334 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1335
1336 From Robert Andrew Dale <rob@nb.net>
1337 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1338 (AMD_3DNOW_OPCODE): Define.
1339
1340 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1341
1342 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1343
1344 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1345
1346 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1347
1348 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1349
1350 Move all global state data into opcode table struct, and treat
1351 opcode table as something that is "opened/closed".
1352 * cgen.h (CGEN_OPCODE_DESC): New type.
1353 (all fns): New first arg of opcode table descriptor.
1354 (cgen_set_parse_operand_fn): Add prototype.
1355 (cgen_current_machine,cgen_current_endian): Delete.
1356 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1357 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1358 dis_hash_table,dis_hash_table_entries.
1359 (opcode_open,opcode_close): Add prototypes.
1360
1361 * cgen.h (cgen_insn): New element `cdx'.
1362
1363 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1364
1365 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1366
1367 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1368
1369 * mn10300.h: Add "no_match_operands" field for instructions.
1370 (MN10300_MAX_OPERANDS): Define.
1371
1372 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1373
1374 * cgen.h (cgen_macro_insn_count): Declare.
1375
1376 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1377
1378 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1379 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1380 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1381 set_{int,vma}_operand.
1382
1383 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1384
1385 * mn10300.h: Add "machine" field for instructions.
1386 (MN103, AM30): Define machine types.
1387
1388 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1389
1390 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1391
1392 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1393
1394 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1395
1396 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1397
1398 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1399 and ud2b.
1400 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1401 those that happen to be implemented on pentiums.
1402
1403 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1404
1405 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1406 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1407 with Size16|IgnoreSize or Size32|IgnoreSize.
1408
1409 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1410
1411 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1412 (REPE): Rename to REPE_PREFIX_OPCODE.
1413 (i386_regtab_end): Remove.
1414 (i386_prefixtab, i386_prefixtab_end): Remove.
1415 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1416 of md_begin.
1417 (MAX_OPCODE_SIZE): Define.
1418 (i386_optab_end): Remove.
1419 (sl_Suf): Define.
1420 (sl_FP): Use sl_Suf.
1421
1422 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1423 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1424 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1425 data32, dword, and adword prefixes.
1426 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1427 regs.
1428
1429 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1430
1431 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1432
1433 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1434 register operands, because this is a common idiom. Flag them with
1435 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1436 fdivrp because gcc erroneously generates them. Also flag with a
1437 warning.
1438
1439 * i386.h: Add suffix modifiers to most insns, and tighter operand
1440 checks in some cases. Fix a number of UnixWare compatibility
1441 issues with float insns. Merge some floating point opcodes, using
1442 new FloatMF modifier.
1443 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1444 consistency.
1445
1446 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1447 IgnoreDataSize where appropriate.
1448
1449 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1450
1451 * i386.h: (one_byte_segment_defaults): Remove.
1452 (two_byte_segment_defaults): Remove.
1453 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1454
1455 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1456
1457 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1458 (cgen_hw_lookup_by_num): Declare.
1459
1460 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1461
1462 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1463 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1464
1465 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1466
1467 * cgen.h (cgen_asm_init_parse): Delete.
1468 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1469 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1470
1471 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1472
1473 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1474 (cgen_asm_finish_insn): Update prototype.
1475 (cgen_insn): New members num, data.
1476 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1477 dis_hash, dis_hash_table_size moved to ...
1478 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1479 All uses updated. New members asm_hash_p, dis_hash_p.
1480 (CGEN_MINSN_EXPANSION): New struct.
1481 (cgen_expand_macro_insn): Declare.
1482 (cgen_macro_insn_count): Declare.
1483 (get_insn_operands): Update prototype.
1484 (lookup_get_insn_operands): Declare.
1485
1486 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1487
1488 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1489 regKludge. Add operands types for string instructions.
1490
1491 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1492
1493 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1494 table.
1495
1496 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1497
1498 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1499 for `gettext'.
1500
1501 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1502
1503 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1504 Add IsString flag to string instructions.
1505 (IS_STRING): Don't define.
1506 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1507 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1508 (SS_PREFIX_OPCODE): Define.
1509
1510 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1511
1512 * i386.h: Revert March 24 patch; no more LinearAddress.
1513
1514 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1515
1516 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1517 instructions, and instead add FWait opcode modifier. Add short
1518 form of fldenv and fstenv.
1519 (FWAIT_OPCODE): Define.
1520
1521 * i386.h (i386_optab): Change second operand constraint of `mov
1522 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1523 allow legal instructions such as `movl %gs,%esi'
1524
1525 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1526
1527 * h8300.h: Various changes to fully bracket initializers.
1528
1529 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1530
1531 * i386.h: Set LinearAddress for lidt and lgdt.
1532
1533 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1534
1535 * cgen.h (CGEN_BOOL_ATTR): New macro.
1536
1537 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1538
1539 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1540
1541 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1542
1543 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1544 (cgen_insn): Record syntax and format entries here, rather than
1545 separately.
1546
1547 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1548
1549 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1550
1551 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1552
1553 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1554 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1555 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1556
1557 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1558
1559 * cgen.h (lookup_insn): New argument alias_p.
1560
1561 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1562
1563 Fix rac to accept only a0:
1564 * d10v.h (OPERAND_ACC): Split into:
1565 (OPERAND_ACC0, OPERAND_ACC1) .
1566 (OPERAND_GPR): Define.
1567
1568 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1569
1570 * cgen.h (CGEN_FIELDS): Define here.
1571 (CGEN_HW_ENTRY): New member `type'.
1572 (hw_list): Delete decl.
1573 (enum cgen_mode): Declare.
1574 (CGEN_OPERAND): New member `hw'.
1575 (enum cgen_operand_instance_type): Declare.
1576 (CGEN_OPERAND_INSTANCE): New type.
1577 (CGEN_INSN): New member `operands'.
1578 (CGEN_OPCODE_DATA): Make hw_list const.
1579 (get_insn_operands,lookup_insn): Add prototypes for.
1580
1581 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1582
1583 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1584 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1585 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1586 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1587
1588 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1589
1590 * cgen.h: Correct typo in comment end marker.
1591
1592 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1593
1594 * tic30.h: New file.
1595
1596 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1597
1598 * cgen.h: Add prototypes for cgen_save_fixups(),
1599 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1600 of cgen_asm_finish_insn() to return a char *.
1601
1602 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1603
1604 * cgen.h: Formatting changes to improve readability.
1605
1606 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1607
1608 * cgen.h (*): Clean up pass over `struct foo' usage.
1609 (CGEN_ATTR): Make unsigned char.
1610 (CGEN_ATTR_TYPE): Update.
1611 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1612 (cgen_base): Move member `attrs' to cgen_insn.
1613 (CGEN_KEYWORD): New member `null_entry'.
1614 (CGEN_{SYNTAX,FORMAT}): New types.
1615 (cgen_insn): Format and syntax separated from each other.
1616
1617 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1618
1619 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1620 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1621 flags_{used,set} long.
1622 (d30v_operand): Make flags field long.
1623
1624 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1625
1626 * m68k.h: Fix comment describing operand types.
1627
1628 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1629
1630 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1631 everything else after down.
1632
1633 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1634
1635 * d10v.h (OPERAND_FLAG): Split into:
1636 (OPERAND_FFLAG, OPERAND_CFLAG) .
1637
1638 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1639
1640 * mips.h (struct mips_opcode): Changed comments to reflect new
1641 field usage.
1642
1643 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1644
1645 * mips.h: Added to comments a quick-ref list of all assigned
1646 operand type characters.
1647 (OP_{MASK,SH}_PERFREG): New macros.
1648
1649 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1650
1651 * sparc.h: Add '_' and '/' for v9a asr's.
1652 Patch from David Miller <davem@vger.rutgers.edu>
1653
1654 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1655
1656 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1657 area are not available in the base model (H8/300).
1658
1659 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1660
1661 * m68k.h: Remove documentation of ` operand specifier.
1662
1663 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1664
1665 * m68k.h: Document q and v operand specifiers.
1666
1667 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1668
1669 * v850.h (struct v850_opcode): Add processors field.
1670 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1671 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1672 (PROCESSOR_V850EA): New bit constants.
1673
1674 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1675
1676 Merge changes from Martin Hunt:
1677
1678 * d30v.h: Allow up to 64 control registers. Add
1679 SHORT_A5S format.
1680
1681 * d30v.h (LONG_Db): New form for delayed branches.
1682
1683 * d30v.h: (LONG_Db): New form for repeati.
1684
1685 * d30v.h (SHORT_D2B): New form.
1686
1687 * d30v.h (SHORT_A2): New form.
1688
1689 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1690 registers are used. Needed for VLIW optimization.
1691
1692 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1693
1694 * cgen.h: Move assembler interface section
1695 up so cgen_parse_operand_result is defined for cgen_parse_address.
1696 (cgen_parse_address): Update prototype.
1697
1698 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1699
1700 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1701
1702 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1703
1704 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1705 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1706 <paubert@iram.es>.
1707
1708 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1709 <paubert@iram.es>.
1710
1711 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1712 <paubert@iram.es>.
1713
1714 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1715 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1716
1717 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1718
1719 * v850.h (V850_NOT_R0): New flag.
1720
1721 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1722
1723 * v850.h (struct v850_opcode): Remove flags field.
1724
1725 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1726
1727 * v850.h (struct v850_opcode): Add flags field.
1728 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1729 fields.
1730 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1731 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1732
1733 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1734
1735 * arc.h: New file.
1736
1737 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1738
1739 * sparc.h (sparc_opcodes): Declare as const.
1740
1741 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1742
1743 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1744 uses single or double precision floating point resources.
1745 (INSN_NO_ISA, INSN_ISA1): Define.
1746 (cpu specific INSN macros): Tweak into bitmasks outside the range
1747 of INSN_ISA field.
1748
1749 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1750
1751 * i386.h: Fix pand opcode.
1752
1753 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1754
1755 * mips.h: Widen INSN_ISA and move it to a more convenient
1756 bit position. Add INSN_3900.
1757
1758 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1759
1760 * mips.h (struct mips_opcode): added new field membership.
1761
1762 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1763
1764 * i386.h (movd): only Reg32 is allowed.
1765
1766 * i386.h: add fcomp and ud2. From Wayne Scott
1767 <wscott@ichips.intel.com>.
1768
1769 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1770
1771 * i386.h: Add MMX instructions.
1772
1773 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1774
1775 * i386.h: Remove W modifier from conditional move instructions.
1776
1777 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1778
1779 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1780 with no arguments to match that generated by the UnixWare
1781 assembler.
1782
1783 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1784
1785 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1786 (cgen_parse_operand_fn): Declare.
1787 (cgen_init_parse_operand): Declare.
1788 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1789 new argument `want'.
1790 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1791 (enum cgen_parse_operand_type): New enum.
1792
1793 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1796
1797 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1798
1799 * cgen.h: New file.
1800
1801 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1802
1803 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1804 fdivrp.
1805
1806 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1807
1808 * v850.h (extract): Make unsigned.
1809
1810 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1811
1812 * i386.h: Add iclr.
1813
1814 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1815
1816 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1817 take a direction bit.
1818
1819 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1820
1821 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1822
1823 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1824
1825 * sparc.h: Include <ansidecl.h>. Update function declarations to
1826 use prototypes, and to use const when appropriate.
1827
1828 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1829
1830 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1831
1832 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1833
1834 * d10v.h: Change pre_defined_registers to
1835 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1836
1837 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1838
1839 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1840 Change mips_opcodes from const array to a pointer,
1841 and change bfd_mips_num_opcodes from const int to int,
1842 so that we can increase the size of the mips opcodes table
1843 dynamically.
1844
1845 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1846
1847 * d30v.h (FLAG_X): Remove unused flag.
1848
1849 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1850
1851 * d30v.h: New file.
1852
1853 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1854
1855 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1856 (PDS_VALUE): Macro to access value field of predefined symbols.
1857 (tic80_next_predefined_symbol): Add prototype.
1858
1859 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1860
1861 * tic80.h (tic80_symbol_to_value): Change prototype to match
1862 change in function, added class parameter.
1863
1864 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1865
1866 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1867 endmask fields, which are somewhat weird in that 0 and 32 are
1868 treated exactly the same.
1869
1870 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1871
1872 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1873 rather than a constant that is 2**X. Reorder them to put bits for
1874 operands that have symbolic names in the upper bits, so they can
1875 be packed into an int where the lower bits contain the value that
1876 corresponds to that symbolic name.
1877 (predefined_symbo): Add struct.
1878 (tic80_predefined_symbols): Declare array of translations.
1879 (tic80_num_predefined_symbols): Declare size of that array.
1880 (tic80_value_to_symbol): Declare function.
1881 (tic80_symbol_to_value): Declare function.
1882
1883 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1884
1885 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1886
1887 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1888
1889 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1890 be the destination register.
1891
1892 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1893
1894 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1895 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1896 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1897 that the opcode can have two vector instructions in a single
1898 32 bit word and we have to encode/decode both.
1899
1900 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1901
1902 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1903 TIC80_OPERAND_RELATIVE for PC relative.
1904 (TIC80_OPERAND_BASEREL): New flag bit for register
1905 base relative.
1906
1907 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1908
1909 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1910
1911 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1912
1913 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1914 ":s" modifier for scaling.
1915
1916 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1917
1918 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1919 (TIC80_OPERAND_M_LI): Ditto
1920
1921 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1922
1923 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1924 (TIC80_OPERAND_CC): New define for condition code operand.
1925 (TIC80_OPERAND_CR): New define for control register operand.
1926
1927 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1928
1929 * tic80.h (struct tic80_opcode): Name changed.
1930 (struct tic80_opcode): Remove format field.
1931 (struct tic80_operand): Add insertion and extraction functions.
1932 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1933 correct ones.
1934 (FMT_*): Ditto.
1935
1936 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1937
1938 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1939 type IV instruction offsets.
1940
1941 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1942
1943 * tic80.h: New file.
1944
1945 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1946
1947 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1948
1949 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1950
1951 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1952 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1953 * v850.h: Fix comment, v850_operand not powerpc_operand.
1954
1955 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1956
1957 * mn10200.h: Flesh out structures and definitions needed by
1958 the mn10200 assembler & disassembler.
1959
1960 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1961
1962 * mips.h: Add mips16 definitions.
1963
1964 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1965
1966 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1967
1968 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1969
1970 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1971 (MN10300_OPERAND_MEMADDR): Define.
1972
1973 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1974
1975 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1976
1977 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1978
1979 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1980
1981 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1982
1983 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1984
1985 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1986
1987 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1988
1989 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1990
1991 * alpha.h: Don't include "bfd.h"; private relocation types are now
1992 negative to minimize problems with shared libraries. Organize
1993 instruction subsets by AMASK extensions and PALcode
1994 implementation.
1995 (struct alpha_operand): Move flags slot for better packing.
1996
1997 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1998
1999 * v850.h (V850_OPERAND_RELAX): New operand flag.
2000
2001 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2002
2003 * mn10300.h (FMT_*): Move operand format definitions
2004 here.
2005
2006 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2007
2008 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2009
2010 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2011
2012 * mn10300.h (mn10300_opcode): Add "format" field.
2013 (MN10300_OPERAND_*): Define.
2014
2015 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2016
2017 * mn10x00.h: Delete.
2018 * mn10200.h, mn10300.h: New files.
2019
2020 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2021
2022 * mn10x00.h: New file.
2023
2024 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2025
2026 * v850.h: Add new flag to indicate this instruction uses a PC
2027 displacement.
2028
2029 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2030
2031 * h8300.h (stmac): Add missing instruction.
2032
2033 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2034
2035 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2036 field.
2037
2038 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2039
2040 * v850.h (V850_OPERAND_EP): Define.
2041
2042 * v850.h (v850_opcode): Add size field.
2043
2044 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2045
2046 * v850.h (v850_operands): Add insert and extract fields, pointers
2047 to functions used to handle unusual operand encoding.
2048 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
2049 V850_OPERAND_SIGNED): Defined.
2050
2051 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2052
2053 * v850.h (v850_operands): Add flags field.
2054 (OPERAND_REG, OPERAND_NUM): Defined.
2055
2056 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2057
2058 * v850.h: New file.
2059
2060 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2061
2062 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2063 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2064 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2065 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2066 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2067 Defined.
2068
2069 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2070
2071 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2072 a 3 bit space id instead of a 2 bit space id.
2073
2074 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2075
2076 * d10v.h: Add some additional defines to support the
2077 assembler in determining which operations can be done in parallel.
2078
2079 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2080
2081 * h8300.h (SN): Define.
2082 (eepmov.b): Renamed from "eepmov"
2083 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2084 with them.
2085
2086 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2087
2088 * d10v.h (OPERAND_SHIFT): New operand flag.
2089
2090 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2091
2092 * d10v.h: Changes for divs, parallel-only instructions, and
2093 signed numbers.
2094
2095 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2096
2097 * d10v.h (pd_reg): Define. Putting the definition here allows
2098 the assembler and disassembler to share the same struct.
2099
2100 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2101
2102 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2103 Williams <steve@icarus.com>.
2104
2105 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2106
2107 * d10v.h: New file.
2108
2109 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2110
2111 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2112
2113 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2114
2115 * m68k.h (mcf5200): New macro.
2116 Document names of coldfire control registers.
2117
2118 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2119
2120 * h8300.h (SRC_IN_DST): Define.
2121
2122 * h8300.h (UNOP3): Mark the register operand in this insn
2123 as a source operand, not a destination operand.
2124 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2125 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2126 register operand with SRC_IN_DST.
2127
2128 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2129
2130 * alpha.h: New file.
2131
2132 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2133
2134 * rs6k.h: Remove obsolete file.
2135
2136 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2137
2138 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2139 fdivp, and fdivrp. Add ffreep.
2140
2141 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2142
2143 * h8300.h: Reorder various #defines for readability.
2144 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2145 (BITOP): Accept additional (unused) argument. All callers changed.
2146 (EBITOP): Likewise.
2147 (O_LAST): Bump.
2148 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2149
2150 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2151 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2152 (BITOP, EBITOP): Handle new H8/S addressing modes for
2153 bit insns.
2154 (UNOP3): Handle new shift/rotate insns on the H8/S.
2155 (insns using exr): New instructions.
2156 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2157
2158 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2159
2160 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2161 was incorrect.
2162
2163 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2164
2165 * h8300.h (START): Remove.
2166 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2167 and mov.l insns that can be relaxed.
2168
2169 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2170
2171 * i386.h: Remove Abs32 from lcall.
2172
2173 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2174
2175 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2176 (SLCPOP): New macro.
2177 Mark X,Y opcode letters as in use.
2178
2179 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2180
2181 * sparc.h (F_FLOAT, F_FBR): Define.
2182
2183 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2184
2185 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2186 from all insns.
2187 (ABS8SRC,ABS8DST): Add ABS8MEM.
2188 (add.l): Fix reg+reg variant.
2189 (eepmov.w): Renamed from eepmovw.
2190 (ldc,stc): Fix many cases.
2191
2192 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2193
2194 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2195
2196 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2197
2198 * sparc.h (O): Mark operand letter as in use.
2199
2200 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2201
2202 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2203 Mark operand letters uU as in use.
2204
2205 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2206
2207 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2208 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2209 (SPARC_OPCODE_SUPPORTED): New macro.
2210 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2211 (F_NOTV9): Delete.
2212
2213 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2214
2215 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2216 declaration consistent with return type in definition.
2217
2218 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2219
2220 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2221
2222 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2223
2224 * i386.h (i386_regtab): Add 80486 test registers.
2225
2226 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2227
2228 * i960.h (I_HX): Define.
2229 (i960_opcodes): Add HX instruction.
2230
2231 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2232
2233 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2234 and fclex.
2235
2236 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2237
2238 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2239 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2240 (bfd_* defines): Delete.
2241 (sparc_opcode_archs): Replaces architecture_pname.
2242 (sparc_opcode_lookup_arch): Declare.
2243 (NUMOPCODES): Delete.
2244
2245 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2246
2247 * sparc.h (enum sparc_architecture): Add v9a.
2248 (ARCHITECTURES_CONFLICT_P): Update.
2249
2250 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2251
2252 * i386.h: Added Pentium Pro instructions.
2253
2254 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2255
2256 * m68k.h: Document new 'W' operand place.
2257
2258 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2259
2260 * hppa.h: Add lci and syncdma instructions.
2261
2262 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2263
2264 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2265 instructions.
2266
2267 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2268
2269 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2270 assembler's -mcom and -many switches.
2271
2272 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2273
2274 * i386.h: Fix cmpxchg8b extension opcode description.
2275
2276 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2277
2278 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2279 and register cr4.
2280
2281 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2282
2283 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2284
2285 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2286
2287 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2288
2289 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2290
2291 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2292
2293 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2294
2295 * m68kmri.h: Remove.
2296
2297 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2298 declarations. Remove F_ALIAS and flag field of struct
2299 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2300 int. Make name and args fields of struct m68k_opcode const.
2301
2302 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2303
2304 * sparc.h (F_NOTV9): Define.
2305
2306 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2307
2308 * mips.h (INSN_4010): Define.
2309
2310 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2311
2312 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2313
2314 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2315 * m68k.h: Fix argument descriptions of coprocessor
2316 instructions to allow only alterable operands where appropriate.
2317 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2318 (m68k_opcode_aliases): Add more aliases.
2319
2320 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2321
2322 * m68k.h: Added explcitly short-sized conditional branches, and a
2323 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2324 svr4-based configurations.
2325
2326 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2327
2328 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2329 * i386.h: added missing Data16/Data32 flags to a few instructions.
2330
2331 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2332
2333 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2334 (OP_MASK_BCC, OP_SH_BCC): Define.
2335 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2336 (OP_MASK_CCC, OP_SH_CCC): Define.
2337 (INSN_READ_FPR_R): Define.
2338 (INSN_RFE): Delete.
2339
2340 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2341
2342 * m68k.h (enum m68k_architecture): Deleted.
2343 (struct m68k_opcode_alias): New type.
2344 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2345 matching constraints, values and flags. As a side effect of this,
2346 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2347 as I know were never used, now may need re-examining.
2348 (numopcodes): Now const.
2349 (m68k_opcode_aliases, numaliases): New variables.
2350 (endop): Deleted.
2351 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2352 m68k_opcode_aliases; update declaration of m68k_opcodes.
2353
2354 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2355
2356 * hppa.h (delay_type): Delete unused enumeration.
2357 (pa_opcode): Replace unused delayed field with an architecture
2358 field.
2359 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2360
2361 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2362
2363 * mips.h (INSN_ISA4): Define.
2364
2365 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2366
2367 * mips.h (M_DLA_AB, M_DLI): Define.
2368
2369 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2370
2371 * hppa.h (fstwx): Fix single-bit error.
2372
2373 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2374
2375 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2376
2377 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2378
2379 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2380 debug registers. From Charles Hannum (mycroft@netbsd.org).
2381
2382 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2383
2384 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2385 i386 support:
2386 * i386.h (MOV_AX_DISP32): New macro.
2387 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2388 of several call/return instructions.
2389 (ADDR_PREFIX_OPCODE): New macro.
2390
2391 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2392
2393 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2394
2395 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2396 char.
2397 (struct vot, field `name'): ditto.
2398
2399 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2400
2401 * vax.h: Supply and properly group all values in end sentinel.
2402
2403 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2404
2405 * mips.h (INSN_ISA, INSN_4650): Define.
2406
2407 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2408
2409 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2410 systems with a separate instruction and data cache, such as the
2411 29040, these instructions take an optional argument.
2412
2413 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2414
2415 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2416 INSN_TRAP.
2417
2418 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2419
2420 * mips.h (INSN_STORE_MEMORY): Define.
2421
2422 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2423
2424 * sparc.h: Document new operand type 'x'.
2425
2426 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2427
2428 * i960.h (I_CX2): New instruction category. It includes
2429 instructions available on Cx and Jx processors.
2430 (I_JX): New instruction category, for JX-only instructions.
2431 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2432 Jx-only instructions, in I_JX category.
2433
2434 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2435
2436 * ns32k.h (endop): Made pointer const too.
2437
2438 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2439
2440 * ns32k.h: Drop Q operand type as there is no correct use
2441 for it. Add I and Z operand types which allow better checking.
2442
2443 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2444
2445 * h8300.h (xor.l) :fix bit pattern.
2446 (L_2): New size of operand.
2447 (trapa): Use it.
2448
2449 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2450
2451 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2452
2453 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2454
2455 * sparc.h: Include v9 definitions.
2456
2457 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2458
2459 * m68k.h (m68060): Defined.
2460 (m68040up, mfloat, mmmu): Include it.
2461 (struct m68k_opcode): Widen `arch' field.
2462 (m68k_opcodes): Updated for M68060. Removed comments that were
2463 instructions commented out by "JF" years ago.
2464
2465 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2466
2467 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2468 add a one-bit `flags' field.
2469 (F_ALIAS): New macro.
2470
2471 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2472
2473 * h8300.h (dec, inc): Get encoding right.
2474
2475 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2476
2477 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2478 a flag instead.
2479 (PPC_OPERAND_SIGNED): Define.
2480 (PPC_OPERAND_SIGNOPT): Define.
2481
2482 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2483
2484 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2485 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2486
2487 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2488
2489 * i386.h: Reverse last change. It'll be handled in gas instead.
2490
2491 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2492
2493 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2494 slower on the 486 and used the implicit shift count despite the
2495 explicit operand. The one-operand form is still available to get
2496 the shorter form with the implicit shift count.
2497
2498 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2499
2500 * hppa.h: Fix typo in fstws arg string.
2501
2502 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2503
2504 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2505
2506 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2507
2508 * ppc.h (PPC_OPCODE_601): Define.
2509
2510 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2511
2512 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2513 (so we can determine valid completers for both addb and addb[tf].)
2514
2515 * hppa.h (xmpyu): No floating point format specifier for the
2516 xmpyu instruction.
2517
2518 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2519
2520 * ppc.h (PPC_OPERAND_NEXT): Define.
2521 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2522 (struct powerpc_macro): Define.
2523 (powerpc_macros, powerpc_num_macros): Declare.
2524
2525 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2526
2527 * ppc.h: New file. Header file for PowerPC opcode table.
2528
2529 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2530
2531 * hppa.h: More minor template fixes for sfu and copr (to allow
2532 for easier disassembly).
2533
2534 * hppa.h: Fix templates for all the sfu and copr instructions.
2535
2536 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2537
2538 * i386.h (push): Permit Imm16 operand too.
2539
2540 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2541
2542 * h8300.h (andc): Exists in base arch.
2543
2544 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2545
2546 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2547 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2548
2549 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2550
2551 * hppa.h: Add FP quadword store instructions.
2552
2553 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2554
2555 * mips.h: (M_J_A): Added.
2556 (M_LA): Removed.
2557
2558 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2559
2560 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2561 <mellon@pepper.ncd.com>.
2562
2563 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2564
2565 * hppa.h: Immediate field in probei instructions is unsigned,
2566 not low-sign extended.
2567
2568 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2569
2570 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2571
2572 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2573
2574 * i386.h: Add "fxch" without operand.
2575
2576 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2577
2578 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2579
2580 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2581
2582 * hppa.h: Add gfw and gfr to the opcode table.
2583
2584 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2585
2586 * m88k.h: extended to handle m88110.
2587
2588 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2589
2590 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2591 addresses.
2592
2593 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2594
2595 * i960.h (i960_opcodes): Properly bracket initializers.
2596
2597 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2598
2599 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2600
2601 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2602
2603 * m68k.h (two): Protect second argument with parentheses.
2604
2605 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2606
2607 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2608 Deleted old in/out instructions in "#if 0" section.
2609
2610 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2611
2612 * i386.h (i386_optab): Properly bracket initializers.
2613
2614 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2615
2616 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2617 Jeff Law, law@cs.utah.edu).
2618
2619 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2620
2621 * i386.h (lcall): Accept Imm32 operand also.
2622
2623 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2624
2625 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2626 (M_DABS): Added.
2627
2628 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2629
2630 * mips.h (INSN_*): Changed values. Removed unused definitions.
2631 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2632 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2633 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2634 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2635 (M_*): Added new values for r6000 and r4000 macros.
2636 (ANY_DELAY): Removed.
2637
2638 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2639
2640 * mips.h: Added M_LI_S and M_LI_SS.
2641
2642 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2643
2644 * h8300.h: Get some rare mov.bs correct.
2645
2646 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2647
2648 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2649 been included.
2650
2651 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2652
2653 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2654 jump instructions, for use in disassemblers.
2655
2656 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2657
2658 * m88k.h: Make bitfields just unsigned, not unsigned long or
2659 unsigned short.
2660
2661 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2662
2663 * hppa.h: New argument type 'y'. Use in various float instructions.
2664
2665 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2666
2667 * hppa.h (break): First immediate field is unsigned.
2668
2669 * hppa.h: Add rfir instruction.
2670
2671 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2672
2673 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2674
2675 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2676
2677 * mips.h: Reworked the hazard information somewhat, and fixed some
2678 bugs in the instruction hazard descriptions.
2679
2680 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2681
2682 * m88k.h: Corrected a couple of opcodes.
2683
2684 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2685
2686 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2687 new version includes instruction hazard information, but is
2688 otherwise reasonably similar.
2689
2690 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2691
2692 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2693
2694 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2695
2696 Patches from Jeff Law, law@cs.utah.edu:
2697 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2698 Make the tables be the same for the following instructions:
2699 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2700 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2701 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2702 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2703 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2704 "fcmp", and "ftest".
2705
2706 * hppa.h: Make new and old tables the same for "break", "mtctl",
2707 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2708 Fix typo in last patch. Collapse several #ifdefs into a
2709 single #ifdef.
2710
2711 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2712 of the comments up-to-date.
2713
2714 * hppa.h: Update "free list" of letters and update
2715 comments describing each letter's function.
2716
2717 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2718
2719 * h8300.h: Lots of little fixes for the h8/300h.
2720
2721 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2722
2723 Support for H8/300-H
2724 * h8300.h: Lots of new opcodes.
2725
2726 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2727
2728 * h8300.h: checkpoint, includes H8/300-H opcodes.
2729
2730 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2731
2732 * Patches from Jeffrey Law <law@cs.utah.edu>.
2733 * hppa.h: Rework single precision FP
2734 instructions so that they correctly disassemble code
2735 PA1.1 code.
2736
2737 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2738
2739 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2740 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2741
2742 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2743
2744 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2745 gdb will define it for now.
2746
2747 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2748
2749 * sparc.h: Don't end enumerator list with comma.
2750
2751 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2752
2753 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2754 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2755 ("bc2t"): Correct typo.
2756 ("[ls]wc[023]"): Use T rather than t.
2757 ("c[0123]"): Define general coprocessor instructions.
2758
2759 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2760
2761 * m68k.h: Move split point for gcc compilation more towards
2762 middle.
2763
2764 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2765
2766 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2767 simply wrong, ics, rfi, & rfsvc were missing).
2768 Add "a" to opr_ext for "bb". Doc fix.
2769
2770 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2771
2772 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2773 * mips.h: Add casts, to suppress warnings about shifting too much.
2774 * m68k.h: Document the placement code '9'.
2775
2776 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2777
2778 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2779 allows callers to break up the large initialized struct full of
2780 opcodes into two half-sized ones. This permits GCC to compile
2781 this module, since it takes exponential space for initializers.
2782 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2783
2784 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2785
2786 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2787 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2788 initialized structs in it.
2789
2790 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2791
2792 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2793 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2794 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2795
2796 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2797
2798 * mips.h: document "i" and "j" operands correctly.
2799
2800 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2801
2802 * mips.h: Removed endianness dependency.
2803
2804 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2805
2806 * h8300.h: include info on number of cycles per instruction.
2807
2808 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2809
2810 * hppa.h: Move handy aliases to the front. Fix masks for extract
2811 and deposit instructions.
2812
2813 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2814
2815 * i386.h: accept shld and shrd both with and without the shift
2816 count argument, which is always %cl.
2817
2818 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2819
2820 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2821 (one_byte_segment_defaults, two_byte_segment_defaults,
2822 i386_prefixtab_end): Ditto.
2823
2824 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2825
2826 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2827 for operand 2; from John Carr, jfc@dsg.dec.com.
2828
2829 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2830
2831 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2832 always use 16-bit offsets. Makes calculated-size jump tables
2833 feasible.
2834
2835 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2836
2837 * i386.h: Fix one-operand forms of in* and out* patterns.
2838
2839 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2840
2841 * m68k.h: Added CPU32 support.
2842
2843 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2844
2845 * mips.h (break): Disassemble the argument. Patch from
2846 jonathan@cs.stanford.edu (Jonathan Stone).
2847
2848 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2849
2850 * m68k.h: merged Motorola and MIT syntax.
2851
2852 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2853
2854 * m68k.h (pmove): make the tests less strict, the 68k book is
2855 wrong.
2856
2857 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2858
2859 * m68k.h (m68ec030): Defined as alias for 68030.
2860 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2861 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2862 them. Tightened description of "fmovex" to distinguish it from
2863 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2864 up descriptions that claimed versions were available for chips not
2865 supporting them. Added "pmovefd".
2866
2867 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2868
2869 * m68k.h: fix where the . goes in divull
2870
2871 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2872
2873 * m68k.h: the cas2 instruction is supposed to be written with
2874 indirection on the last two operands, which can be either data or
2875 address registers. Added a new operand type 'r' which accepts
2876 either register type. Added new cases for cas2l and cas2w which
2877 use them. Corrected masks for cas2 which failed to recognize use
2878 of address register.
2879
2880 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2881
2882 * m68k.h: Merged in patches (mostly m68040-specific) from
2883 Colin Smith <colin@wrs.com>.
2884
2885 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2886 base). Also cleaned up duplicates, re-ordered instructions for
2887 the sake of dis-assembling (so aliases come after standard names).
2888 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2889
2890 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2891
2892 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2893 all missing .s
2894
2895 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2896
2897 * sparc.h: Moved tables to BFD library.
2898
2899 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2900
2901 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2902
2903 * h8300.h: Finish filling in all the holes in the opcode table,
2904 so that the Lucid C compiler can digest this as well...
2905
2906 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2907
2908 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2909 Fix opcodes on various sizes of fild/fist instructions
2910 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2911 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2912
2913 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2914
2915 * h8300.h: Fill in all the holes in the opcode table so that the
2916 losing HPUX C compiler can digest this...
2917
2918 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2919
2920 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2921 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2922
2923 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2924
2925 * sparc.h: Add new architecture variant sparclite; add its scan
2926 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2927
2928 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2929
2930 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2931 fy@lucid.com).
2932
2933 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2934
2935 * rs6k.h: New version from IBM (Metin).
2936
2937 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2938
2939 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2940 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2941
2942 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2943
2944 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2945
2946 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2947
2948 * m68k.h (one, two): Cast macro args to unsigned to suppress
2949 complaints from compiler and lint about integer overflow during
2950 shift.
2951
2952 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2953
2954 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2955
2956 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2957
2958 * mips.h: Make bitfield layout depend on the HOST compiler,
2959 not on the TARGET system.
2960
2961 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2962
2963 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2964 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2965 <TRANLE@INTELLICORP.COM>.
2966
2967 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2968
2969 * h8300.h: turned op_type enum into #define list
2970
2971 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2972
2973 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2974 similar instructions -- they've been renamed to "fitoq", etc.
2975 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2976 number of arguments.
2977 * h8300.h: Remove extra ; which produces compiler warning.
2978
2979 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2980
2981 * sparc.h: fix opcode for tsubcctv.
2982
2983 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2984
2985 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2986
2987 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2988
2989 * sparc.h (nop): Made the 'lose' field be even tighter,
2990 so only a standard 'nop' is disassembled as a nop.
2991
2992 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2993
2994 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2995 disassembled as a nop.
2996
2997 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2998
2999 * m68k.h, sparc.h: ANSIfy enums.
3000
3001 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3002
3003 * sparc.h: fix a typo.
3004
3005 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3006
3007 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3008 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
3009 vax.h: Renamed from ../<foo>-opcode.h.
3010
3011 \f
3012 Local Variables:
3013 version-control: never
3014 End:
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