Fix "movnti"
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-01-10 Richard Schaal <richard.schaal@intel.com>
2
3 * i386.h: Correct movnti instruction.
4
5 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
6
7 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
8 of operands (unsigned char or unsigned short).
9 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
10 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
11
12 Fri Jan 5 13:22:23 MET 2001 Jan Hubicka <jh@suse.cz>
13
14 * i386.h (i386_optab): Make [sml]fence template to use immext field.
15
16 Wed Jan 3 16:27:15 MET 2001 Jan Hubicka <jh@suse.cz>
17
18 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
19 introduced by Pentium4
20
21 Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
22
23 * i386.h (i386_optab): Add "rex*" instructions;
24 add swapgs; disable jmp/call far direct instructions for
25 64bit mode; add syscall and sysret; disable registers for 0xc6
26 template. Add 'q' suffixes to extendable instructions, disable
27 obsolete instructions, add new sign/zero extension ones.
28 (i386_regtab): Add extended registers.
29 (*Suf): Add No_qSuf.
30 (q_Suf, wlq_Suf, bwlq_Suf): New.
31
32 Wed Dec 20 14:22:03 MET 2000 Jan Hubicka <jh@suse.cz>
33
34 * i386.h (i386_optab): Replace "Imm" with "EncImm".
35 (i386_regtab): Add flags field.
36
37 2000-12-12 Nick Clifton <nickc@redhat.com>
38
39 * mips.h: Fix formatting.
40
41 2000-12-01 Chris Demetriou <cgd@sibyte.com>
42
43 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
44 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
45 OP_*_SYSCALL definitions.
46 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
47 19 bit wait codes.
48 (MIPS operand specifier comments): Remove 'm', add 'U' and
49 'J', and update the meaning of 'B' so that it's more general.
50
51 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
52 INSN_ISA5): Renumber, redefine to mean the ISA at which the
53 instruction was added.
54 (INSN_ISA32): New constant.
55 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
56 Renumber to avoid new and/or renumbered INSN_* constants.
57 (INSN_MIPS32): Delete.
58 (ISA_UNKNOWN): New constant to indicate unknown ISA.
59 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
60 ISA_MIPS32): New constants, defined to be the mask of INSN_*
61 constants available at that ISA level.
62 (CPU_UNKNOWN): New constant to indicate unknown CPU.
63 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
64 define it with a unique value.
65 (OPCODE_IS_MEMBER): Update for new ISA membership-related
66 constant meanings.
67
68 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
69 definitions.
70
71 * mips.h (CPU_SB1): New constant.
72
73 2000-10-20 Jakub Jelinek <jakub@redhat.com>
74
75 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
76 Note that '3' is used for siam operand.
77
78 2000-09-22 Jim Wilson <wilson@cygnus.com>
79
80 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
81
82 2000-09-13 Anders Norlander <anorland@acc.umu.se>
83
84 * mips.h: Use defines instead of hard-coded processor numbers.
85 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
86 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
87 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
88 CPU_4KC, CPU_4KM, CPU_4KP): Define..
89 (OPCODE_IS_MEMBER): Use new defines.
90 (OP_MASK_SEL, OP_SH_SEL): Define.
91 (OP_MASK_CODE20, OP_SH_CODE20): Define.
92 Add 'P' to used characters.
93 Use 'H' for coprocessor select field.
94 Use 'm' for 20 bit breakpoint code.
95 Document new arg characters and add to used characters.
96 (INSN_MIPS32): New define for MIPS32 extensions.
97 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
98
99 2000-09-05 Alan Modra <alan@linuxcare.com.au>
100
101 * hppa.h: Mention cz completer.
102
103 2000-08-16 Jim Wilson <wilson@cygnus.com>
104
105 * ia64.h (IA64_OPCODE_POSTINC): New.
106
107 2000-08-15 H.J. Lu <hjl@gnu.org>
108
109 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
110 IgnoreSize change.
111
112 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
113
114 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
115 Move related opcodes closer to each other.
116 Minor changes in comments, list undefined opcodes.
117
118 2000-07-26 Dave Brolley <brolley@redhat.com>
119
120 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
121
122 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
123
124 cris.h: New file.
125
126 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
127
128 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
129 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
130 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
131 (AVR_ISA_M83): Define for ATmega83, ATmega85.
132 (espm): Remove, because ESPM removed in databook update.
133 (eicall, eijmp): Move to the end of opcode table.
134
135 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
136
137 * m68hc11.h: New file for support of Motorola 68hc11.
138
139 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
140
141 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
142
143 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
144
145 * avr.h: New file with AVR opcodes.
146
147 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
148
149 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
150
151 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
152
153 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
154
155 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
156
157 * i386.h: Use sl_FP, not sl_Suf for fild.
158
159 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
160
161 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
162 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
163 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
164 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
165
166 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
167
168 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
169
170 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
171 Alexander Sokolov <robocop@netlink.ru>
172
173 * i386.h (i386_optab): Add cpu_flags for all instructions.
174
175 2000-05-13 Alan Modra <alan@linuxcare.com.au>
176
177 From Gavin Romig-Koch <gavin@cygnus.com>
178 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
179
180 2000-05-04 Timothy Wall <twall@cygnus.com>
181
182 * tic54x.h: New.
183
184 2000-05-03 J.T. Conklin <jtc@redback.com>
185
186 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
187 (PPC_OPERAND_VR): New operand flag for vector registers.
188
189 2000-05-01 Kazu Hirata <kazu@hxi.com>
190
191 * h8300.h (EOP): Add missing initializer.
192
193 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
194
195 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
196 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
197 New operand types l,y,&,fe,fE,fx added to support above forms.
198 (pa_opcodes): Replaced usage of 'x' as source/target for
199 floating point double-word loads/stores with 'fx'.
200
201 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
202 David Mosberger <davidm@hpl.hp.com>
203 Timothy Wall <twall@cygnus.com>
204 Jim Wilson <wilson@cygnus.com>
205
206 * ia64.h: New file.
207
208 2000-03-27 Nick Clifton <nickc@cygnus.com>
209
210 * d30v.h (SHORT_A1): Fix value.
211 (SHORT_AR): Renumber so that it is at the end of the list of short
212 instructions, not the end of the list of long instructions.
213
214 2000-03-26 Alan Modra <alan@linuxcare.com>
215
216 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
217 problem isn't really specific to Unixware.
218 (OLDGCC_COMPAT): Define.
219 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
220 destination %st(0).
221 Fix lots of comments.
222
223 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
224
225 * d30v.h:
226 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
227 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
228 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
229 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
230 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
231 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
232 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
233
234 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
235
236 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
237 fistpd without suffix.
238
239 2000-02-24 Nick Clifton <nickc@cygnus.com>
240
241 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
242 'signed_overflow_ok_p'.
243 Delete prototypes for cgen_set_flags() and cgen_get_flags().
244
245 2000-02-24 Andrew Haley <aph@cygnus.com>
246
247 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
248 (CGEN_CPU_TABLE): flags: new field.
249 Add prototypes for new functions.
250
251 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
252
253 * i386.h: Add some more UNIXWARE_COMPAT comments.
254
255 2000-02-23 Linas Vepstas <linas@linas.org>
256
257 * i370.h: New file.
258
259 2000-02-22 Andrew Haley <aph@cygnus.com>
260
261 * mips.h: (OPCODE_IS_MEMBER): Add comment.
262
263 1999-12-30 Andrew Haley <aph@cygnus.com>
264
265 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
266 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
267 insns.
268
269 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
270
271 * i386.h: Qualify intel mode far call and jmp with x_Suf.
272
273 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
274
275 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
276 indirect jumps and calls. Add FF/3 call for intel mode.
277
278 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
279
280 * mn10300.h: Add new operand types. Add new instruction formats.
281
282 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
283
284 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
285 instruction.
286
287 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
288
289 * mips.h (INSN_ISA5): New.
290
291 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
292
293 * mips.h (OPCODE_IS_MEMBER): New.
294
295 1999-10-29 Nick Clifton <nickc@cygnus.com>
296
297 * d30v.h (SHORT_AR): Define.
298
299 1999-10-18 Michael Meissner <meissner@cygnus.com>
300
301 * alpha.h (alpha_num_opcodes): Convert to unsigned.
302 (alpha_num_operands): Ditto.
303
304 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
305
306 * hppa.h (pa_opcodes): Add load and store cache control to
307 instructions. Add ordered access load and store.
308
309 * hppa.h (pa_opcode): Add new entries for addb and addib.
310
311 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
312
313 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
314
315 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
316
317 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
318
319 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
320
321 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
322 and "be" using completer prefixes.
323
324 * hppa.h (pa_opcodes): Add initializers to silence compiler.
325
326 * hppa.h: Update comments about character usage.
327
328 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
329
330 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
331 up the new fstw & bve instructions.
332
333 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
334
335 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
336 instructions.
337
338 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
339
340 * hppa.h (pa_opcodes): Add long offset double word load/store
341 instructions.
342
343 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
344 stores.
345
346 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
347
348 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
349
350 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
351
352 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
353
354 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
355
356 * hppa.h (pa_opcodes): Add support for "b,l".
357
358 * hppa.h (pa_opcodes): Add support for "b,gate".
359
360 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
361
362 * hppa.h (pa_opcodes): Use 'fX' for first register operand
363 in xmpyu.
364
365 * hppa.h (pa_opcodes): Fix mask for probe and probei.
366
367 * hppa.h (pa_opcodes): Fix mask for depwi.
368
369 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
370
371 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
372 an explicit output argument.
373
374 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
375
376 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
377 Add a few PA2.0 loads and store variants.
378
379 1999-09-04 Steve Chamberlain <sac@pobox.com>
380
381 * pj.h: New file.
382
383 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
384
385 * i386.h (i386_regtab): Move %st to top of table, and split off
386 other fp reg entries.
387 (i386_float_regtab): To here.
388
389 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
390
391 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
392 by 'f'.
393
394 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
395 Add supporting args.
396
397 * hppa.h: Document new completers and args.
398 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
399 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
400 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
401 pmenb and pmdis.
402
403 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
404 hshr, hsub, mixh, mixw, permh.
405
406 * hppa.h (pa_opcodes): Change completers in instructions to
407 use 'c' prefix.
408
409 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
410 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
411
412 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
413 fnegabs to use 'I' instead of 'F'.
414
415 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
416
417 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
418 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
419 Alphabetically sort PIII insns.
420
421 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
422
423 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
424
425 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
426
427 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
428 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
429
430 * hppa.h: Document 64 bit condition completers.
431
432 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
433
434 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
435
436 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
437
438 * i386.h (i386_optab): Add DefaultSize modifier to all insns
439 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
440 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
441
442 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
443 Jeff Law <law@cygnus.com>
444
445 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
446
447 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
448
449 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
450 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
451
452 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
453
454 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
455
456 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
457
458 * hppa.h (struct pa_opcode): Add new field "flags".
459 (FLAGS_STRICT): Define.
460
461 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
462 Jeff Law <law@cygnus.com>
463
464 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
465
466 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
467
468 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
469
470 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
471 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
472 flag to fcomi and friends.
473
474 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
475
476 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
477 integer logical instructions.
478
479 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
480
481 * m68k.h: Document new formats `E', `G', `H' and new places `N',
482 `n', `o'.
483
484 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
485 and new places `m', `M', `h'.
486
487 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
488
489 * hppa.h (pa_opcodes): Add several processor specific system
490 instructions.
491
492 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
493
494 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
495 "addb", and "addib" to be used by the disassembler.
496
497 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
498
499 * i386.h (ReverseModrm): Remove all occurences.
500 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
501 movmskps, pextrw, pmovmskb, maskmovq.
502 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
503 ignore the data size prefix.
504
505 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
506 Mostly stolen from Doug Ledford <dledford@redhat.com>
507
508 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
509
510 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
511
512 1999-04-14 Doug Evans <devans@casey.cygnus.com>
513
514 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
515 (CGEN_ATTR_TYPE): Update.
516 (CGEN_ATTR_MASK): Number booleans starting at 0.
517 (CGEN_ATTR_VALUE): Update.
518 (CGEN_INSN_ATTR): Update.
519
520 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
521
522 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
523 instructions.
524
525 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
526
527 * hppa.h (bb, bvb): Tweak opcode/mask.
528
529
530 1999-03-22 Doug Evans <devans@casey.cygnus.com>
531
532 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
533 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
534 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
535 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
536 Delete member max_insn_size.
537 (enum cgen_cpu_open_arg): New enum.
538 (cpu_open): Update prototype.
539 (cpu_open_1): Declare.
540 (cgen_set_cpu): Delete.
541
542 1999-03-11 Doug Evans <devans@casey.cygnus.com>
543
544 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
545 (CGEN_OPERAND_NIL): New macro.
546 (CGEN_OPERAND): New member `type'.
547 (@arch@_cgen_operand_table): Delete decl.
548 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
549 (CGEN_OPERAND_TABLE): New struct.
550 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
551 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
552 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
553 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
554 {get,set}_{int,vma}_operand.
555 (@arch@_cgen_cpu_open): New arg `isa'.
556 (cgen_set_cpu): Ditto.
557
558 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
559
560 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
561
562 1999-02-25 Doug Evans <devans@casey.cygnus.com>
563
564 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
565 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
566 enum cgen_hw_type.
567 (CGEN_HW_TABLE): New struct.
568 (hw_table): Delete declaration.
569 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
570 to table entry to enum.
571 (CGEN_OPINST): Ditto.
572 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
573
574 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
575
576 * alpha.h (AXP_OPCODE_EV6): New.
577 (AXP_OPCODE_NOPAL): Include it.
578
579 1999-02-09 Doug Evans <devans@casey.cygnus.com>
580
581 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
582 All uses updated. New members int_insn_p, max_insn_size,
583 parse_operand,insert_operand,extract_operand,print_operand,
584 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
585 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
586 extract_handlers,print_handlers.
587 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
588 (CGEN_ATTR_BOOL_OFFSET): New macro.
589 (CGEN_ATTR_MASK): Subtract it to compute bit number.
590 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
591 (cgen_opcode_handler): Renamed from cgen_base.
592 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
593 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
594 all uses updated.
595 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
596 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
597 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
598 (CGEN_OPCODE,CGEN_IBASE): New types.
599 (CGEN_INSN): Rewrite.
600 (CGEN_{ASM,DIS}_HASH*): Delete.
601 (init_opcode_table,init_ibld_table): Declare.
602 (CGEN_INSN_ATTR): New type.
603
604 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
605
606 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
607 (x_FP, d_FP, dls_FP, sldx_FP): Define.
608 Change *Suf definitions to include x and d suffixes.
609 (movsx): Use w_Suf and b_Suf.
610 (movzx): Likewise.
611 (movs): Use bwld_Suf.
612 (fld): Change ordering. Use sld_FP.
613 (fild): Add Intel Syntax equivalent of fildq.
614 (fst): Use sld_FP.
615 (fist): Use sld_FP.
616 (fstp): Use sld_FP. Add x_FP version.
617 (fistp): LLongMem version for Intel Syntax.
618 (fcom, fcomp): Use sld_FP.
619 (fadd, fiadd, fsub): Use sld_FP.
620 (fsubr): Use sld_FP.
621 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
622
623 1999-01-27 Doug Evans <devans@casey.cygnus.com>
624
625 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
626 CGEN_MODE_UINT.
627
628 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
629
630 * hppa.h (bv): Fix mask.
631
632 1999-01-05 Doug Evans <devans@casey.cygnus.com>
633
634 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
635 (CGEN_ATTR): Use it.
636 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
637 (CGEN_ATTR_TABLE): New member dfault.
638
639 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
640
641 * mips.h (MIPS16_INSN_BRANCH): New.
642
643 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
644
645 The following is part of a change made by Edith Epstein
646 <eepstein@sophia.cygnus.com> as part of a project to merge in
647 changes by HP; HP did not create ChangeLog entries.
648
649 * hppa.h (completer_chars): list of chars to not put a space
650 after.
651
652 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
653
654 * i386.h (i386_optab): Permit w suffix on processor control and
655 status word instructions.
656
657 1998-11-30 Doug Evans <devans@casey.cygnus.com>
658
659 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
660 (struct cgen_keyword_entry): Ditto.
661 (struct cgen_operand): Ditto.
662 (CGEN_IFLD): New typedef, with associated access macros.
663 (CGEN_IFMT): New typedef, with associated access macros.
664 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
665 (CGEN_IVALUE): New typedef.
666 (struct cgen_insn): Delete const on syntax,attrs members.
667 `format' now points to format data. Type of `value' is now
668 CGEN_IVALUE.
669 (struct cgen_opcode_table): New member ifld_table.
670
671 1998-11-18 Doug Evans <devans@casey.cygnus.com>
672
673 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
674 (CGEN_OPERAND_INSTANCE): New member `attrs'.
675 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
676 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
677 (cgen_opcode_table): Update type of dis_hash fn.
678 (extract_operand): Update type of `insn_value' arg.
679
680 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
681
682 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
683
684 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
685
686 * mips.h (INSN_MULT): Added.
687
688 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
689
690 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
691
692 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
693
694 * cgen.h (CGEN_INSN_INT): New typedef.
695 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
696 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
697 (CGEN_INSN_BYTES_PTR): New typedef.
698 (CGEN_EXTRACT_INFO): New typedef.
699 (cgen_insert_fn,cgen_extract_fn): Update.
700 (cgen_opcode_table): New member `insn_endian'.
701 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
702 (insert_operand,extract_operand): Update.
703 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
704
705 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
706
707 * cgen.h (CGEN_ATTR_BOOLS): New macro.
708 (struct CGEN_HW_ENTRY): New member `attrs'.
709 (CGEN_HW_ATTR): New macro.
710 (struct CGEN_OPERAND_INSTANCE): New member `name'.
711 (CGEN_INSN_INVALID_P): New macro.
712
713 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
714
715 * hppa.h: Add "fid".
716
717 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
718
719 From Robert Andrew Dale <rob@nb.net>
720 * i386.h (i386_optab): Add AMD 3DNow! instructions.
721 (AMD_3DNOW_OPCODE): Define.
722
723 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
724
725 * d30v.h (EITHER_BUT_PREFER_MU): Define.
726
727 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
728
729 * cgen.h (cgen_insn): #if 0 out element `cdx'.
730
731 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
732
733 Move all global state data into opcode table struct, and treat
734 opcode table as something that is "opened/closed".
735 * cgen.h (CGEN_OPCODE_DESC): New type.
736 (all fns): New first arg of opcode table descriptor.
737 (cgen_set_parse_operand_fn): Add prototype.
738 (cgen_current_machine,cgen_current_endian): Delete.
739 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
740 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
741 dis_hash_table,dis_hash_table_entries.
742 (opcode_open,opcode_close): Add prototypes.
743
744 * cgen.h (cgen_insn): New element `cdx'.
745
746 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
747
748 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
749
750 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
751
752 * mn10300.h: Add "no_match_operands" field for instructions.
753 (MN10300_MAX_OPERANDS): Define.
754
755 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
756
757 * cgen.h (cgen_macro_insn_count): Declare.
758
759 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
760
761 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
762 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
763 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
764 set_{int,vma}_operand.
765
766 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
767
768 * mn10300.h: Add "machine" field for instructions.
769 (MN103, AM30): Define machine types.
770
771 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
772
773 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
774
775 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
776
777 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
778
779 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
780
781 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
782 and ud2b.
783 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
784 those that happen to be implemented on pentiums.
785
786 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
787
788 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
789 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
790 with Size16|IgnoreSize or Size32|IgnoreSize.
791
792 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
795 (REPE): Rename to REPE_PREFIX_OPCODE.
796 (i386_regtab_end): Remove.
797 (i386_prefixtab, i386_prefixtab_end): Remove.
798 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
799 of md_begin.
800 (MAX_OPCODE_SIZE): Define.
801 (i386_optab_end): Remove.
802 (sl_Suf): Define.
803 (sl_FP): Use sl_Suf.
804
805 * i386.h (i386_optab): Allow 16 bit displacement for `mov
806 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
807 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
808 data32, dword, and adword prefixes.
809 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
810 regs.
811
812 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
815
816 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
817 register operands, because this is a common idiom. Flag them with
818 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
819 fdivrp because gcc erroneously generates them. Also flag with a
820 warning.
821
822 * i386.h: Add suffix modifiers to most insns, and tighter operand
823 checks in some cases. Fix a number of UnixWare compatibility
824 issues with float insns. Merge some floating point opcodes, using
825 new FloatMF modifier.
826 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
827 consistency.
828
829 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
830 IgnoreDataSize where appropriate.
831
832 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
833
834 * i386.h: (one_byte_segment_defaults): Remove.
835 (two_byte_segment_defaults): Remove.
836 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
837
838 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
839
840 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
841 (cgen_hw_lookup_by_num): Declare.
842
843 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
844
845 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
846 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
847
848 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
849
850 * cgen.h (cgen_asm_init_parse): Delete.
851 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
852 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
853
854 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
855
856 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
857 (cgen_asm_finish_insn): Update prototype.
858 (cgen_insn): New members num, data.
859 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
860 dis_hash, dis_hash_table_size moved to ...
861 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
862 All uses updated. New members asm_hash_p, dis_hash_p.
863 (CGEN_MINSN_EXPANSION): New struct.
864 (cgen_expand_macro_insn): Declare.
865 (cgen_macro_insn_count): Declare.
866 (get_insn_operands): Update prototype.
867 (lookup_get_insn_operands): Declare.
868
869 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
870
871 * i386.h (i386_optab): Change iclrKludge and imulKludge to
872 regKludge. Add operands types for string instructions.
873
874 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
875
876 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
877 table.
878
879 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
880
881 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
882 for `gettext'.
883
884 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
885
886 * i386.h: Remove NoModrm flag from all insns: it's never checked.
887 Add IsString flag to string instructions.
888 (IS_STRING): Don't define.
889 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
890 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
891 (SS_PREFIX_OPCODE): Define.
892
893 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
894
895 * i386.h: Revert March 24 patch; no more LinearAddress.
896
897 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
898
899 * i386.h (i386_optab): Remove fwait (9b) from all floating point
900 instructions, and instead add FWait opcode modifier. Add short
901 form of fldenv and fstenv.
902 (FWAIT_OPCODE): Define.
903
904 * i386.h (i386_optab): Change second operand constraint of `mov
905 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
906 allow legal instructions such as `movl %gs,%esi'
907
908 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
909
910 * h8300.h: Various changes to fully bracket initializers.
911
912 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
913
914 * i386.h: Set LinearAddress for lidt and lgdt.
915
916 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
917
918 * cgen.h (CGEN_BOOL_ATTR): New macro.
919
920 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
921
922 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
923
924 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
925
926 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
927 (cgen_insn): Record syntax and format entries here, rather than
928 separately.
929
930 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
931
932 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
933
934 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
935
936 * cgen.h (cgen_insert_fn): Change type of result to const char *.
937 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
938 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
939
940 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
941
942 * cgen.h (lookup_insn): New argument alias_p.
943
944 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
945
946 Fix rac to accept only a0:
947 * d10v.h (OPERAND_ACC): Split into:
948 (OPERAND_ACC0, OPERAND_ACC1) .
949 (OPERAND_GPR): Define.
950
951 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
952
953 * cgen.h (CGEN_FIELDS): Define here.
954 (CGEN_HW_ENTRY): New member `type'.
955 (hw_list): Delete decl.
956 (enum cgen_mode): Declare.
957 (CGEN_OPERAND): New member `hw'.
958 (enum cgen_operand_instance_type): Declare.
959 (CGEN_OPERAND_INSTANCE): New type.
960 (CGEN_INSN): New member `operands'.
961 (CGEN_OPCODE_DATA): Make hw_list const.
962 (get_insn_operands,lookup_insn): Add prototypes for.
963
964 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
965
966 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
967 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
968 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
969 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
970
971 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
972
973 * cgen.h: Correct typo in comment end marker.
974
975 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
976
977 * tic30.h: New file.
978
979 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
980
981 * cgen.h: Add prototypes for cgen_save_fixups(),
982 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
983 of cgen_asm_finish_insn() to return a char *.
984
985 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
986
987 * cgen.h: Formatting changes to improve readability.
988
989 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
990
991 * cgen.h (*): Clean up pass over `struct foo' usage.
992 (CGEN_ATTR): Make unsigned char.
993 (CGEN_ATTR_TYPE): Update.
994 (CGEN_ATTR_{ENTRY,TABLE}): New types.
995 (cgen_base): Move member `attrs' to cgen_insn.
996 (CGEN_KEYWORD): New member `null_entry'.
997 (CGEN_{SYNTAX,FORMAT}): New types.
998 (cgen_insn): Format and syntax separated from each other.
999
1000 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1001
1002 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1003 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1004 flags_{used,set} long.
1005 (d30v_operand): Make flags field long.
1006
1007 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1008
1009 * m68k.h: Fix comment describing operand types.
1010
1011 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1012
1013 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1014 everything else after down.
1015
1016 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1017
1018 * d10v.h (OPERAND_FLAG): Split into:
1019 (OPERAND_FFLAG, OPERAND_CFLAG) .
1020
1021 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1022
1023 * mips.h (struct mips_opcode): Changed comments to reflect new
1024 field usage.
1025
1026 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1027
1028 * mips.h: Added to comments a quick-ref list of all assigned
1029 operand type characters.
1030 (OP_{MASK,SH}_PERFREG): New macros.
1031
1032 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1033
1034 * sparc.h: Add '_' and '/' for v9a asr's.
1035 Patch from David Miller <davem@vger.rutgers.edu>
1036
1037 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1038
1039 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1040 area are not available in the base model (H8/300).
1041
1042 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1043
1044 * m68k.h: Remove documentation of ` operand specifier.
1045
1046 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1047
1048 * m68k.h: Document q and v operand specifiers.
1049
1050 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1051
1052 * v850.h (struct v850_opcode): Add processors field.
1053 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1054 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1055 (PROCESSOR_V850EA): New bit constants.
1056
1057 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1058
1059 Merge changes from Martin Hunt:
1060
1061 * d30v.h: Allow up to 64 control registers. Add
1062 SHORT_A5S format.
1063
1064 * d30v.h (LONG_Db): New form for delayed branches.
1065
1066 * d30v.h: (LONG_Db): New form for repeati.
1067
1068 * d30v.h (SHORT_D2B): New form.
1069
1070 * d30v.h (SHORT_A2): New form.
1071
1072 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1073 registers are used. Needed for VLIW optimization.
1074
1075 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1076
1077 * cgen.h: Move assembler interface section
1078 up so cgen_parse_operand_result is defined for cgen_parse_address.
1079 (cgen_parse_address): Update prototype.
1080
1081 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1082
1083 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1084
1085 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1086
1087 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1088 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1089 <paubert@iram.es>.
1090
1091 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1092 <paubert@iram.es>.
1093
1094 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1095 <paubert@iram.es>.
1096
1097 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1098 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1099
1100 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1101
1102 * v850.h (V850_NOT_R0): New flag.
1103
1104 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1105
1106 * v850.h (struct v850_opcode): Remove flags field.
1107
1108 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1109
1110 * v850.h (struct v850_opcode): Add flags field.
1111 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1112 fields.
1113 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1114 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1115
1116 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1117
1118 * arc.h: New file.
1119
1120 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1121
1122 * sparc.h (sparc_opcodes): Declare as const.
1123
1124 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1125
1126 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1127 uses single or double precision floating point resources.
1128 (INSN_NO_ISA, INSN_ISA1): Define.
1129 (cpu specific INSN macros): Tweak into bitmasks outside the range
1130 of INSN_ISA field.
1131
1132 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1133
1134 * i386.h: Fix pand opcode.
1135
1136 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1137
1138 * mips.h: Widen INSN_ISA and move it to a more convenient
1139 bit position. Add INSN_3900.
1140
1141 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1142
1143 * mips.h (struct mips_opcode): added new field membership.
1144
1145 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1146
1147 * i386.h (movd): only Reg32 is allowed.
1148
1149 * i386.h: add fcomp and ud2. From Wayne Scott
1150 <wscott@ichips.intel.com>.
1151
1152 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1153
1154 * i386.h: Add MMX instructions.
1155
1156 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1157
1158 * i386.h: Remove W modifier from conditional move instructions.
1159
1160 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1161
1162 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1163 with no arguments to match that generated by the UnixWare
1164 assembler.
1165
1166 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1167
1168 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1169 (cgen_parse_operand_fn): Declare.
1170 (cgen_init_parse_operand): Declare.
1171 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1172 new argument `want'.
1173 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1174 (enum cgen_parse_operand_type): New enum.
1175
1176 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1177
1178 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1179
1180 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1181
1182 * cgen.h: New file.
1183
1184 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1185
1186 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1187 fdivrp.
1188
1189 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1190
1191 * v850.h (extract): Make unsigned.
1192
1193 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1194
1195 * i386.h: Add iclr.
1196
1197 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1198
1199 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1200 take a direction bit.
1201
1202 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1203
1204 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1205
1206 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1207
1208 * sparc.h: Include <ansidecl.h>. Update function declarations to
1209 use prototypes, and to use const when appropriate.
1210
1211 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1212
1213 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1214
1215 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1216
1217 * d10v.h: Change pre_defined_registers to
1218 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1219
1220 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1221
1222 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1223 Change mips_opcodes from const array to a pointer,
1224 and change bfd_mips_num_opcodes from const int to int,
1225 so that we can increase the size of the mips opcodes table
1226 dynamically.
1227
1228 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1229
1230 * d30v.h (FLAG_X): Remove unused flag.
1231
1232 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1233
1234 * d30v.h: New file.
1235
1236 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1237
1238 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1239 (PDS_VALUE): Macro to access value field of predefined symbols.
1240 (tic80_next_predefined_symbol): Add prototype.
1241
1242 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1243
1244 * tic80.h (tic80_symbol_to_value): Change prototype to match
1245 change in function, added class parameter.
1246
1247 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1248
1249 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1250 endmask fields, which are somewhat weird in that 0 and 32 are
1251 treated exactly the same.
1252
1253 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1254
1255 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1256 rather than a constant that is 2**X. Reorder them to put bits for
1257 operands that have symbolic names in the upper bits, so they can
1258 be packed into an int where the lower bits contain the value that
1259 corresponds to that symbolic name.
1260 (predefined_symbo): Add struct.
1261 (tic80_predefined_symbols): Declare array of translations.
1262 (tic80_num_predefined_symbols): Declare size of that array.
1263 (tic80_value_to_symbol): Declare function.
1264 (tic80_symbol_to_value): Declare function.
1265
1266 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1267
1268 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1269
1270 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1271
1272 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1273 be the destination register.
1274
1275 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1276
1277 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1278 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1279 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1280 that the opcode can have two vector instructions in a single
1281 32 bit word and we have to encode/decode both.
1282
1283 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1284
1285 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1286 TIC80_OPERAND_RELATIVE for PC relative.
1287 (TIC80_OPERAND_BASEREL): New flag bit for register
1288 base relative.
1289
1290 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1291
1292 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1293
1294 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1295
1296 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1297 ":s" modifier for scaling.
1298
1299 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1300
1301 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1302 (TIC80_OPERAND_M_LI): Ditto
1303
1304 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1305
1306 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1307 (TIC80_OPERAND_CC): New define for condition code operand.
1308 (TIC80_OPERAND_CR): New define for control register operand.
1309
1310 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1311
1312 * tic80.h (struct tic80_opcode): Name changed.
1313 (struct tic80_opcode): Remove format field.
1314 (struct tic80_operand): Add insertion and extraction functions.
1315 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1316 correct ones.
1317 (FMT_*): Ditto.
1318
1319 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1320
1321 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1322 type IV instruction offsets.
1323
1324 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1325
1326 * tic80.h: New file.
1327
1328 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1329
1330 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1331
1332 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1333
1334 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1335 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1336 * v850.h: Fix comment, v850_operand not powerpc_operand.
1337
1338 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1339
1340 * mn10200.h: Flesh out structures and definitions needed by
1341 the mn10200 assembler & disassembler.
1342
1343 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1344
1345 * mips.h: Add mips16 definitions.
1346
1347 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1348
1349 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1350
1351 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1352
1353 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1354 (MN10300_OPERAND_MEMADDR): Define.
1355
1356 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1357
1358 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1359
1360 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1361
1362 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1363
1364 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1365
1366 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1367
1368 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1369
1370 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1371
1372 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1373
1374 * alpha.h: Don't include "bfd.h"; private relocation types are now
1375 negative to minimize problems with shared libraries. Organize
1376 instruction subsets by AMASK extensions and PALcode
1377 implementation.
1378 (struct alpha_operand): Move flags slot for better packing.
1379
1380 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1381
1382 * v850.h (V850_OPERAND_RELAX): New operand flag.
1383
1384 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1385
1386 * mn10300.h (FMT_*): Move operand format definitions
1387 here.
1388
1389 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1390
1391 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1392
1393 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1394
1395 * mn10300.h (mn10300_opcode): Add "format" field.
1396 (MN10300_OPERAND_*): Define.
1397
1398 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1399
1400 * mn10x00.h: Delete.
1401 * mn10200.h, mn10300.h: New files.
1402
1403 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1404
1405 * mn10x00.h: New file.
1406
1407 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1408
1409 * v850.h: Add new flag to indicate this instruction uses a PC
1410 displacement.
1411
1412 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1413
1414 * h8300.h (stmac): Add missing instruction.
1415
1416 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1417
1418 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1419 field.
1420
1421 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1422
1423 * v850.h (V850_OPERAND_EP): Define.
1424
1425 * v850.h (v850_opcode): Add size field.
1426
1427 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1428
1429 * v850.h (v850_operands): Add insert and extract fields, pointers
1430 to functions used to handle unusual operand encoding.
1431 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1432 V850_OPERAND_SIGNED): Defined.
1433
1434 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1435
1436 * v850.h (v850_operands): Add flags field.
1437 (OPERAND_REG, OPERAND_NUM): Defined.
1438
1439 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1440
1441 * v850.h: New file.
1442
1443 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1444
1445 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1446 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1447 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1448 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1449 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1450 Defined.
1451
1452 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1453
1454 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1455 a 3 bit space id instead of a 2 bit space id.
1456
1457 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1458
1459 * d10v.h: Add some additional defines to support the
1460 assembler in determining which operations can be done in parallel.
1461
1462 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1463
1464 * h8300.h (SN): Define.
1465 (eepmov.b): Renamed from "eepmov"
1466 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1467 with them.
1468
1469 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1470
1471 * d10v.h (OPERAND_SHIFT): New operand flag.
1472
1473 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1474
1475 * d10v.h: Changes for divs, parallel-only instructions, and
1476 signed numbers.
1477
1478 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1479
1480 * d10v.h (pd_reg): Define. Putting the definition here allows
1481 the assembler and disassembler to share the same struct.
1482
1483 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1484
1485 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1486 Williams <steve@icarus.com>.
1487
1488 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1489
1490 * d10v.h: New file.
1491
1492 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1493
1494 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1495
1496 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1497
1498 * m68k.h (mcf5200): New macro.
1499 Document names of coldfire control registers.
1500
1501 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * h8300.h (SRC_IN_DST): Define.
1504
1505 * h8300.h (UNOP3): Mark the register operand in this insn
1506 as a source operand, not a destination operand.
1507 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1508 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1509 register operand with SRC_IN_DST.
1510
1511 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1512
1513 * alpha.h: New file.
1514
1515 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1516
1517 * rs6k.h: Remove obsolete file.
1518
1519 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1520
1521 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1522 fdivp, and fdivrp. Add ffreep.
1523
1524 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1525
1526 * h8300.h: Reorder various #defines for readability.
1527 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1528 (BITOP): Accept additional (unused) argument. All callers changed.
1529 (EBITOP): Likewise.
1530 (O_LAST): Bump.
1531 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1532
1533 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1534 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1535 (BITOP, EBITOP): Handle new H8/S addressing modes for
1536 bit insns.
1537 (UNOP3): Handle new shift/rotate insns on the H8/S.
1538 (insns using exr): New instructions.
1539 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1540
1541 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1542
1543 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1544 was incorrect.
1545
1546 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1547
1548 * h8300.h (START): Remove.
1549 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1550 and mov.l insns that can be relaxed.
1551
1552 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1553
1554 * i386.h: Remove Abs32 from lcall.
1555
1556 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1557
1558 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1559 (SLCPOP): New macro.
1560 Mark X,Y opcode letters as in use.
1561
1562 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1563
1564 * sparc.h (F_FLOAT, F_FBR): Define.
1565
1566 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1569 from all insns.
1570 (ABS8SRC,ABS8DST): Add ABS8MEM.
1571 (add.l): Fix reg+reg variant.
1572 (eepmov.w): Renamed from eepmovw.
1573 (ldc,stc): Fix many cases.
1574
1575 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1576
1577 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1578
1579 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1580
1581 * sparc.h (O): Mark operand letter as in use.
1582
1583 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1584
1585 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1586 Mark operand letters uU as in use.
1587
1588 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1589
1590 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1591 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1592 (SPARC_OPCODE_SUPPORTED): New macro.
1593 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1594 (F_NOTV9): Delete.
1595
1596 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1597
1598 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1599 declaration consistent with return type in definition.
1600
1601 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1602
1603 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1604
1605 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1606
1607 * i386.h (i386_regtab): Add 80486 test registers.
1608
1609 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1610
1611 * i960.h (I_HX): Define.
1612 (i960_opcodes): Add HX instruction.
1613
1614 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1615
1616 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1617 and fclex.
1618
1619 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1620
1621 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1622 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1623 (bfd_* defines): Delete.
1624 (sparc_opcode_archs): Replaces architecture_pname.
1625 (sparc_opcode_lookup_arch): Declare.
1626 (NUMOPCODES): Delete.
1627
1628 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1629
1630 * sparc.h (enum sparc_architecture): Add v9a.
1631 (ARCHITECTURES_CONFLICT_P): Update.
1632
1633 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1634
1635 * i386.h: Added Pentium Pro instructions.
1636
1637 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1638
1639 * m68k.h: Document new 'W' operand place.
1640
1641 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1642
1643 * hppa.h: Add lci and syncdma instructions.
1644
1645 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1646
1647 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1648 instructions.
1649
1650 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1651
1652 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1653 assembler's -mcom and -many switches.
1654
1655 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1656
1657 * i386.h: Fix cmpxchg8b extension opcode description.
1658
1659 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1660
1661 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1662 and register cr4.
1663
1664 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1665
1666 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1667
1668 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1669
1670 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1671
1672 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1673
1674 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1675
1676 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1677
1678 * m68kmri.h: Remove.
1679
1680 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1681 declarations. Remove F_ALIAS and flag field of struct
1682 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1683 int. Make name and args fields of struct m68k_opcode const.
1684
1685 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1686
1687 * sparc.h (F_NOTV9): Define.
1688
1689 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1690
1691 * mips.h (INSN_4010): Define.
1692
1693 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1694
1695 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1696
1697 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1698 * m68k.h: Fix argument descriptions of coprocessor
1699 instructions to allow only alterable operands where appropriate.
1700 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1701 (m68k_opcode_aliases): Add more aliases.
1702
1703 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1704
1705 * m68k.h: Added explcitly short-sized conditional branches, and a
1706 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1707 svr4-based configurations.
1708
1709 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1710
1711 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1712 * i386.h: added missing Data16/Data32 flags to a few instructions.
1713
1714 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1715
1716 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1717 (OP_MASK_BCC, OP_SH_BCC): Define.
1718 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1719 (OP_MASK_CCC, OP_SH_CCC): Define.
1720 (INSN_READ_FPR_R): Define.
1721 (INSN_RFE): Delete.
1722
1723 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1724
1725 * m68k.h (enum m68k_architecture): Deleted.
1726 (struct m68k_opcode_alias): New type.
1727 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1728 matching constraints, values and flags. As a side effect of this,
1729 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1730 as I know were never used, now may need re-examining.
1731 (numopcodes): Now const.
1732 (m68k_opcode_aliases, numaliases): New variables.
1733 (endop): Deleted.
1734 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1735 m68k_opcode_aliases; update declaration of m68k_opcodes.
1736
1737 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1738
1739 * hppa.h (delay_type): Delete unused enumeration.
1740 (pa_opcode): Replace unused delayed field with an architecture
1741 field.
1742 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1743
1744 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1745
1746 * mips.h (INSN_ISA4): Define.
1747
1748 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1749
1750 * mips.h (M_DLA_AB, M_DLI): Define.
1751
1752 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1753
1754 * hppa.h (fstwx): Fix single-bit error.
1755
1756 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1757
1758 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1759
1760 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1761
1762 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1763 debug registers. From Charles Hannum (mycroft@netbsd.org).
1764
1765 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1766
1767 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1768 i386 support:
1769 * i386.h (MOV_AX_DISP32): New macro.
1770 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1771 of several call/return instructions.
1772 (ADDR_PREFIX_OPCODE): New macro.
1773
1774 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1775
1776 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1777
1778 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1779 it pointer to const char;
1780 (struct vot, field `name'): ditto.
1781
1782 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1783
1784 * vax.h: Supply and properly group all values in end sentinel.
1785
1786 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1787
1788 * mips.h (INSN_ISA, INSN_4650): Define.
1789
1790 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1791
1792 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1793 systems with a separate instruction and data cache, such as the
1794 29040, these instructions take an optional argument.
1795
1796 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1797
1798 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1799 INSN_TRAP.
1800
1801 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1802
1803 * mips.h (INSN_STORE_MEMORY): Define.
1804
1805 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1806
1807 * sparc.h: Document new operand type 'x'.
1808
1809 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1810
1811 * i960.h (I_CX2): New instruction category. It includes
1812 instructions available on Cx and Jx processors.
1813 (I_JX): New instruction category, for JX-only instructions.
1814 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1815 Jx-only instructions, in I_JX category.
1816
1817 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1818
1819 * ns32k.h (endop): Made pointer const too.
1820
1821 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1822
1823 * ns32k.h: Drop Q operand type as there is no correct use
1824 for it. Add I and Z operand types which allow better checking.
1825
1826 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1827
1828 * h8300.h (xor.l) :fix bit pattern.
1829 (L_2): New size of operand.
1830 (trapa): Use it.
1831
1832 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1833
1834 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1835
1836 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1837
1838 * sparc.h: Include v9 definitions.
1839
1840 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1841
1842 * m68k.h (m68060): Defined.
1843 (m68040up, mfloat, mmmu): Include it.
1844 (struct m68k_opcode): Widen `arch' field.
1845 (m68k_opcodes): Updated for M68060. Removed comments that were
1846 instructions commented out by "JF" years ago.
1847
1848 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1849
1850 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1851 add a one-bit `flags' field.
1852 (F_ALIAS): New macro.
1853
1854 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1855
1856 * h8300.h (dec, inc): Get encoding right.
1857
1858 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1859
1860 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1861 a flag instead.
1862 (PPC_OPERAND_SIGNED): Define.
1863 (PPC_OPERAND_SIGNOPT): Define.
1864
1865 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1866
1867 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1868 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1869
1870 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1871
1872 * i386.h: Reverse last change. It'll be handled in gas instead.
1873
1874 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1875
1876 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1877 slower on the 486 and used the implicit shift count despite the
1878 explicit operand. The one-operand form is still available to get
1879 the shorter form with the implicit shift count.
1880
1881 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1882
1883 * hppa.h: Fix typo in fstws arg string.
1884
1885 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1886
1887 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1888
1889 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1890
1891 * ppc.h (PPC_OPCODE_601): Define.
1892
1893 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1894
1895 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1896 (so we can determine valid completers for both addb and addb[tf].)
1897
1898 * hppa.h (xmpyu): No floating point format specifier for the
1899 xmpyu instruction.
1900
1901 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1902
1903 * ppc.h (PPC_OPERAND_NEXT): Define.
1904 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1905 (struct powerpc_macro): Define.
1906 (powerpc_macros, powerpc_num_macros): Declare.
1907
1908 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1909
1910 * ppc.h: New file. Header file for PowerPC opcode table.
1911
1912 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1913
1914 * hppa.h: More minor template fixes for sfu and copr (to allow
1915 for easier disassembly).
1916
1917 * hppa.h: Fix templates for all the sfu and copr instructions.
1918
1919 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1920
1921 * i386.h (push): Permit Imm16 operand too.
1922
1923 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1924
1925 * h8300.h (andc): Exists in base arch.
1926
1927 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1928
1929 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1930 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1931
1932 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1933
1934 * hppa.h: Add FP quadword store instructions.
1935
1936 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1937
1938 * mips.h: (M_J_A): Added.
1939 (M_LA): Removed.
1940
1941 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1942
1943 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1944 <mellon@pepper.ncd.com>.
1945
1946 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1947
1948 * hppa.h: Immediate field in probei instructions is unsigned,
1949 not low-sign extended.
1950
1951 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1952
1953 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1954
1955 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1956
1957 * i386.h: Add "fxch" without operand.
1958
1959 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1960
1961 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1962
1963 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1964
1965 * hppa.h: Add gfw and gfr to the opcode table.
1966
1967 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1968
1969 * m88k.h: extended to handle m88110.
1970
1971 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1972
1973 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1974 addresses.
1975
1976 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1977
1978 * i960.h (i960_opcodes): Properly bracket initializers.
1979
1980 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1981
1982 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1983
1984 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1985
1986 * m68k.h (two): Protect second argument with parentheses.
1987
1988 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1989
1990 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1991 Deleted old in/out instructions in "#if 0" section.
1992
1993 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1994
1995 * i386.h (i386_optab): Properly bracket initializers.
1996
1997 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1998
1999 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2000 Jeff Law, law@cs.utah.edu).
2001
2002 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2003
2004 * i386.h (lcall): Accept Imm32 operand also.
2005
2006 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2007
2008 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2009 (M_DABS): Added.
2010
2011 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2012
2013 * mips.h (INSN_*): Changed values. Removed unused definitions.
2014 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2015 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2016 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2017 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2018 (M_*): Added new values for r6000 and r4000 macros.
2019 (ANY_DELAY): Removed.
2020
2021 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022
2023 * mips.h: Added M_LI_S and M_LI_SS.
2024
2025 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2026
2027 * h8300.h: Get some rare mov.bs correct.
2028
2029 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2030
2031 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2032 been included.
2033
2034 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2035
2036 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2037 jump instructions, for use in disassemblers.
2038
2039 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2040
2041 * m88k.h: Make bitfields just unsigned, not unsigned long or
2042 unsigned short.
2043
2044 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2045
2046 * hppa.h: New argument type 'y'. Use in various float instructions.
2047
2048 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2049
2050 * hppa.h (break): First immediate field is unsigned.
2051
2052 * hppa.h: Add rfir instruction.
2053
2054 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2055
2056 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2057
2058 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2059
2060 * mips.h: Reworked the hazard information somewhat, and fixed some
2061 bugs in the instruction hazard descriptions.
2062
2063 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2064
2065 * m88k.h: Corrected a couple of opcodes.
2066
2067 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2068
2069 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2070 new version includes instruction hazard information, but is
2071 otherwise reasonably similar.
2072
2073 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2074
2075 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2076
2077 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2078
2079 Patches from Jeff Law, law@cs.utah.edu:
2080 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2081 Make the tables be the same for the following instructions:
2082 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2083 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2084 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2085 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2086 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2087 "fcmp", and "ftest".
2088
2089 * hppa.h: Make new and old tables the same for "break", "mtctl",
2090 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2091 Fix typo in last patch. Collapse several #ifdefs into a
2092 single #ifdef.
2093
2094 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2095 of the comments up-to-date.
2096
2097 * hppa.h: Update "free list" of letters and update
2098 comments describing each letter's function.
2099
2100 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2101
2102 * h8300.h: checkpoint, includes H8/300-H opcodes.
2103
2104 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2105
2106 * Patches from Jeffrey Law <law@cs.utah.edu>.
2107 * hppa.h: Rework single precision FP
2108 instructions so that they correctly disassemble code
2109 PA1.1 code.
2110
2111 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2112
2113 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2114 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2115
2116 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2117
2118 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2119 gdb will define it for now.
2120
2121 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2122
2123 * sparc.h: Don't end enumerator list with comma.
2124
2125 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2126
2127 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2128 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2129 ("bc2t"): Correct typo.
2130 ("[ls]wc[023]"): Use T rather than t.
2131 ("c[0123]"): Define general coprocessor instructions.
2132
2133 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2134
2135 * m68k.h: Move split point for gcc compilation more towards
2136 middle.
2137
2138 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2139
2140 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2141 simply wrong, ics, rfi, & rfsvc were missing).
2142 Add "a" to opr_ext for "bb". Doc fix.
2143
2144 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2145
2146 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2147 * mips.h: Add casts, to suppress warnings about shifting too much.
2148 * m68k.h: Document the placement code '9'.
2149
2150 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2151
2152 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2153 allows callers to break up the large initialized struct full of
2154 opcodes into two half-sized ones. This permits GCC to compile
2155 this module, since it takes exponential space for initializers.
2156 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2157
2158 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2159
2160 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2161 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2162 initialized structs in it.
2163
2164 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2165
2166 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2167 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2168 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2169
2170 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2171
2172 * mips.h: document "i" and "j" operands correctly.
2173
2174 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2175
2176 * mips.h: Removed endianness dependency.
2177
2178 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2179
2180 * h8300.h: include info on number of cycles per instruction.
2181
2182 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2183
2184 * hppa.h: Move handy aliases to the front. Fix masks for extract
2185 and deposit instructions.
2186
2187 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2188
2189 * i386.h: accept shld and shrd both with and without the shift
2190 count argument, which is always %cl.
2191
2192 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2193
2194 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2195 (one_byte_segment_defaults, two_byte_segment_defaults,
2196 i386_prefixtab_end): Ditto.
2197
2198 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2199
2200 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2201 for operand 2; from John Carr, jfc@dsg.dec.com.
2202
2203 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2204
2205 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2206 always use 16-bit offsets. Makes calculated-size jump tables
2207 feasible.
2208
2209 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2210
2211 * i386.h: Fix one-operand forms of in* and out* patterns.
2212
2213 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2214
2215 * m68k.h: Added CPU32 support.
2216
2217 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2218
2219 * mips.h (break): Disassemble the argument. Patch from
2220 jonathan@cs.stanford.edu (Jonathan Stone).
2221
2222 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2223
2224 * m68k.h: merged Motorola and MIT syntax.
2225
2226 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2227
2228 * m68k.h (pmove): make the tests less strict, the 68k book is
2229 wrong.
2230
2231 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2232
2233 * m68k.h (m68ec030): Defined as alias for 68030.
2234 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2235 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2236 them. Tightened description of "fmovex" to distinguish it from
2237 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2238 up descriptions that claimed versions were available for chips not
2239 supporting them. Added "pmovefd".
2240
2241 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2242
2243 * m68k.h: fix where the . goes in divull
2244
2245 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2246
2247 * m68k.h: the cas2 instruction is supposed to be written with
2248 indirection on the last two operands, which can be either data or
2249 address registers. Added a new operand type 'r' which accepts
2250 either register type. Added new cases for cas2l and cas2w which
2251 use them. Corrected masks for cas2 which failed to recognize use
2252 of address register.
2253
2254 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2255
2256 * m68k.h: Merged in patches (mostly m68040-specific) from
2257 Colin Smith <colin@wrs.com>.
2258
2259 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2260 base). Also cleaned up duplicates, re-ordered instructions for
2261 the sake of dis-assembling (so aliases come after standard names).
2262 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2263
2264 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2265
2266 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2267 all missing .s
2268
2269 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2270
2271 * sparc.h: Moved tables to BFD library.
2272
2273 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2274
2275 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2276
2277 * h8300.h: Finish filling in all the holes in the opcode table,
2278 so that the Lucid C compiler can digest this as well...
2279
2280 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2281
2282 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2283 Fix opcodes on various sizes of fild/fist instructions
2284 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2285 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2286
2287 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2288
2289 * h8300.h: Fill in all the holes in the opcode table so that the
2290 losing HPUX C compiler can digest this...
2291
2292 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2293
2294 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2295 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2296
2297 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2298
2299 * sparc.h: Add new architecture variant sparclite; add its scan
2300 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2301
2302 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2303
2304 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2305 fy@lucid.com).
2306
2307 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2308
2309 * rs6k.h: New version from IBM (Metin).
2310
2311 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2312
2313 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2314 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2315
2316 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2317
2318 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2319
2320 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2321
2322 * m68k.h (one, two): Cast macro args to unsigned to suppress
2323 complaints from compiler and lint about integer overflow during
2324 shift.
2325
2326 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2327
2328 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2329
2330 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2331
2332 * mips.h: Make bitfield layout depend on the HOST compiler,
2333 not on the TARGET system.
2334
2335 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2336
2337 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2338 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2339 <TRANLE@INTELLICORP.COM>.
2340
2341 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2342
2343 * h8300.h: turned op_type enum into #define list
2344
2345 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2346
2347 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2348 similar instructions -- they've been renamed to "fitoq", etc.
2349 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2350 number of arguments.
2351 * h8300.h: Remove extra ; which produces compiler warning.
2352
2353 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2354
2355 * sparc.h: fix opcode for tsubcctv.
2356
2357 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2358
2359 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2360
2361 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2362
2363 * sparc.h (nop): Made the 'lose' field be even tighter,
2364 so only a standard 'nop' is disassembled as a nop.
2365
2366 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2367
2368 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2369 disassembled as a nop.
2370
2371 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2372
2373 * sparc.h: fix a typo.
2374
2375 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2376
2377 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2378 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2379 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2380
2381 \f
2382 Local Variables:
2383 version-control: never
2384 End:
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