Add s390 support
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
2
3 * s390.h: New file.
4
5 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
6
7 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
8 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
9 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
10
11 2001-01-24 Karsten Keil <kkeil@suse.de>
12
13 * i386.h (i386_optab): Fix swapgs
14
15 2001-01-14 Alan Modra <alan@linuxcare.com.au>
16
17 * hppa.h: Describe new '<' and '>' operand types, and tidy
18 existing comments.
19 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
20 Remove duplicate "ldw j(s,b),x". Sort some entries.
21
22 Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
23
24 * i386.h (i386_optab): Fix pusha and ret templates.
25
26 2001-01-11 Peter Targett <peter.targett@arccores.com>
27
28 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
29 definitions for masking cpu type.
30 (arc_ext_operand_value) New structure for storing extended
31 operands.
32 (ARC_OPERAND_*) Flags for operand values.
33
34 2001-01-10 Jan Hubicka <jh@suse.cz>
35
36 * i386.h (pinsrw): Add.
37 (pshufw): Remove.
38 (cvttpd2dq): Fix operands.
39 (cvttps2dq): Likewise.
40 (movq2q): Rename to movdq2q.
41
42 2001-01-10 Richard Schaal <richard.schaal@intel.com>
43
44 * i386.h: Correct movnti instruction.
45
46 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
47
48 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
49 of operands (unsigned char or unsigned short).
50 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
51 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
52
53 2001-01-05 Jan Hubicka <jh@suse.cz>
54
55 * i386.h (i386_optab): Make [sml]fence template to use immext field.
56
57 2001-01-03 Jan Hubicka <jh@suse.cz>
58
59 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
60 introduced by Pentium4
61
62 2000-12-30 Jan Hubicka <jh@suse.cz>
63
64 * i386.h (i386_optab): Add "rex*" instructions;
65 add swapgs; disable jmp/call far direct instructions for
66 64bit mode; add syscall and sysret; disable registers for 0xc6
67 template. Add 'q' suffixes to extendable instructions, disable
68 obsolete instructions, add new sign/zero extension ones.
69 (i386_regtab): Add extended registers.
70 (*Suf): Add No_qSuf.
71 (q_Suf, wlq_Suf, bwlq_Suf): New.
72
73 2000-12-20 Jan Hubicka <jh@suse.cz>
74
75 * i386.h (i386_optab): Replace "Imm" with "EncImm".
76 (i386_regtab): Add flags field.
77
78 2000-12-12 Nick Clifton <nickc@redhat.com>
79
80 * mips.h: Fix formatting.
81
82 2000-12-01 Chris Demetriou <cgd@sibyte.com>
83
84 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
85 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
86 OP_*_SYSCALL definitions.
87 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
88 19 bit wait codes.
89 (MIPS operand specifier comments): Remove 'm', add 'U' and
90 'J', and update the meaning of 'B' so that it's more general.
91
92 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
93 INSN_ISA5): Renumber, redefine to mean the ISA at which the
94 instruction was added.
95 (INSN_ISA32): New constant.
96 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
97 Renumber to avoid new and/or renumbered INSN_* constants.
98 (INSN_MIPS32): Delete.
99 (ISA_UNKNOWN): New constant to indicate unknown ISA.
100 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
101 ISA_MIPS32): New constants, defined to be the mask of INSN_*
102 constants available at that ISA level.
103 (CPU_UNKNOWN): New constant to indicate unknown CPU.
104 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
105 define it with a unique value.
106 (OPCODE_IS_MEMBER): Update for new ISA membership-related
107 constant meanings.
108
109 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
110 definitions.
111
112 * mips.h (CPU_SB1): New constant.
113
114 2000-10-20 Jakub Jelinek <jakub@redhat.com>
115
116 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
117 Note that '3' is used for siam operand.
118
119 2000-09-22 Jim Wilson <wilson@cygnus.com>
120
121 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
122
123 2000-09-13 Anders Norlander <anorland@acc.umu.se>
124
125 * mips.h: Use defines instead of hard-coded processor numbers.
126 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
127 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
128 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
129 CPU_4KC, CPU_4KM, CPU_4KP): Define..
130 (OPCODE_IS_MEMBER): Use new defines.
131 (OP_MASK_SEL, OP_SH_SEL): Define.
132 (OP_MASK_CODE20, OP_SH_CODE20): Define.
133 Add 'P' to used characters.
134 Use 'H' for coprocessor select field.
135 Use 'm' for 20 bit breakpoint code.
136 Document new arg characters and add to used characters.
137 (INSN_MIPS32): New define for MIPS32 extensions.
138 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
139
140 2000-09-05 Alan Modra <alan@linuxcare.com.au>
141
142 * hppa.h: Mention cz completer.
143
144 2000-08-16 Jim Wilson <wilson@cygnus.com>
145
146 * ia64.h (IA64_OPCODE_POSTINC): New.
147
148 2000-08-15 H.J. Lu <hjl@gnu.org>
149
150 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
151 IgnoreSize change.
152
153 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
154
155 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
156 Move related opcodes closer to each other.
157 Minor changes in comments, list undefined opcodes.
158
159 2000-07-26 Dave Brolley <brolley@redhat.com>
160
161 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
162
163 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
164
165 cris.h: New file.
166
167 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
168
169 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
170 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
171 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
172 (AVR_ISA_M83): Define for ATmega83, ATmega85.
173 (espm): Remove, because ESPM removed in databook update.
174 (eicall, eijmp): Move to the end of opcode table.
175
176 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
177
178 * m68hc11.h: New file for support of Motorola 68hc11.
179
180 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
181
182 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
183
184 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
185
186 * avr.h: New file with AVR opcodes.
187
188 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
189
190 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
191
192 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
193
194 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
195
196 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
197
198 * i386.h: Use sl_FP, not sl_Suf for fild.
199
200 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
201
202 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
203 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
204 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
205 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
206
207 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
208
209 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
210
211 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
212 Alexander Sokolov <robocop@netlink.ru>
213
214 * i386.h (i386_optab): Add cpu_flags for all instructions.
215
216 2000-05-13 Alan Modra <alan@linuxcare.com.au>
217
218 From Gavin Romig-Koch <gavin@cygnus.com>
219 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
220
221 2000-05-04 Timothy Wall <twall@cygnus.com>
222
223 * tic54x.h: New.
224
225 2000-05-03 J.T. Conklin <jtc@redback.com>
226
227 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
228 (PPC_OPERAND_VR): New operand flag for vector registers.
229
230 2000-05-01 Kazu Hirata <kazu@hxi.com>
231
232 * h8300.h (EOP): Add missing initializer.
233
234 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
235
236 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
237 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
238 New operand types l,y,&,fe,fE,fx added to support above forms.
239 (pa_opcodes): Replaced usage of 'x' as source/target for
240 floating point double-word loads/stores with 'fx'.
241
242 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
243 David Mosberger <davidm@hpl.hp.com>
244 Timothy Wall <twall@cygnus.com>
245 Jim Wilson <wilson@cygnus.com>
246
247 * ia64.h: New file.
248
249 2000-03-27 Nick Clifton <nickc@cygnus.com>
250
251 * d30v.h (SHORT_A1): Fix value.
252 (SHORT_AR): Renumber so that it is at the end of the list of short
253 instructions, not the end of the list of long instructions.
254
255 2000-03-26 Alan Modra <alan@linuxcare.com>
256
257 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
258 problem isn't really specific to Unixware.
259 (OLDGCC_COMPAT): Define.
260 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
261 destination %st(0).
262 Fix lots of comments.
263
264 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
265
266 * d30v.h:
267 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
268 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
269 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
270 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
271 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
272 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
273 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
274
275 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
276
277 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
278 fistpd without suffix.
279
280 2000-02-24 Nick Clifton <nickc@cygnus.com>
281
282 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
283 'signed_overflow_ok_p'.
284 Delete prototypes for cgen_set_flags() and cgen_get_flags().
285
286 2000-02-24 Andrew Haley <aph@cygnus.com>
287
288 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
289 (CGEN_CPU_TABLE): flags: new field.
290 Add prototypes for new functions.
291
292 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
293
294 * i386.h: Add some more UNIXWARE_COMPAT comments.
295
296 2000-02-23 Linas Vepstas <linas@linas.org>
297
298 * i370.h: New file.
299
300 2000-02-22 Andrew Haley <aph@cygnus.com>
301
302 * mips.h: (OPCODE_IS_MEMBER): Add comment.
303
304 1999-12-30 Andrew Haley <aph@cygnus.com>
305
306 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
307 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
308 insns.
309
310 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
311
312 * i386.h: Qualify intel mode far call and jmp with x_Suf.
313
314 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
315
316 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
317 indirect jumps and calls. Add FF/3 call for intel mode.
318
319 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
320
321 * mn10300.h: Add new operand types. Add new instruction formats.
322
323 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
324
325 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
326 instruction.
327
328 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
329
330 * mips.h (INSN_ISA5): New.
331
332 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
333
334 * mips.h (OPCODE_IS_MEMBER): New.
335
336 1999-10-29 Nick Clifton <nickc@cygnus.com>
337
338 * d30v.h (SHORT_AR): Define.
339
340 1999-10-18 Michael Meissner <meissner@cygnus.com>
341
342 * alpha.h (alpha_num_opcodes): Convert to unsigned.
343 (alpha_num_operands): Ditto.
344
345 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
346
347 * hppa.h (pa_opcodes): Add load and store cache control to
348 instructions. Add ordered access load and store.
349
350 * hppa.h (pa_opcode): Add new entries for addb and addib.
351
352 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
353
354 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
355
356 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
357
358 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
359
360 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
361
362 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
363 and "be" using completer prefixes.
364
365 * hppa.h (pa_opcodes): Add initializers to silence compiler.
366
367 * hppa.h: Update comments about character usage.
368
369 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
370
371 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
372 up the new fstw & bve instructions.
373
374 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
375
376 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
377 instructions.
378
379 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
380
381 * hppa.h (pa_opcodes): Add long offset double word load/store
382 instructions.
383
384 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
385 stores.
386
387 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
388
389 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
390
391 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
392
393 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
394
395 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
396
397 * hppa.h (pa_opcodes): Add support for "b,l".
398
399 * hppa.h (pa_opcodes): Add support for "b,gate".
400
401 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
402
403 * hppa.h (pa_opcodes): Use 'fX' for first register operand
404 in xmpyu.
405
406 * hppa.h (pa_opcodes): Fix mask for probe and probei.
407
408 * hppa.h (pa_opcodes): Fix mask for depwi.
409
410 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
411
412 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
413 an explicit output argument.
414
415 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
416
417 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
418 Add a few PA2.0 loads and store variants.
419
420 1999-09-04 Steve Chamberlain <sac@pobox.com>
421
422 * pj.h: New file.
423
424 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
425
426 * i386.h (i386_regtab): Move %st to top of table, and split off
427 other fp reg entries.
428 (i386_float_regtab): To here.
429
430 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
431
432 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
433 by 'f'.
434
435 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
436 Add supporting args.
437
438 * hppa.h: Document new completers and args.
439 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
440 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
441 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
442 pmenb and pmdis.
443
444 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
445 hshr, hsub, mixh, mixw, permh.
446
447 * hppa.h (pa_opcodes): Change completers in instructions to
448 use 'c' prefix.
449
450 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
451 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
452
453 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
454 fnegabs to use 'I' instead of 'F'.
455
456 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
457
458 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
459 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
460 Alphabetically sort PIII insns.
461
462 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
463
464 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
465
466 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
467
468 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
469 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
470
471 * hppa.h: Document 64 bit condition completers.
472
473 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
474
475 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
476
477 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
478
479 * i386.h (i386_optab): Add DefaultSize modifier to all insns
480 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
481 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
482
483 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
484 Jeff Law <law@cygnus.com>
485
486 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
487
488 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
489
490 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
491 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
492
493 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
494
495 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
496
497 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
498
499 * hppa.h (struct pa_opcode): Add new field "flags".
500 (FLAGS_STRICT): Define.
501
502 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
503 Jeff Law <law@cygnus.com>
504
505 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
506
507 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
508
509 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
510
511 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
512 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
513 flag to fcomi and friends.
514
515 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
516
517 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
518 integer logical instructions.
519
520 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
521
522 * m68k.h: Document new formats `E', `G', `H' and new places `N',
523 `n', `o'.
524
525 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
526 and new places `m', `M', `h'.
527
528 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
529
530 * hppa.h (pa_opcodes): Add several processor specific system
531 instructions.
532
533 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
534
535 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
536 "addb", and "addib" to be used by the disassembler.
537
538 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
539
540 * i386.h (ReverseModrm): Remove all occurences.
541 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
542 movmskps, pextrw, pmovmskb, maskmovq.
543 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
544 ignore the data size prefix.
545
546 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
547 Mostly stolen from Doug Ledford <dledford@redhat.com>
548
549 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
550
551 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
552
553 1999-04-14 Doug Evans <devans@casey.cygnus.com>
554
555 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
556 (CGEN_ATTR_TYPE): Update.
557 (CGEN_ATTR_MASK): Number booleans starting at 0.
558 (CGEN_ATTR_VALUE): Update.
559 (CGEN_INSN_ATTR): Update.
560
561 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
562
563 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
564 instructions.
565
566 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
567
568 * hppa.h (bb, bvb): Tweak opcode/mask.
569
570
571 1999-03-22 Doug Evans <devans@casey.cygnus.com>
572
573 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
574 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
575 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
576 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
577 Delete member max_insn_size.
578 (enum cgen_cpu_open_arg): New enum.
579 (cpu_open): Update prototype.
580 (cpu_open_1): Declare.
581 (cgen_set_cpu): Delete.
582
583 1999-03-11 Doug Evans <devans@casey.cygnus.com>
584
585 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
586 (CGEN_OPERAND_NIL): New macro.
587 (CGEN_OPERAND): New member `type'.
588 (@arch@_cgen_operand_table): Delete decl.
589 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
590 (CGEN_OPERAND_TABLE): New struct.
591 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
592 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
593 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
594 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
595 {get,set}_{int,vma}_operand.
596 (@arch@_cgen_cpu_open): New arg `isa'.
597 (cgen_set_cpu): Ditto.
598
599 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
600
601 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
602
603 1999-02-25 Doug Evans <devans@casey.cygnus.com>
604
605 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
606 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
607 enum cgen_hw_type.
608 (CGEN_HW_TABLE): New struct.
609 (hw_table): Delete declaration.
610 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
611 to table entry to enum.
612 (CGEN_OPINST): Ditto.
613 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
614
615 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
616
617 * alpha.h (AXP_OPCODE_EV6): New.
618 (AXP_OPCODE_NOPAL): Include it.
619
620 1999-02-09 Doug Evans <devans@casey.cygnus.com>
621
622 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
623 All uses updated. New members int_insn_p, max_insn_size,
624 parse_operand,insert_operand,extract_operand,print_operand,
625 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
626 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
627 extract_handlers,print_handlers.
628 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
629 (CGEN_ATTR_BOOL_OFFSET): New macro.
630 (CGEN_ATTR_MASK): Subtract it to compute bit number.
631 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
632 (cgen_opcode_handler): Renamed from cgen_base.
633 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
634 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
635 all uses updated.
636 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
637 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
638 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
639 (CGEN_OPCODE,CGEN_IBASE): New types.
640 (CGEN_INSN): Rewrite.
641 (CGEN_{ASM,DIS}_HASH*): Delete.
642 (init_opcode_table,init_ibld_table): Declare.
643 (CGEN_INSN_ATTR): New type.
644
645 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
646
647 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
648 (x_FP, d_FP, dls_FP, sldx_FP): Define.
649 Change *Suf definitions to include x and d suffixes.
650 (movsx): Use w_Suf and b_Suf.
651 (movzx): Likewise.
652 (movs): Use bwld_Suf.
653 (fld): Change ordering. Use sld_FP.
654 (fild): Add Intel Syntax equivalent of fildq.
655 (fst): Use sld_FP.
656 (fist): Use sld_FP.
657 (fstp): Use sld_FP. Add x_FP version.
658 (fistp): LLongMem version for Intel Syntax.
659 (fcom, fcomp): Use sld_FP.
660 (fadd, fiadd, fsub): Use sld_FP.
661 (fsubr): Use sld_FP.
662 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
663
664 1999-01-27 Doug Evans <devans@casey.cygnus.com>
665
666 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
667 CGEN_MODE_UINT.
668
669 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
670
671 * hppa.h (bv): Fix mask.
672
673 1999-01-05 Doug Evans <devans@casey.cygnus.com>
674
675 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
676 (CGEN_ATTR): Use it.
677 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
678 (CGEN_ATTR_TABLE): New member dfault.
679
680 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
681
682 * mips.h (MIPS16_INSN_BRANCH): New.
683
684 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
685
686 The following is part of a change made by Edith Epstein
687 <eepstein@sophia.cygnus.com> as part of a project to merge in
688 changes by HP; HP did not create ChangeLog entries.
689
690 * hppa.h (completer_chars): list of chars to not put a space
691 after.
692
693 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
694
695 * i386.h (i386_optab): Permit w suffix on processor control and
696 status word instructions.
697
698 1998-11-30 Doug Evans <devans@casey.cygnus.com>
699
700 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
701 (struct cgen_keyword_entry): Ditto.
702 (struct cgen_operand): Ditto.
703 (CGEN_IFLD): New typedef, with associated access macros.
704 (CGEN_IFMT): New typedef, with associated access macros.
705 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
706 (CGEN_IVALUE): New typedef.
707 (struct cgen_insn): Delete const on syntax,attrs members.
708 `format' now points to format data. Type of `value' is now
709 CGEN_IVALUE.
710 (struct cgen_opcode_table): New member ifld_table.
711
712 1998-11-18 Doug Evans <devans@casey.cygnus.com>
713
714 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
715 (CGEN_OPERAND_INSTANCE): New member `attrs'.
716 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
717 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
718 (cgen_opcode_table): Update type of dis_hash fn.
719 (extract_operand): Update type of `insn_value' arg.
720
721 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
722
723 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
724
725 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
726
727 * mips.h (INSN_MULT): Added.
728
729 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
730
731 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
732
733 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
734
735 * cgen.h (CGEN_INSN_INT): New typedef.
736 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
737 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
738 (CGEN_INSN_BYTES_PTR): New typedef.
739 (CGEN_EXTRACT_INFO): New typedef.
740 (cgen_insert_fn,cgen_extract_fn): Update.
741 (cgen_opcode_table): New member `insn_endian'.
742 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
743 (insert_operand,extract_operand): Update.
744 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
745
746 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
747
748 * cgen.h (CGEN_ATTR_BOOLS): New macro.
749 (struct CGEN_HW_ENTRY): New member `attrs'.
750 (CGEN_HW_ATTR): New macro.
751 (struct CGEN_OPERAND_INSTANCE): New member `name'.
752 (CGEN_INSN_INVALID_P): New macro.
753
754 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
755
756 * hppa.h: Add "fid".
757
758 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
759
760 From Robert Andrew Dale <rob@nb.net>
761 * i386.h (i386_optab): Add AMD 3DNow! instructions.
762 (AMD_3DNOW_OPCODE): Define.
763
764 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
765
766 * d30v.h (EITHER_BUT_PREFER_MU): Define.
767
768 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
769
770 * cgen.h (cgen_insn): #if 0 out element `cdx'.
771
772 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
773
774 Move all global state data into opcode table struct, and treat
775 opcode table as something that is "opened/closed".
776 * cgen.h (CGEN_OPCODE_DESC): New type.
777 (all fns): New first arg of opcode table descriptor.
778 (cgen_set_parse_operand_fn): Add prototype.
779 (cgen_current_machine,cgen_current_endian): Delete.
780 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
781 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
782 dis_hash_table,dis_hash_table_entries.
783 (opcode_open,opcode_close): Add prototypes.
784
785 * cgen.h (cgen_insn): New element `cdx'.
786
787 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
788
789 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
790
791 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
792
793 * mn10300.h: Add "no_match_operands" field for instructions.
794 (MN10300_MAX_OPERANDS): Define.
795
796 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
797
798 * cgen.h (cgen_macro_insn_count): Declare.
799
800 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
801
802 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
803 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
804 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
805 set_{int,vma}_operand.
806
807 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
808
809 * mn10300.h: Add "machine" field for instructions.
810 (MN103, AM30): Define machine types.
811
812 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
815
816 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
817
818 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
819
820 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
821
822 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
823 and ud2b.
824 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
825 those that happen to be implemented on pentiums.
826
827 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
828
829 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
830 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
831 with Size16|IgnoreSize or Size32|IgnoreSize.
832
833 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
834
835 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
836 (REPE): Rename to REPE_PREFIX_OPCODE.
837 (i386_regtab_end): Remove.
838 (i386_prefixtab, i386_prefixtab_end): Remove.
839 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
840 of md_begin.
841 (MAX_OPCODE_SIZE): Define.
842 (i386_optab_end): Remove.
843 (sl_Suf): Define.
844 (sl_FP): Use sl_Suf.
845
846 * i386.h (i386_optab): Allow 16 bit displacement for `mov
847 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
848 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
849 data32, dword, and adword prefixes.
850 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
851 regs.
852
853 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
854
855 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
856
857 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
858 register operands, because this is a common idiom. Flag them with
859 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
860 fdivrp because gcc erroneously generates them. Also flag with a
861 warning.
862
863 * i386.h: Add suffix modifiers to most insns, and tighter operand
864 checks in some cases. Fix a number of UnixWare compatibility
865 issues with float insns. Merge some floating point opcodes, using
866 new FloatMF modifier.
867 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
868 consistency.
869
870 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
871 IgnoreDataSize where appropriate.
872
873 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
874
875 * i386.h: (one_byte_segment_defaults): Remove.
876 (two_byte_segment_defaults): Remove.
877 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
878
879 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
880
881 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
882 (cgen_hw_lookup_by_num): Declare.
883
884 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
885
886 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
887 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
888
889 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
890
891 * cgen.h (cgen_asm_init_parse): Delete.
892 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
893 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
894
895 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
896
897 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
898 (cgen_asm_finish_insn): Update prototype.
899 (cgen_insn): New members num, data.
900 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
901 dis_hash, dis_hash_table_size moved to ...
902 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
903 All uses updated. New members asm_hash_p, dis_hash_p.
904 (CGEN_MINSN_EXPANSION): New struct.
905 (cgen_expand_macro_insn): Declare.
906 (cgen_macro_insn_count): Declare.
907 (get_insn_operands): Update prototype.
908 (lookup_get_insn_operands): Declare.
909
910 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
911
912 * i386.h (i386_optab): Change iclrKludge and imulKludge to
913 regKludge. Add operands types for string instructions.
914
915 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
916
917 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
918 table.
919
920 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
921
922 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
923 for `gettext'.
924
925 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h: Remove NoModrm flag from all insns: it's never checked.
928 Add IsString flag to string instructions.
929 (IS_STRING): Don't define.
930 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
931 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
932 (SS_PREFIX_OPCODE): Define.
933
934 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
935
936 * i386.h: Revert March 24 patch; no more LinearAddress.
937
938 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
939
940 * i386.h (i386_optab): Remove fwait (9b) from all floating point
941 instructions, and instead add FWait opcode modifier. Add short
942 form of fldenv and fstenv.
943 (FWAIT_OPCODE): Define.
944
945 * i386.h (i386_optab): Change second operand constraint of `mov
946 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
947 allow legal instructions such as `movl %gs,%esi'
948
949 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
950
951 * h8300.h: Various changes to fully bracket initializers.
952
953 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
954
955 * i386.h: Set LinearAddress for lidt and lgdt.
956
957 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
958
959 * cgen.h (CGEN_BOOL_ATTR): New macro.
960
961 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
962
963 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
964
965 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
966
967 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
968 (cgen_insn): Record syntax and format entries here, rather than
969 separately.
970
971 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
972
973 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
974
975 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
976
977 * cgen.h (cgen_insert_fn): Change type of result to const char *.
978 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
979 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
980
981 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
982
983 * cgen.h (lookup_insn): New argument alias_p.
984
985 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
986
987 Fix rac to accept only a0:
988 * d10v.h (OPERAND_ACC): Split into:
989 (OPERAND_ACC0, OPERAND_ACC1) .
990 (OPERAND_GPR): Define.
991
992 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
993
994 * cgen.h (CGEN_FIELDS): Define here.
995 (CGEN_HW_ENTRY): New member `type'.
996 (hw_list): Delete decl.
997 (enum cgen_mode): Declare.
998 (CGEN_OPERAND): New member `hw'.
999 (enum cgen_operand_instance_type): Declare.
1000 (CGEN_OPERAND_INSTANCE): New type.
1001 (CGEN_INSN): New member `operands'.
1002 (CGEN_OPCODE_DATA): Make hw_list const.
1003 (get_insn_operands,lookup_insn): Add prototypes for.
1004
1005 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1006
1007 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1008 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1009 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1010 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1011
1012 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1013
1014 * cgen.h: Correct typo in comment end marker.
1015
1016 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1017
1018 * tic30.h: New file.
1019
1020 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1021
1022 * cgen.h: Add prototypes for cgen_save_fixups(),
1023 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1024 of cgen_asm_finish_insn() to return a char *.
1025
1026 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1027
1028 * cgen.h: Formatting changes to improve readability.
1029
1030 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1031
1032 * cgen.h (*): Clean up pass over `struct foo' usage.
1033 (CGEN_ATTR): Make unsigned char.
1034 (CGEN_ATTR_TYPE): Update.
1035 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1036 (cgen_base): Move member `attrs' to cgen_insn.
1037 (CGEN_KEYWORD): New member `null_entry'.
1038 (CGEN_{SYNTAX,FORMAT}): New types.
1039 (cgen_insn): Format and syntax separated from each other.
1040
1041 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1042
1043 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1044 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1045 flags_{used,set} long.
1046 (d30v_operand): Make flags field long.
1047
1048 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1049
1050 * m68k.h: Fix comment describing operand types.
1051
1052 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1053
1054 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1055 everything else after down.
1056
1057 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1058
1059 * d10v.h (OPERAND_FLAG): Split into:
1060 (OPERAND_FFLAG, OPERAND_CFLAG) .
1061
1062 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1063
1064 * mips.h (struct mips_opcode): Changed comments to reflect new
1065 field usage.
1066
1067 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1068
1069 * mips.h: Added to comments a quick-ref list of all assigned
1070 operand type characters.
1071 (OP_{MASK,SH}_PERFREG): New macros.
1072
1073 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1074
1075 * sparc.h: Add '_' and '/' for v9a asr's.
1076 Patch from David Miller <davem@vger.rutgers.edu>
1077
1078 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1079
1080 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1081 area are not available in the base model (H8/300).
1082
1083 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1084
1085 * m68k.h: Remove documentation of ` operand specifier.
1086
1087 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1088
1089 * m68k.h: Document q and v operand specifiers.
1090
1091 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1092
1093 * v850.h (struct v850_opcode): Add processors field.
1094 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1095 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1096 (PROCESSOR_V850EA): New bit constants.
1097
1098 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1099
1100 Merge changes from Martin Hunt:
1101
1102 * d30v.h: Allow up to 64 control registers. Add
1103 SHORT_A5S format.
1104
1105 * d30v.h (LONG_Db): New form for delayed branches.
1106
1107 * d30v.h: (LONG_Db): New form for repeati.
1108
1109 * d30v.h (SHORT_D2B): New form.
1110
1111 * d30v.h (SHORT_A2): New form.
1112
1113 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1114 registers are used. Needed for VLIW optimization.
1115
1116 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1117
1118 * cgen.h: Move assembler interface section
1119 up so cgen_parse_operand_result is defined for cgen_parse_address.
1120 (cgen_parse_address): Update prototype.
1121
1122 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1123
1124 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1125
1126 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1127
1128 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1129 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1130 <paubert@iram.es>.
1131
1132 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1133 <paubert@iram.es>.
1134
1135 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1136 <paubert@iram.es>.
1137
1138 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1139 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1140
1141 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1142
1143 * v850.h (V850_NOT_R0): New flag.
1144
1145 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1146
1147 * v850.h (struct v850_opcode): Remove flags field.
1148
1149 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1150
1151 * v850.h (struct v850_opcode): Add flags field.
1152 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1153 fields.
1154 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1155 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1156
1157 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1158
1159 * arc.h: New file.
1160
1161 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1162
1163 * sparc.h (sparc_opcodes): Declare as const.
1164
1165 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1166
1167 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1168 uses single or double precision floating point resources.
1169 (INSN_NO_ISA, INSN_ISA1): Define.
1170 (cpu specific INSN macros): Tweak into bitmasks outside the range
1171 of INSN_ISA field.
1172
1173 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1174
1175 * i386.h: Fix pand opcode.
1176
1177 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1178
1179 * mips.h: Widen INSN_ISA and move it to a more convenient
1180 bit position. Add INSN_3900.
1181
1182 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1183
1184 * mips.h (struct mips_opcode): added new field membership.
1185
1186 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1187
1188 * i386.h (movd): only Reg32 is allowed.
1189
1190 * i386.h: add fcomp and ud2. From Wayne Scott
1191 <wscott@ichips.intel.com>.
1192
1193 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1194
1195 * i386.h: Add MMX instructions.
1196
1197 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1198
1199 * i386.h: Remove W modifier from conditional move instructions.
1200
1201 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1202
1203 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1204 with no arguments to match that generated by the UnixWare
1205 assembler.
1206
1207 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1208
1209 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1210 (cgen_parse_operand_fn): Declare.
1211 (cgen_init_parse_operand): Declare.
1212 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1213 new argument `want'.
1214 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1215 (enum cgen_parse_operand_type): New enum.
1216
1217 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1218
1219 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1220
1221 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1222
1223 * cgen.h: New file.
1224
1225 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1226
1227 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1228 fdivrp.
1229
1230 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1231
1232 * v850.h (extract): Make unsigned.
1233
1234 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1235
1236 * i386.h: Add iclr.
1237
1238 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1239
1240 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1241 take a direction bit.
1242
1243 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1244
1245 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1246
1247 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1248
1249 * sparc.h: Include <ansidecl.h>. Update function declarations to
1250 use prototypes, and to use const when appropriate.
1251
1252 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1253
1254 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1255
1256 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1257
1258 * d10v.h: Change pre_defined_registers to
1259 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1260
1261 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1262
1263 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1264 Change mips_opcodes from const array to a pointer,
1265 and change bfd_mips_num_opcodes from const int to int,
1266 so that we can increase the size of the mips opcodes table
1267 dynamically.
1268
1269 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1270
1271 * d30v.h (FLAG_X): Remove unused flag.
1272
1273 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1274
1275 * d30v.h: New file.
1276
1277 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1278
1279 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1280 (PDS_VALUE): Macro to access value field of predefined symbols.
1281 (tic80_next_predefined_symbol): Add prototype.
1282
1283 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1284
1285 * tic80.h (tic80_symbol_to_value): Change prototype to match
1286 change in function, added class parameter.
1287
1288 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1289
1290 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1291 endmask fields, which are somewhat weird in that 0 and 32 are
1292 treated exactly the same.
1293
1294 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1295
1296 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1297 rather than a constant that is 2**X. Reorder them to put bits for
1298 operands that have symbolic names in the upper bits, so they can
1299 be packed into an int where the lower bits contain the value that
1300 corresponds to that symbolic name.
1301 (predefined_symbo): Add struct.
1302 (tic80_predefined_symbols): Declare array of translations.
1303 (tic80_num_predefined_symbols): Declare size of that array.
1304 (tic80_value_to_symbol): Declare function.
1305 (tic80_symbol_to_value): Declare function.
1306
1307 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1308
1309 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1310
1311 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1312
1313 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1314 be the destination register.
1315
1316 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1317
1318 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1319 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1320 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1321 that the opcode can have two vector instructions in a single
1322 32 bit word and we have to encode/decode both.
1323
1324 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1325
1326 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1327 TIC80_OPERAND_RELATIVE for PC relative.
1328 (TIC80_OPERAND_BASEREL): New flag bit for register
1329 base relative.
1330
1331 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1332
1333 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1334
1335 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1336
1337 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1338 ":s" modifier for scaling.
1339
1340 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1341
1342 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1343 (TIC80_OPERAND_M_LI): Ditto
1344
1345 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1346
1347 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1348 (TIC80_OPERAND_CC): New define for condition code operand.
1349 (TIC80_OPERAND_CR): New define for control register operand.
1350
1351 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1352
1353 * tic80.h (struct tic80_opcode): Name changed.
1354 (struct tic80_opcode): Remove format field.
1355 (struct tic80_operand): Add insertion and extraction functions.
1356 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1357 correct ones.
1358 (FMT_*): Ditto.
1359
1360 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1361
1362 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1363 type IV instruction offsets.
1364
1365 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1366
1367 * tic80.h: New file.
1368
1369 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1370
1371 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1372
1373 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1374
1375 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1376 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1377 * v850.h: Fix comment, v850_operand not powerpc_operand.
1378
1379 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1380
1381 * mn10200.h: Flesh out structures and definitions needed by
1382 the mn10200 assembler & disassembler.
1383
1384 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1385
1386 * mips.h: Add mips16 definitions.
1387
1388 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1389
1390 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1391
1392 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1393
1394 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1395 (MN10300_OPERAND_MEMADDR): Define.
1396
1397 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1398
1399 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1400
1401 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1404
1405 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1406
1407 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1408
1409 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1410
1411 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1412
1413 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1414
1415 * alpha.h: Don't include "bfd.h"; private relocation types are now
1416 negative to minimize problems with shared libraries. Organize
1417 instruction subsets by AMASK extensions and PALcode
1418 implementation.
1419 (struct alpha_operand): Move flags slot for better packing.
1420
1421 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1422
1423 * v850.h (V850_OPERAND_RELAX): New operand flag.
1424
1425 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1426
1427 * mn10300.h (FMT_*): Move operand format definitions
1428 here.
1429
1430 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1431
1432 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1433
1434 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1435
1436 * mn10300.h (mn10300_opcode): Add "format" field.
1437 (MN10300_OPERAND_*): Define.
1438
1439 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1440
1441 * mn10x00.h: Delete.
1442 * mn10200.h, mn10300.h: New files.
1443
1444 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1445
1446 * mn10x00.h: New file.
1447
1448 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1449
1450 * v850.h: Add new flag to indicate this instruction uses a PC
1451 displacement.
1452
1453 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1454
1455 * h8300.h (stmac): Add missing instruction.
1456
1457 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1458
1459 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1460 field.
1461
1462 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1463
1464 * v850.h (V850_OPERAND_EP): Define.
1465
1466 * v850.h (v850_opcode): Add size field.
1467
1468 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1469
1470 * v850.h (v850_operands): Add insert and extract fields, pointers
1471 to functions used to handle unusual operand encoding.
1472 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1473 V850_OPERAND_SIGNED): Defined.
1474
1475 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1476
1477 * v850.h (v850_operands): Add flags field.
1478 (OPERAND_REG, OPERAND_NUM): Defined.
1479
1480 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1481
1482 * v850.h: New file.
1483
1484 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1485
1486 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1487 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1488 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1489 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1490 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1491 Defined.
1492
1493 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1496 a 3 bit space id instead of a 2 bit space id.
1497
1498 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1499
1500 * d10v.h: Add some additional defines to support the
1501 assembler in determining which operations can be done in parallel.
1502
1503 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1504
1505 * h8300.h (SN): Define.
1506 (eepmov.b): Renamed from "eepmov"
1507 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1508 with them.
1509
1510 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1511
1512 * d10v.h (OPERAND_SHIFT): New operand flag.
1513
1514 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1515
1516 * d10v.h: Changes for divs, parallel-only instructions, and
1517 signed numbers.
1518
1519 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1520
1521 * d10v.h (pd_reg): Define. Putting the definition here allows
1522 the assembler and disassembler to share the same struct.
1523
1524 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1525
1526 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1527 Williams <steve@icarus.com>.
1528
1529 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1530
1531 * d10v.h: New file.
1532
1533 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1534
1535 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1536
1537 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1538
1539 * m68k.h (mcf5200): New macro.
1540 Document names of coldfire control registers.
1541
1542 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1543
1544 * h8300.h (SRC_IN_DST): Define.
1545
1546 * h8300.h (UNOP3): Mark the register operand in this insn
1547 as a source operand, not a destination operand.
1548 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1549 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1550 register operand with SRC_IN_DST.
1551
1552 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1553
1554 * alpha.h: New file.
1555
1556 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * rs6k.h: Remove obsolete file.
1559
1560 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1563 fdivp, and fdivrp. Add ffreep.
1564
1565 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1566
1567 * h8300.h: Reorder various #defines for readability.
1568 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1569 (BITOP): Accept additional (unused) argument. All callers changed.
1570 (EBITOP): Likewise.
1571 (O_LAST): Bump.
1572 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1573
1574 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1575 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1576 (BITOP, EBITOP): Handle new H8/S addressing modes for
1577 bit insns.
1578 (UNOP3): Handle new shift/rotate insns on the H8/S.
1579 (insns using exr): New instructions.
1580 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1581
1582 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1583
1584 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1585 was incorrect.
1586
1587 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1588
1589 * h8300.h (START): Remove.
1590 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1591 and mov.l insns that can be relaxed.
1592
1593 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1594
1595 * i386.h: Remove Abs32 from lcall.
1596
1597 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1598
1599 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1600 (SLCPOP): New macro.
1601 Mark X,Y opcode letters as in use.
1602
1603 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1604
1605 * sparc.h (F_FLOAT, F_FBR): Define.
1606
1607 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1608
1609 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1610 from all insns.
1611 (ABS8SRC,ABS8DST): Add ABS8MEM.
1612 (add.l): Fix reg+reg variant.
1613 (eepmov.w): Renamed from eepmovw.
1614 (ldc,stc): Fix many cases.
1615
1616 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1617
1618 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1619
1620 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1621
1622 * sparc.h (O): Mark operand letter as in use.
1623
1624 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1625
1626 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1627 Mark operand letters uU as in use.
1628
1629 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1630
1631 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1632 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1633 (SPARC_OPCODE_SUPPORTED): New macro.
1634 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1635 (F_NOTV9): Delete.
1636
1637 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1638
1639 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1640 declaration consistent with return type in definition.
1641
1642 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1643
1644 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1645
1646 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1647
1648 * i386.h (i386_regtab): Add 80486 test registers.
1649
1650 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1651
1652 * i960.h (I_HX): Define.
1653 (i960_opcodes): Add HX instruction.
1654
1655 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1656
1657 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1658 and fclex.
1659
1660 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1661
1662 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1663 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1664 (bfd_* defines): Delete.
1665 (sparc_opcode_archs): Replaces architecture_pname.
1666 (sparc_opcode_lookup_arch): Declare.
1667 (NUMOPCODES): Delete.
1668
1669 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1670
1671 * sparc.h (enum sparc_architecture): Add v9a.
1672 (ARCHITECTURES_CONFLICT_P): Update.
1673
1674 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1675
1676 * i386.h: Added Pentium Pro instructions.
1677
1678 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1679
1680 * m68k.h: Document new 'W' operand place.
1681
1682 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1683
1684 * hppa.h: Add lci and syncdma instructions.
1685
1686 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1687
1688 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1689 instructions.
1690
1691 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1692
1693 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1694 assembler's -mcom and -many switches.
1695
1696 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1697
1698 * i386.h: Fix cmpxchg8b extension opcode description.
1699
1700 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1701
1702 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1703 and register cr4.
1704
1705 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1706
1707 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1708
1709 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1710
1711 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1712
1713 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1714
1715 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1716
1717 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1718
1719 * m68kmri.h: Remove.
1720
1721 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1722 declarations. Remove F_ALIAS and flag field of struct
1723 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1724 int. Make name and args fields of struct m68k_opcode const.
1725
1726 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1727
1728 * sparc.h (F_NOTV9): Define.
1729
1730 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1731
1732 * mips.h (INSN_4010): Define.
1733
1734 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1735
1736 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1737
1738 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1739 * m68k.h: Fix argument descriptions of coprocessor
1740 instructions to allow only alterable operands where appropriate.
1741 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1742 (m68k_opcode_aliases): Add more aliases.
1743
1744 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1745
1746 * m68k.h: Added explcitly short-sized conditional branches, and a
1747 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1748 svr4-based configurations.
1749
1750 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1751
1752 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1753 * i386.h: added missing Data16/Data32 flags to a few instructions.
1754
1755 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1756
1757 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1758 (OP_MASK_BCC, OP_SH_BCC): Define.
1759 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1760 (OP_MASK_CCC, OP_SH_CCC): Define.
1761 (INSN_READ_FPR_R): Define.
1762 (INSN_RFE): Delete.
1763
1764 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1765
1766 * m68k.h (enum m68k_architecture): Deleted.
1767 (struct m68k_opcode_alias): New type.
1768 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1769 matching constraints, values and flags. As a side effect of this,
1770 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1771 as I know were never used, now may need re-examining.
1772 (numopcodes): Now const.
1773 (m68k_opcode_aliases, numaliases): New variables.
1774 (endop): Deleted.
1775 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1776 m68k_opcode_aliases; update declaration of m68k_opcodes.
1777
1778 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1779
1780 * hppa.h (delay_type): Delete unused enumeration.
1781 (pa_opcode): Replace unused delayed field with an architecture
1782 field.
1783 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1784
1785 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1786
1787 * mips.h (INSN_ISA4): Define.
1788
1789 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1790
1791 * mips.h (M_DLA_AB, M_DLI): Define.
1792
1793 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1794
1795 * hppa.h (fstwx): Fix single-bit error.
1796
1797 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1798
1799 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1800
1801 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1802
1803 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1804 debug registers. From Charles Hannum (mycroft@netbsd.org).
1805
1806 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1807
1808 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1809 i386 support:
1810 * i386.h (MOV_AX_DISP32): New macro.
1811 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1812 of several call/return instructions.
1813 (ADDR_PREFIX_OPCODE): New macro.
1814
1815 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1816
1817 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1818
1819 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1820 it pointer to const char;
1821 (struct vot, field `name'): ditto.
1822
1823 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1824
1825 * vax.h: Supply and properly group all values in end sentinel.
1826
1827 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1828
1829 * mips.h (INSN_ISA, INSN_4650): Define.
1830
1831 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1832
1833 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1834 systems with a separate instruction and data cache, such as the
1835 29040, these instructions take an optional argument.
1836
1837 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1838
1839 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1840 INSN_TRAP.
1841
1842 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1843
1844 * mips.h (INSN_STORE_MEMORY): Define.
1845
1846 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1847
1848 * sparc.h: Document new operand type 'x'.
1849
1850 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1851
1852 * i960.h (I_CX2): New instruction category. It includes
1853 instructions available on Cx and Jx processors.
1854 (I_JX): New instruction category, for JX-only instructions.
1855 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1856 Jx-only instructions, in I_JX category.
1857
1858 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1859
1860 * ns32k.h (endop): Made pointer const too.
1861
1862 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1863
1864 * ns32k.h: Drop Q operand type as there is no correct use
1865 for it. Add I and Z operand types which allow better checking.
1866
1867 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1868
1869 * h8300.h (xor.l) :fix bit pattern.
1870 (L_2): New size of operand.
1871 (trapa): Use it.
1872
1873 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1874
1875 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1876
1877 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1878
1879 * sparc.h: Include v9 definitions.
1880
1881 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1882
1883 * m68k.h (m68060): Defined.
1884 (m68040up, mfloat, mmmu): Include it.
1885 (struct m68k_opcode): Widen `arch' field.
1886 (m68k_opcodes): Updated for M68060. Removed comments that were
1887 instructions commented out by "JF" years ago.
1888
1889 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1890
1891 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1892 add a one-bit `flags' field.
1893 (F_ALIAS): New macro.
1894
1895 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1896
1897 * h8300.h (dec, inc): Get encoding right.
1898
1899 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1900
1901 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1902 a flag instead.
1903 (PPC_OPERAND_SIGNED): Define.
1904 (PPC_OPERAND_SIGNOPT): Define.
1905
1906 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1907
1908 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1909 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1910
1911 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1912
1913 * i386.h: Reverse last change. It'll be handled in gas instead.
1914
1915 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1916
1917 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1918 slower on the 486 and used the implicit shift count despite the
1919 explicit operand. The one-operand form is still available to get
1920 the shorter form with the implicit shift count.
1921
1922 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1923
1924 * hppa.h: Fix typo in fstws arg string.
1925
1926 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1927
1928 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1929
1930 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1931
1932 * ppc.h (PPC_OPCODE_601): Define.
1933
1934 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1935
1936 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1937 (so we can determine valid completers for both addb and addb[tf].)
1938
1939 * hppa.h (xmpyu): No floating point format specifier for the
1940 xmpyu instruction.
1941
1942 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1943
1944 * ppc.h (PPC_OPERAND_NEXT): Define.
1945 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1946 (struct powerpc_macro): Define.
1947 (powerpc_macros, powerpc_num_macros): Declare.
1948
1949 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1950
1951 * ppc.h: New file. Header file for PowerPC opcode table.
1952
1953 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1954
1955 * hppa.h: More minor template fixes for sfu and copr (to allow
1956 for easier disassembly).
1957
1958 * hppa.h: Fix templates for all the sfu and copr instructions.
1959
1960 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1961
1962 * i386.h (push): Permit Imm16 operand too.
1963
1964 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1965
1966 * h8300.h (andc): Exists in base arch.
1967
1968 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1969
1970 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1971 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1972
1973 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1974
1975 * hppa.h: Add FP quadword store instructions.
1976
1977 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1978
1979 * mips.h: (M_J_A): Added.
1980 (M_LA): Removed.
1981
1982 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1983
1984 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1985 <mellon@pepper.ncd.com>.
1986
1987 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1988
1989 * hppa.h: Immediate field in probei instructions is unsigned,
1990 not low-sign extended.
1991
1992 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1993
1994 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1995
1996 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1997
1998 * i386.h: Add "fxch" without operand.
1999
2000 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2001
2002 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2003
2004 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2005
2006 * hppa.h: Add gfw and gfr to the opcode table.
2007
2008 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2009
2010 * m88k.h: extended to handle m88110.
2011
2012 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2013
2014 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2015 addresses.
2016
2017 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2018
2019 * i960.h (i960_opcodes): Properly bracket initializers.
2020
2021 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2022
2023 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2024
2025 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2026
2027 * m68k.h (two): Protect second argument with parentheses.
2028
2029 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2030
2031 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2032 Deleted old in/out instructions in "#if 0" section.
2033
2034 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2035
2036 * i386.h (i386_optab): Properly bracket initializers.
2037
2038 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2039
2040 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2041 Jeff Law, law@cs.utah.edu).
2042
2043 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2044
2045 * i386.h (lcall): Accept Imm32 operand also.
2046
2047 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2048
2049 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2050 (M_DABS): Added.
2051
2052 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2053
2054 * mips.h (INSN_*): Changed values. Removed unused definitions.
2055 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2056 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2057 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2058 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2059 (M_*): Added new values for r6000 and r4000 macros.
2060 (ANY_DELAY): Removed.
2061
2062 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2063
2064 * mips.h: Added M_LI_S and M_LI_SS.
2065
2066 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2067
2068 * h8300.h: Get some rare mov.bs correct.
2069
2070 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2071
2072 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2073 been included.
2074
2075 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2076
2077 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2078 jump instructions, for use in disassemblers.
2079
2080 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2081
2082 * m88k.h: Make bitfields just unsigned, not unsigned long or
2083 unsigned short.
2084
2085 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2086
2087 * hppa.h: New argument type 'y'. Use in various float instructions.
2088
2089 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2090
2091 * hppa.h (break): First immediate field is unsigned.
2092
2093 * hppa.h: Add rfir instruction.
2094
2095 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2096
2097 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2098
2099 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2100
2101 * mips.h: Reworked the hazard information somewhat, and fixed some
2102 bugs in the instruction hazard descriptions.
2103
2104 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2105
2106 * m88k.h: Corrected a couple of opcodes.
2107
2108 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2109
2110 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2111 new version includes instruction hazard information, but is
2112 otherwise reasonably similar.
2113
2114 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2115
2116 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2117
2118 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2119
2120 Patches from Jeff Law, law@cs.utah.edu:
2121 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2122 Make the tables be the same for the following instructions:
2123 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2124 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2125 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2126 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2127 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2128 "fcmp", and "ftest".
2129
2130 * hppa.h: Make new and old tables the same for "break", "mtctl",
2131 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2132 Fix typo in last patch. Collapse several #ifdefs into a
2133 single #ifdef.
2134
2135 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2136 of the comments up-to-date.
2137
2138 * hppa.h: Update "free list" of letters and update
2139 comments describing each letter's function.
2140
2141 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2142
2143 * h8300.h: checkpoint, includes H8/300-H opcodes.
2144
2145 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2146
2147 * Patches from Jeffrey Law <law@cs.utah.edu>.
2148 * hppa.h: Rework single precision FP
2149 instructions so that they correctly disassemble code
2150 PA1.1 code.
2151
2152 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2153
2154 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2155 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2156
2157 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2158
2159 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2160 gdb will define it for now.
2161
2162 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2163
2164 * sparc.h: Don't end enumerator list with comma.
2165
2166 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2167
2168 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2169 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2170 ("bc2t"): Correct typo.
2171 ("[ls]wc[023]"): Use T rather than t.
2172 ("c[0123]"): Define general coprocessor instructions.
2173
2174 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2175
2176 * m68k.h: Move split point for gcc compilation more towards
2177 middle.
2178
2179 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2180
2181 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2182 simply wrong, ics, rfi, & rfsvc were missing).
2183 Add "a" to opr_ext for "bb". Doc fix.
2184
2185 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2186
2187 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2188 * mips.h: Add casts, to suppress warnings about shifting too much.
2189 * m68k.h: Document the placement code '9'.
2190
2191 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2192
2193 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2194 allows callers to break up the large initialized struct full of
2195 opcodes into two half-sized ones. This permits GCC to compile
2196 this module, since it takes exponential space for initializers.
2197 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2198
2199 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2200
2201 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2202 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2203 initialized structs in it.
2204
2205 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2206
2207 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2208 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2209 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2210
2211 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2212
2213 * mips.h: document "i" and "j" operands correctly.
2214
2215 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2216
2217 * mips.h: Removed endianness dependency.
2218
2219 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2220
2221 * h8300.h: include info on number of cycles per instruction.
2222
2223 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2224
2225 * hppa.h: Move handy aliases to the front. Fix masks for extract
2226 and deposit instructions.
2227
2228 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2229
2230 * i386.h: accept shld and shrd both with and without the shift
2231 count argument, which is always %cl.
2232
2233 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2234
2235 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2236 (one_byte_segment_defaults, two_byte_segment_defaults,
2237 i386_prefixtab_end): Ditto.
2238
2239 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2240
2241 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2242 for operand 2; from John Carr, jfc@dsg.dec.com.
2243
2244 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2245
2246 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2247 always use 16-bit offsets. Makes calculated-size jump tables
2248 feasible.
2249
2250 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2251
2252 * i386.h: Fix one-operand forms of in* and out* patterns.
2253
2254 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2255
2256 * m68k.h: Added CPU32 support.
2257
2258 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2259
2260 * mips.h (break): Disassemble the argument. Patch from
2261 jonathan@cs.stanford.edu (Jonathan Stone).
2262
2263 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2264
2265 * m68k.h: merged Motorola and MIT syntax.
2266
2267 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2268
2269 * m68k.h (pmove): make the tests less strict, the 68k book is
2270 wrong.
2271
2272 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2273
2274 * m68k.h (m68ec030): Defined as alias for 68030.
2275 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2276 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2277 them. Tightened description of "fmovex" to distinguish it from
2278 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2279 up descriptions that claimed versions were available for chips not
2280 supporting them. Added "pmovefd".
2281
2282 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2283
2284 * m68k.h: fix where the . goes in divull
2285
2286 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2287
2288 * m68k.h: the cas2 instruction is supposed to be written with
2289 indirection on the last two operands, which can be either data or
2290 address registers. Added a new operand type 'r' which accepts
2291 either register type. Added new cases for cas2l and cas2w which
2292 use them. Corrected masks for cas2 which failed to recognize use
2293 of address register.
2294
2295 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2296
2297 * m68k.h: Merged in patches (mostly m68040-specific) from
2298 Colin Smith <colin@wrs.com>.
2299
2300 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2301 base). Also cleaned up duplicates, re-ordered instructions for
2302 the sake of dis-assembling (so aliases come after standard names).
2303 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2304
2305 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2306
2307 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2308 all missing .s
2309
2310 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2311
2312 * sparc.h: Moved tables to BFD library.
2313
2314 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2315
2316 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2317
2318 * h8300.h: Finish filling in all the holes in the opcode table,
2319 so that the Lucid C compiler can digest this as well...
2320
2321 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2322
2323 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2324 Fix opcodes on various sizes of fild/fist instructions
2325 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2326 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2327
2328 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2329
2330 * h8300.h: Fill in all the holes in the opcode table so that the
2331 losing HPUX C compiler can digest this...
2332
2333 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2334
2335 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2336 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2337
2338 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2339
2340 * sparc.h: Add new architecture variant sparclite; add its scan
2341 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2342
2343 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2344
2345 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2346 fy@lucid.com).
2347
2348 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2349
2350 * rs6k.h: New version from IBM (Metin).
2351
2352 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2353
2354 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2355 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2356
2357 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2358
2359 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2360
2361 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2362
2363 * m68k.h (one, two): Cast macro args to unsigned to suppress
2364 complaints from compiler and lint about integer overflow during
2365 shift.
2366
2367 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2368
2369 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2370
2371 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2372
2373 * mips.h: Make bitfield layout depend on the HOST compiler,
2374 not on the TARGET system.
2375
2376 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2377
2378 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2379 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2380 <TRANLE@INTELLICORP.COM>.
2381
2382 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2383
2384 * h8300.h: turned op_type enum into #define list
2385
2386 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2387
2388 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2389 similar instructions -- they've been renamed to "fitoq", etc.
2390 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2391 number of arguments.
2392 * h8300.h: Remove extra ; which produces compiler warning.
2393
2394 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2395
2396 * sparc.h: fix opcode for tsubcctv.
2397
2398 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2399
2400 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2401
2402 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2403
2404 * sparc.h (nop): Made the 'lose' field be even tighter,
2405 so only a standard 'nop' is disassembled as a nop.
2406
2407 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2408
2409 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2410 disassembled as a nop.
2411
2412 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2413
2414 * sparc.h: fix a typo.
2415
2416 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2417
2418 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2419 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2420 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2421
2422 \f
2423 Local Variables:
2424 version-control: never
2425 End:
This page took 0.081771 seconds and 4 git commands to generate.