`.arch cpu_type' pseudo for x86.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
2 Alexander Sokolov <robocop@netlink.ru>
3
4 * i386.h (i386_optab): Add cpu_flags for all instructions.
5
6 2000-05-13 Alan Modra <alan@linuxcare.com.au>
7
8 From Gavin Romig-Koch <gavin@cygnus.com>
9 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
10
11 2000-05-04 Timothy Wall <twall@cygnus.com>
12
13 * tic54x.h: New.
14
15 2000-05-03 J.T. Conklin <jtc@redback.com>
16
17 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
18 (PPC_OPERAND_VR): New operand flag for vector registers.
19
20 2000-05-01 Kazu Hirata <kazu@hxi.com>
21
22 * h8300.h (EOP): Add missing initializer.
23
24 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
25
26 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
27 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
28 New operand types l,y,&,fe,fE,fx added to support above forms.
29 (pa_opcodes): Replaced usage of 'x' as source/target for
30 floating point double-word loads/stores with 'fx'.
31
32 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
33 David Mosberger <davidm@hpl.hp.com>
34 Timothy Wall <twall@cygnus.com>
35 Jim Wilson <wilson@cygnus.com>
36
37 * ia64.h: New file.
38
39 2000-03-27 Nick Clifton <nickc@cygnus.com>
40
41 * d30v.h (SHORT_A1): Fix value.
42 (SHORT_AR): Renumber so that it is at the end of the list of short
43 instructions, not the end of the list of long instructions.
44
45 2000-03-26 Alan Modra <alan@linuxcare.com>
46
47 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
48 problem isn't really specific to Unixware.
49 (OLDGCC_COMPAT): Define.
50 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
51 destination %st(0).
52 Fix lots of comments.
53
54 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
55
56 * d30v.h:
57 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
58 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
59 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
60 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
61 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
62 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
63 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
64
65 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
66
67 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
68 fistpd without suffix.
69
70 2000-02-24 Nick Clifton <nickc@cygnus.com>
71
72 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
73 'signed_overflow_ok_p'.
74 Delete prototypes for cgen_set_flags() and cgen_get_flags().
75
76 2000-02-24 Andrew Haley <aph@cygnus.com>
77
78 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
79 (CGEN_CPU_TABLE): flags: new field.
80 Add prototypes for new functions.
81
82 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
83
84 * i386.h: Add some more UNIXWARE_COMPAT comments.
85
86 2000-02-23 Linas Vepstas <linas@linas.org>
87
88 * i370.h: New file.
89
90 2000-02-22 Andrew Haley <aph@cygnus.com>
91
92 * mips.h: (OPCODE_IS_MEMBER): Add comment.
93
94 1999-12-30 Andrew Haley <aph@cygnus.com>
95
96 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
97 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
98 insns.
99
100 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
101
102 * i386.h: Qualify intel mode far call and jmp with x_Suf.
103
104 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
105
106 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
107 indirect jumps and calls. Add FF/3 call for intel mode.
108
109 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
110
111 * mn10300.h: Add new operand types. Add new instruction formats.
112
113 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
114
115 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
116 instruction.
117
118 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
119
120 * mips.h (INSN_ISA5): New.
121
122 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
123
124 * mips.h (OPCODE_IS_MEMBER): New.
125
126 1999-10-29 Nick Clifton <nickc@cygnus.com>
127
128 * d30v.h (SHORT_AR): Define.
129
130 1999-10-18 Michael Meissner <meissner@cygnus.com>
131
132 * alpha.h (alpha_num_opcodes): Convert to unsigned.
133 (alpha_num_operands): Ditto.
134
135 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
136
137 * hppa.h (pa_opcodes): Add load and store cache control to
138 instructions. Add ordered access load and store.
139
140 * hppa.h (pa_opcode): Add new entries for addb and addib.
141
142 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
143
144 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
145
146 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
147
148 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
149
150 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
151
152 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
153 and "be" using completer prefixes.
154
155 * hppa.h (pa_opcodes): Add initializers to silence compiler.
156
157 * hppa.h: Update comments about character usage.
158
159 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
160
161 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
162 up the new fstw & bve instructions.
163
164 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
165
166 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
167 instructions.
168
169 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
170
171 * hppa.h (pa_opcodes): Add long offset double word load/store
172 instructions.
173
174 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
175 stores.
176
177 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
178
179 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
180
181 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
182
183 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
184
185 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
186
187 * hppa.h (pa_opcodes): Add support for "b,l".
188
189 * hppa.h (pa_opcodes): Add support for "b,gate".
190
191 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
192
193 * hppa.h (pa_opcodes): Use 'fX' for first register operand
194 in xmpyu.
195
196 * hppa.h (pa_opcodes): Fix mask for probe and probei.
197
198 * hppa.h (pa_opcodes): Fix mask for depwi.
199
200 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
201
202 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
203 an explicit output argument.
204
205 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
206
207 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
208 Add a few PA2.0 loads and store variants.
209
210 1999-09-04 Steve Chamberlain <sac@pobox.com>
211
212 * pj.h: New file.
213
214 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
215
216 * i386.h (i386_regtab): Move %st to top of table, and split off
217 other fp reg entries.
218 (i386_float_regtab): To here.
219
220 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
221
222 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
223 by 'f'.
224
225 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
226 Add supporting args.
227
228 * hppa.h: Document new completers and args.
229 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
230 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
231 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
232 pmenb and pmdis.
233
234 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
235 hshr, hsub, mixh, mixw, permh.
236
237 * hppa.h (pa_opcodes): Change completers in instructions to
238 use 'c' prefix.
239
240 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
241 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
242
243 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
244 fnegabs to use 'I' instead of 'F'.
245
246 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
247
248 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
249 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
250 Alphabetically sort PIII insns.
251
252 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
253
254 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
255
256 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
257
258 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
259 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
260
261 * hppa.h: Document 64 bit condition completers.
262
263 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
264
265 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
266
267 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
268
269 * i386.h (i386_optab): Add DefaultSize modifier to all insns
270 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
271 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
272
273 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
274 Jeff Law <law@cygnus.com>
275
276 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
277
278 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
279
280 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
281 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
282
283 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
284
285 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
286
287 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
288
289 * hppa.h (struct pa_opcode): Add new field "flags".
290 (FLAGS_STRICT): Define.
291
292 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
293 Jeff Law <law@cygnus.com>
294
295 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
296
297 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
298
299 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
300
301 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
302 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
303 flag to fcomi and friends.
304
305 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
306
307 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
308 integer logical instructions.
309
310 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
311
312 * m68k.h: Document new formats `E', `G', `H' and new places `N',
313 `n', `o'.
314
315 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
316 and new places `m', `M', `h'.
317
318 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
319
320 * hppa.h (pa_opcodes): Add several processor specific system
321 instructions.
322
323 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
324
325 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
326 "addb", and "addib" to be used by the disassembler.
327
328 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
329
330 * i386.h (ReverseModrm): Remove all occurences.
331 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
332 movmskps, pextrw, pmovmskb, maskmovq.
333 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
334 ignore the data size prefix.
335
336 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
337 Mostly stolen from Doug Ledford <dledford@redhat.com>
338
339 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
340
341 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
342
343 1999-04-14 Doug Evans <devans@casey.cygnus.com>
344
345 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
346 (CGEN_ATTR_TYPE): Update.
347 (CGEN_ATTR_MASK): Number booleans starting at 0.
348 (CGEN_ATTR_VALUE): Update.
349 (CGEN_INSN_ATTR): Update.
350
351 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
352
353 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
354 instructions.
355
356 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
357
358 * hppa.h (bb, bvb): Tweak opcode/mask.
359
360
361 1999-03-22 Doug Evans <devans@casey.cygnus.com>
362
363 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
364 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
365 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
366 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
367 Delete member max_insn_size.
368 (enum cgen_cpu_open_arg): New enum.
369 (cpu_open): Update prototype.
370 (cpu_open_1): Declare.
371 (cgen_set_cpu): Delete.
372
373 1999-03-11 Doug Evans <devans@casey.cygnus.com>
374
375 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
376 (CGEN_OPERAND_NIL): New macro.
377 (CGEN_OPERAND): New member `type'.
378 (@arch@_cgen_operand_table): Delete decl.
379 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
380 (CGEN_OPERAND_TABLE): New struct.
381 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
382 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
383 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
384 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
385 {get,set}_{int,vma}_operand.
386 (@arch@_cgen_cpu_open): New arg `isa'.
387 (cgen_set_cpu): Ditto.
388
389 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
390
391 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
392
393 1999-02-25 Doug Evans <devans@casey.cygnus.com>
394
395 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
396 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
397 enum cgen_hw_type.
398 (CGEN_HW_TABLE): New struct.
399 (hw_table): Delete declaration.
400 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
401 to table entry to enum.
402 (CGEN_OPINST): Ditto.
403 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
404
405 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
406
407 * alpha.h (AXP_OPCODE_EV6): New.
408 (AXP_OPCODE_NOPAL): Include it.
409
410 1999-02-09 Doug Evans <devans@casey.cygnus.com>
411
412 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
413 All uses updated. New members int_insn_p, max_insn_size,
414 parse_operand,insert_operand,extract_operand,print_operand,
415 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
416 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
417 extract_handlers,print_handlers.
418 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
419 (CGEN_ATTR_BOOL_OFFSET): New macro.
420 (CGEN_ATTR_MASK): Subtract it to compute bit number.
421 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
422 (cgen_opcode_handler): Renamed from cgen_base.
423 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
424 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
425 all uses updated.
426 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
427 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
428 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
429 (CGEN_OPCODE,CGEN_IBASE): New types.
430 (CGEN_INSN): Rewrite.
431 (CGEN_{ASM,DIS}_HASH*): Delete.
432 (init_opcode_table,init_ibld_table): Declare.
433 (CGEN_INSN_ATTR): New type.
434
435 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
436
437 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
438 (x_FP, d_FP, dls_FP, sldx_FP): Define.
439 Change *Suf definitions to include x and d suffixes.
440 (movsx): Use w_Suf and b_Suf.
441 (movzx): Likewise.
442 (movs): Use bwld_Suf.
443 (fld): Change ordering. Use sld_FP.
444 (fild): Add Intel Syntax equivalent of fildq.
445 (fst): Use sld_FP.
446 (fist): Use sld_FP.
447 (fstp): Use sld_FP. Add x_FP version.
448 (fistp): LLongMem version for Intel Syntax.
449 (fcom, fcomp): Use sld_FP.
450 (fadd, fiadd, fsub): Use sld_FP.
451 (fsubr): Use sld_FP.
452 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
453
454 1999-01-27 Doug Evans <devans@casey.cygnus.com>
455
456 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
457 CGEN_MODE_UINT.
458
459 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
460
461 * hppa.h (bv): Fix mask.
462
463 1999-01-05 Doug Evans <devans@casey.cygnus.com>
464
465 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
466 (CGEN_ATTR): Use it.
467 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
468 (CGEN_ATTR_TABLE): New member dfault.
469
470 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
471
472 * mips.h (MIPS16_INSN_BRANCH): New.
473
474 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
475
476 The following is part of a change made by Edith Epstein
477 <eepstein@sophia.cygnus.com> as part of a project to merge in
478 changes by HP; HP did not create ChangeLog entries.
479
480 * hppa.h (completer_chars): list of chars to not put a space
481 after.
482
483 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
484
485 * i386.h (i386_optab): Permit w suffix on processor control and
486 status word instructions.
487
488 1998-11-30 Doug Evans <devans@casey.cygnus.com>
489
490 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
491 (struct cgen_keyword_entry): Ditto.
492 (struct cgen_operand): Ditto.
493 (CGEN_IFLD): New typedef, with associated access macros.
494 (CGEN_IFMT): New typedef, with associated access macros.
495 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
496 (CGEN_IVALUE): New typedef.
497 (struct cgen_insn): Delete const on syntax,attrs members.
498 `format' now points to format data. Type of `value' is now
499 CGEN_IVALUE.
500 (struct cgen_opcode_table): New member ifld_table.
501
502 1998-11-18 Doug Evans <devans@casey.cygnus.com>
503
504 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
505 (CGEN_OPERAND_INSTANCE): New member `attrs'.
506 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
507 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
508 (cgen_opcode_table): Update type of dis_hash fn.
509 (extract_operand): Update type of `insn_value' arg.
510
511 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
512
513 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
514
515 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
516
517 * mips.h (INSN_MULT): Added.
518
519 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
520
521 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
522
523 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
524
525 * cgen.h (CGEN_INSN_INT): New typedef.
526 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
527 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
528 (CGEN_INSN_BYTES_PTR): New typedef.
529 (CGEN_EXTRACT_INFO): New typedef.
530 (cgen_insert_fn,cgen_extract_fn): Update.
531 (cgen_opcode_table): New member `insn_endian'.
532 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
533 (insert_operand,extract_operand): Update.
534 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
535
536 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
537
538 * cgen.h (CGEN_ATTR_BOOLS): New macro.
539 (struct CGEN_HW_ENTRY): New member `attrs'.
540 (CGEN_HW_ATTR): New macro.
541 (struct CGEN_OPERAND_INSTANCE): New member `name'.
542 (CGEN_INSN_INVALID_P): New macro.
543
544 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
545
546 * hppa.h: Add "fid".
547
548 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
549
550 From Robert Andrew Dale <rob@nb.net>
551 * i386.h (i386_optab): Add AMD 3DNow! instructions.
552 (AMD_3DNOW_OPCODE): Define.
553
554 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
555
556 * d30v.h (EITHER_BUT_PREFER_MU): Define.
557
558 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
559
560 * cgen.h (cgen_insn): #if 0 out element `cdx'.
561
562 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
563
564 Move all global state data into opcode table struct, and treat
565 opcode table as something that is "opened/closed".
566 * cgen.h (CGEN_OPCODE_DESC): New type.
567 (all fns): New first arg of opcode table descriptor.
568 (cgen_set_parse_operand_fn): Add prototype.
569 (cgen_current_machine,cgen_current_endian): Delete.
570 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
571 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
572 dis_hash_table,dis_hash_table_entries.
573 (opcode_open,opcode_close): Add prototypes.
574
575 * cgen.h (cgen_insn): New element `cdx'.
576
577 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
578
579 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
580
581 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
582
583 * mn10300.h: Add "no_match_operands" field for instructions.
584 (MN10300_MAX_OPERANDS): Define.
585
586 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
587
588 * cgen.h (cgen_macro_insn_count): Declare.
589
590 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
591
592 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
593 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
594 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
595 set_{int,vma}_operand.
596
597 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
598
599 * mn10300.h: Add "machine" field for instructions.
600 (MN103, AM30): Define machine types.
601
602 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
603
604 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
605
606 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
607
608 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
609
610 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
611
612 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
613 and ud2b.
614 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
615 those that happen to be implemented on pentiums.
616
617 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
618
619 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
620 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
621 with Size16|IgnoreSize or Size32|IgnoreSize.
622
623 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
624
625 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
626 (REPE): Rename to REPE_PREFIX_OPCODE.
627 (i386_regtab_end): Remove.
628 (i386_prefixtab, i386_prefixtab_end): Remove.
629 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
630 of md_begin.
631 (MAX_OPCODE_SIZE): Define.
632 (i386_optab_end): Remove.
633 (sl_Suf): Define.
634 (sl_FP): Use sl_Suf.
635
636 * i386.h (i386_optab): Allow 16 bit displacement for `mov
637 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
638 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
639 data32, dword, and adword prefixes.
640 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
641 regs.
642
643 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
644
645 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
646
647 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
648 register operands, because this is a common idiom. Flag them with
649 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
650 fdivrp because gcc erroneously generates them. Also flag with a
651 warning.
652
653 * i386.h: Add suffix modifiers to most insns, and tighter operand
654 checks in some cases. Fix a number of UnixWare compatibility
655 issues with float insns. Merge some floating point opcodes, using
656 new FloatMF modifier.
657 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
658 consistency.
659
660 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
661 IgnoreDataSize where appropriate.
662
663 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
664
665 * i386.h: (one_byte_segment_defaults): Remove.
666 (two_byte_segment_defaults): Remove.
667 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
668
669 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
670
671 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
672 (cgen_hw_lookup_by_num): Declare.
673
674 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
675
676 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
677 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
678
679 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
680
681 * cgen.h (cgen_asm_init_parse): Delete.
682 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
683 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
684
685 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
686
687 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
688 (cgen_asm_finish_insn): Update prototype.
689 (cgen_insn): New members num, data.
690 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
691 dis_hash, dis_hash_table_size moved to ...
692 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
693 All uses updated. New members asm_hash_p, dis_hash_p.
694 (CGEN_MINSN_EXPANSION): New struct.
695 (cgen_expand_macro_insn): Declare.
696 (cgen_macro_insn_count): Declare.
697 (get_insn_operands): Update prototype.
698 (lookup_get_insn_operands): Declare.
699
700 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
701
702 * i386.h (i386_optab): Change iclrKludge and imulKludge to
703 regKludge. Add operands types for string instructions.
704
705 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
706
707 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
708 table.
709
710 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
711
712 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
713 for `gettext'.
714
715 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h: Remove NoModrm flag from all insns: it's never checked.
718 Add IsString flag to string instructions.
719 (IS_STRING): Don't define.
720 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
721 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
722 (SS_PREFIX_OPCODE): Define.
723
724 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
725
726 * i386.h: Revert March 24 patch; no more LinearAddress.
727
728 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
729
730 * i386.h (i386_optab): Remove fwait (9b) from all floating point
731 instructions, and instead add FWait opcode modifier. Add short
732 form of fldenv and fstenv.
733 (FWAIT_OPCODE): Define.
734
735 * i386.h (i386_optab): Change second operand constraint of `mov
736 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
737 allow legal instructions such as `movl %gs,%esi'
738
739 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
740
741 * h8300.h: Various changes to fully bracket initializers.
742
743 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
744
745 * i386.h: Set LinearAddress for lidt and lgdt.
746
747 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
748
749 * cgen.h (CGEN_BOOL_ATTR): New macro.
750
751 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
752
753 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
754
755 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
756
757 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
758 (cgen_insn): Record syntax and format entries here, rather than
759 separately.
760
761 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
762
763 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
764
765 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
766
767 * cgen.h (cgen_insert_fn): Change type of result to const char *.
768 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
769 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
770
771 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
772
773 * cgen.h (lookup_insn): New argument alias_p.
774
775 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
776
777 Fix rac to accept only a0:
778 * d10v.h (OPERAND_ACC): Split into:
779 (OPERAND_ACC0, OPERAND_ACC1) .
780 (OPERAND_GPR): Define.
781
782 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
783
784 * cgen.h (CGEN_FIELDS): Define here.
785 (CGEN_HW_ENTRY): New member `type'.
786 (hw_list): Delete decl.
787 (enum cgen_mode): Declare.
788 (CGEN_OPERAND): New member `hw'.
789 (enum cgen_operand_instance_type): Declare.
790 (CGEN_OPERAND_INSTANCE): New type.
791 (CGEN_INSN): New member `operands'.
792 (CGEN_OPCODE_DATA): Make hw_list const.
793 (get_insn_operands,lookup_insn): Add prototypes for.
794
795 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
796
797 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
798 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
799 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
800 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
801
802 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
803
804 * cgen.h: Correct typo in comment end marker.
805
806 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
807
808 * tic30.h: New file.
809
810 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
811
812 * cgen.h: Add prototypes for cgen_save_fixups(),
813 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
814 of cgen_asm_finish_insn() to return a char *.
815
816 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
817
818 * cgen.h: Formatting changes to improve readability.
819
820 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
821
822 * cgen.h (*): Clean up pass over `struct foo' usage.
823 (CGEN_ATTR): Make unsigned char.
824 (CGEN_ATTR_TYPE): Update.
825 (CGEN_ATTR_{ENTRY,TABLE}): New types.
826 (cgen_base): Move member `attrs' to cgen_insn.
827 (CGEN_KEYWORD): New member `null_entry'.
828 (CGEN_{SYNTAX,FORMAT}): New types.
829 (cgen_insn): Format and syntax separated from each other.
830
831 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
832
833 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
834 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
835 flags_{used,set} long.
836 (d30v_operand): Make flags field long.
837
838 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
839
840 * m68k.h: Fix comment describing operand types.
841
842 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
843
844 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
845 everything else after down.
846
847 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
848
849 * d10v.h (OPERAND_FLAG): Split into:
850 (OPERAND_FFLAG, OPERAND_CFLAG) .
851
852 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
853
854 * mips.h (struct mips_opcode): Changed comments to reflect new
855 field usage.
856
857 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
858
859 * mips.h: Added to comments a quick-ref list of all assigned
860 operand type characters.
861 (OP_{MASK,SH}_PERFREG): New macros.
862
863 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
864
865 * sparc.h: Add '_' and '/' for v9a asr's.
866 Patch from David Miller <davem@vger.rutgers.edu>
867
868 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
869
870 * h8300.h: Bit ops with absolute addresses not in the 8 bit
871 area are not available in the base model (H8/300).
872
873 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
874
875 * m68k.h: Remove documentation of ` operand specifier.
876
877 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
878
879 * m68k.h: Document q and v operand specifiers.
880
881 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
882
883 * v850.h (struct v850_opcode): Add processors field.
884 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
885 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
886 (PROCESSOR_V850EA): New bit constants.
887
888 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
889
890 Merge changes from Martin Hunt:
891
892 * d30v.h: Allow up to 64 control registers. Add
893 SHORT_A5S format.
894
895 * d30v.h (LONG_Db): New form for delayed branches.
896
897 * d30v.h: (LONG_Db): New form for repeati.
898
899 * d30v.h (SHORT_D2B): New form.
900
901 * d30v.h (SHORT_A2): New form.
902
903 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
904 registers are used. Needed for VLIW optimization.
905
906 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
907
908 * cgen.h: Move assembler interface section
909 up so cgen_parse_operand_result is defined for cgen_parse_address.
910 (cgen_parse_address): Update prototype.
911
912 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
913
914 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
915
916 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
917
918 * i386.h (two_byte_segment_defaults): Correct base register 5 in
919 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
920 <paubert@iram.es>.
921
922 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
923 <paubert@iram.es>.
924
925 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
926 <paubert@iram.es>.
927
928 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
929 (JUMP_ON_ECX_ZERO): Remove commented out macro.
930
931 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
932
933 * v850.h (V850_NOT_R0): New flag.
934
935 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
936
937 * v850.h (struct v850_opcode): Remove flags field.
938
939 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
940
941 * v850.h (struct v850_opcode): Add flags field.
942 (struct v850_operand): Extend meaning of 'bits' and 'shift'
943 fields.
944 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
945 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
946
947 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
948
949 * arc.h: New file.
950
951 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
952
953 * sparc.h (sparc_opcodes): Declare as const.
954
955 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
956
957 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
958 uses single or double precision floating point resources.
959 (INSN_NO_ISA, INSN_ISA1): Define.
960 (cpu specific INSN macros): Tweak into bitmasks outside the range
961 of INSN_ISA field.
962
963 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
964
965 * i386.h: Fix pand opcode.
966
967 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
968
969 * mips.h: Widen INSN_ISA and move it to a more convenient
970 bit position. Add INSN_3900.
971
972 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
973
974 * mips.h (struct mips_opcode): added new field membership.
975
976 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
977
978 * i386.h (movd): only Reg32 is allowed.
979
980 * i386.h: add fcomp and ud2. From Wayne Scott
981 <wscott@ichips.intel.com>.
982
983 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
984
985 * i386.h: Add MMX instructions.
986
987 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
988
989 * i386.h: Remove W modifier from conditional move instructions.
990
991 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
992
993 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
994 with no arguments to match that generated by the UnixWare
995 assembler.
996
997 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
998
999 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1000 (cgen_parse_operand_fn): Declare.
1001 (cgen_init_parse_operand): Declare.
1002 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1003 new argument `want'.
1004 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1005 (enum cgen_parse_operand_type): New enum.
1006
1007 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1008
1009 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1010
1011 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1012
1013 * cgen.h: New file.
1014
1015 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1016
1017 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1018 fdivrp.
1019
1020 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1021
1022 * v850.h (extract): Make unsigned.
1023
1024 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1025
1026 * i386.h: Add iclr.
1027
1028 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1029
1030 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1031 take a direction bit.
1032
1033 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1034
1035 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1036
1037 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1038
1039 * sparc.h: Include <ansidecl.h>. Update function declarations to
1040 use prototypes, and to use const when appropriate.
1041
1042 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1043
1044 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1045
1046 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1047
1048 * d10v.h: Change pre_defined_registers to
1049 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1050
1051 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1052
1053 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1054 Change mips_opcodes from const array to a pointer,
1055 and change bfd_mips_num_opcodes from const int to int,
1056 so that we can increase the size of the mips opcodes table
1057 dynamically.
1058
1059 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1060
1061 * d30v.h (FLAG_X): Remove unused flag.
1062
1063 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1064
1065 * d30v.h: New file.
1066
1067 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1068
1069 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1070 (PDS_VALUE): Macro to access value field of predefined symbols.
1071 (tic80_next_predefined_symbol): Add prototype.
1072
1073 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1074
1075 * tic80.h (tic80_symbol_to_value): Change prototype to match
1076 change in function, added class parameter.
1077
1078 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1079
1080 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1081 endmask fields, which are somewhat weird in that 0 and 32 are
1082 treated exactly the same.
1083
1084 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1085
1086 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1087 rather than a constant that is 2**X. Reorder them to put bits for
1088 operands that have symbolic names in the upper bits, so they can
1089 be packed into an int where the lower bits contain the value that
1090 corresponds to that symbolic name.
1091 (predefined_symbo): Add struct.
1092 (tic80_predefined_symbols): Declare array of translations.
1093 (tic80_num_predefined_symbols): Declare size of that array.
1094 (tic80_value_to_symbol): Declare function.
1095 (tic80_symbol_to_value): Declare function.
1096
1097 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1098
1099 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1100
1101 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1102
1103 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1104 be the destination register.
1105
1106 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1107
1108 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1109 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1110 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1111 that the opcode can have two vector instructions in a single
1112 32 bit word and we have to encode/decode both.
1113
1114 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1115
1116 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1117 TIC80_OPERAND_RELATIVE for PC relative.
1118 (TIC80_OPERAND_BASEREL): New flag bit for register
1119 base relative.
1120
1121 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1122
1123 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1124
1125 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1126
1127 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1128 ":s" modifier for scaling.
1129
1130 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1131
1132 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1133 (TIC80_OPERAND_M_LI): Ditto
1134
1135 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1136
1137 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1138 (TIC80_OPERAND_CC): New define for condition code operand.
1139 (TIC80_OPERAND_CR): New define for control register operand.
1140
1141 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1142
1143 * tic80.h (struct tic80_opcode): Name changed.
1144 (struct tic80_opcode): Remove format field.
1145 (struct tic80_operand): Add insertion and extraction functions.
1146 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1147 correct ones.
1148 (FMT_*): Ditto.
1149
1150 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1151
1152 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1153 type IV instruction offsets.
1154
1155 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1156
1157 * tic80.h: New file.
1158
1159 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1160
1161 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1162
1163 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1164
1165 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1166 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1167 * v850.h: Fix comment, v850_operand not powerpc_operand.
1168
1169 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1170
1171 * mn10200.h: Flesh out structures and definitions needed by
1172 the mn10200 assembler & disassembler.
1173
1174 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1175
1176 * mips.h: Add mips16 definitions.
1177
1178 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1179
1180 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1181
1182 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1183
1184 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1185 (MN10300_OPERAND_MEMADDR): Define.
1186
1187 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1188
1189 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1190
1191 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1192
1193 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1194
1195 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1196
1197 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1198
1199 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1200
1201 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1202
1203 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1204
1205 * alpha.h: Don't include "bfd.h"; private relocation types are now
1206 negative to minimize problems with shared libraries. Organize
1207 instruction subsets by AMASK extensions and PALcode
1208 implementation.
1209 (struct alpha_operand): Move flags slot for better packing.
1210
1211 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1212
1213 * v850.h (V850_OPERAND_RELAX): New operand flag.
1214
1215 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1216
1217 * mn10300.h (FMT_*): Move operand format definitions
1218 here.
1219
1220 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1221
1222 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1223
1224 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1225
1226 * mn10300.h (mn10300_opcode): Add "format" field.
1227 (MN10300_OPERAND_*): Define.
1228
1229 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1230
1231 * mn10x00.h: Delete.
1232 * mn10200.h, mn10300.h: New files.
1233
1234 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1235
1236 * mn10x00.h: New file.
1237
1238 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1239
1240 * v850.h: Add new flag to indicate this instruction uses a PC
1241 displacement.
1242
1243 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1244
1245 * h8300.h (stmac): Add missing instruction.
1246
1247 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1248
1249 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1250 field.
1251
1252 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1253
1254 * v850.h (V850_OPERAND_EP): Define.
1255
1256 * v850.h (v850_opcode): Add size field.
1257
1258 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1259
1260 * v850.h (v850_operands): Add insert and extract fields, pointers
1261 to functions used to handle unusual operand encoding.
1262 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1263 V850_OPERAND_SIGNED): Defined.
1264
1265 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1266
1267 * v850.h (v850_operands): Add flags field.
1268 (OPERAND_REG, OPERAND_NUM): Defined.
1269
1270 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1271
1272 * v850.h: New file.
1273
1274 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1275
1276 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1277 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1278 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1279 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1280 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1281 Defined.
1282
1283 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1286 a 3 bit space id instead of a 2 bit space id.
1287
1288 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1289
1290 * d10v.h: Add some additional defines to support the
1291 assembler in determining which operations can be done in parallel.
1292
1293 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1294
1295 * h8300.h (SN): Define.
1296 (eepmov.b): Renamed from "eepmov"
1297 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1298 with them.
1299
1300 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1301
1302 * d10v.h (OPERAND_SHIFT): New operand flag.
1303
1304 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1305
1306 * d10v.h: Changes for divs, parallel-only instructions, and
1307 signed numbers.
1308
1309 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1310
1311 * d10v.h (pd_reg): Define. Putting the definition here allows
1312 the assembler and disassembler to share the same struct.
1313
1314 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1315
1316 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1317 Williams <steve@icarus.com>.
1318
1319 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1320
1321 * d10v.h: New file.
1322
1323 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1324
1325 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1326
1327 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1328
1329 * m68k.h (mcf5200): New macro.
1330 Document names of coldfire control registers.
1331
1332 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1333
1334 * h8300.h (SRC_IN_DST): Define.
1335
1336 * h8300.h (UNOP3): Mark the register operand in this insn
1337 as a source operand, not a destination operand.
1338 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1339 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1340 register operand with SRC_IN_DST.
1341
1342 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1343
1344 * alpha.h: New file.
1345
1346 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1347
1348 * rs6k.h: Remove obsolete file.
1349
1350 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1351
1352 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1353 fdivp, and fdivrp. Add ffreep.
1354
1355 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1356
1357 * h8300.h: Reorder various #defines for readability.
1358 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1359 (BITOP): Accept additional (unused) argument. All callers changed.
1360 (EBITOP): Likewise.
1361 (O_LAST): Bump.
1362 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1363
1364 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1365 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1366 (BITOP, EBITOP): Handle new H8/S addressing modes for
1367 bit insns.
1368 (UNOP3): Handle new shift/rotate insns on the H8/S.
1369 (insns using exr): New instructions.
1370 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1371
1372 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1373
1374 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1375 was incorrect.
1376
1377 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1378
1379 * h8300.h (START): Remove.
1380 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1381 and mov.l insns that can be relaxed.
1382
1383 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1384
1385 * i386.h: Remove Abs32 from lcall.
1386
1387 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1388
1389 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1390 (SLCPOP): New macro.
1391 Mark X,Y opcode letters as in use.
1392
1393 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1394
1395 * sparc.h (F_FLOAT, F_FBR): Define.
1396
1397 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1398
1399 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1400 from all insns.
1401 (ABS8SRC,ABS8DST): Add ABS8MEM.
1402 (add.l): Fix reg+reg variant.
1403 (eepmov.w): Renamed from eepmovw.
1404 (ldc,stc): Fix many cases.
1405
1406 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1407
1408 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1409
1410 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1411
1412 * sparc.h (O): Mark operand letter as in use.
1413
1414 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1415
1416 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1417 Mark operand letters uU as in use.
1418
1419 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1420
1421 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1422 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1423 (SPARC_OPCODE_SUPPORTED): New macro.
1424 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1425 (F_NOTV9): Delete.
1426
1427 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1428
1429 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1430 declaration consistent with return type in definition.
1431
1432 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1433
1434 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1435
1436 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1437
1438 * i386.h (i386_regtab): Add 80486 test registers.
1439
1440 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1441
1442 * i960.h (I_HX): Define.
1443 (i960_opcodes): Add HX instruction.
1444
1445 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1446
1447 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1448 and fclex.
1449
1450 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1451
1452 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1453 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1454 (bfd_* defines): Delete.
1455 (sparc_opcode_archs): Replaces architecture_pname.
1456 (sparc_opcode_lookup_arch): Declare.
1457 (NUMOPCODES): Delete.
1458
1459 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1460
1461 * sparc.h (enum sparc_architecture): Add v9a.
1462 (ARCHITECTURES_CONFLICT_P): Update.
1463
1464 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1465
1466 * i386.h: Added Pentium Pro instructions.
1467
1468 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1469
1470 * m68k.h: Document new 'W' operand place.
1471
1472 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1473
1474 * hppa.h: Add lci and syncdma instructions.
1475
1476 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1477
1478 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1479 instructions.
1480
1481 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1482
1483 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1484 assembler's -mcom and -many switches.
1485
1486 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1487
1488 * i386.h: Fix cmpxchg8b extension opcode description.
1489
1490 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1491
1492 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1493 and register cr4.
1494
1495 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1496
1497 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1498
1499 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1500
1501 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1502
1503 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1504
1505 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1506
1507 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1508
1509 * m68kmri.h: Remove.
1510
1511 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1512 declarations. Remove F_ALIAS and flag field of struct
1513 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1514 int. Make name and args fields of struct m68k_opcode const.
1515
1516 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1517
1518 * sparc.h (F_NOTV9): Define.
1519
1520 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1521
1522 * mips.h (INSN_4010): Define.
1523
1524 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1525
1526 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1527
1528 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1529 * m68k.h: Fix argument descriptions of coprocessor
1530 instructions to allow only alterable operands where appropriate.
1531 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1532 (m68k_opcode_aliases): Add more aliases.
1533
1534 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1535
1536 * m68k.h: Added explcitly short-sized conditional branches, and a
1537 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1538 svr4-based configurations.
1539
1540 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1541
1542 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1543 * i386.h: added missing Data16/Data32 flags to a few instructions.
1544
1545 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1546
1547 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1548 (OP_MASK_BCC, OP_SH_BCC): Define.
1549 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1550 (OP_MASK_CCC, OP_SH_CCC): Define.
1551 (INSN_READ_FPR_R): Define.
1552 (INSN_RFE): Delete.
1553
1554 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1555
1556 * m68k.h (enum m68k_architecture): Deleted.
1557 (struct m68k_opcode_alias): New type.
1558 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1559 matching constraints, values and flags. As a side effect of this,
1560 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1561 as I know were never used, now may need re-examining.
1562 (numopcodes): Now const.
1563 (m68k_opcode_aliases, numaliases): New variables.
1564 (endop): Deleted.
1565 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1566 m68k_opcode_aliases; update declaration of m68k_opcodes.
1567
1568 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1569
1570 * hppa.h (delay_type): Delete unused enumeration.
1571 (pa_opcode): Replace unused delayed field with an architecture
1572 field.
1573 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1574
1575 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1576
1577 * mips.h (INSN_ISA4): Define.
1578
1579 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1580
1581 * mips.h (M_DLA_AB, M_DLI): Define.
1582
1583 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1584
1585 * hppa.h (fstwx): Fix single-bit error.
1586
1587 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1588
1589 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1590
1591 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1592
1593 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1594 debug registers. From Charles Hannum (mycroft@netbsd.org).
1595
1596 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1597
1598 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1599 i386 support:
1600 * i386.h (MOV_AX_DISP32): New macro.
1601 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1602 of several call/return instructions.
1603 (ADDR_PREFIX_OPCODE): New macro.
1604
1605 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1606
1607 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1608
1609 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1610 it pointer to const char;
1611 (struct vot, field `name'): ditto.
1612
1613 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1614
1615 * vax.h: Supply and properly group all values in end sentinel.
1616
1617 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1618
1619 * mips.h (INSN_ISA, INSN_4650): Define.
1620
1621 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1622
1623 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1624 systems with a separate instruction and data cache, such as the
1625 29040, these instructions take an optional argument.
1626
1627 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1628
1629 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1630 INSN_TRAP.
1631
1632 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1633
1634 * mips.h (INSN_STORE_MEMORY): Define.
1635
1636 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1637
1638 * sparc.h: Document new operand type 'x'.
1639
1640 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1641
1642 * i960.h (I_CX2): New instruction category. It includes
1643 instructions available on Cx and Jx processors.
1644 (I_JX): New instruction category, for JX-only instructions.
1645 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1646 Jx-only instructions, in I_JX category.
1647
1648 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1649
1650 * ns32k.h (endop): Made pointer const too.
1651
1652 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1653
1654 * ns32k.h: Drop Q operand type as there is no correct use
1655 for it. Add I and Z operand types which allow better checking.
1656
1657 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1658
1659 * h8300.h (xor.l) :fix bit pattern.
1660 (L_2): New size of operand.
1661 (trapa): Use it.
1662
1663 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1664
1665 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1666
1667 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1668
1669 * sparc.h: Include v9 definitions.
1670
1671 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1672
1673 * m68k.h (m68060): Defined.
1674 (m68040up, mfloat, mmmu): Include it.
1675 (struct m68k_opcode): Widen `arch' field.
1676 (m68k_opcodes): Updated for M68060. Removed comments that were
1677 instructions commented out by "JF" years ago.
1678
1679 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1680
1681 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1682 add a one-bit `flags' field.
1683 (F_ALIAS): New macro.
1684
1685 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1686
1687 * h8300.h (dec, inc): Get encoding right.
1688
1689 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1690
1691 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1692 a flag instead.
1693 (PPC_OPERAND_SIGNED): Define.
1694 (PPC_OPERAND_SIGNOPT): Define.
1695
1696 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1697
1698 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1699 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1700
1701 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1702
1703 * i386.h: Reverse last change. It'll be handled in gas instead.
1704
1705 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1706
1707 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1708 slower on the 486 and used the implicit shift count despite the
1709 explicit operand. The one-operand form is still available to get
1710 the shorter form with the implicit shift count.
1711
1712 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1713
1714 * hppa.h: Fix typo in fstws arg string.
1715
1716 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1717
1718 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1719
1720 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1721
1722 * ppc.h (PPC_OPCODE_601): Define.
1723
1724 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1725
1726 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1727 (so we can determine valid completers for both addb and addb[tf].)
1728
1729 * hppa.h (xmpyu): No floating point format specifier for the
1730 xmpyu instruction.
1731
1732 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1733
1734 * ppc.h (PPC_OPERAND_NEXT): Define.
1735 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1736 (struct powerpc_macro): Define.
1737 (powerpc_macros, powerpc_num_macros): Declare.
1738
1739 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1740
1741 * ppc.h: New file. Header file for PowerPC opcode table.
1742
1743 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1744
1745 * hppa.h: More minor template fixes for sfu and copr (to allow
1746 for easier disassembly).
1747
1748 * hppa.h: Fix templates for all the sfu and copr instructions.
1749
1750 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1751
1752 * i386.h (push): Permit Imm16 operand too.
1753
1754 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1755
1756 * h8300.h (andc): Exists in base arch.
1757
1758 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1759
1760 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1761 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1762
1763 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1764
1765 * hppa.h: Add FP quadword store instructions.
1766
1767 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1768
1769 * mips.h: (M_J_A): Added.
1770 (M_LA): Removed.
1771
1772 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1773
1774 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1775 <mellon@pepper.ncd.com>.
1776
1777 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1778
1779 * hppa.h: Immediate field in probei instructions is unsigned,
1780 not low-sign extended.
1781
1782 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1783
1784 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1785
1786 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1787
1788 * i386.h: Add "fxch" without operand.
1789
1790 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1791
1792 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1793
1794 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1795
1796 * hppa.h: Add gfw and gfr to the opcode table.
1797
1798 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1799
1800 * m88k.h: extended to handle m88110.
1801
1802 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1803
1804 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1805 addresses.
1806
1807 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1808
1809 * i960.h (i960_opcodes): Properly bracket initializers.
1810
1811 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1812
1813 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1814
1815 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1816
1817 * m68k.h (two): Protect second argument with parentheses.
1818
1819 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1820
1821 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1822 Deleted old in/out instructions in "#if 0" section.
1823
1824 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1825
1826 * i386.h (i386_optab): Properly bracket initializers.
1827
1828 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1829
1830 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1831 Jeff Law, law@cs.utah.edu).
1832
1833 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1834
1835 * i386.h (lcall): Accept Imm32 operand also.
1836
1837 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1838
1839 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1840 (M_DABS): Added.
1841
1842 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1843
1844 * mips.h (INSN_*): Changed values. Removed unused definitions.
1845 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1846 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1847 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1848 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1849 (M_*): Added new values for r6000 and r4000 macros.
1850 (ANY_DELAY): Removed.
1851
1852 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1853
1854 * mips.h: Added M_LI_S and M_LI_SS.
1855
1856 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1857
1858 * h8300.h: Get some rare mov.bs correct.
1859
1860 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1861
1862 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1863 been included.
1864
1865 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1866
1867 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1868 jump instructions, for use in disassemblers.
1869
1870 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1871
1872 * m88k.h: Make bitfields just unsigned, not unsigned long or
1873 unsigned short.
1874
1875 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1876
1877 * hppa.h: New argument type 'y'. Use in various float instructions.
1878
1879 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1880
1881 * hppa.h (break): First immediate field is unsigned.
1882
1883 * hppa.h: Add rfir instruction.
1884
1885 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1886
1887 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1888
1889 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1890
1891 * mips.h: Reworked the hazard information somewhat, and fixed some
1892 bugs in the instruction hazard descriptions.
1893
1894 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1895
1896 * m88k.h: Corrected a couple of opcodes.
1897
1898 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1899
1900 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1901 new version includes instruction hazard information, but is
1902 otherwise reasonably similar.
1903
1904 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1905
1906 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1907
1908 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1909
1910 Patches from Jeff Law, law@cs.utah.edu:
1911 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1912 Make the tables be the same for the following instructions:
1913 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1914 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1915 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1916 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1917 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1918 "fcmp", and "ftest".
1919
1920 * hppa.h: Make new and old tables the same for "break", "mtctl",
1921 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1922 Fix typo in last patch. Collapse several #ifdefs into a
1923 single #ifdef.
1924
1925 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1926 of the comments up-to-date.
1927
1928 * hppa.h: Update "free list" of letters and update
1929 comments describing each letter's function.
1930
1931 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1932
1933 * h8300.h: checkpoint, includes H8/300-H opcodes.
1934
1935 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1936
1937 * Patches from Jeffrey Law <law@cs.utah.edu>.
1938 * hppa.h: Rework single precision FP
1939 instructions so that they correctly disassemble code
1940 PA1.1 code.
1941
1942 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1943
1944 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1945 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1946
1947 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1948
1949 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1950 gdb will define it for now.
1951
1952 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1953
1954 * sparc.h: Don't end enumerator list with comma.
1955
1956 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1957
1958 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1959 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1960 ("bc2t"): Correct typo.
1961 ("[ls]wc[023]"): Use T rather than t.
1962 ("c[0123]"): Define general coprocessor instructions.
1963
1964 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1965
1966 * m68k.h: Move split point for gcc compilation more towards
1967 middle.
1968
1969 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1970
1971 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1972 simply wrong, ics, rfi, & rfsvc were missing).
1973 Add "a" to opr_ext for "bb". Doc fix.
1974
1975 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1976
1977 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1978 * mips.h: Add casts, to suppress warnings about shifting too much.
1979 * m68k.h: Document the placement code '9'.
1980
1981 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1982
1983 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1984 allows callers to break up the large initialized struct full of
1985 opcodes into two half-sized ones. This permits GCC to compile
1986 this module, since it takes exponential space for initializers.
1987 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1988
1989 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1990
1991 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1992 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1993 initialized structs in it.
1994
1995 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1996
1997 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1998 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1999 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2000
2001 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2002
2003 * mips.h: document "i" and "j" operands correctly.
2004
2005 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2006
2007 * mips.h: Removed endianness dependency.
2008
2009 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2010
2011 * h8300.h: include info on number of cycles per instruction.
2012
2013 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2014
2015 * hppa.h: Move handy aliases to the front. Fix masks for extract
2016 and deposit instructions.
2017
2018 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2019
2020 * i386.h: accept shld and shrd both with and without the shift
2021 count argument, which is always %cl.
2022
2023 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2024
2025 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2026 (one_byte_segment_defaults, two_byte_segment_defaults,
2027 i386_prefixtab_end): Ditto.
2028
2029 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2030
2031 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2032 for operand 2; from John Carr, jfc@dsg.dec.com.
2033
2034 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2035
2036 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2037 always use 16-bit offsets. Makes calculated-size jump tables
2038 feasible.
2039
2040 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2041
2042 * i386.h: Fix one-operand forms of in* and out* patterns.
2043
2044 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2045
2046 * m68k.h: Added CPU32 support.
2047
2048 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2049
2050 * mips.h (break): Disassemble the argument. Patch from
2051 jonathan@cs.stanford.edu (Jonathan Stone).
2052
2053 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2054
2055 * m68k.h: merged Motorola and MIT syntax.
2056
2057 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2058
2059 * m68k.h (pmove): make the tests less strict, the 68k book is
2060 wrong.
2061
2062 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2063
2064 * m68k.h (m68ec030): Defined as alias for 68030.
2065 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2066 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2067 them. Tightened description of "fmovex" to distinguish it from
2068 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2069 up descriptions that claimed versions were available for chips not
2070 supporting them. Added "pmovefd".
2071
2072 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2073
2074 * m68k.h: fix where the . goes in divull
2075
2076 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2077
2078 * m68k.h: the cas2 instruction is supposed to be written with
2079 indirection on the last two operands, which can be either data or
2080 address registers. Added a new operand type 'r' which accepts
2081 either register type. Added new cases for cas2l and cas2w which
2082 use them. Corrected masks for cas2 which failed to recognize use
2083 of address register.
2084
2085 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2086
2087 * m68k.h: Merged in patches (mostly m68040-specific) from
2088 Colin Smith <colin@wrs.com>.
2089
2090 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2091 base). Also cleaned up duplicates, re-ordered instructions for
2092 the sake of dis-assembling (so aliases come after standard names).
2093 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2094
2095 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2096
2097 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2098 all missing .s
2099
2100 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2101
2102 * sparc.h: Moved tables to BFD library.
2103
2104 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2105
2106 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2107
2108 * h8300.h: Finish filling in all the holes in the opcode table,
2109 so that the Lucid C compiler can digest this as well...
2110
2111 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2112
2113 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2114 Fix opcodes on various sizes of fild/fist instructions
2115 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2116 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2117
2118 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2119
2120 * h8300.h: Fill in all the holes in the opcode table so that the
2121 losing HPUX C compiler can digest this...
2122
2123 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2124
2125 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2126 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2127
2128 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2129
2130 * sparc.h: Add new architecture variant sparclite; add its scan
2131 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2132
2133 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2134
2135 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2136 fy@lucid.com).
2137
2138 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2139
2140 * rs6k.h: New version from IBM (Metin).
2141
2142 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2143
2144 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2145 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2146
2147 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2148
2149 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2150
2151 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2152
2153 * m68k.h (one, two): Cast macro args to unsigned to suppress
2154 complaints from compiler and lint about integer overflow during
2155 shift.
2156
2157 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2158
2159 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2160
2161 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2162
2163 * mips.h: Make bitfield layout depend on the HOST compiler,
2164 not on the TARGET system.
2165
2166 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2167
2168 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2169 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2170 <TRANLE@INTELLICORP.COM>.
2171
2172 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2173
2174 * h8300.h: turned op_type enum into #define list
2175
2176 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2177
2178 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2179 similar instructions -- they've been renamed to "fitoq", etc.
2180 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2181 number of arguments.
2182 * h8300.h: Remove extra ; which produces compiler warning.
2183
2184 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2185
2186 * sparc.h: fix opcode for tsubcctv.
2187
2188 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2189
2190 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2191
2192 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2193
2194 * sparc.h (nop): Made the 'lose' field be even tighter,
2195 so only a standard 'nop' is disassembled as a nop.
2196
2197 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2198
2199 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2200 disassembled as a nop.
2201
2202 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2203
2204 * sparc.h: fix a typo.
2205
2206 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2207
2208 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2209 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2210 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2211
2212 \f
2213 Local Variables:
2214 version-control: never
2215 End:
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