ec6697770875386b02877a741bee6b64ffe7468c
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-08-15 H.J. Lu <hjl@gnu.org>
2
3 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
4 IgnoreSize change.
5
6 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
7
8 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
9 Move related opcodes closer to each other.
10 Minor changes in comments, list undefined opcodes.
11
12 2000-07-26 Dave Brolley <brolley@redhat.com>
13
14 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
15
16 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
17
18 cris.h: New file.
19
20 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
21
22 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
23 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
24 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
25 (AVR_ISA_M83): Define for ATmega83, ATmega85.
26 (espm): Remove, because ESPM removed in databook update.
27 (eicall, eijmp): Move to the end of opcode table.
28
29 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
30
31 * m68hc11.h: New file for support of Motorola 68hc11.
32
33 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
34
35 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
36
37 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
38
39 * avr.h: New file with AVR opcodes.
40
41 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
42
43 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
44
45 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
46
47 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
48
49 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
50
51 * i386.h: Use sl_FP, not sl_Suf for fild.
52
53 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
54
55 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
56 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
57 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
58 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
59
60 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
61
62 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
63
64 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
65 Alexander Sokolov <robocop@netlink.ru>
66
67 * i386.h (i386_optab): Add cpu_flags for all instructions.
68
69 2000-05-13 Alan Modra <alan@linuxcare.com.au>
70
71 From Gavin Romig-Koch <gavin@cygnus.com>
72 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
73
74 2000-05-04 Timothy Wall <twall@cygnus.com>
75
76 * tic54x.h: New.
77
78 2000-05-03 J.T. Conklin <jtc@redback.com>
79
80 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
81 (PPC_OPERAND_VR): New operand flag for vector registers.
82
83 2000-05-01 Kazu Hirata <kazu@hxi.com>
84
85 * h8300.h (EOP): Add missing initializer.
86
87 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
88
89 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
90 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
91 New operand types l,y,&,fe,fE,fx added to support above forms.
92 (pa_opcodes): Replaced usage of 'x' as source/target for
93 floating point double-word loads/stores with 'fx'.
94
95 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
96 David Mosberger <davidm@hpl.hp.com>
97 Timothy Wall <twall@cygnus.com>
98 Jim Wilson <wilson@cygnus.com>
99
100 * ia64.h: New file.
101
102 2000-03-27 Nick Clifton <nickc@cygnus.com>
103
104 * d30v.h (SHORT_A1): Fix value.
105 (SHORT_AR): Renumber so that it is at the end of the list of short
106 instructions, not the end of the list of long instructions.
107
108 2000-03-26 Alan Modra <alan@linuxcare.com>
109
110 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
111 problem isn't really specific to Unixware.
112 (OLDGCC_COMPAT): Define.
113 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
114 destination %st(0).
115 Fix lots of comments.
116
117 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
118
119 * d30v.h:
120 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
121 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
122 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
123 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
124 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
125 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
126 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
127
128 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
129
130 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
131 fistpd without suffix.
132
133 2000-02-24 Nick Clifton <nickc@cygnus.com>
134
135 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
136 'signed_overflow_ok_p'.
137 Delete prototypes for cgen_set_flags() and cgen_get_flags().
138
139 2000-02-24 Andrew Haley <aph@cygnus.com>
140
141 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
142 (CGEN_CPU_TABLE): flags: new field.
143 Add prototypes for new functions.
144
145 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
146
147 * i386.h: Add some more UNIXWARE_COMPAT comments.
148
149 2000-02-23 Linas Vepstas <linas@linas.org>
150
151 * i370.h: New file.
152
153 2000-02-22 Andrew Haley <aph@cygnus.com>
154
155 * mips.h: (OPCODE_IS_MEMBER): Add comment.
156
157 1999-12-30 Andrew Haley <aph@cygnus.com>
158
159 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
160 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
161 insns.
162
163 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
164
165 * i386.h: Qualify intel mode far call and jmp with x_Suf.
166
167 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
168
169 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
170 indirect jumps and calls. Add FF/3 call for intel mode.
171
172 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
173
174 * mn10300.h: Add new operand types. Add new instruction formats.
175
176 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
177
178 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
179 instruction.
180
181 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
182
183 * mips.h (INSN_ISA5): New.
184
185 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
186
187 * mips.h (OPCODE_IS_MEMBER): New.
188
189 1999-10-29 Nick Clifton <nickc@cygnus.com>
190
191 * d30v.h (SHORT_AR): Define.
192
193 1999-10-18 Michael Meissner <meissner@cygnus.com>
194
195 * alpha.h (alpha_num_opcodes): Convert to unsigned.
196 (alpha_num_operands): Ditto.
197
198 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
199
200 * hppa.h (pa_opcodes): Add load and store cache control to
201 instructions. Add ordered access load and store.
202
203 * hppa.h (pa_opcode): Add new entries for addb and addib.
204
205 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
206
207 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
208
209 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
210
211 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
212
213 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
214
215 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
216 and "be" using completer prefixes.
217
218 * hppa.h (pa_opcodes): Add initializers to silence compiler.
219
220 * hppa.h: Update comments about character usage.
221
222 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
223
224 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
225 up the new fstw & bve instructions.
226
227 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
228
229 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
230 instructions.
231
232 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
233
234 * hppa.h (pa_opcodes): Add long offset double word load/store
235 instructions.
236
237 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
238 stores.
239
240 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
241
242 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
243
244 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
245
246 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
247
248 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
249
250 * hppa.h (pa_opcodes): Add support for "b,l".
251
252 * hppa.h (pa_opcodes): Add support for "b,gate".
253
254 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
255
256 * hppa.h (pa_opcodes): Use 'fX' for first register operand
257 in xmpyu.
258
259 * hppa.h (pa_opcodes): Fix mask for probe and probei.
260
261 * hppa.h (pa_opcodes): Fix mask for depwi.
262
263 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
264
265 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
266 an explicit output argument.
267
268 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
269
270 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
271 Add a few PA2.0 loads and store variants.
272
273 1999-09-04 Steve Chamberlain <sac@pobox.com>
274
275 * pj.h: New file.
276
277 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
278
279 * i386.h (i386_regtab): Move %st to top of table, and split off
280 other fp reg entries.
281 (i386_float_regtab): To here.
282
283 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
284
285 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
286 by 'f'.
287
288 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
289 Add supporting args.
290
291 * hppa.h: Document new completers and args.
292 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
293 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
294 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
295 pmenb and pmdis.
296
297 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
298 hshr, hsub, mixh, mixw, permh.
299
300 * hppa.h (pa_opcodes): Change completers in instructions to
301 use 'c' prefix.
302
303 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
304 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
305
306 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
307 fnegabs to use 'I' instead of 'F'.
308
309 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
310
311 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
312 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
313 Alphabetically sort PIII insns.
314
315 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
316
317 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
318
319 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
320
321 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
322 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
323
324 * hppa.h: Document 64 bit condition completers.
325
326 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
327
328 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
329
330 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
331
332 * i386.h (i386_optab): Add DefaultSize modifier to all insns
333 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
334 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
335
336 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
337 Jeff Law <law@cygnus.com>
338
339 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
340
341 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
342
343 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
344 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
345
346 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
347
348 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
349
350 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
351
352 * hppa.h (struct pa_opcode): Add new field "flags".
353 (FLAGS_STRICT): Define.
354
355 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
356 Jeff Law <law@cygnus.com>
357
358 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
359
360 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
361
362 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
363
364 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
365 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
366 flag to fcomi and friends.
367
368 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
369
370 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
371 integer logical instructions.
372
373 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
374
375 * m68k.h: Document new formats `E', `G', `H' and new places `N',
376 `n', `o'.
377
378 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
379 and new places `m', `M', `h'.
380
381 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
382
383 * hppa.h (pa_opcodes): Add several processor specific system
384 instructions.
385
386 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
387
388 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
389 "addb", and "addib" to be used by the disassembler.
390
391 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
392
393 * i386.h (ReverseModrm): Remove all occurences.
394 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
395 movmskps, pextrw, pmovmskb, maskmovq.
396 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
397 ignore the data size prefix.
398
399 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
400 Mostly stolen from Doug Ledford <dledford@redhat.com>
401
402 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
403
404 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
405
406 1999-04-14 Doug Evans <devans@casey.cygnus.com>
407
408 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
409 (CGEN_ATTR_TYPE): Update.
410 (CGEN_ATTR_MASK): Number booleans starting at 0.
411 (CGEN_ATTR_VALUE): Update.
412 (CGEN_INSN_ATTR): Update.
413
414 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
415
416 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
417 instructions.
418
419 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
420
421 * hppa.h (bb, bvb): Tweak opcode/mask.
422
423
424 1999-03-22 Doug Evans <devans@casey.cygnus.com>
425
426 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
427 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
428 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
429 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
430 Delete member max_insn_size.
431 (enum cgen_cpu_open_arg): New enum.
432 (cpu_open): Update prototype.
433 (cpu_open_1): Declare.
434 (cgen_set_cpu): Delete.
435
436 1999-03-11 Doug Evans <devans@casey.cygnus.com>
437
438 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
439 (CGEN_OPERAND_NIL): New macro.
440 (CGEN_OPERAND): New member `type'.
441 (@arch@_cgen_operand_table): Delete decl.
442 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
443 (CGEN_OPERAND_TABLE): New struct.
444 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
445 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
446 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
447 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
448 {get,set}_{int,vma}_operand.
449 (@arch@_cgen_cpu_open): New arg `isa'.
450 (cgen_set_cpu): Ditto.
451
452 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
453
454 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
455
456 1999-02-25 Doug Evans <devans@casey.cygnus.com>
457
458 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
459 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
460 enum cgen_hw_type.
461 (CGEN_HW_TABLE): New struct.
462 (hw_table): Delete declaration.
463 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
464 to table entry to enum.
465 (CGEN_OPINST): Ditto.
466 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
467
468 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
469
470 * alpha.h (AXP_OPCODE_EV6): New.
471 (AXP_OPCODE_NOPAL): Include it.
472
473 1999-02-09 Doug Evans <devans@casey.cygnus.com>
474
475 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
476 All uses updated. New members int_insn_p, max_insn_size,
477 parse_operand,insert_operand,extract_operand,print_operand,
478 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
479 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
480 extract_handlers,print_handlers.
481 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
482 (CGEN_ATTR_BOOL_OFFSET): New macro.
483 (CGEN_ATTR_MASK): Subtract it to compute bit number.
484 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
485 (cgen_opcode_handler): Renamed from cgen_base.
486 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
487 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
488 all uses updated.
489 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
490 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
491 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
492 (CGEN_OPCODE,CGEN_IBASE): New types.
493 (CGEN_INSN): Rewrite.
494 (CGEN_{ASM,DIS}_HASH*): Delete.
495 (init_opcode_table,init_ibld_table): Declare.
496 (CGEN_INSN_ATTR): New type.
497
498 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
499
500 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
501 (x_FP, d_FP, dls_FP, sldx_FP): Define.
502 Change *Suf definitions to include x and d suffixes.
503 (movsx): Use w_Suf and b_Suf.
504 (movzx): Likewise.
505 (movs): Use bwld_Suf.
506 (fld): Change ordering. Use sld_FP.
507 (fild): Add Intel Syntax equivalent of fildq.
508 (fst): Use sld_FP.
509 (fist): Use sld_FP.
510 (fstp): Use sld_FP. Add x_FP version.
511 (fistp): LLongMem version for Intel Syntax.
512 (fcom, fcomp): Use sld_FP.
513 (fadd, fiadd, fsub): Use sld_FP.
514 (fsubr): Use sld_FP.
515 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
516
517 1999-01-27 Doug Evans <devans@casey.cygnus.com>
518
519 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
520 CGEN_MODE_UINT.
521
522 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
523
524 * hppa.h (bv): Fix mask.
525
526 1999-01-05 Doug Evans <devans@casey.cygnus.com>
527
528 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
529 (CGEN_ATTR): Use it.
530 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
531 (CGEN_ATTR_TABLE): New member dfault.
532
533 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
534
535 * mips.h (MIPS16_INSN_BRANCH): New.
536
537 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
538
539 The following is part of a change made by Edith Epstein
540 <eepstein@sophia.cygnus.com> as part of a project to merge in
541 changes by HP; HP did not create ChangeLog entries.
542
543 * hppa.h (completer_chars): list of chars to not put a space
544 after.
545
546 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
547
548 * i386.h (i386_optab): Permit w suffix on processor control and
549 status word instructions.
550
551 1998-11-30 Doug Evans <devans@casey.cygnus.com>
552
553 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
554 (struct cgen_keyword_entry): Ditto.
555 (struct cgen_operand): Ditto.
556 (CGEN_IFLD): New typedef, with associated access macros.
557 (CGEN_IFMT): New typedef, with associated access macros.
558 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
559 (CGEN_IVALUE): New typedef.
560 (struct cgen_insn): Delete const on syntax,attrs members.
561 `format' now points to format data. Type of `value' is now
562 CGEN_IVALUE.
563 (struct cgen_opcode_table): New member ifld_table.
564
565 1998-11-18 Doug Evans <devans@casey.cygnus.com>
566
567 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
568 (CGEN_OPERAND_INSTANCE): New member `attrs'.
569 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
570 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
571 (cgen_opcode_table): Update type of dis_hash fn.
572 (extract_operand): Update type of `insn_value' arg.
573
574 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
575
576 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
577
578 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
579
580 * mips.h (INSN_MULT): Added.
581
582 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
583
584 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
585
586 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
587
588 * cgen.h (CGEN_INSN_INT): New typedef.
589 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
590 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
591 (CGEN_INSN_BYTES_PTR): New typedef.
592 (CGEN_EXTRACT_INFO): New typedef.
593 (cgen_insert_fn,cgen_extract_fn): Update.
594 (cgen_opcode_table): New member `insn_endian'.
595 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
596 (insert_operand,extract_operand): Update.
597 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
598
599 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
600
601 * cgen.h (CGEN_ATTR_BOOLS): New macro.
602 (struct CGEN_HW_ENTRY): New member `attrs'.
603 (CGEN_HW_ATTR): New macro.
604 (struct CGEN_OPERAND_INSTANCE): New member `name'.
605 (CGEN_INSN_INVALID_P): New macro.
606
607 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
608
609 * hppa.h: Add "fid".
610
611 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
612
613 From Robert Andrew Dale <rob@nb.net>
614 * i386.h (i386_optab): Add AMD 3DNow! instructions.
615 (AMD_3DNOW_OPCODE): Define.
616
617 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
618
619 * d30v.h (EITHER_BUT_PREFER_MU): Define.
620
621 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
622
623 * cgen.h (cgen_insn): #if 0 out element `cdx'.
624
625 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
626
627 Move all global state data into opcode table struct, and treat
628 opcode table as something that is "opened/closed".
629 * cgen.h (CGEN_OPCODE_DESC): New type.
630 (all fns): New first arg of opcode table descriptor.
631 (cgen_set_parse_operand_fn): Add prototype.
632 (cgen_current_machine,cgen_current_endian): Delete.
633 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
634 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
635 dis_hash_table,dis_hash_table_entries.
636 (opcode_open,opcode_close): Add prototypes.
637
638 * cgen.h (cgen_insn): New element `cdx'.
639
640 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
641
642 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
643
644 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
645
646 * mn10300.h: Add "no_match_operands" field for instructions.
647 (MN10300_MAX_OPERANDS): Define.
648
649 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
650
651 * cgen.h (cgen_macro_insn_count): Declare.
652
653 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
654
655 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
656 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
657 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
658 set_{int,vma}_operand.
659
660 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
661
662 * mn10300.h: Add "machine" field for instructions.
663 (MN103, AM30): Define machine types.
664
665 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
666
667 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
668
669 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
670
671 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
672
673 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
674
675 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
676 and ud2b.
677 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
678 those that happen to be implemented on pentiums.
679
680 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
681
682 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
683 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
684 with Size16|IgnoreSize or Size32|IgnoreSize.
685
686 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
687
688 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
689 (REPE): Rename to REPE_PREFIX_OPCODE.
690 (i386_regtab_end): Remove.
691 (i386_prefixtab, i386_prefixtab_end): Remove.
692 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
693 of md_begin.
694 (MAX_OPCODE_SIZE): Define.
695 (i386_optab_end): Remove.
696 (sl_Suf): Define.
697 (sl_FP): Use sl_Suf.
698
699 * i386.h (i386_optab): Allow 16 bit displacement for `mov
700 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
701 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
702 data32, dword, and adword prefixes.
703 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
704 regs.
705
706 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
707
708 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
709
710 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
711 register operands, because this is a common idiom. Flag them with
712 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
713 fdivrp because gcc erroneously generates them. Also flag with a
714 warning.
715
716 * i386.h: Add suffix modifiers to most insns, and tighter operand
717 checks in some cases. Fix a number of UnixWare compatibility
718 issues with float insns. Merge some floating point opcodes, using
719 new FloatMF modifier.
720 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
721 consistency.
722
723 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
724 IgnoreDataSize where appropriate.
725
726 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
727
728 * i386.h: (one_byte_segment_defaults): Remove.
729 (two_byte_segment_defaults): Remove.
730 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
731
732 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
733
734 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
735 (cgen_hw_lookup_by_num): Declare.
736
737 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
738
739 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
740 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
741
742 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
743
744 * cgen.h (cgen_asm_init_parse): Delete.
745 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
746 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
747
748 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
749
750 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
751 (cgen_asm_finish_insn): Update prototype.
752 (cgen_insn): New members num, data.
753 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
754 dis_hash, dis_hash_table_size moved to ...
755 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
756 All uses updated. New members asm_hash_p, dis_hash_p.
757 (CGEN_MINSN_EXPANSION): New struct.
758 (cgen_expand_macro_insn): Declare.
759 (cgen_macro_insn_count): Declare.
760 (get_insn_operands): Update prototype.
761 (lookup_get_insn_operands): Declare.
762
763 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
764
765 * i386.h (i386_optab): Change iclrKludge and imulKludge to
766 regKludge. Add operands types for string instructions.
767
768 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
769
770 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
771 table.
772
773 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
774
775 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
776 for `gettext'.
777
778 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
779
780 * i386.h: Remove NoModrm flag from all insns: it's never checked.
781 Add IsString flag to string instructions.
782 (IS_STRING): Don't define.
783 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
784 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
785 (SS_PREFIX_OPCODE): Define.
786
787 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
788
789 * i386.h: Revert March 24 patch; no more LinearAddress.
790
791 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
792
793 * i386.h (i386_optab): Remove fwait (9b) from all floating point
794 instructions, and instead add FWait opcode modifier. Add short
795 form of fldenv and fstenv.
796 (FWAIT_OPCODE): Define.
797
798 * i386.h (i386_optab): Change second operand constraint of `mov
799 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
800 allow legal instructions such as `movl %gs,%esi'
801
802 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
803
804 * h8300.h: Various changes to fully bracket initializers.
805
806 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
807
808 * i386.h: Set LinearAddress for lidt and lgdt.
809
810 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
811
812 * cgen.h (CGEN_BOOL_ATTR): New macro.
813
814 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
815
816 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
817
818 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
819
820 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
821 (cgen_insn): Record syntax and format entries here, rather than
822 separately.
823
824 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
825
826 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
827
828 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
829
830 * cgen.h (cgen_insert_fn): Change type of result to const char *.
831 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
832 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
833
834 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
835
836 * cgen.h (lookup_insn): New argument alias_p.
837
838 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
839
840 Fix rac to accept only a0:
841 * d10v.h (OPERAND_ACC): Split into:
842 (OPERAND_ACC0, OPERAND_ACC1) .
843 (OPERAND_GPR): Define.
844
845 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
846
847 * cgen.h (CGEN_FIELDS): Define here.
848 (CGEN_HW_ENTRY): New member `type'.
849 (hw_list): Delete decl.
850 (enum cgen_mode): Declare.
851 (CGEN_OPERAND): New member `hw'.
852 (enum cgen_operand_instance_type): Declare.
853 (CGEN_OPERAND_INSTANCE): New type.
854 (CGEN_INSN): New member `operands'.
855 (CGEN_OPCODE_DATA): Make hw_list const.
856 (get_insn_operands,lookup_insn): Add prototypes for.
857
858 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
859
860 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
861 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
862 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
863 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
864
865 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
866
867 * cgen.h: Correct typo in comment end marker.
868
869 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
870
871 * tic30.h: New file.
872
873 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
874
875 * cgen.h: Add prototypes for cgen_save_fixups(),
876 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
877 of cgen_asm_finish_insn() to return a char *.
878
879 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
880
881 * cgen.h: Formatting changes to improve readability.
882
883 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
884
885 * cgen.h (*): Clean up pass over `struct foo' usage.
886 (CGEN_ATTR): Make unsigned char.
887 (CGEN_ATTR_TYPE): Update.
888 (CGEN_ATTR_{ENTRY,TABLE}): New types.
889 (cgen_base): Move member `attrs' to cgen_insn.
890 (CGEN_KEYWORD): New member `null_entry'.
891 (CGEN_{SYNTAX,FORMAT}): New types.
892 (cgen_insn): Format and syntax separated from each other.
893
894 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
895
896 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
897 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
898 flags_{used,set} long.
899 (d30v_operand): Make flags field long.
900
901 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
902
903 * m68k.h: Fix comment describing operand types.
904
905 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
906
907 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
908 everything else after down.
909
910 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
911
912 * d10v.h (OPERAND_FLAG): Split into:
913 (OPERAND_FFLAG, OPERAND_CFLAG) .
914
915 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
916
917 * mips.h (struct mips_opcode): Changed comments to reflect new
918 field usage.
919
920 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
921
922 * mips.h: Added to comments a quick-ref list of all assigned
923 operand type characters.
924 (OP_{MASK,SH}_PERFREG): New macros.
925
926 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
927
928 * sparc.h: Add '_' and '/' for v9a asr's.
929 Patch from David Miller <davem@vger.rutgers.edu>
930
931 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
932
933 * h8300.h: Bit ops with absolute addresses not in the 8 bit
934 area are not available in the base model (H8/300).
935
936 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
937
938 * m68k.h: Remove documentation of ` operand specifier.
939
940 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
941
942 * m68k.h: Document q and v operand specifiers.
943
944 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
945
946 * v850.h (struct v850_opcode): Add processors field.
947 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
948 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
949 (PROCESSOR_V850EA): New bit constants.
950
951 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
952
953 Merge changes from Martin Hunt:
954
955 * d30v.h: Allow up to 64 control registers. Add
956 SHORT_A5S format.
957
958 * d30v.h (LONG_Db): New form for delayed branches.
959
960 * d30v.h: (LONG_Db): New form for repeati.
961
962 * d30v.h (SHORT_D2B): New form.
963
964 * d30v.h (SHORT_A2): New form.
965
966 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
967 registers are used. Needed for VLIW optimization.
968
969 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
970
971 * cgen.h: Move assembler interface section
972 up so cgen_parse_operand_result is defined for cgen_parse_address.
973 (cgen_parse_address): Update prototype.
974
975 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
976
977 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
978
979 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
980
981 * i386.h (two_byte_segment_defaults): Correct base register 5 in
982 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
983 <paubert@iram.es>.
984
985 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
986 <paubert@iram.es>.
987
988 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
989 <paubert@iram.es>.
990
991 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
992 (JUMP_ON_ECX_ZERO): Remove commented out macro.
993
994 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
995
996 * v850.h (V850_NOT_R0): New flag.
997
998 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
999
1000 * v850.h (struct v850_opcode): Remove flags field.
1001
1002 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1003
1004 * v850.h (struct v850_opcode): Add flags field.
1005 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1006 fields.
1007 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1008 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1009
1010 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1011
1012 * arc.h: New file.
1013
1014 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1015
1016 * sparc.h (sparc_opcodes): Declare as const.
1017
1018 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1019
1020 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1021 uses single or double precision floating point resources.
1022 (INSN_NO_ISA, INSN_ISA1): Define.
1023 (cpu specific INSN macros): Tweak into bitmasks outside the range
1024 of INSN_ISA field.
1025
1026 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1027
1028 * i386.h: Fix pand opcode.
1029
1030 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1031
1032 * mips.h: Widen INSN_ISA and move it to a more convenient
1033 bit position. Add INSN_3900.
1034
1035 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1036
1037 * mips.h (struct mips_opcode): added new field membership.
1038
1039 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1040
1041 * i386.h (movd): only Reg32 is allowed.
1042
1043 * i386.h: add fcomp and ud2. From Wayne Scott
1044 <wscott@ichips.intel.com>.
1045
1046 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1047
1048 * i386.h: Add MMX instructions.
1049
1050 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1051
1052 * i386.h: Remove W modifier from conditional move instructions.
1053
1054 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1055
1056 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1057 with no arguments to match that generated by the UnixWare
1058 assembler.
1059
1060 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1061
1062 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1063 (cgen_parse_operand_fn): Declare.
1064 (cgen_init_parse_operand): Declare.
1065 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1066 new argument `want'.
1067 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1068 (enum cgen_parse_operand_type): New enum.
1069
1070 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1071
1072 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1073
1074 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1075
1076 * cgen.h: New file.
1077
1078 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1079
1080 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1081 fdivrp.
1082
1083 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1084
1085 * v850.h (extract): Make unsigned.
1086
1087 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1088
1089 * i386.h: Add iclr.
1090
1091 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1092
1093 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1094 take a direction bit.
1095
1096 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1097
1098 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1099
1100 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1101
1102 * sparc.h: Include <ansidecl.h>. Update function declarations to
1103 use prototypes, and to use const when appropriate.
1104
1105 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1106
1107 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1108
1109 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1110
1111 * d10v.h: Change pre_defined_registers to
1112 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1113
1114 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1115
1116 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1117 Change mips_opcodes from const array to a pointer,
1118 and change bfd_mips_num_opcodes from const int to int,
1119 so that we can increase the size of the mips opcodes table
1120 dynamically.
1121
1122 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1123
1124 * d30v.h (FLAG_X): Remove unused flag.
1125
1126 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1127
1128 * d30v.h: New file.
1129
1130 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1131
1132 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1133 (PDS_VALUE): Macro to access value field of predefined symbols.
1134 (tic80_next_predefined_symbol): Add prototype.
1135
1136 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1137
1138 * tic80.h (tic80_symbol_to_value): Change prototype to match
1139 change in function, added class parameter.
1140
1141 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1142
1143 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1144 endmask fields, which are somewhat weird in that 0 and 32 are
1145 treated exactly the same.
1146
1147 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1148
1149 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1150 rather than a constant that is 2**X. Reorder them to put bits for
1151 operands that have symbolic names in the upper bits, so they can
1152 be packed into an int where the lower bits contain the value that
1153 corresponds to that symbolic name.
1154 (predefined_symbo): Add struct.
1155 (tic80_predefined_symbols): Declare array of translations.
1156 (tic80_num_predefined_symbols): Declare size of that array.
1157 (tic80_value_to_symbol): Declare function.
1158 (tic80_symbol_to_value): Declare function.
1159
1160 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1161
1162 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1163
1164 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1165
1166 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1167 be the destination register.
1168
1169 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1170
1171 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1172 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1173 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1174 that the opcode can have two vector instructions in a single
1175 32 bit word and we have to encode/decode both.
1176
1177 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1178
1179 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1180 TIC80_OPERAND_RELATIVE for PC relative.
1181 (TIC80_OPERAND_BASEREL): New flag bit for register
1182 base relative.
1183
1184 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1185
1186 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1187
1188 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1189
1190 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1191 ":s" modifier for scaling.
1192
1193 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1194
1195 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1196 (TIC80_OPERAND_M_LI): Ditto
1197
1198 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1199
1200 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1201 (TIC80_OPERAND_CC): New define for condition code operand.
1202 (TIC80_OPERAND_CR): New define for control register operand.
1203
1204 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1205
1206 * tic80.h (struct tic80_opcode): Name changed.
1207 (struct tic80_opcode): Remove format field.
1208 (struct tic80_operand): Add insertion and extraction functions.
1209 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1210 correct ones.
1211 (FMT_*): Ditto.
1212
1213 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1214
1215 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1216 type IV instruction offsets.
1217
1218 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1219
1220 * tic80.h: New file.
1221
1222 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1223
1224 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1225
1226 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1227
1228 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1229 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1230 * v850.h: Fix comment, v850_operand not powerpc_operand.
1231
1232 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1233
1234 * mn10200.h: Flesh out structures and definitions needed by
1235 the mn10200 assembler & disassembler.
1236
1237 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1238
1239 * mips.h: Add mips16 definitions.
1240
1241 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1242
1243 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1244
1245 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1246
1247 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1248 (MN10300_OPERAND_MEMADDR): Define.
1249
1250 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1251
1252 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1253
1254 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1255
1256 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1257
1258 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1259
1260 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1261
1262 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1263
1264 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1265
1266 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1267
1268 * alpha.h: Don't include "bfd.h"; private relocation types are now
1269 negative to minimize problems with shared libraries. Organize
1270 instruction subsets by AMASK extensions and PALcode
1271 implementation.
1272 (struct alpha_operand): Move flags slot for better packing.
1273
1274 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1275
1276 * v850.h (V850_OPERAND_RELAX): New operand flag.
1277
1278 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1279
1280 * mn10300.h (FMT_*): Move operand format definitions
1281 here.
1282
1283 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1286
1287 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * mn10300.h (mn10300_opcode): Add "format" field.
1290 (MN10300_OPERAND_*): Define.
1291
1292 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1293
1294 * mn10x00.h: Delete.
1295 * mn10200.h, mn10300.h: New files.
1296
1297 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1298
1299 * mn10x00.h: New file.
1300
1301 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1302
1303 * v850.h: Add new flag to indicate this instruction uses a PC
1304 displacement.
1305
1306 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1307
1308 * h8300.h (stmac): Add missing instruction.
1309
1310 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1311
1312 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1313 field.
1314
1315 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1316
1317 * v850.h (V850_OPERAND_EP): Define.
1318
1319 * v850.h (v850_opcode): Add size field.
1320
1321 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1322
1323 * v850.h (v850_operands): Add insert and extract fields, pointers
1324 to functions used to handle unusual operand encoding.
1325 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1326 V850_OPERAND_SIGNED): Defined.
1327
1328 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1329
1330 * v850.h (v850_operands): Add flags field.
1331 (OPERAND_REG, OPERAND_NUM): Defined.
1332
1333 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1334
1335 * v850.h: New file.
1336
1337 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1338
1339 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1340 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1341 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1342 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1343 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1344 Defined.
1345
1346 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1347
1348 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1349 a 3 bit space id instead of a 2 bit space id.
1350
1351 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1352
1353 * d10v.h: Add some additional defines to support the
1354 assembler in determining which operations can be done in parallel.
1355
1356 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1357
1358 * h8300.h (SN): Define.
1359 (eepmov.b): Renamed from "eepmov"
1360 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1361 with them.
1362
1363 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1364
1365 * d10v.h (OPERAND_SHIFT): New operand flag.
1366
1367 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1368
1369 * d10v.h: Changes for divs, parallel-only instructions, and
1370 signed numbers.
1371
1372 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1373
1374 * d10v.h (pd_reg): Define. Putting the definition here allows
1375 the assembler and disassembler to share the same struct.
1376
1377 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1378
1379 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1380 Williams <steve@icarus.com>.
1381
1382 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1383
1384 * d10v.h: New file.
1385
1386 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1387
1388 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1389
1390 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1391
1392 * m68k.h (mcf5200): New macro.
1393 Document names of coldfire control registers.
1394
1395 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1396
1397 * h8300.h (SRC_IN_DST): Define.
1398
1399 * h8300.h (UNOP3): Mark the register operand in this insn
1400 as a source operand, not a destination operand.
1401 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1402 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1403 register operand with SRC_IN_DST.
1404
1405 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1406
1407 * alpha.h: New file.
1408
1409 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1410
1411 * rs6k.h: Remove obsolete file.
1412
1413 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1414
1415 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1416 fdivp, and fdivrp. Add ffreep.
1417
1418 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1419
1420 * h8300.h: Reorder various #defines for readability.
1421 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1422 (BITOP): Accept additional (unused) argument. All callers changed.
1423 (EBITOP): Likewise.
1424 (O_LAST): Bump.
1425 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1426
1427 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1428 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1429 (BITOP, EBITOP): Handle new H8/S addressing modes for
1430 bit insns.
1431 (UNOP3): Handle new shift/rotate insns on the H8/S.
1432 (insns using exr): New instructions.
1433 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1434
1435 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1436
1437 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1438 was incorrect.
1439
1440 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1441
1442 * h8300.h (START): Remove.
1443 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1444 and mov.l insns that can be relaxed.
1445
1446 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1447
1448 * i386.h: Remove Abs32 from lcall.
1449
1450 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1451
1452 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1453 (SLCPOP): New macro.
1454 Mark X,Y opcode letters as in use.
1455
1456 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1457
1458 * sparc.h (F_FLOAT, F_FBR): Define.
1459
1460 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1461
1462 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1463 from all insns.
1464 (ABS8SRC,ABS8DST): Add ABS8MEM.
1465 (add.l): Fix reg+reg variant.
1466 (eepmov.w): Renamed from eepmovw.
1467 (ldc,stc): Fix many cases.
1468
1469 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1470
1471 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1472
1473 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1474
1475 * sparc.h (O): Mark operand letter as in use.
1476
1477 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1478
1479 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1480 Mark operand letters uU as in use.
1481
1482 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1483
1484 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1485 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1486 (SPARC_OPCODE_SUPPORTED): New macro.
1487 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1488 (F_NOTV9): Delete.
1489
1490 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1491
1492 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1493 declaration consistent with return type in definition.
1494
1495 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1496
1497 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1498
1499 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1500
1501 * i386.h (i386_regtab): Add 80486 test registers.
1502
1503 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1504
1505 * i960.h (I_HX): Define.
1506 (i960_opcodes): Add HX instruction.
1507
1508 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1509
1510 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1511 and fclex.
1512
1513 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1514
1515 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1516 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1517 (bfd_* defines): Delete.
1518 (sparc_opcode_archs): Replaces architecture_pname.
1519 (sparc_opcode_lookup_arch): Declare.
1520 (NUMOPCODES): Delete.
1521
1522 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1523
1524 * sparc.h (enum sparc_architecture): Add v9a.
1525 (ARCHITECTURES_CONFLICT_P): Update.
1526
1527 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1528
1529 * i386.h: Added Pentium Pro instructions.
1530
1531 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * m68k.h: Document new 'W' operand place.
1534
1535 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1536
1537 * hppa.h: Add lci and syncdma instructions.
1538
1539 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1540
1541 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1542 instructions.
1543
1544 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1545
1546 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1547 assembler's -mcom and -many switches.
1548
1549 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1550
1551 * i386.h: Fix cmpxchg8b extension opcode description.
1552
1553 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1554
1555 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1556 and register cr4.
1557
1558 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1559
1560 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1561
1562 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1563
1564 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1565
1566 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1567
1568 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1569
1570 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1571
1572 * m68kmri.h: Remove.
1573
1574 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1575 declarations. Remove F_ALIAS and flag field of struct
1576 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1577 int. Make name and args fields of struct m68k_opcode const.
1578
1579 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1580
1581 * sparc.h (F_NOTV9): Define.
1582
1583 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1584
1585 * mips.h (INSN_4010): Define.
1586
1587 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1588
1589 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1590
1591 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1592 * m68k.h: Fix argument descriptions of coprocessor
1593 instructions to allow only alterable operands where appropriate.
1594 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1595 (m68k_opcode_aliases): Add more aliases.
1596
1597 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1598
1599 * m68k.h: Added explcitly short-sized conditional branches, and a
1600 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1601 svr4-based configurations.
1602
1603 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1604
1605 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1606 * i386.h: added missing Data16/Data32 flags to a few instructions.
1607
1608 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1609
1610 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1611 (OP_MASK_BCC, OP_SH_BCC): Define.
1612 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1613 (OP_MASK_CCC, OP_SH_CCC): Define.
1614 (INSN_READ_FPR_R): Define.
1615 (INSN_RFE): Delete.
1616
1617 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1618
1619 * m68k.h (enum m68k_architecture): Deleted.
1620 (struct m68k_opcode_alias): New type.
1621 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1622 matching constraints, values and flags. As a side effect of this,
1623 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1624 as I know were never used, now may need re-examining.
1625 (numopcodes): Now const.
1626 (m68k_opcode_aliases, numaliases): New variables.
1627 (endop): Deleted.
1628 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1629 m68k_opcode_aliases; update declaration of m68k_opcodes.
1630
1631 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1632
1633 * hppa.h (delay_type): Delete unused enumeration.
1634 (pa_opcode): Replace unused delayed field with an architecture
1635 field.
1636 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1637
1638 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1639
1640 * mips.h (INSN_ISA4): Define.
1641
1642 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1643
1644 * mips.h (M_DLA_AB, M_DLI): Define.
1645
1646 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1647
1648 * hppa.h (fstwx): Fix single-bit error.
1649
1650 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1651
1652 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1653
1654 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1655
1656 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1657 debug registers. From Charles Hannum (mycroft@netbsd.org).
1658
1659 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1660
1661 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1662 i386 support:
1663 * i386.h (MOV_AX_DISP32): New macro.
1664 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1665 of several call/return instructions.
1666 (ADDR_PREFIX_OPCODE): New macro.
1667
1668 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1669
1670 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1671
1672 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1673 it pointer to const char;
1674 (struct vot, field `name'): ditto.
1675
1676 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1677
1678 * vax.h: Supply and properly group all values in end sentinel.
1679
1680 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1681
1682 * mips.h (INSN_ISA, INSN_4650): Define.
1683
1684 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1685
1686 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1687 systems with a separate instruction and data cache, such as the
1688 29040, these instructions take an optional argument.
1689
1690 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1691
1692 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1693 INSN_TRAP.
1694
1695 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1696
1697 * mips.h (INSN_STORE_MEMORY): Define.
1698
1699 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1700
1701 * sparc.h: Document new operand type 'x'.
1702
1703 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1704
1705 * i960.h (I_CX2): New instruction category. It includes
1706 instructions available on Cx and Jx processors.
1707 (I_JX): New instruction category, for JX-only instructions.
1708 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1709 Jx-only instructions, in I_JX category.
1710
1711 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1712
1713 * ns32k.h (endop): Made pointer const too.
1714
1715 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1716
1717 * ns32k.h: Drop Q operand type as there is no correct use
1718 for it. Add I and Z operand types which allow better checking.
1719
1720 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1721
1722 * h8300.h (xor.l) :fix bit pattern.
1723 (L_2): New size of operand.
1724 (trapa): Use it.
1725
1726 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1727
1728 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1729
1730 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1731
1732 * sparc.h: Include v9 definitions.
1733
1734 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1735
1736 * m68k.h (m68060): Defined.
1737 (m68040up, mfloat, mmmu): Include it.
1738 (struct m68k_opcode): Widen `arch' field.
1739 (m68k_opcodes): Updated for M68060. Removed comments that were
1740 instructions commented out by "JF" years ago.
1741
1742 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1743
1744 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1745 add a one-bit `flags' field.
1746 (F_ALIAS): New macro.
1747
1748 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1749
1750 * h8300.h (dec, inc): Get encoding right.
1751
1752 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1753
1754 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1755 a flag instead.
1756 (PPC_OPERAND_SIGNED): Define.
1757 (PPC_OPERAND_SIGNOPT): Define.
1758
1759 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1760
1761 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1762 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1763
1764 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1765
1766 * i386.h: Reverse last change. It'll be handled in gas instead.
1767
1768 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1769
1770 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1771 slower on the 486 and used the implicit shift count despite the
1772 explicit operand. The one-operand form is still available to get
1773 the shorter form with the implicit shift count.
1774
1775 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1776
1777 * hppa.h: Fix typo in fstws arg string.
1778
1779 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1780
1781 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1782
1783 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1784
1785 * ppc.h (PPC_OPCODE_601): Define.
1786
1787 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1788
1789 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1790 (so we can determine valid completers for both addb and addb[tf].)
1791
1792 * hppa.h (xmpyu): No floating point format specifier for the
1793 xmpyu instruction.
1794
1795 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1796
1797 * ppc.h (PPC_OPERAND_NEXT): Define.
1798 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1799 (struct powerpc_macro): Define.
1800 (powerpc_macros, powerpc_num_macros): Declare.
1801
1802 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1803
1804 * ppc.h: New file. Header file for PowerPC opcode table.
1805
1806 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1807
1808 * hppa.h: More minor template fixes for sfu and copr (to allow
1809 for easier disassembly).
1810
1811 * hppa.h: Fix templates for all the sfu and copr instructions.
1812
1813 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1814
1815 * i386.h (push): Permit Imm16 operand too.
1816
1817 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1818
1819 * h8300.h (andc): Exists in base arch.
1820
1821 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1822
1823 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1824 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1825
1826 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1827
1828 * hppa.h: Add FP quadword store instructions.
1829
1830 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1831
1832 * mips.h: (M_J_A): Added.
1833 (M_LA): Removed.
1834
1835 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1836
1837 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1838 <mellon@pepper.ncd.com>.
1839
1840 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1841
1842 * hppa.h: Immediate field in probei instructions is unsigned,
1843 not low-sign extended.
1844
1845 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1846
1847 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1848
1849 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1850
1851 * i386.h: Add "fxch" without operand.
1852
1853 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1854
1855 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1856
1857 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1858
1859 * hppa.h: Add gfw and gfr to the opcode table.
1860
1861 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1862
1863 * m88k.h: extended to handle m88110.
1864
1865 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1866
1867 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1868 addresses.
1869
1870 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1871
1872 * i960.h (i960_opcodes): Properly bracket initializers.
1873
1874 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1875
1876 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1877
1878 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1879
1880 * m68k.h (two): Protect second argument with parentheses.
1881
1882 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1883
1884 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1885 Deleted old in/out instructions in "#if 0" section.
1886
1887 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1888
1889 * i386.h (i386_optab): Properly bracket initializers.
1890
1891 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1892
1893 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1894 Jeff Law, law@cs.utah.edu).
1895
1896 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1897
1898 * i386.h (lcall): Accept Imm32 operand also.
1899
1900 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1901
1902 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1903 (M_DABS): Added.
1904
1905 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1906
1907 * mips.h (INSN_*): Changed values. Removed unused definitions.
1908 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1909 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1910 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1911 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1912 (M_*): Added new values for r6000 and r4000 macros.
1913 (ANY_DELAY): Removed.
1914
1915 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1916
1917 * mips.h: Added M_LI_S and M_LI_SS.
1918
1919 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1920
1921 * h8300.h: Get some rare mov.bs correct.
1922
1923 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1924
1925 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1926 been included.
1927
1928 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1929
1930 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1931 jump instructions, for use in disassemblers.
1932
1933 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1934
1935 * m88k.h: Make bitfields just unsigned, not unsigned long or
1936 unsigned short.
1937
1938 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1939
1940 * hppa.h: New argument type 'y'. Use in various float instructions.
1941
1942 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1943
1944 * hppa.h (break): First immediate field is unsigned.
1945
1946 * hppa.h: Add rfir instruction.
1947
1948 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1949
1950 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1951
1952 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1953
1954 * mips.h: Reworked the hazard information somewhat, and fixed some
1955 bugs in the instruction hazard descriptions.
1956
1957 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1958
1959 * m88k.h: Corrected a couple of opcodes.
1960
1961 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1962
1963 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1964 new version includes instruction hazard information, but is
1965 otherwise reasonably similar.
1966
1967 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1968
1969 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1970
1971 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1972
1973 Patches from Jeff Law, law@cs.utah.edu:
1974 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1975 Make the tables be the same for the following instructions:
1976 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1977 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1978 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1979 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1980 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1981 "fcmp", and "ftest".
1982
1983 * hppa.h: Make new and old tables the same for "break", "mtctl",
1984 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1985 Fix typo in last patch. Collapse several #ifdefs into a
1986 single #ifdef.
1987
1988 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1989 of the comments up-to-date.
1990
1991 * hppa.h: Update "free list" of letters and update
1992 comments describing each letter's function.
1993
1994 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1995
1996 * h8300.h: checkpoint, includes H8/300-H opcodes.
1997
1998 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1999
2000 * Patches from Jeffrey Law <law@cs.utah.edu>.
2001 * hppa.h: Rework single precision FP
2002 instructions so that they correctly disassemble code
2003 PA1.1 code.
2004
2005 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2006
2007 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2008 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2009
2010 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2011
2012 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2013 gdb will define it for now.
2014
2015 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2016
2017 * sparc.h: Don't end enumerator list with comma.
2018
2019 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2020
2021 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2022 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2023 ("bc2t"): Correct typo.
2024 ("[ls]wc[023]"): Use T rather than t.
2025 ("c[0123]"): Define general coprocessor instructions.
2026
2027 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2028
2029 * m68k.h: Move split point for gcc compilation more towards
2030 middle.
2031
2032 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2033
2034 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2035 simply wrong, ics, rfi, & rfsvc were missing).
2036 Add "a" to opr_ext for "bb". Doc fix.
2037
2038 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2039
2040 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2041 * mips.h: Add casts, to suppress warnings about shifting too much.
2042 * m68k.h: Document the placement code '9'.
2043
2044 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2045
2046 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2047 allows callers to break up the large initialized struct full of
2048 opcodes into two half-sized ones. This permits GCC to compile
2049 this module, since it takes exponential space for initializers.
2050 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2051
2052 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2053
2054 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2055 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2056 initialized structs in it.
2057
2058 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2059
2060 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2061 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2062 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2063
2064 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2065
2066 * mips.h: document "i" and "j" operands correctly.
2067
2068 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2069
2070 * mips.h: Removed endianness dependency.
2071
2072 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2073
2074 * h8300.h: include info on number of cycles per instruction.
2075
2076 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2077
2078 * hppa.h: Move handy aliases to the front. Fix masks for extract
2079 and deposit instructions.
2080
2081 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2082
2083 * i386.h: accept shld and shrd both with and without the shift
2084 count argument, which is always %cl.
2085
2086 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2087
2088 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2089 (one_byte_segment_defaults, two_byte_segment_defaults,
2090 i386_prefixtab_end): Ditto.
2091
2092 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2093
2094 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2095 for operand 2; from John Carr, jfc@dsg.dec.com.
2096
2097 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2098
2099 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2100 always use 16-bit offsets. Makes calculated-size jump tables
2101 feasible.
2102
2103 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2104
2105 * i386.h: Fix one-operand forms of in* and out* patterns.
2106
2107 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2108
2109 * m68k.h: Added CPU32 support.
2110
2111 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2112
2113 * mips.h (break): Disassemble the argument. Patch from
2114 jonathan@cs.stanford.edu (Jonathan Stone).
2115
2116 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2117
2118 * m68k.h: merged Motorola and MIT syntax.
2119
2120 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2121
2122 * m68k.h (pmove): make the tests less strict, the 68k book is
2123 wrong.
2124
2125 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2126
2127 * m68k.h (m68ec030): Defined as alias for 68030.
2128 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2129 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2130 them. Tightened description of "fmovex" to distinguish it from
2131 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2132 up descriptions that claimed versions were available for chips not
2133 supporting them. Added "pmovefd".
2134
2135 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2136
2137 * m68k.h: fix where the . goes in divull
2138
2139 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2140
2141 * m68k.h: the cas2 instruction is supposed to be written with
2142 indirection on the last two operands, which can be either data or
2143 address registers. Added a new operand type 'r' which accepts
2144 either register type. Added new cases for cas2l and cas2w which
2145 use them. Corrected masks for cas2 which failed to recognize use
2146 of address register.
2147
2148 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2149
2150 * m68k.h: Merged in patches (mostly m68040-specific) from
2151 Colin Smith <colin@wrs.com>.
2152
2153 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2154 base). Also cleaned up duplicates, re-ordered instructions for
2155 the sake of dis-assembling (so aliases come after standard names).
2156 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2157
2158 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2159
2160 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2161 all missing .s
2162
2163 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2164
2165 * sparc.h: Moved tables to BFD library.
2166
2167 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2168
2169 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2170
2171 * h8300.h: Finish filling in all the holes in the opcode table,
2172 so that the Lucid C compiler can digest this as well...
2173
2174 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2175
2176 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2177 Fix opcodes on various sizes of fild/fist instructions
2178 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2179 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2180
2181 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2182
2183 * h8300.h: Fill in all the holes in the opcode table so that the
2184 losing HPUX C compiler can digest this...
2185
2186 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2187
2188 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2189 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2190
2191 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2192
2193 * sparc.h: Add new architecture variant sparclite; add its scan
2194 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2195
2196 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2197
2198 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2199 fy@lucid.com).
2200
2201 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2202
2203 * rs6k.h: New version from IBM (Metin).
2204
2205 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2206
2207 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2208 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2209
2210 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2211
2212 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2213
2214 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2215
2216 * m68k.h (one, two): Cast macro args to unsigned to suppress
2217 complaints from compiler and lint about integer overflow during
2218 shift.
2219
2220 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2221
2222 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2223
2224 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2225
2226 * mips.h: Make bitfield layout depend on the HOST compiler,
2227 not on the TARGET system.
2228
2229 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2230
2231 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2232 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2233 <TRANLE@INTELLICORP.COM>.
2234
2235 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2236
2237 * h8300.h: turned op_type enum into #define list
2238
2239 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2240
2241 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2242 similar instructions -- they've been renamed to "fitoq", etc.
2243 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2244 number of arguments.
2245 * h8300.h: Remove extra ; which produces compiler warning.
2246
2247 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2248
2249 * sparc.h: fix opcode for tsubcctv.
2250
2251 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2252
2253 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2254
2255 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2256
2257 * sparc.h (nop): Made the 'lose' field be even tighter,
2258 so only a standard 'nop' is disassembled as a nop.
2259
2260 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2261
2262 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2263 disassembled as a nop.
2264
2265 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2266
2267 * sparc.h: fix a typo.
2268
2269 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2270
2271 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2272 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2273 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2274
2275 \f
2276 Local Variables:
2277 version-control: never
2278 End:
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