include/opcode/
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2003-06-10 Richard Sandiford <rsandifo@redhat.com>
2
3 * h8300.h (IMM4_NS, IMM8_NS): New.
4 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
5 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
6
7 2003-06-03 Michael Snyder <msnyder@redhat.com>
8
9 * h8sx.h (enum h8_model): Add AV_H8S to distinguish from H8H.
10 (ldc): Split ccr ops from exr ops (which are only available
11 on H8S or H8SX).
12 (stc): Ditto.
13 (andc, orc, xorc): Ditto.
14 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
15
16 2003-06-03 Michael Snyder <msnyder@redhat.com>
17 and Bernd Schmidt <bernds@redhat.com>
18 and Alexandre Oliva <aoliva@redhat.com>
19 * h8300.h: Add support for h8300sx instruction set.
20
21 2003-05-23 Jason Eckhardt <jle@rice.edu>
22
23 * i860.h (expand_type): Add XP_ONLY.
24 (scyc.b): New XP instruction.
25 (ldio.l): Likewise.
26 (ldio.s): Likewise.
27 (ldio.b): Likewise.
28 (ldint.l): Likewise.
29 (ldint.s): Likewise.
30 (ldint.b): Likewise.
31 (stio.l): Likewise.
32 (stio.s): Likewise.
33 (stio.b): Likewise.
34 (pfld.q): Likewise.
35
36 2003-05-20 Jason Eckhardt <jle@rice.edu>
37
38 * i860.h (flush): Set lower 3 bits properly and use 'L'
39 for the immediate operand type instead of 'i'.
40
41 2003-05-20 Jason Eckhardt <jle@rice.edu>
42
43 * i860.h (fzchks): Both S and R bits must be set.
44 (pfzchks): Likewise.
45 (faddp): Likewise.
46 (pfaddp): Likewise.
47 (fix.ss): Remove (invalid instruction).
48 (pfix.ss): Likewise.
49 (ftrunc.ss): Likewise.
50 (pftrunc.ss): Likewise.
51
52 2003-05-18 Jason Eckhardt <jle@rice.edu>
53
54 * i860.h (form, pform): Add missing .dd suffix.
55
56 2003-05-13 Stephane Carrez <stcarrez@nerim.fr>
57
58 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
59
60 2003-04-07 Michael Snyder <msnyder@redhat.com>
61
62 * h8300.h (ldc/stc): Fix up src/dst swaps.
63
64 2003-04-09 J. Grant <jg-binutils@jguk.org>
65
66 * mips.h: Correct comment typo.
67
68 2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
69
70 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
71 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
72 (s390_opcode): Remove architecture. Add modes and min_cpu.
73
74 2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
75
76 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
77 processing.
78
79 2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
80
81 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
82
83 2003-01-23 Alan Modra <amodra@bigpond.net.au>
84
85 * m68hc11.h (cpu6812s): Define.
86
87 2003-01-07 Chris Demetriou <cgd@broadcom.com>
88
89 * mips.h: Fix missing space in comment.
90 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
91 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
92 by four bits.
93
94 2003-01-02 Chris Demetriou <cgd@broadcom.com>
95
96 * mips.h: Update copyright years to include 2002 (which had
97 been missed previously) and 2003. Make comments about "+A",
98 "+B", and "+C" operand types more descriptive.
99
100 2002-12-31 Chris Demetriou <cgd@broadcom.com>
101
102 * mips.h: Note that the "+D" operand type name is now used.
103
104 2002-12-30 Chris Demetriou <cgd@broadcom.com>
105
106 * mips.h: Document "+" as the start of two-character operand
107 type names, and add new "K", "+A", "+B", and "+C" operand types.
108 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
109 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
110 defines.
111
112 2002-12-24 Dmitry Diky <diwil@mail.ru>
113
114 * msp430.h: New file. Defines msp430 opcodes.
115
116 2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
117
118 * h8300.h: Added some more pseudo opcodes for system call
119 processing.
120
121 2002-12-19 Chris Demetriou <cgd@broadcom.com>
122
123 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
124 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
125 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
126 (OP_OP_SDC2, OP_OP_SDC3): Define.
127
128 2002-12-16 Alan Modra <amodra@bigpond.net.au>
129
130 * hppa.h (completer_chars): #if 0 out.
131
132 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
133 "default_args".
134 (struct not_wot): Constify "args".
135 (struct not): Constify "name".
136 (numopcodes): Delete.
137 (endop): Delete.
138
139 2002-12-13 Alan Modra <amodra@bigpond.net.au>
140
141 * pj.h (pj_opc_info_t): Add union.
142
143 2002-12-04 David Mosberger <davidm@hpl.hp.com>
144
145 * ia64.h: Fix copyright message.
146 (IA64_OPND_AR_CSD): New operand kind.
147
148 2002-12-03 Richard Henderson <rth@redhat.com>
149
150 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
151
152 2002-12-03 Alan Modra <amodra@bigpond.net.au>
153
154 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
155 Constify "leaf" and "multi".
156
157 2002-11-19 Klee Dienes <kdienes@apple.com>
158
159 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
160 fields.
161 (h8_opcodes). Modify initializer and initializer macros to no
162 longer initialize the removed fields.
163
164 2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
165
166 * tic4x.h (c4x_insts): Fixed LDHI constraint
167
168 2002-11-18 Klee Dienes <kdienes@apple.com>
169
170 * h8300.h (h8_opcode): Remove 'length' field.
171 (h8_opcodes): Mark as 'const' (both the declaration and
172 definition). Modify initializer and initializer macros to no
173 longer initialize the length field.
174
175 2002-11-18 Klee Dienes <kdienes@apple.com>
176
177 * arc.h (arc_ext_opcodes): Declare as extern.
178 (arc_ext_operands): Declare as extern.
179 * i860.h (i860_opcodes): Declare as const.
180
181 2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
182
183 * tic4x.h: File reordering. Added enhanced opcodes.
184
185 2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
186
187 * tic4x.h: Major rewrite of entire file. Define instruction
188 classes, and put each instruction into a class.
189
190 2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
191
192 * tic4x.h: Added new opcodes and corrected some bugs. Add support
193 for new DSP types.
194
195 2002-10-14 Alan Modra <amodra@bigpond.net.au>
196
197 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
198
199 2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
200 Ken Raeburn <raeburn@cygnus.com>
201 Aldy Hernandez <aldyh@redhat.com>
202 Eric Christopher <echristo@redhat.com>
203 Richard Sandiford <rsandifo@redhat.com>
204
205 * mips.h: Update comment for new opcodes.
206 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
207 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
208 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
209 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
210 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
211 Don't match CPU_R4111 with INSN_4100.
212
213 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
214
215 From matthew green <mrg@redhat.com>
216
217 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
218 instructions.
219 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
220 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
221 e500x2 Integer select, branch locking, performance monitor,
222 cache locking and machine check APUs, respectively.
223 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
224 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
225
226 2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
227
228 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
229 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
230 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
231 memory banks.
232 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
233
234 2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
235
236 * mips.h (INSN_MIPS16): New define.
237
238 2002-07-08 Alan Modra <amodra@bigpond.net.au>
239
240 * i386.h: Remove IgnoreSize from movsx and movzx.
241
242 2002-06-08 Alan Modra <amodra@bigpond.net.au>
243
244 * a29k.h: Replace CONST with const.
245 (CONST): Don't define.
246 * convex.h: Replace CONST with const.
247 (CONST): Don't define.
248 * dlx.h: Replace CONST with const.
249 * or32.h (CONST): Don't define.
250
251 2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
252
253 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
254 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
255 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
256 (INSN_MDMX): New constants, for MDMX support.
257 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
258
259 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
260
261 * dlx.h: New file.
262
263 2002-05-25 Alan Modra <amodra@bigpond.net.au>
264
265 * ia64.h: Use #include "" instead of <> for local header files.
266 * sparc.h: Likewise.
267
268 2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
269
270 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
271
272 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
273
274 * h8300.h: Corrected defs of all control regs
275 and eepmov instr.
276
277 2002-04-11 Alan Modra <amodra@bigpond.net.au>
278
279 * i386.h: Add intel mode cmpsd and movsd.
280 Put them before SSE2 insns, so that rep prefix works.
281
282 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
283
284 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
285 instructions.
286 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
287 may be passed along with the ISA bitmask.
288
289 2002-03-05 Paul Koning <pkoning@equallogic.com>
290
291 * pdp11.h: Add format codes for float instruction formats.
292
293 2002-02-25 Alan Modra <amodra@bigpond.net.au>
294
295 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
296
297 Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
298
299 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
300
301 Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
302
303 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
304 (xchg): Fix.
305 (in, out): Disable 64bit operands.
306 (call, jmp): Avoid REX prefixes.
307 (jcxz): Prohibit in 64bit mode
308 (jrcxz, loop): Add 64bit variants.
309 (movq): Fix patterns.
310 (movmskps, pextrw, pinstrw): Add 64bit variants.
311
312 2002-01-31 Ivan Guzvinec <ivang@opencores.org>
313
314 * or32.h: New file.
315
316 2002-01-22 Graydon Hoare <graydon@redhat.com>
317
318 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
319 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
320
321 2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
322
323 * h8300.h: Comment typo fix.
324
325 2002-01-03 matthew green <mrg@redhat.com>
326
327 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
328 (PPC_OPCODE_BOOKE64): Likewise.
329
330 Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
331
332 * hppa.h (call, ret): Move to end of table.
333 (addb, addib): PA2.0 variants should have been PA2.0W.
334 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
335 happy.
336 (fldw, fldd, fstw, fstd, bb): Likewise.
337 (short loads/stores): Tweak format specifier slightly to keep
338 disassembler happy.
339 (indexed loads/stores): Likewise.
340 (absolute loads/stores): Likewise.
341
342 2001-12-04 Alexandre Oliva <aoliva@redhat.com>
343
344 * d10v.h (OPERAND_NOSP): New macro.
345
346 2001-11-29 Alexandre Oliva <aoliva@redhat.com>
347
348 * d10v.h (OPERAND_SP): New macro.
349
350 2001-11-15 Alan Modra <amodra@bigpond.net.au>
351
352 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
353
354 2001-11-11 Timothy Wall <twall@alum.mit.edu>
355
356 * tic54x.h: Revise opcode layout; don't really need a separate
357 structure for parallel opcodes.
358
359 2001-11-13 Zack Weinberg <zack@codesourcery.com>
360 Alan Modra <amodra@bigpond.net.au>
361
362 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
363 accept WordReg.
364
365 2001-11-04 Chris Demetriou <cgd@broadcom.com>
366
367 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
368
369 2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
370
371 * mmix.h: New file.
372
373 2001-10-18 Chris Demetriou <cgd@broadcom.com>
374
375 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
376 of the expression, to make source code merging easier.
377
378 2001-10-17 Chris Demetriou <cgd@broadcom.com>
379
380 * mips.h: Sort coprocessor instruction argument characters
381 in comment, add a few more words of description for "H".
382
383 2001-10-17 Chris Demetriou <cgd@broadcom.com>
384
385 * mips.h (INSN_SB1): New cpu-specific instruction bit.
386 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
387 if cpu is CPU_SB1.
388
389 2001-10-17 matthew green <mrg@redhat.com>
390
391 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
392
393 2001-10-12 matthew green <mrg@redhat.com>
394
395 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
396 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
397 instructions, respectively.
398
399 2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
400
401 * v850.h: Remove spurious comment.
402
403 2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
404
405 * h8300.h: Fix compile time warning messages
406
407 2001-09-04 Richard Henderson <rth@redhat.com>
408
409 * alpha.h (struct alpha_operand): Pack elements into bitfields.
410
411 2001-08-31 Eric Christopher <echristo@redhat.com>
412
413 * mips.h: Remove CPU_MIPS32_4K.
414
415 2001-08-27 Torbjorn Granlund <tege@swox.com>
416
417 * ppc.h (PPC_OPERAND_DS): Define.
418
419 2001-08-25 Andreas Jaeger <aj@suse.de>
420
421 * d30v.h: Fix declaration of reg_name_cnt.
422
423 * d10v.h: Fix declaration of d10v_reg_name_cnt.
424
425 * arc.h: Add prototypes from opcodes/arc-opc.c.
426
427 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
428
429 * mips.h (INSN_10000): Define.
430 (OPCODE_IS_MEMBER): Check for INSN_10000.
431
432 2001-08-10 Alan Modra <amodra@one.net.au>
433
434 * ppc.h: Revert 2001-08-08.
435
436 2001-08-10 Richard Sandiford <rsandifo@redhat.com>
437
438 * mips.h (INSN_GP32): Remove.
439 (OPCODE_IS_MEMBER): Remove gp32 parameter.
440 (M_MOVE): New macro identifier.
441
442 2001-08-08 Alan Modra <amodra@one.net.au>
443
444 1999-10-25 Torbjorn Granlund <tege@swox.com>
445 * ppc.h (struct powerpc_operand): New field `reloc'.
446
447 2001-08-01 Aldy Hernandez <aldyh@redhat.com>
448
449 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
450
451 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
452
453 * cgen.h (CGEN_INSN): Add regex support.
454 (build_insn_regex): Declare.
455
456 2001-07-11 Frank Ch. Eigler <fche@redhat.com>
457
458 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
459 (cgen_cpu_desc): Ditto.
460
461 2001-07-07 Ben Elliston <bje@redhat.com>
462
463 * m88k.h: Clean up and reformat. Remove unused code.
464
465 2001-06-14 Geoffrey Keating <geoffk@redhat.com>
466
467 * cgen.h (cgen_keyword): Add nonalpha_chars field.
468
469 2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
470
471 * mips.h (CPU_R12000): Define.
472
473 2001-05-23 John Healy <jhealy@redhat.com>
474
475 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
476
477 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
478
479 * mips.h (INSN_ISA_MASK): Define.
480
481 2001-05-12 Alan Modra <amodra@one.net.au>
482
483 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
484 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
485 and use InvMem as these insns must have register operands.
486
487 2001-05-04 Alan Modra <amodra@one.net.au>
488
489 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
490 and pextrw to swap reg/rm assignments.
491
492 2001-04-05 Hans-Peter Nilsson <hp@axis.com>
493
494 * cris.h (enum cris_insn_version_usage): Correct comment for
495 cris_ver_v3p.
496
497 2001-03-24 Alan Modra <alan@linuxcare.com.au>
498
499 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
500 Add InvMem to first operand of "maskmovdqu".
501
502 2001-03-22 Hans-Peter Nilsson <hp@axis.com>
503
504 * cris.h (ADD_PC_INCR_OPCODE): New macro.
505
506 2001-03-21 Kazu Hirata <kazu@hxi.com>
507
508 * h8300.h: Fix formatting.
509
510 2001-03-22 Alan Modra <alan@linuxcare.com.au>
511
512 * i386.h (i386_optab): Add paddq, psubq.
513
514 2001-03-19 Alan Modra <alan@linuxcare.com.au>
515
516 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
517
518 2001-02-28 Igor Shevlyakov <igor@windriver.com>
519
520 * m68k.h: new defines for Coldfire V4. Update mcf to know
521 about mcf5407.
522
523 2001-02-18 lars brinkhoff <lars@nocrew.org>
524
525 * pdp11.h: New file.
526
527 2001-02-12 Jan Hubicka <jh@suse.cz>
528
529 * i386.h (i386_optab): SSE integer converison instructions have
530 64bit versions on x86-64.
531
532 2001-02-10 Nick Clifton <nickc@redhat.com>
533
534 * mips.h: Remove extraneous whitespace. Formating change to allow
535 for future contribution.
536
537 2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
538
539 * s390.h: New file.
540
541 2001-02-02 Patrick Macdonald <patrickm@redhat.com>
542
543 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
544 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
545 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
546
547 2001-01-24 Karsten Keil <kkeil@suse.de>
548
549 * i386.h (i386_optab): Fix swapgs
550
551 2001-01-14 Alan Modra <alan@linuxcare.com.au>
552
553 * hppa.h: Describe new '<' and '>' operand types, and tidy
554 existing comments.
555 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
556 Remove duplicate "ldw j(s,b),x". Sort some entries.
557
558 2001-01-13 Jan Hubicka <jh@suse.cz>
559
560 * i386.h (i386_optab): Fix pusha and ret templates.
561
562 2001-01-11 Peter Targett <peter.targett@arccores.com>
563
564 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
565 definitions for masking cpu type.
566 (arc_ext_operand_value) New structure for storing extended
567 operands.
568 (ARC_OPERAND_*) Flags for operand values.
569
570 2001-01-10 Jan Hubicka <jh@suse.cz>
571
572 * i386.h (pinsrw): Add.
573 (pshufw): Remove.
574 (cvttpd2dq): Fix operands.
575 (cvttps2dq): Likewise.
576 (movq2q): Rename to movdq2q.
577
578 2001-01-10 Richard Schaal <richard.schaal@intel.com>
579
580 * i386.h: Correct movnti instruction.
581
582 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
583
584 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
585 of operands (unsigned char or unsigned short).
586 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
587 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
588
589 2001-01-05 Jan Hubicka <jh@suse.cz>
590
591 * i386.h (i386_optab): Make [sml]fence template to use immext field.
592
593 2001-01-03 Jan Hubicka <jh@suse.cz>
594
595 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
596 introduced by Pentium4
597
598 2000-12-30 Jan Hubicka <jh@suse.cz>
599
600 * i386.h (i386_optab): Add "rex*" instructions;
601 add swapgs; disable jmp/call far direct instructions for
602 64bit mode; add syscall and sysret; disable registers for 0xc6
603 template. Add 'q' suffixes to extendable instructions, disable
604 obsolete instructions, add new sign/zero extension ones.
605 (i386_regtab): Add extended registers.
606 (*Suf): Add No_qSuf.
607 (q_Suf, wlq_Suf, bwlq_Suf): New.
608
609 2000-12-20 Jan Hubicka <jh@suse.cz>
610
611 * i386.h (i386_optab): Replace "Imm" with "EncImm".
612 (i386_regtab): Add flags field.
613
614 2000-12-12 Nick Clifton <nickc@redhat.com>
615
616 * mips.h: Fix formatting.
617
618 2000-12-01 Chris Demetriou <cgd@sibyte.com>
619
620 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
621 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
622 OP_*_SYSCALL definitions.
623 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
624 19 bit wait codes.
625 (MIPS operand specifier comments): Remove 'm', add 'U' and
626 'J', and update the meaning of 'B' so that it's more general.
627
628 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
629 INSN_ISA5): Renumber, redefine to mean the ISA at which the
630 instruction was added.
631 (INSN_ISA32): New constant.
632 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
633 Renumber to avoid new and/or renumbered INSN_* constants.
634 (INSN_MIPS32): Delete.
635 (ISA_UNKNOWN): New constant to indicate unknown ISA.
636 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
637 ISA_MIPS32): New constants, defined to be the mask of INSN_*
638 constants available at that ISA level.
639 (CPU_UNKNOWN): New constant to indicate unknown CPU.
640 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
641 define it with a unique value.
642 (OPCODE_IS_MEMBER): Update for new ISA membership-related
643 constant meanings.
644
645 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
646 definitions.
647
648 * mips.h (CPU_SB1): New constant.
649
650 2000-10-20 Jakub Jelinek <jakub@redhat.com>
651
652 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
653 Note that '3' is used for siam operand.
654
655 2000-09-22 Jim Wilson <wilson@cygnus.com>
656
657 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
658
659 2000-09-13 Anders Norlander <anorland@acc.umu.se>
660
661 * mips.h: Use defines instead of hard-coded processor numbers.
662 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
663 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
664 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
665 CPU_4KC, CPU_4KM, CPU_4KP): Define..
666 (OPCODE_IS_MEMBER): Use new defines.
667 (OP_MASK_SEL, OP_SH_SEL): Define.
668 (OP_MASK_CODE20, OP_SH_CODE20): Define.
669 Add 'P' to used characters.
670 Use 'H' for coprocessor select field.
671 Use 'm' for 20 bit breakpoint code.
672 Document new arg characters and add to used characters.
673 (INSN_MIPS32): New define for MIPS32 extensions.
674 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
675
676 2000-09-05 Alan Modra <alan@linuxcare.com.au>
677
678 * hppa.h: Mention cz completer.
679
680 2000-08-16 Jim Wilson <wilson@cygnus.com>
681
682 * ia64.h (IA64_OPCODE_POSTINC): New.
683
684 2000-08-15 H.J. Lu <hjl@gnu.org>
685
686 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
687 IgnoreSize change.
688
689 2000-08-08 Jason Eckhardt <jle@cygnus.com>
690
691 * i860.h: Small formatting adjustments.
692
693 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
694
695 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
696 Move related opcodes closer to each other.
697 Minor changes in comments, list undefined opcodes.
698
699 2000-07-26 Dave Brolley <brolley@redhat.com>
700
701 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
702
703 2000-07-22 Jason Eckhardt <jle@cygnus.com>
704
705 * i860.h (btne, bte, bla): Changed these opcodes
706 to use sbroff ('r') instead of split16 ('s').
707 (J, K, L, M): New operand types for 16-bit aligned fields.
708 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
709 use I, J, K, L, M instead of just I.
710 (T, U): New operand types for split 16-bit aligned fields.
711 (st.x): Changed these opcodes to use S, T, U instead of just S.
712 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
713 exist on the i860.
714 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
715 (pfeq.ss, pfeq.dd): New opcodes.
716 (st.s): Fixed incorrect mask bits.
717 (fmlow): Fixed incorrect mask bits.
718 (fzchkl, pfzchkl): Fixed incorrect mask bits.
719 (faddz, pfaddz): Fixed incorrect mask bits.
720 (form, pform): Fixed incorrect mask bits.
721 (pfld.l): Fixed incorrect mask bits.
722 (fst.q): Fixed incorrect mask bits.
723 (all floating point opcodes): Fixed incorrect mask bits for
724 handling of dual bit.
725
726 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
727
728 cris.h: New file.
729
730 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
731
732 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
733 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
734 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
735 (AVR_ISA_M83): Define for ATmega83, ATmega85.
736 (espm): Remove, because ESPM removed in databook update.
737 (eicall, eijmp): Move to the end of opcode table.
738
739 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
740
741 * m68hc11.h: New file for support of Motorola 68hc11.
742
743 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
744
745 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
746
747 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
748
749 * avr.h: New file with AVR opcodes.
750
751 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
752
753 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
754
755 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
756
757 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
758
759 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
760
761 * i386.h: Use sl_FP, not sl_Suf for fild.
762
763 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
764
765 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
766 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
767 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
768 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
769
770 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
771
772 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
773
774 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
775 Alexander Sokolov <robocop@netlink.ru>
776
777 * i386.h (i386_optab): Add cpu_flags for all instructions.
778
779 2000-05-13 Alan Modra <alan@linuxcare.com.au>
780
781 From Gavin Romig-Koch <gavin@cygnus.com>
782 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
783
784 2000-05-04 Timothy Wall <twall@cygnus.com>
785
786 * tic54x.h: New.
787
788 2000-05-03 J.T. Conklin <jtc@redback.com>
789
790 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
791 (PPC_OPERAND_VR): New operand flag for vector registers.
792
793 2000-05-01 Kazu Hirata <kazu@hxi.com>
794
795 * h8300.h (EOP): Add missing initializer.
796
797 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
798
799 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
800 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
801 New operand types l,y,&,fe,fE,fx added to support above forms.
802 (pa_opcodes): Replaced usage of 'x' as source/target for
803 floating point double-word loads/stores with 'fx'.
804
805 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
806 David Mosberger <davidm@hpl.hp.com>
807 Timothy Wall <twall@cygnus.com>
808 Jim Wilson <wilson@cygnus.com>
809
810 * ia64.h: New file.
811
812 2000-03-27 Nick Clifton <nickc@cygnus.com>
813
814 * d30v.h (SHORT_A1): Fix value.
815 (SHORT_AR): Renumber so that it is at the end of the list of short
816 instructions, not the end of the list of long instructions.
817
818 2000-03-26 Alan Modra <alan@linuxcare.com>
819
820 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
821 problem isn't really specific to Unixware.
822 (OLDGCC_COMPAT): Define.
823 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
824 destination %st(0).
825 Fix lots of comments.
826
827 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
828
829 * d30v.h:
830 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
831 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
832 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
833 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
834 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
835 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
836 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
837
838 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
839
840 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
841 fistpd without suffix.
842
843 2000-02-24 Nick Clifton <nickc@cygnus.com>
844
845 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
846 'signed_overflow_ok_p'.
847 Delete prototypes for cgen_set_flags() and cgen_get_flags().
848
849 2000-02-24 Andrew Haley <aph@cygnus.com>
850
851 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
852 (CGEN_CPU_TABLE): flags: new field.
853 Add prototypes for new functions.
854
855 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
856
857 * i386.h: Add some more UNIXWARE_COMPAT comments.
858
859 2000-02-23 Linas Vepstas <linas@linas.org>
860
861 * i370.h: New file.
862
863 2000-02-22 Chandra Chavva <cchavva@cygnus.com>
864
865 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
866 cannot be combined in parallel with ADD/SUBppp.
867
868 2000-02-22 Andrew Haley <aph@cygnus.com>
869
870 * mips.h: (OPCODE_IS_MEMBER): Add comment.
871
872 1999-12-30 Andrew Haley <aph@cygnus.com>
873
874 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
875 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
876 insns.
877
878 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
879
880 * i386.h: Qualify intel mode far call and jmp with x_Suf.
881
882 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
883
884 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
885 indirect jumps and calls. Add FF/3 call for intel mode.
886
887 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
888
889 * mn10300.h: Add new operand types. Add new instruction formats.
890
891 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
892
893 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
894 instruction.
895
896 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
897
898 * mips.h (INSN_ISA5): New.
899
900 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
901
902 * mips.h (OPCODE_IS_MEMBER): New.
903
904 1999-10-29 Nick Clifton <nickc@cygnus.com>
905
906 * d30v.h (SHORT_AR): Define.
907
908 1999-10-18 Michael Meissner <meissner@cygnus.com>
909
910 * alpha.h (alpha_num_opcodes): Convert to unsigned.
911 (alpha_num_operands): Ditto.
912
913 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
914
915 * hppa.h (pa_opcodes): Add load and store cache control to
916 instructions. Add ordered access load and store.
917
918 * hppa.h (pa_opcode): Add new entries for addb and addib.
919
920 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
921
922 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
923
924 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
925
926 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
927
928 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
929
930 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
931 and "be" using completer prefixes.
932
933 * hppa.h (pa_opcodes): Add initializers to silence compiler.
934
935 * hppa.h: Update comments about character usage.
936
937 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
938
939 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
940 up the new fstw & bve instructions.
941
942 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
943
944 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
945 instructions.
946
947 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
948
949 * hppa.h (pa_opcodes): Add long offset double word load/store
950 instructions.
951
952 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
953 stores.
954
955 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
956
957 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
958
959 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
960
961 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
962
963 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
964
965 * hppa.h (pa_opcodes): Add support for "b,l".
966
967 * hppa.h (pa_opcodes): Add support for "b,gate".
968
969 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
970
971 * hppa.h (pa_opcodes): Use 'fX' for first register operand
972 in xmpyu.
973
974 * hppa.h (pa_opcodes): Fix mask for probe and probei.
975
976 * hppa.h (pa_opcodes): Fix mask for depwi.
977
978 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
979
980 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
981 an explicit output argument.
982
983 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
984
985 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
986 Add a few PA2.0 loads and store variants.
987
988 1999-09-04 Steve Chamberlain <sac@pobox.com>
989
990 * pj.h: New file.
991
992 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
993
994 * i386.h (i386_regtab): Move %st to top of table, and split off
995 other fp reg entries.
996 (i386_float_regtab): To here.
997
998 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
999
1000 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1001 by 'f'.
1002
1003 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1004 Add supporting args.
1005
1006 * hppa.h: Document new completers and args.
1007 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1008 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1009 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1010 pmenb and pmdis.
1011
1012 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
1013 hshr, hsub, mixh, mixw, permh.
1014
1015 * hppa.h (pa_opcodes): Change completers in instructions to
1016 use 'c' prefix.
1017
1018 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1019 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1020
1021 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1022 fnegabs to use 'I' instead of 'F'.
1023
1024 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1025
1026 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1027 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1028 Alphabetically sort PIII insns.
1029
1030 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1031
1032 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1033
1034 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1035
1036 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1037 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1038
1039 * hppa.h: Document 64 bit condition completers.
1040
1041 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1042
1043 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1044
1045 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1046
1047 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1048 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1049 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1050
1051 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1052 Jeff Law <law@cygnus.com>
1053
1054 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1055
1056 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1057
1058 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1059 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1060
1061 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1062
1063 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1064
1065 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1066
1067 * hppa.h (struct pa_opcode): Add new field "flags".
1068 (FLAGS_STRICT): Define.
1069
1070 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1071 Jeff Law <law@cygnus.com>
1072
1073 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1074
1075 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1076
1077 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1078
1079 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1080 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1081 flag to fcomi and friends.
1082
1083 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1084
1085 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
1086 integer logical instructions.
1087
1088 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1089
1090 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1091 `n', `o'.
1092
1093 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1094 and new places `m', `M', `h'.
1095
1096 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1097
1098 * hppa.h (pa_opcodes): Add several processor specific system
1099 instructions.
1100
1101 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1102
1103 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1104 "addb", and "addib" to be used by the disassembler.
1105
1106 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1107
1108 * i386.h (ReverseModrm): Remove all occurences.
1109 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1110 movmskps, pextrw, pmovmskb, maskmovq.
1111 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1112 ignore the data size prefix.
1113
1114 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1115 Mostly stolen from Doug Ledford <dledford@redhat.com>
1116
1117 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1118
1119 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1120
1121 1999-04-14 Doug Evans <devans@casey.cygnus.com>
1122
1123 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1124 (CGEN_ATTR_TYPE): Update.
1125 (CGEN_ATTR_MASK): Number booleans starting at 0.
1126 (CGEN_ATTR_VALUE): Update.
1127 (CGEN_INSN_ATTR): Update.
1128
1129 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1130
1131 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1132 instructions.
1133
1134 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1135
1136 * hppa.h (bb, bvb): Tweak opcode/mask.
1137
1138
1139 1999-03-22 Doug Evans <devans@casey.cygnus.com>
1140
1141 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1142 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1143 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1144 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1145 Delete member max_insn_size.
1146 (enum cgen_cpu_open_arg): New enum.
1147 (cpu_open): Update prototype.
1148 (cpu_open_1): Declare.
1149 (cgen_set_cpu): Delete.
1150
1151 1999-03-11 Doug Evans <devans@casey.cygnus.com>
1152
1153 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1154 (CGEN_OPERAND_NIL): New macro.
1155 (CGEN_OPERAND): New member `type'.
1156 (@arch@_cgen_operand_table): Delete decl.
1157 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1158 (CGEN_OPERAND_TABLE): New struct.
1159 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1160 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1161 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1162 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1163 {get,set}_{int,vma}_operand.
1164 (@arch@_cgen_cpu_open): New arg `isa'.
1165 (cgen_set_cpu): Ditto.
1166
1167 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1168
1169 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1170
1171 1999-02-25 Doug Evans <devans@casey.cygnus.com>
1172
1173 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1174 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1175 enum cgen_hw_type.
1176 (CGEN_HW_TABLE): New struct.
1177 (hw_table): Delete declaration.
1178 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1179 to table entry to enum.
1180 (CGEN_OPINST): Ditto.
1181 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1182
1183 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1184
1185 * alpha.h (AXP_OPCODE_EV6): New.
1186 (AXP_OPCODE_NOPAL): Include it.
1187
1188 1999-02-09 Doug Evans <devans@casey.cygnus.com>
1189
1190 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1191 All uses updated. New members int_insn_p, max_insn_size,
1192 parse_operand,insert_operand,extract_operand,print_operand,
1193 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1194 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1195 extract_handlers,print_handlers.
1196 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1197 (CGEN_ATTR_BOOL_OFFSET): New macro.
1198 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1199 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1200 (cgen_opcode_handler): Renamed from cgen_base.
1201 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1202 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1203 all uses updated.
1204 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1205 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1206 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1207 (CGEN_OPCODE,CGEN_IBASE): New types.
1208 (CGEN_INSN): Rewrite.
1209 (CGEN_{ASM,DIS}_HASH*): Delete.
1210 (init_opcode_table,init_ibld_table): Declare.
1211 (CGEN_INSN_ATTR): New type.
1212
1213 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1214
1215 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1216 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1217 Change *Suf definitions to include x and d suffixes.
1218 (movsx): Use w_Suf and b_Suf.
1219 (movzx): Likewise.
1220 (movs): Use bwld_Suf.
1221 (fld): Change ordering. Use sld_FP.
1222 (fild): Add Intel Syntax equivalent of fildq.
1223 (fst): Use sld_FP.
1224 (fist): Use sld_FP.
1225 (fstp): Use sld_FP. Add x_FP version.
1226 (fistp): LLongMem version for Intel Syntax.
1227 (fcom, fcomp): Use sld_FP.
1228 (fadd, fiadd, fsub): Use sld_FP.
1229 (fsubr): Use sld_FP.
1230 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1231
1232 1999-01-27 Doug Evans <devans@casey.cygnus.com>
1233
1234 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1235 CGEN_MODE_UINT.
1236
1237 1999-01-16 Jeffrey A Law (law@cygnus.com)
1238
1239 * hppa.h (bv): Fix mask.
1240
1241 1999-01-05 Doug Evans <devans@casey.cygnus.com>
1242
1243 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1244 (CGEN_ATTR): Use it.
1245 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1246 (CGEN_ATTR_TABLE): New member dfault.
1247
1248 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1249
1250 * mips.h (MIPS16_INSN_BRANCH): New.
1251
1252 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1253
1254 The following is part of a change made by Edith Epstein
1255 <eepstein@sophia.cygnus.com> as part of a project to merge in
1256 changes by HP; HP did not create ChangeLog entries.
1257
1258 * hppa.h (completer_chars): list of chars to not put a space
1259 after.
1260
1261 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1262
1263 * i386.h (i386_optab): Permit w suffix on processor control and
1264 status word instructions.
1265
1266 1998-11-30 Doug Evans <devans@casey.cygnus.com>
1267
1268 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1269 (struct cgen_keyword_entry): Ditto.
1270 (struct cgen_operand): Ditto.
1271 (CGEN_IFLD): New typedef, with associated access macros.
1272 (CGEN_IFMT): New typedef, with associated access macros.
1273 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1274 (CGEN_IVALUE): New typedef.
1275 (struct cgen_insn): Delete const on syntax,attrs members.
1276 `format' now points to format data. Type of `value' is now
1277 CGEN_IVALUE.
1278 (struct cgen_opcode_table): New member ifld_table.
1279
1280 1998-11-18 Doug Evans <devans@casey.cygnus.com>
1281
1282 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1283 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1284 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1285 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1286 (cgen_opcode_table): Update type of dis_hash fn.
1287 (extract_operand): Update type of `insn_value' arg.
1288
1289 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1290
1291 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1292
1293 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1294
1295 * mips.h (INSN_MULT): Added.
1296
1297 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1298
1299 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1300
1301 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1302
1303 * cgen.h (CGEN_INSN_INT): New typedef.
1304 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1305 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1306 (CGEN_INSN_BYTES_PTR): New typedef.
1307 (CGEN_EXTRACT_INFO): New typedef.
1308 (cgen_insert_fn,cgen_extract_fn): Update.
1309 (cgen_opcode_table): New member `insn_endian'.
1310 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1311 (insert_operand,extract_operand): Update.
1312 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1313
1314 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1315
1316 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1317 (struct CGEN_HW_ENTRY): New member `attrs'.
1318 (CGEN_HW_ATTR): New macro.
1319 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1320 (CGEN_INSN_INVALID_P): New macro.
1321
1322 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1323
1324 * hppa.h: Add "fid".
1325
1326 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1327
1328 From Robert Andrew Dale <rob@nb.net>
1329 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1330 (AMD_3DNOW_OPCODE): Define.
1331
1332 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1333
1334 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1335
1336 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1337
1338 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1339
1340 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1341
1342 Move all global state data into opcode table struct, and treat
1343 opcode table as something that is "opened/closed".
1344 * cgen.h (CGEN_OPCODE_DESC): New type.
1345 (all fns): New first arg of opcode table descriptor.
1346 (cgen_set_parse_operand_fn): Add prototype.
1347 (cgen_current_machine,cgen_current_endian): Delete.
1348 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1349 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1350 dis_hash_table,dis_hash_table_entries.
1351 (opcode_open,opcode_close): Add prototypes.
1352
1353 * cgen.h (cgen_insn): New element `cdx'.
1354
1355 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1356
1357 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1358
1359 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1360
1361 * mn10300.h: Add "no_match_operands" field for instructions.
1362 (MN10300_MAX_OPERANDS): Define.
1363
1364 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1365
1366 * cgen.h (cgen_macro_insn_count): Declare.
1367
1368 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1369
1370 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1371 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1372 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1373 set_{int,vma}_operand.
1374
1375 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1376
1377 * mn10300.h: Add "machine" field for instructions.
1378 (MN103, AM30): Define machine types.
1379
1380 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1381
1382 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1383
1384 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1385
1386 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1387
1388 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1389
1390 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1391 and ud2b.
1392 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1393 those that happen to be implemented on pentiums.
1394
1395 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1396
1397 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1398 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1399 with Size16|IgnoreSize or Size32|IgnoreSize.
1400
1401 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1402
1403 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1404 (REPE): Rename to REPE_PREFIX_OPCODE.
1405 (i386_regtab_end): Remove.
1406 (i386_prefixtab, i386_prefixtab_end): Remove.
1407 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1408 of md_begin.
1409 (MAX_OPCODE_SIZE): Define.
1410 (i386_optab_end): Remove.
1411 (sl_Suf): Define.
1412 (sl_FP): Use sl_Suf.
1413
1414 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1415 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1416 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1417 data32, dword, and adword prefixes.
1418 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1419 regs.
1420
1421 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1422
1423 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1424
1425 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1426 register operands, because this is a common idiom. Flag them with
1427 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1428 fdivrp because gcc erroneously generates them. Also flag with a
1429 warning.
1430
1431 * i386.h: Add suffix modifiers to most insns, and tighter operand
1432 checks in some cases. Fix a number of UnixWare compatibility
1433 issues with float insns. Merge some floating point opcodes, using
1434 new FloatMF modifier.
1435 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1436 consistency.
1437
1438 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1439 IgnoreDataSize where appropriate.
1440
1441 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1442
1443 * i386.h: (one_byte_segment_defaults): Remove.
1444 (two_byte_segment_defaults): Remove.
1445 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1446
1447 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1448
1449 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1450 (cgen_hw_lookup_by_num): Declare.
1451
1452 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1453
1454 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1455 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1456
1457 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1458
1459 * cgen.h (cgen_asm_init_parse): Delete.
1460 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1461 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1462
1463 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1464
1465 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1466 (cgen_asm_finish_insn): Update prototype.
1467 (cgen_insn): New members num, data.
1468 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1469 dis_hash, dis_hash_table_size moved to ...
1470 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1471 All uses updated. New members asm_hash_p, dis_hash_p.
1472 (CGEN_MINSN_EXPANSION): New struct.
1473 (cgen_expand_macro_insn): Declare.
1474 (cgen_macro_insn_count): Declare.
1475 (get_insn_operands): Update prototype.
1476 (lookup_get_insn_operands): Declare.
1477
1478 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1479
1480 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1481 regKludge. Add operands types for string instructions.
1482
1483 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1484
1485 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1486 table.
1487
1488 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1489
1490 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1491 for `gettext'.
1492
1493 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1494
1495 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1496 Add IsString flag to string instructions.
1497 (IS_STRING): Don't define.
1498 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1499 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1500 (SS_PREFIX_OPCODE): Define.
1501
1502 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1503
1504 * i386.h: Revert March 24 patch; no more LinearAddress.
1505
1506 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1507
1508 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1509 instructions, and instead add FWait opcode modifier. Add short
1510 form of fldenv and fstenv.
1511 (FWAIT_OPCODE): Define.
1512
1513 * i386.h (i386_optab): Change second operand constraint of `mov
1514 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1515 allow legal instructions such as `movl %gs,%esi'
1516
1517 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1518
1519 * h8300.h: Various changes to fully bracket initializers.
1520
1521 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1522
1523 * i386.h: Set LinearAddress for lidt and lgdt.
1524
1525 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1526
1527 * cgen.h (CGEN_BOOL_ATTR): New macro.
1528
1529 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1530
1531 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1532
1533 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1534
1535 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1536 (cgen_insn): Record syntax and format entries here, rather than
1537 separately.
1538
1539 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1540
1541 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1542
1543 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1544
1545 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1546 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1547 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1548
1549 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1550
1551 * cgen.h (lookup_insn): New argument alias_p.
1552
1553 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1554
1555 Fix rac to accept only a0:
1556 * d10v.h (OPERAND_ACC): Split into:
1557 (OPERAND_ACC0, OPERAND_ACC1) .
1558 (OPERAND_GPR): Define.
1559
1560 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1561
1562 * cgen.h (CGEN_FIELDS): Define here.
1563 (CGEN_HW_ENTRY): New member `type'.
1564 (hw_list): Delete decl.
1565 (enum cgen_mode): Declare.
1566 (CGEN_OPERAND): New member `hw'.
1567 (enum cgen_operand_instance_type): Declare.
1568 (CGEN_OPERAND_INSTANCE): New type.
1569 (CGEN_INSN): New member `operands'.
1570 (CGEN_OPCODE_DATA): Make hw_list const.
1571 (get_insn_operands,lookup_insn): Add prototypes for.
1572
1573 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1574
1575 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1576 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1577 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1578 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1579
1580 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1581
1582 * cgen.h: Correct typo in comment end marker.
1583
1584 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1585
1586 * tic30.h: New file.
1587
1588 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1589
1590 * cgen.h: Add prototypes for cgen_save_fixups(),
1591 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1592 of cgen_asm_finish_insn() to return a char *.
1593
1594 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1595
1596 * cgen.h: Formatting changes to improve readability.
1597
1598 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1599
1600 * cgen.h (*): Clean up pass over `struct foo' usage.
1601 (CGEN_ATTR): Make unsigned char.
1602 (CGEN_ATTR_TYPE): Update.
1603 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1604 (cgen_base): Move member `attrs' to cgen_insn.
1605 (CGEN_KEYWORD): New member `null_entry'.
1606 (CGEN_{SYNTAX,FORMAT}): New types.
1607 (cgen_insn): Format and syntax separated from each other.
1608
1609 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1610
1611 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1612 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1613 flags_{used,set} long.
1614 (d30v_operand): Make flags field long.
1615
1616 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1617
1618 * m68k.h: Fix comment describing operand types.
1619
1620 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1621
1622 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1623 everything else after down.
1624
1625 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1626
1627 * d10v.h (OPERAND_FLAG): Split into:
1628 (OPERAND_FFLAG, OPERAND_CFLAG) .
1629
1630 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1631
1632 * mips.h (struct mips_opcode): Changed comments to reflect new
1633 field usage.
1634
1635 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1636
1637 * mips.h: Added to comments a quick-ref list of all assigned
1638 operand type characters.
1639 (OP_{MASK,SH}_PERFREG): New macros.
1640
1641 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1642
1643 * sparc.h: Add '_' and '/' for v9a asr's.
1644 Patch from David Miller <davem@vger.rutgers.edu>
1645
1646 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1647
1648 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1649 area are not available in the base model (H8/300).
1650
1651 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1652
1653 * m68k.h: Remove documentation of ` operand specifier.
1654
1655 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1656
1657 * m68k.h: Document q and v operand specifiers.
1658
1659 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1660
1661 * v850.h (struct v850_opcode): Add processors field.
1662 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1663 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1664 (PROCESSOR_V850EA): New bit constants.
1665
1666 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1667
1668 Merge changes from Martin Hunt:
1669
1670 * d30v.h: Allow up to 64 control registers. Add
1671 SHORT_A5S format.
1672
1673 * d30v.h (LONG_Db): New form for delayed branches.
1674
1675 * d30v.h: (LONG_Db): New form for repeati.
1676
1677 * d30v.h (SHORT_D2B): New form.
1678
1679 * d30v.h (SHORT_A2): New form.
1680
1681 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1682 registers are used. Needed for VLIW optimization.
1683
1684 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1685
1686 * cgen.h: Move assembler interface section
1687 up so cgen_parse_operand_result is defined for cgen_parse_address.
1688 (cgen_parse_address): Update prototype.
1689
1690 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1691
1692 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1693
1694 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1695
1696 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1697 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1698 <paubert@iram.es>.
1699
1700 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1701 <paubert@iram.es>.
1702
1703 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1704 <paubert@iram.es>.
1705
1706 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1707 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1708
1709 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1710
1711 * v850.h (V850_NOT_R0): New flag.
1712
1713 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1714
1715 * v850.h (struct v850_opcode): Remove flags field.
1716
1717 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1718
1719 * v850.h (struct v850_opcode): Add flags field.
1720 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1721 fields.
1722 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1723 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1724
1725 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1726
1727 * arc.h: New file.
1728
1729 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1730
1731 * sparc.h (sparc_opcodes): Declare as const.
1732
1733 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1734
1735 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1736 uses single or double precision floating point resources.
1737 (INSN_NO_ISA, INSN_ISA1): Define.
1738 (cpu specific INSN macros): Tweak into bitmasks outside the range
1739 of INSN_ISA field.
1740
1741 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1742
1743 * i386.h: Fix pand opcode.
1744
1745 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1746
1747 * mips.h: Widen INSN_ISA and move it to a more convenient
1748 bit position. Add INSN_3900.
1749
1750 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1751
1752 * mips.h (struct mips_opcode): added new field membership.
1753
1754 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1755
1756 * i386.h (movd): only Reg32 is allowed.
1757
1758 * i386.h: add fcomp and ud2. From Wayne Scott
1759 <wscott@ichips.intel.com>.
1760
1761 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1762
1763 * i386.h: Add MMX instructions.
1764
1765 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1766
1767 * i386.h: Remove W modifier from conditional move instructions.
1768
1769 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1770
1771 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1772 with no arguments to match that generated by the UnixWare
1773 assembler.
1774
1775 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1776
1777 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1778 (cgen_parse_operand_fn): Declare.
1779 (cgen_init_parse_operand): Declare.
1780 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1781 new argument `want'.
1782 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1783 (enum cgen_parse_operand_type): New enum.
1784
1785 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1786
1787 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1788
1789 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1790
1791 * cgen.h: New file.
1792
1793 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1796 fdivrp.
1797
1798 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1799
1800 * v850.h (extract): Make unsigned.
1801
1802 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1803
1804 * i386.h: Add iclr.
1805
1806 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1807
1808 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1809 take a direction bit.
1810
1811 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1812
1813 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1814
1815 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1816
1817 * sparc.h: Include <ansidecl.h>. Update function declarations to
1818 use prototypes, and to use const when appropriate.
1819
1820 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1821
1822 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1823
1824 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1825
1826 * d10v.h: Change pre_defined_registers to
1827 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1828
1829 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1830
1831 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1832 Change mips_opcodes from const array to a pointer,
1833 and change bfd_mips_num_opcodes from const int to int,
1834 so that we can increase the size of the mips opcodes table
1835 dynamically.
1836
1837 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1838
1839 * d30v.h (FLAG_X): Remove unused flag.
1840
1841 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1842
1843 * d30v.h: New file.
1844
1845 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1846
1847 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1848 (PDS_VALUE): Macro to access value field of predefined symbols.
1849 (tic80_next_predefined_symbol): Add prototype.
1850
1851 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1852
1853 * tic80.h (tic80_symbol_to_value): Change prototype to match
1854 change in function, added class parameter.
1855
1856 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1857
1858 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1859 endmask fields, which are somewhat weird in that 0 and 32 are
1860 treated exactly the same.
1861
1862 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1863
1864 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1865 rather than a constant that is 2**X. Reorder them to put bits for
1866 operands that have symbolic names in the upper bits, so they can
1867 be packed into an int where the lower bits contain the value that
1868 corresponds to that symbolic name.
1869 (predefined_symbo): Add struct.
1870 (tic80_predefined_symbols): Declare array of translations.
1871 (tic80_num_predefined_symbols): Declare size of that array.
1872 (tic80_value_to_symbol): Declare function.
1873 (tic80_symbol_to_value): Declare function.
1874
1875 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1876
1877 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1878
1879 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1880
1881 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1882 be the destination register.
1883
1884 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1885
1886 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1887 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1888 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1889 that the opcode can have two vector instructions in a single
1890 32 bit word and we have to encode/decode both.
1891
1892 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1893
1894 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1895 TIC80_OPERAND_RELATIVE for PC relative.
1896 (TIC80_OPERAND_BASEREL): New flag bit for register
1897 base relative.
1898
1899 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1900
1901 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1902
1903 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1904
1905 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1906 ":s" modifier for scaling.
1907
1908 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1909
1910 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1911 (TIC80_OPERAND_M_LI): Ditto
1912
1913 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1914
1915 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1916 (TIC80_OPERAND_CC): New define for condition code operand.
1917 (TIC80_OPERAND_CR): New define for control register operand.
1918
1919 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1920
1921 * tic80.h (struct tic80_opcode): Name changed.
1922 (struct tic80_opcode): Remove format field.
1923 (struct tic80_operand): Add insertion and extraction functions.
1924 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1925 correct ones.
1926 (FMT_*): Ditto.
1927
1928 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1929
1930 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1931 type IV instruction offsets.
1932
1933 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1934
1935 * tic80.h: New file.
1936
1937 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1938
1939 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1940
1941 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1942
1943 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1944 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1945 * v850.h: Fix comment, v850_operand not powerpc_operand.
1946
1947 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1948
1949 * mn10200.h: Flesh out structures and definitions needed by
1950 the mn10200 assembler & disassembler.
1951
1952 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1953
1954 * mips.h: Add mips16 definitions.
1955
1956 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1957
1958 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1959
1960 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1961
1962 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1963 (MN10300_OPERAND_MEMADDR): Define.
1964
1965 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1966
1967 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1968
1969 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1970
1971 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1972
1973 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1974
1975 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1976
1977 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1978
1979 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1980
1981 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1982
1983 * alpha.h: Don't include "bfd.h"; private relocation types are now
1984 negative to minimize problems with shared libraries. Organize
1985 instruction subsets by AMASK extensions and PALcode
1986 implementation.
1987 (struct alpha_operand): Move flags slot for better packing.
1988
1989 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1990
1991 * v850.h (V850_OPERAND_RELAX): New operand flag.
1992
1993 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1994
1995 * mn10300.h (FMT_*): Move operand format definitions
1996 here.
1997
1998 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1999
2000 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2001
2002 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2003
2004 * mn10300.h (mn10300_opcode): Add "format" field.
2005 (MN10300_OPERAND_*): Define.
2006
2007 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2008
2009 * mn10x00.h: Delete.
2010 * mn10200.h, mn10300.h: New files.
2011
2012 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2013
2014 * mn10x00.h: New file.
2015
2016 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2017
2018 * v850.h: Add new flag to indicate this instruction uses a PC
2019 displacement.
2020
2021 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2022
2023 * h8300.h (stmac): Add missing instruction.
2024
2025 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2026
2027 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2028 field.
2029
2030 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2031
2032 * v850.h (V850_OPERAND_EP): Define.
2033
2034 * v850.h (v850_opcode): Add size field.
2035
2036 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2037
2038 * v850.h (v850_operands): Add insert and extract fields, pointers
2039 to functions used to handle unusual operand encoding.
2040 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
2041 V850_OPERAND_SIGNED): Defined.
2042
2043 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2044
2045 * v850.h (v850_operands): Add flags field.
2046 (OPERAND_REG, OPERAND_NUM): Defined.
2047
2048 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2049
2050 * v850.h: New file.
2051
2052 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2053
2054 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2055 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2056 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2057 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2058 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2059 Defined.
2060
2061 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2062
2063 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2064 a 3 bit space id instead of a 2 bit space id.
2065
2066 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2067
2068 * d10v.h: Add some additional defines to support the
2069 assembler in determining which operations can be done in parallel.
2070
2071 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2072
2073 * h8300.h (SN): Define.
2074 (eepmov.b): Renamed from "eepmov"
2075 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2076 with them.
2077
2078 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2079
2080 * d10v.h (OPERAND_SHIFT): New operand flag.
2081
2082 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2083
2084 * d10v.h: Changes for divs, parallel-only instructions, and
2085 signed numbers.
2086
2087 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2088
2089 * d10v.h (pd_reg): Define. Putting the definition here allows
2090 the assembler and disassembler to share the same struct.
2091
2092 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2093
2094 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2095 Williams <steve@icarus.com>.
2096
2097 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2098
2099 * d10v.h: New file.
2100
2101 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2102
2103 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2104
2105 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2106
2107 * m68k.h (mcf5200): New macro.
2108 Document names of coldfire control registers.
2109
2110 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2111
2112 * h8300.h (SRC_IN_DST): Define.
2113
2114 * h8300.h (UNOP3): Mark the register operand in this insn
2115 as a source operand, not a destination operand.
2116 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2117 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2118 register operand with SRC_IN_DST.
2119
2120 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2121
2122 * alpha.h: New file.
2123
2124 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2125
2126 * rs6k.h: Remove obsolete file.
2127
2128 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2129
2130 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2131 fdivp, and fdivrp. Add ffreep.
2132
2133 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2134
2135 * h8300.h: Reorder various #defines for readability.
2136 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2137 (BITOP): Accept additional (unused) argument. All callers changed.
2138 (EBITOP): Likewise.
2139 (O_LAST): Bump.
2140 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2141
2142 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2143 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2144 (BITOP, EBITOP): Handle new H8/S addressing modes for
2145 bit insns.
2146 (UNOP3): Handle new shift/rotate insns on the H8/S.
2147 (insns using exr): New instructions.
2148 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2149
2150 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2151
2152 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2153 was incorrect.
2154
2155 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2156
2157 * h8300.h (START): Remove.
2158 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2159 and mov.l insns that can be relaxed.
2160
2161 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2162
2163 * i386.h: Remove Abs32 from lcall.
2164
2165 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2166
2167 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2168 (SLCPOP): New macro.
2169 Mark X,Y opcode letters as in use.
2170
2171 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2172
2173 * sparc.h (F_FLOAT, F_FBR): Define.
2174
2175 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2176
2177 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2178 from all insns.
2179 (ABS8SRC,ABS8DST): Add ABS8MEM.
2180 (add.l): Fix reg+reg variant.
2181 (eepmov.w): Renamed from eepmovw.
2182 (ldc,stc): Fix many cases.
2183
2184 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2185
2186 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2187
2188 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2189
2190 * sparc.h (O): Mark operand letter as in use.
2191
2192 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2193
2194 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2195 Mark operand letters uU as in use.
2196
2197 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2198
2199 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2200 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2201 (SPARC_OPCODE_SUPPORTED): New macro.
2202 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2203 (F_NOTV9): Delete.
2204
2205 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2206
2207 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2208 declaration consistent with return type in definition.
2209
2210 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2211
2212 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2213
2214 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2215
2216 * i386.h (i386_regtab): Add 80486 test registers.
2217
2218 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2219
2220 * i960.h (I_HX): Define.
2221 (i960_opcodes): Add HX instruction.
2222
2223 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2224
2225 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2226 and fclex.
2227
2228 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2229
2230 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2231 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2232 (bfd_* defines): Delete.
2233 (sparc_opcode_archs): Replaces architecture_pname.
2234 (sparc_opcode_lookup_arch): Declare.
2235 (NUMOPCODES): Delete.
2236
2237 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2238
2239 * sparc.h (enum sparc_architecture): Add v9a.
2240 (ARCHITECTURES_CONFLICT_P): Update.
2241
2242 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2243
2244 * i386.h: Added Pentium Pro instructions.
2245
2246 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2247
2248 * m68k.h: Document new 'W' operand place.
2249
2250 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2251
2252 * hppa.h: Add lci and syncdma instructions.
2253
2254 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2255
2256 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2257 instructions.
2258
2259 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2260
2261 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2262 assembler's -mcom and -many switches.
2263
2264 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2265
2266 * i386.h: Fix cmpxchg8b extension opcode description.
2267
2268 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2269
2270 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2271 and register cr4.
2272
2273 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2274
2275 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2276
2277 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2278
2279 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2280
2281 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2282
2283 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2284
2285 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2286
2287 * m68kmri.h: Remove.
2288
2289 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2290 declarations. Remove F_ALIAS and flag field of struct
2291 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2292 int. Make name and args fields of struct m68k_opcode const.
2293
2294 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2295
2296 * sparc.h (F_NOTV9): Define.
2297
2298 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2299
2300 * mips.h (INSN_4010): Define.
2301
2302 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2303
2304 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2305
2306 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2307 * m68k.h: Fix argument descriptions of coprocessor
2308 instructions to allow only alterable operands where appropriate.
2309 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2310 (m68k_opcode_aliases): Add more aliases.
2311
2312 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2313
2314 * m68k.h: Added explcitly short-sized conditional branches, and a
2315 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2316 svr4-based configurations.
2317
2318 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2319
2320 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2321 * i386.h: added missing Data16/Data32 flags to a few instructions.
2322
2323 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2324
2325 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2326 (OP_MASK_BCC, OP_SH_BCC): Define.
2327 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2328 (OP_MASK_CCC, OP_SH_CCC): Define.
2329 (INSN_READ_FPR_R): Define.
2330 (INSN_RFE): Delete.
2331
2332 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2333
2334 * m68k.h (enum m68k_architecture): Deleted.
2335 (struct m68k_opcode_alias): New type.
2336 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2337 matching constraints, values and flags. As a side effect of this,
2338 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2339 as I know were never used, now may need re-examining.
2340 (numopcodes): Now const.
2341 (m68k_opcode_aliases, numaliases): New variables.
2342 (endop): Deleted.
2343 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2344 m68k_opcode_aliases; update declaration of m68k_opcodes.
2345
2346 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2347
2348 * hppa.h (delay_type): Delete unused enumeration.
2349 (pa_opcode): Replace unused delayed field with an architecture
2350 field.
2351 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2352
2353 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2354
2355 * mips.h (INSN_ISA4): Define.
2356
2357 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2358
2359 * mips.h (M_DLA_AB, M_DLI): Define.
2360
2361 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2362
2363 * hppa.h (fstwx): Fix single-bit error.
2364
2365 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2366
2367 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2368
2369 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2370
2371 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2372 debug registers. From Charles Hannum (mycroft@netbsd.org).
2373
2374 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2375
2376 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2377 i386 support:
2378 * i386.h (MOV_AX_DISP32): New macro.
2379 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2380 of several call/return instructions.
2381 (ADDR_PREFIX_OPCODE): New macro.
2382
2383 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2384
2385 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2386
2387 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2388 char.
2389 (struct vot, field `name'): ditto.
2390
2391 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2392
2393 * vax.h: Supply and properly group all values in end sentinel.
2394
2395 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2396
2397 * mips.h (INSN_ISA, INSN_4650): Define.
2398
2399 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2400
2401 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2402 systems with a separate instruction and data cache, such as the
2403 29040, these instructions take an optional argument.
2404
2405 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2406
2407 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2408 INSN_TRAP.
2409
2410 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2411
2412 * mips.h (INSN_STORE_MEMORY): Define.
2413
2414 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2415
2416 * sparc.h: Document new operand type 'x'.
2417
2418 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2419
2420 * i960.h (I_CX2): New instruction category. It includes
2421 instructions available on Cx and Jx processors.
2422 (I_JX): New instruction category, for JX-only instructions.
2423 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2424 Jx-only instructions, in I_JX category.
2425
2426 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2427
2428 * ns32k.h (endop): Made pointer const too.
2429
2430 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2431
2432 * ns32k.h: Drop Q operand type as there is no correct use
2433 for it. Add I and Z operand types which allow better checking.
2434
2435 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2436
2437 * h8300.h (xor.l) :fix bit pattern.
2438 (L_2): New size of operand.
2439 (trapa): Use it.
2440
2441 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2442
2443 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2444
2445 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2446
2447 * sparc.h: Include v9 definitions.
2448
2449 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2450
2451 * m68k.h (m68060): Defined.
2452 (m68040up, mfloat, mmmu): Include it.
2453 (struct m68k_opcode): Widen `arch' field.
2454 (m68k_opcodes): Updated for M68060. Removed comments that were
2455 instructions commented out by "JF" years ago.
2456
2457 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2458
2459 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2460 add a one-bit `flags' field.
2461 (F_ALIAS): New macro.
2462
2463 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2464
2465 * h8300.h (dec, inc): Get encoding right.
2466
2467 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2468
2469 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2470 a flag instead.
2471 (PPC_OPERAND_SIGNED): Define.
2472 (PPC_OPERAND_SIGNOPT): Define.
2473
2474 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2475
2476 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2477 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2478
2479 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2480
2481 * i386.h: Reverse last change. It'll be handled in gas instead.
2482
2483 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2484
2485 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2486 slower on the 486 and used the implicit shift count despite the
2487 explicit operand. The one-operand form is still available to get
2488 the shorter form with the implicit shift count.
2489
2490 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2491
2492 * hppa.h: Fix typo in fstws arg string.
2493
2494 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2495
2496 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2497
2498 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2499
2500 * ppc.h (PPC_OPCODE_601): Define.
2501
2502 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2503
2504 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2505 (so we can determine valid completers for both addb and addb[tf].)
2506
2507 * hppa.h (xmpyu): No floating point format specifier for the
2508 xmpyu instruction.
2509
2510 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2511
2512 * ppc.h (PPC_OPERAND_NEXT): Define.
2513 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2514 (struct powerpc_macro): Define.
2515 (powerpc_macros, powerpc_num_macros): Declare.
2516
2517 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2518
2519 * ppc.h: New file. Header file for PowerPC opcode table.
2520
2521 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2522
2523 * hppa.h: More minor template fixes for sfu and copr (to allow
2524 for easier disassembly).
2525
2526 * hppa.h: Fix templates for all the sfu and copr instructions.
2527
2528 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2529
2530 * i386.h (push): Permit Imm16 operand too.
2531
2532 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2533
2534 * h8300.h (andc): Exists in base arch.
2535
2536 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2537
2538 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2539 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2540
2541 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2542
2543 * hppa.h: Add FP quadword store instructions.
2544
2545 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2546
2547 * mips.h: (M_J_A): Added.
2548 (M_LA): Removed.
2549
2550 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2551
2552 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2553 <mellon@pepper.ncd.com>.
2554
2555 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2556
2557 * hppa.h: Immediate field in probei instructions is unsigned,
2558 not low-sign extended.
2559
2560 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2561
2562 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2563
2564 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2565
2566 * i386.h: Add "fxch" without operand.
2567
2568 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2569
2570 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2571
2572 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2573
2574 * hppa.h: Add gfw and gfr to the opcode table.
2575
2576 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2577
2578 * m88k.h: extended to handle m88110.
2579
2580 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2581
2582 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2583 addresses.
2584
2585 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2586
2587 * i960.h (i960_opcodes): Properly bracket initializers.
2588
2589 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2590
2591 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2592
2593 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2594
2595 * m68k.h (two): Protect second argument with parentheses.
2596
2597 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2598
2599 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2600 Deleted old in/out instructions in "#if 0" section.
2601
2602 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2603
2604 * i386.h (i386_optab): Properly bracket initializers.
2605
2606 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2607
2608 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2609 Jeff Law, law@cs.utah.edu).
2610
2611 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2612
2613 * i386.h (lcall): Accept Imm32 operand also.
2614
2615 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2616
2617 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2618 (M_DABS): Added.
2619
2620 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2621
2622 * mips.h (INSN_*): Changed values. Removed unused definitions.
2623 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2624 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2625 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2626 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2627 (M_*): Added new values for r6000 and r4000 macros.
2628 (ANY_DELAY): Removed.
2629
2630 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2631
2632 * mips.h: Added M_LI_S and M_LI_SS.
2633
2634 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2635
2636 * h8300.h: Get some rare mov.bs correct.
2637
2638 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2639
2640 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2641 been included.
2642
2643 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2644
2645 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2646 jump instructions, for use in disassemblers.
2647
2648 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2649
2650 * m88k.h: Make bitfields just unsigned, not unsigned long or
2651 unsigned short.
2652
2653 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2654
2655 * hppa.h: New argument type 'y'. Use in various float instructions.
2656
2657 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2658
2659 * hppa.h (break): First immediate field is unsigned.
2660
2661 * hppa.h: Add rfir instruction.
2662
2663 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2664
2665 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2666
2667 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2668
2669 * mips.h: Reworked the hazard information somewhat, and fixed some
2670 bugs in the instruction hazard descriptions.
2671
2672 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2673
2674 * m88k.h: Corrected a couple of opcodes.
2675
2676 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2677
2678 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2679 new version includes instruction hazard information, but is
2680 otherwise reasonably similar.
2681
2682 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2683
2684 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2685
2686 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2687
2688 Patches from Jeff Law, law@cs.utah.edu:
2689 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2690 Make the tables be the same for the following instructions:
2691 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2692 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2693 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2694 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2695 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2696 "fcmp", and "ftest".
2697
2698 * hppa.h: Make new and old tables the same for "break", "mtctl",
2699 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2700 Fix typo in last patch. Collapse several #ifdefs into a
2701 single #ifdef.
2702
2703 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2704 of the comments up-to-date.
2705
2706 * hppa.h: Update "free list" of letters and update
2707 comments describing each letter's function.
2708
2709 Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2710
2711 * h8300.h: Lots of little fixes for the h8/300h.
2712
2713 Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2714
2715 Support for H8/300-H
2716 * h8300.h: Lots of new opcodes.
2717
2718 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2719
2720 * h8300.h: checkpoint, includes H8/300-H opcodes.
2721
2722 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2723
2724 * Patches from Jeffrey Law <law@cs.utah.edu>.
2725 * hppa.h: Rework single precision FP
2726 instructions so that they correctly disassemble code
2727 PA1.1 code.
2728
2729 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2730
2731 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2732 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2733
2734 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2735
2736 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2737 gdb will define it for now.
2738
2739 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2740
2741 * sparc.h: Don't end enumerator list with comma.
2742
2743 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2744
2745 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2746 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2747 ("bc2t"): Correct typo.
2748 ("[ls]wc[023]"): Use T rather than t.
2749 ("c[0123]"): Define general coprocessor instructions.
2750
2751 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2752
2753 * m68k.h: Move split point for gcc compilation more towards
2754 middle.
2755
2756 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2757
2758 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2759 simply wrong, ics, rfi, & rfsvc were missing).
2760 Add "a" to opr_ext for "bb". Doc fix.
2761
2762 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2763
2764 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2765 * mips.h: Add casts, to suppress warnings about shifting too much.
2766 * m68k.h: Document the placement code '9'.
2767
2768 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2769
2770 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2771 allows callers to break up the large initialized struct full of
2772 opcodes into two half-sized ones. This permits GCC to compile
2773 this module, since it takes exponential space for initializers.
2774 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2775
2776 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2777
2778 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2779 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2780 initialized structs in it.
2781
2782 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2783
2784 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2785 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2786 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2787
2788 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2789
2790 * mips.h: document "i" and "j" operands correctly.
2791
2792 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2793
2794 * mips.h: Removed endianness dependency.
2795
2796 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2797
2798 * h8300.h: include info on number of cycles per instruction.
2799
2800 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2801
2802 * hppa.h: Move handy aliases to the front. Fix masks for extract
2803 and deposit instructions.
2804
2805 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2806
2807 * i386.h: accept shld and shrd both with and without the shift
2808 count argument, which is always %cl.
2809
2810 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2811
2812 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2813 (one_byte_segment_defaults, two_byte_segment_defaults,
2814 i386_prefixtab_end): Ditto.
2815
2816 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2817
2818 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2819 for operand 2; from John Carr, jfc@dsg.dec.com.
2820
2821 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2822
2823 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2824 always use 16-bit offsets. Makes calculated-size jump tables
2825 feasible.
2826
2827 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2828
2829 * i386.h: Fix one-operand forms of in* and out* patterns.
2830
2831 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2832
2833 * m68k.h: Added CPU32 support.
2834
2835 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2836
2837 * mips.h (break): Disassemble the argument. Patch from
2838 jonathan@cs.stanford.edu (Jonathan Stone).
2839
2840 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2841
2842 * m68k.h: merged Motorola and MIT syntax.
2843
2844 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2845
2846 * m68k.h (pmove): make the tests less strict, the 68k book is
2847 wrong.
2848
2849 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2850
2851 * m68k.h (m68ec030): Defined as alias for 68030.
2852 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2853 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2854 them. Tightened description of "fmovex" to distinguish it from
2855 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2856 up descriptions that claimed versions were available for chips not
2857 supporting them. Added "pmovefd".
2858
2859 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2860
2861 * m68k.h: fix where the . goes in divull
2862
2863 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2864
2865 * m68k.h: the cas2 instruction is supposed to be written with
2866 indirection on the last two operands, which can be either data or
2867 address registers. Added a new operand type 'r' which accepts
2868 either register type. Added new cases for cas2l and cas2w which
2869 use them. Corrected masks for cas2 which failed to recognize use
2870 of address register.
2871
2872 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2873
2874 * m68k.h: Merged in patches (mostly m68040-specific) from
2875 Colin Smith <colin@wrs.com>.
2876
2877 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2878 base). Also cleaned up duplicates, re-ordered instructions for
2879 the sake of dis-assembling (so aliases come after standard names).
2880 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2881
2882 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2883
2884 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2885 all missing .s
2886
2887 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2888
2889 * sparc.h: Moved tables to BFD library.
2890
2891 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2892
2893 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2894
2895 * h8300.h: Finish filling in all the holes in the opcode table,
2896 so that the Lucid C compiler can digest this as well...
2897
2898 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2899
2900 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2901 Fix opcodes on various sizes of fild/fist instructions
2902 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2903 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2904
2905 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2906
2907 * h8300.h: Fill in all the holes in the opcode table so that the
2908 losing HPUX C compiler can digest this...
2909
2910 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2911
2912 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2913 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2914
2915 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2916
2917 * sparc.h: Add new architecture variant sparclite; add its scan
2918 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2919
2920 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2921
2922 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2923 fy@lucid.com).
2924
2925 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2926
2927 * rs6k.h: New version from IBM (Metin).
2928
2929 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2930
2931 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2932 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2933
2934 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2935
2936 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2937
2938 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2939
2940 * m68k.h (one, two): Cast macro args to unsigned to suppress
2941 complaints from compiler and lint about integer overflow during
2942 shift.
2943
2944 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2945
2946 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2947
2948 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2949
2950 * mips.h: Make bitfield layout depend on the HOST compiler,
2951 not on the TARGET system.
2952
2953 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2954
2955 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2956 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2957 <TRANLE@INTELLICORP.COM>.
2958
2959 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2960
2961 * h8300.h: turned op_type enum into #define list
2962
2963 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2964
2965 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2966 similar instructions -- they've been renamed to "fitoq", etc.
2967 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2968 number of arguments.
2969 * h8300.h: Remove extra ; which produces compiler warning.
2970
2971 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2972
2973 * sparc.h: fix opcode for tsubcctv.
2974
2975 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2976
2977 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2978
2979 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2980
2981 * sparc.h (nop): Made the 'lose' field be even tighter,
2982 so only a standard 'nop' is disassembled as a nop.
2983
2984 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2985
2986 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2987 disassembled as a nop.
2988
2989 Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2990
2991 * m68k.h, sparc.h: ANSIfy enums.
2992
2993 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2994
2995 * sparc.h: fix a typo.
2996
2997 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2998
2999 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3000 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
3001 vax.h: Renamed from ../<foo>-opcode.h.
3002
3003 \f
3004 Local Variables:
3005 version-control: never
3006 End:
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