include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
   3
   4    Contributed by the Center for Software Science at the
   5    University of Utah (pa-gdb-bugs@cs.utah.edu).
   6
   7 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
   8
   9 GAS/GDB is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 1, or (at your option)
  12 any later version.
  13
  14 GAS/GDB is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GAS or GDB; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  22
  23 #if !defined(__STDC__) && !defined(const)
  24 #define const
  25 #endif
  26
  27 /*
  28  * Structure of an opcode table entry.
  29  */
  30
  31 /* There are two kinds of delay slot nullification: normal which is
  32  * controled by the nullification bit, and conditional, which depends
  33  * on the direction of the branch and its success or failure.
  34  *
  35  * NONE is unfortunately #defined in the hiux system include files.
  36  * #undef it away.
  37  */
  38 #undef NONE
  39 struct pa_opcode
  40 {
  41     const char *name;
  42     unsigned long int match;    /* Bits that must be set...  */
  43     unsigned long int mask;     /* ... in these bits. */
  44     char *args;
  45     enum pa_arch arch;
  46     char flags;
  47 };
  48
  49 /* Enable/disable strict syntax checking.  Not currently used, but will
  50    be necessary for PA2.0 support in the future.  */
  51 #define FLAG_STRICT 0x1
  52
  53 /*
  54    All hppa opcodes are 32 bits.
  55
  56    The match component is a mask saying which bits must match a
  57    particular opcode in order for an instruction to be an instance
  58    of that opcode.
  59
  60    The args component is a string containing one character for each operand of
  61    the instruction.  Characters used as a prefix allow any second character to
  62    be used without conflicting with the main operand characters.
  63
  64    Bit positions in this description follow HP usage of lsb = 31,
  65    "at" is lsb of field.
  66
  67    In the args field, the following characters must match exactly:
  68
  69         '+,() '
  70
  71    In the args field, the following characters are unused:
  72
  73         '  "#  &     -  /          :;< > @'
  74         ' BC        LM       U   YZ[\]  '
  75         '   de gh   lm             { } '
  76
  77    Here are all the characters:
  78
  79         ' !"#$%&'()*+-,./0123456789:;<=>?@'
  80         'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  81         'abcdefghijklmnopqrstuvwxyz{|}~'
  82
  83 Kinds of operands:
  84    x    integer register field at 15.
  85    b    integer register field at 10.
  86    t    integer register field at 31.
  87    a    integer register field at 10 and 15 (for PERMH)
  88    y    floating point register field at 31
  89    5    5 bit immediate at 15.
  90    s    2 bit space specifier at 17.
  91    S    3 bit space specifier at 18.
  92    V    5 bit immediate value at 31
  93    i    11 bit immediate value at 31
  94    j    14 bit immediate value at 31
  95    k    21 bit immediate value at 31
  96    n    nullification for branch instructions
  97    N    nullification for spop and copr instructions
  98    w    12 bit branch displacement
  99    W    17 bit branch displacement (PC relative)
 100    z    17 bit branch displacement (just a number, not an address)
 101
 102 Completer operands all have 'c' as the prefix:
 103
 104    cx   indexed load completer.
 105    cm   short load and store completer.
 106    cs   store bytes short completer.
 107
 108    cw   read/write completer for PROBE
 109    cW   wide completer for MFCTL
 110    cL   local processor completer for cache control
 111    cZ   System Control Completer (to support LPA, LHA, etc.)
 112
 113    ci   correction completer for DCOR
 114    ca   add completer
 115    cy   32 bit add carry completer
 116    cY   64 bit add carry completer
 117    cv   signed overflow trap completer
 118    ct   trap on condition completer for ADDI, SUB
 119    cT   trap on condition completer for UADDCM
 120    cb   32 bit borrow completer for SUB
 121    cB   64 bit borrow completer for SUB
 122
 123    ch   left/right half completer
 124    cH   signed/unsigned saturation completer
 125    cS   signed/unsigned completer at 21
 126    c*   permutation completer
 127
 128 Condition operands all have '?' as the prefix:
 129
 130    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 131
 132    ?a   add conditions
 133    ?A   64 bit add conditions
 134    ?@   add branch conditions followed by nullify
 135    ?d   non-negated add branch conditions
 136    ?D   negated add branch conditions
 137    ?w   wide mode non-negated add branch conditions
 138    ?W   wide mode negated add branch conditions
 139
 140    ?s   compare/subtract conditions
 141    ?S   64 bit compare/subtract conditions
 142    ?t   non-negated compare conditions
 143    ?T   negated compare conditions
 144    ?r   64 bit non-negated compare conditions
 145    ?R   64 bit negated compare conditions
 146    ?Q   64 bit compare conditions for CMPIB instruction
 147    ?n   compare conditions followed by nullify
 148
 149    ?l   logical conditions
 150    ?L   64 bit logical conditions
 151
 152    ?b   branch on bit conditions
 153    ?B   64 bit branch on bit conditions
 154
 155    ?x   shift/extract/deposit conditions
 156    ?X   64 bit shift/extract/deposit conditions
 157    ?y   shift/extract/deposit conditions followed by nullify for conditional
 158         branches
 159
 160    ?u   unit conditions
 161    ?U   64 bit unit conditions
 162
 163 Also these:
 164
 165    .    2 bit shift amount at 25
 166    *    4 bit shift amount at 25
 167    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 168         31-p
 169    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 170    P    5 bit bit position at 26
 171    q    6 bit bit position at 20,22:26
 172    T    5 bit field length at 31 (encoded as 32-T)
 173    %    6 bit field length at 23,27:31 (variable extract/deposit)
 174    |    6 bit field length at 19,27:31 (fixed extract/deposit)
 175    A    13 bit immediate at 18 (to support the BREAK instruction)
 176    ^    like b, but describes a control register
 177    !    sar (cr11) register
 178    D    26 bit immediate at 31 (to support the DIAG instruction)
 179    $    9 bit immediate at 28 (to support POPBTS)
 180
 181    f    3 bit Special Function Unit identifier at 25
 182    O    20 bit Special Function Unit operation split between 15 bits at 20
 183         and 5 bits at 31
 184    o    15 bit Special Function Unit operation at 20
 185    2    22 bit Special Function Unit operation split between 17 bits at 20
 186         and 5 bits at 31
 187    1    15 bit Special Function Unit operation split between 10 bits at 20
 188         and 5 bits at 31
 189    0    10 bit Special Function Unit operation split between 5 bits at 20
 190         and 5 bits at 31
 191    u    3 bit coprocessor unit identifier at 25
 192    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 193    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 194         (for 0xe format FP instructions)
 195    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 196
 197    r    5 bit immediate value at 31 (for the break instruction)
 198         (very similar to V above, except the value is unsigned instead of
 199         low_sign_ext)
 200    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 201         (same as r above, except the value is in a different location)
 202    U    10 bit immediate value at 15 (for SSM, RSM on pa2.0)
 203    Q    5 bit immediate value at 10 (a bit position specified in
 204         the bb instruction. It's the same as r above, except the
 205         value is in a different location)
 206
 207 And these (PJH) for PA-89 F.P. registers and instructions:
 208
 209    v    a 't' operand type extended to handle L/R register halves.
 210    E    a 'b' operand type extended to handle L/R register halves.
 211    X    an 'x' operand type extended to handle L/R register halves.
 212    J    a 'b' operand type further extended to handle extra 1.1 registers
 213    K    a 'x' operand type further extended to handle extra 1.1 registers
 214    4    a variation of the 'b' operand type for 'fmpyadd' and 'fmpysub'
 215    6    a variation of the 'x' operand type for 'fmpyadd' and 'fmpysub'
 216    7    a variation of the 't' operand type for 'fmpyadd' and 'fmpysub'
 217    8    5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub')
 218    9    5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub')
 219    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 220         (very similar to 'F')
 221 */
 222
 223
 224 /* List of characters not to put a space after.  Note that
 225    "," is included, as the "spopN" operations use literal
 226    commas in their completer sections. */
 227 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 228
 229 /* The order of the opcodes in this table is significant:
 230
 231    * The assembler requires that all instances of the same mnemonic must be
 232    consecutive.  If they aren't, the assembler will bomb at runtime.
 233
 234    * The disassembler should not care about the order of the opcodes.  */
 235
 236 static const struct pa_opcode pa_opcodes[] =
 237 {
 238
 239
 240 /* pseudo-instructions */
 241
 242 { "b",          0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */
 243 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10},   /* ldo val(r0),r */
 244 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
 245 /* This entry is for the disassembler only.  It will never be used by
 246    assembler.  */
 247 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
 248 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
 249 /* This entry is for the disassembler only.  It will never be used by
 250    assembler.  */
 251 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
 252 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10}, /* addb{tf} */
 253 /* This entry is for the disassembler only.  It will never be used by
 254    assembler.  */
 255 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10},
 256 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
 257 /* This entry is for the disassembler only.  It will never be used by
 258    assembler.  */
 259 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
 260 { "nop",        0x08000240, 0xffffffff, "", pa10},      /* or 0,0,0 */
 261 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10},   /* or r,0,t */
 262 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */
 263
 264 /* Loads and Stores for integer registers.  */
 265 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10},
 266 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10},
 267 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10},
 268 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10},
 269 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10},
 270 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10},
 271 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10},
 272 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10},
 273 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10},
 274 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10},
 275 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10},
 276 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10},
 277 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10},
 278 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10},
 279 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10},
 280 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10},
 281 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10},
 282 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10},
 283 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10},
 284 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10},
 285 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10},
 286 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10},
 287 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10},
 288 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10},
 289 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10},
 290 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10},
 291 { "ldws",       0x0c001080, 0xfc001fc0, "cm5(b),t", pa10},
 292 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10},
 293 { "ldhs",       0x0c001040, 0xfc001fc0, "cm5(b),t", pa10},
 294 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10},
 295 { "ldbs",       0x0c001000, 0xfc001fc0, "cm5(b),t", pa10},
 296 { "ldwas",      0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10},
 297 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10},
 298 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10},
 299 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10},
 300 { "stws",       0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10},
 301 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10},
 302 { "sths",       0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10},
 303 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10},
 304 { "stbs",       0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10},
 305 { "stwas",      0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10},
 306 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10},
 307 { "stbys",      0x0c001300, 0xfc001fc0, "csx,V(b)", pa10},
 308
 309 /* Immediate instructions.  */
 310 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10},
 311 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10},
 312 { "addil",      0x28000000, 0xfc000000, "k,b", pa10},
 313
 314 /* Branching instructions. */
 315 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10},
 316 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10},
 317 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10},
 318 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10},
 319 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10},
 320 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10},
 321 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10},
 322 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10},
 323 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10},
 324 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10},
 325 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10},
 326 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10},
 327 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10},
 328 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10},
 329 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10},
 330 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10},
 331 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10},
 332 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 333 { "bb",         0xc4006000, 0xfc006000, "?Bnx,Q,w", pa20, FLAG_STRICT},
 334 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 335 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10},
 336 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10},
 337 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 338 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 339 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 340 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 341
 342 /* Computation Instructions */
 343
 344 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 345 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 346 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10},
 347 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 348 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10},
 349 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 350 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10},
 351 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 352 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10},
 353 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 354 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10},
 355 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 356 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10},
 357 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
 358 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
 359 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10},
 360 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10},
 361 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
 362 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
 363 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10},
 364 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10},
 365 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
 366 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
 367 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10},
 368 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10},
 369 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10},
 370 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10},
 371 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
 372 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
 373 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
 374 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
 375 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10},
 376 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10},
 377 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10},
 378 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10},
 379 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10},
 380 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
 381 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
 382 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
 383 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
 384 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
 385 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
 386 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10},
 387 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10},
 388 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10},
 389 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10},
 390 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10},
 391 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10},
 392 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10},
 393 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
 394 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10},
 395 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10},
 396 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 397 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 398 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10},
 399 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
 400 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
 401 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10},
 402 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10},
 403 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10},
 404 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10},
 405 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10},
 406 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10},
 407 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10},
 408 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10},
 409 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10},
 410
 411 /* Subword Operation Instructions */
 412
 413 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 414 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 415 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 416 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 417 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
 418 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 419 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 420 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 421 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 422 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 423
 424
 425 /* Extract and Deposit Instructions */
 426
 427 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 428 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 429 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 430 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 431 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10},
 432 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10},
 433 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
 434 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
 435 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
 436 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
 437 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10},
 438 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10},
 439 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10},
 440 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10},
 441 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
 442 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
 443 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
 444 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
 445 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
 446 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
 447 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
 448 { "depwi",      0xd4001800, 0xfc001be0, "cz?x5,p,T,b", pa10, FLAG_STRICT},
 449 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10},
 450 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10},
 451 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10},
 452 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10},
 453 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10},
 454 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10},
 455 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10},
 456 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10},
 457
 458 /* System Control Instructions */
 459
 460 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10},
 461 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
 462 { "rfi",        0x00000c00, 0xffffffff, "", pa10},
 463 { "rfir",       0x00000ca0, 0xffffffff, "", pa11},
 464 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 465 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10},
 466 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 467 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10},
 468 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10},
 469 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10},
 470 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10},
 471 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10},
 472 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10},
 473 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 474 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 475 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10},
 476 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
 477 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10},
 478 { "sync",       0x00000400, 0xffffffff, "", pa10},
 479 { "syncdma",    0x00100400, 0xffffffff, "", pa10},
 480 { "probe",      0x04001180, 0xfc003fe0, "cw(s,b),x,t", pa10, FLAG_STRICT},
 481 { "probe",      0x04001180, 0xfc003fe0, "cw(b),x,t", pa10, FLAG_STRICT},
 482 { "probei",     0x04003180, 0xfc003fe0, "cw(s,b),R,t", pa10, FLAG_STRICT},
 483 { "probei",     0x04003180, 0xfc003fe0, "cw(b),R,t", pa10, FLAG_STRICT},
 484 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10},
 485 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10},
 486 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10},
 487 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10},
 488 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10},
 489 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10},
 490 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10},
 491 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10},
 492 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10},
 493 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10},
 494 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10},
 495 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10},
 496 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10},
 497 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10},
 498 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
 499 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 500 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10},
 501 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10},
 502 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
 503 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 504 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10},
 505 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10},
 506 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10},
 507 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10},
 508 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10},
 509 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10},
 510 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10},
 511 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10},
 512 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10},
 513 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10},
 514 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10},
 515 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10},
 516 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10},
 517 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10},
 518 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10},
 519 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10},
 520 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10},
 521 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10},
 522 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10},
 523 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10},
 524 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10},
 525 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10},
 526 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10},
 527 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10},
 528 { "diag",       0x14000000, 0xfc000000, "D", pa10},
 529
 530 /* These may be specific to certain versions of the PA.  Joel claimed
 531    they were 72000 (7200?) specific.  However, I'm almost certain the
 532    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 533 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^"},
 534 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x"},
 535 { "tocen",      0x14403600, 0xffffffff, ""},
 536 { "tocdis",     0x14401620, 0xffffffff, ""},
 537 { "shdwgr",     0x14402600, 0xffffffff, ""},
 538 { "grshdw",     0x14400620, 0xffffffff, ""},
 539
 540 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 541    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 542 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11},
 543 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11},
 544 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11},
 545 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11},
 546
 547 /* Floating Point Coprocessor Instructions */
 548
 549 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),v", pa10},
 550 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),v", pa10},
 551 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),y", pa10},
 552 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),y", pa10},
 553 { "fstwx",      0x24000200, 0xfc001f80, "cxv,x(s,b)", pa10},
 554 { "fstwx",      0x24000200, 0xfc001f80, "cxv,x(b)", pa10},
 555 { "fstdx",      0x2c000200, 0xfc001fc0, "cxy,x(s,b)", pa10},
 556 { "fstdx",      0x2c000200, 0xfc001fc0, "cxy,x(b)", pa10},
 557 { "fstqx",      0x3c000200, 0xfc001fc0, "cxy,x(s,b)", pa10},
 558 { "fstqx",      0x3c000200, 0xfc001fc0, "cxy,x(b)", pa10},
 559 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),v", pa10},
 560 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),v", pa10},
 561 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),y", pa10},
 562 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),y", pa10},
 563 { "fstws",      0x24001200, 0xfc001f80, "cmv,5(s,b)", pa10},
 564 { "fstws",      0x24001200, 0xfc001f80, "cmv,5(b)", pa10},
 565 { "fstds",      0x2c001200, 0xfc001fc0, "cmy,5(s,b)", pa10},
 566 { "fstds",      0x2c001200, 0xfc001fc0, "cmy,5(b)", pa10},
 567 { "fstqs",      0x3c001200, 0xfc001fc0, "cmy,5(s,b)", pa10},
 568 { "fstqs",      0x3c001200, 0xfc001fc0, "cmy,5(b)", pa10},
 569 { "fadd",       0x30000600, 0xfc00e7e0, "FE,X,v", pa10},
 570 { "fadd",       0x38000600, 0xfc00e720, "IJ,K,v", pa10},
 571 { "fsub",       0x30002600, 0xfc00e7e0, "FE,X,v", pa10},
 572 { "fsub",       0x38002600, 0xfc00e720, "IJ,K,v", pa10},
 573 { "fmpy",       0x30004600, 0xfc00e7e0, "FE,X,v", pa10},
 574 { "fmpy",       0x38004600, 0xfc00e720, "IJ,K,v", pa10},
 575 { "fdiv",       0x30006600, 0xfc00e7e0, "FE,X,v", pa10},
 576 { "fdiv",       0x38006600, 0xfc00e720, "IJ,K,v", pa10},
 577 { "fsqrt",      0x30008000, 0xfc1fe7e0, "FE,v", pa10},
 578 { "fsqrt",      0x38008000, 0xfc1fe720, "FJ,v", pa10},
 579 { "fabs",       0x30006000, 0xfc1fe7e0, "FE,v", pa10},
 580 { "fabs",       0x38006000, 0xfc1fe720, "FJ,v", pa10},
 581 { "frem",       0x30008600, 0xfc00e7e0, "FE,X,v", pa10},
 582 { "frem",       0x38008600, 0xfc00e720, "FJ,K,v", pa10},
 583 { "frnd",       0x3000a000, 0xfc1fe7e0, "FE,v", pa10},
 584 { "frnd",       0x3800a000, 0xfc1fe720, "FJ,v", pa10},
 585 { "fcpy",       0x30004000, 0xfc1fe7e0, "FE,v", pa10},
 586 { "fcpy",       0x38004000, 0xfc1fe720, "FJ,v", pa10},
 587 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGE,v", pa10},
 588 { "fcnvff",     0x38000200, 0xfc1f8720, "FGJ,v", pa10},
 589 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGE,v", pa10},
 590 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGJ,v", pa10},
 591 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGE,v", pa10},
 592 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGJ,v", pa10},
 593 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGE,v", pa10},
 594 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGJ,v", pa10},
 595 { "fmpyfadd",   0xb8000000, 0xfc000020, "IJ,K,3,v", pa20, FLAG_STRICT},
 596 { "fmpynfadd",  0xb8000020, 0xfc000020, "IJ,K,3,v", pa20, FLAG_STRICT},
 597 { "fneg",       0x3000c000, 0xfc1fe7e0, "FE,v", pa20, FLAG_STRICT},
 598 { "fneg",       0x3800c000, 0xfc1fe720, "IJ,v", pa20, FLAG_STRICT},
 599 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "FE,v", pa20, FLAG_STRICT},
 600 { "fnegabs",    0x3800e000, 0xfc1fe720, "IJ,v", pa20, FLAG_STRICT},
 601 { "fcmp",       0x30000400, 0xfc00e7e0, "F?fE,X", pa10},
 602 { "fcmp",       0x38000400, 0xfc00e720, "I?fJ,K", pa10},
 603 { "xmpyu",      0x38004700, 0xfc00e720, "J,K,v", pa11},
 604 { "fmpyadd",    0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
 605 { "fmpysub",    0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
 606 { "ftest",      0x30002420, 0xffffffff, "", pa10},
 607 { "fid",        0x30000000, 0xffffffff, "", pa11},
 608
 609 /* Performance Monitor Instructions */
 610
 611 { "pmdis",      0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
 612 { "pmenb",      0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
 613
 614 /* Assist Instructions */
 615
 616 { "spop0",      0x10000000, 0xfc000600, "f,ON", pa10},
 617 { "spop1",      0x10000200, 0xfc000600, "f,oNt", pa10},
 618 { "spop2",      0x10000400, 0xfc000600, "f,1Nb", pa10},
 619 { "spop3",      0x10000600, 0xfc000600, "f,0Nx,b", pa10},
 620 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10},
 621 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10},
 622 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10},
 623 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10},
 624 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10},
 625 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10},
 626 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10},
 627 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10},
 628 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10},
 629 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10},
 630 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10},
 631 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10},
 632 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10},
 633 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10},
 634 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10},
 635 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10},
 636 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10},
 637 };
 638
 639 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 640
 641 /* SKV 12/18/92. Added some denotations for various operands. */
 642
 643 #define PA_IMM11_AT_31 'i'
 644 #define PA_IMM14_AT_31 'j'
 645 #define PA_IMM21_AT_31 'k'
 646 #define PA_DISP12 'w'
 647 #define PA_DISP17 'W'
 648
 649 #define N_HPPA_OPERAND_FORMATS 5