2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
25 #define DISPC_IRQ_FRAMEDONE (1 << 0)
26 #define DISPC_IRQ_VSYNC (1 << 1)
27 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
28 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
29 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
30 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
31 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
32 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
33 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
34 #define DISPC_IRQ_OCP_ERR (1 << 9)
35 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
36 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
37 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
38 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
39 #define DISPC_IRQ_SYNC_LOST (1 << 14)
40 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
41 #define DISPC_IRQ_WAKEUP (1 << 16)
42 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
43 #define DISPC_IRQ_VSYNC2 (1 << 18)
44 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
45 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
46 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
47 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
48 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
49 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
50 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
51 #define DISPC_IRQ_FRAMEDONE3 (1 << 26)
52 #define DISPC_IRQ_VSYNC3 (1 << 27)
53 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 28)
54 #define DISPC_IRQ_SYNC_LOST3 (1 << 29)
56 struct omap_dss_device
;
57 struct omap_overlay_manager
;
58 struct snd_aes_iec958
;
59 struct snd_cea_861_aud_if
;
61 enum omap_display_type
{
62 OMAP_DISPLAY_TYPE_NONE
= 0,
63 OMAP_DISPLAY_TYPE_DPI
= 1 << 0,
64 OMAP_DISPLAY_TYPE_DBI
= 1 << 1,
65 OMAP_DISPLAY_TYPE_SDI
= 1 << 2,
66 OMAP_DISPLAY_TYPE_DSI
= 1 << 3,
67 OMAP_DISPLAY_TYPE_VENC
= 1 << 4,
68 OMAP_DISPLAY_TYPE_HDMI
= 1 << 5,
79 OMAP_DSS_CHANNEL_LCD
= 0,
80 OMAP_DSS_CHANNEL_DIGIT
= 1,
81 OMAP_DSS_CHANNEL_LCD2
= 2,
82 OMAP_DSS_CHANNEL_LCD3
= 3,
85 enum omap_color_mode
{
86 OMAP_DSS_COLOR_CLUT1
= 1 << 0, /* BITMAP 1 */
87 OMAP_DSS_COLOR_CLUT2
= 1 << 1, /* BITMAP 2 */
88 OMAP_DSS_COLOR_CLUT4
= 1 << 2, /* BITMAP 4 */
89 OMAP_DSS_COLOR_CLUT8
= 1 << 3, /* BITMAP 8 */
90 OMAP_DSS_COLOR_RGB12U
= 1 << 4, /* RGB12, 16-bit container */
91 OMAP_DSS_COLOR_ARGB16
= 1 << 5, /* ARGB16 */
92 OMAP_DSS_COLOR_RGB16
= 1 << 6, /* RGB16 */
93 OMAP_DSS_COLOR_RGB24U
= 1 << 7, /* RGB24, 32-bit container */
94 OMAP_DSS_COLOR_RGB24P
= 1 << 8, /* RGB24, 24-bit container */
95 OMAP_DSS_COLOR_YUV2
= 1 << 9, /* YUV2 4:2:2 co-sited */
96 OMAP_DSS_COLOR_UYVY
= 1 << 10, /* UYVY 4:2:2 co-sited */
97 OMAP_DSS_COLOR_ARGB32
= 1 << 11, /* ARGB32 */
98 OMAP_DSS_COLOR_RGBA32
= 1 << 12, /* RGBA32 */
99 OMAP_DSS_COLOR_RGBX32
= 1 << 13, /* RGBx32 */
100 OMAP_DSS_COLOR_NV12
= 1 << 14, /* NV12 format: YUV 4:2:0 */
101 OMAP_DSS_COLOR_RGBA16
= 1 << 15, /* RGBA16 - 4444 */
102 OMAP_DSS_COLOR_RGBX16
= 1 << 16, /* RGBx16 - 4444 */
103 OMAP_DSS_COLOR_ARGB16_1555
= 1 << 17, /* ARGB16 - 1555 */
104 OMAP_DSS_COLOR_XRGB16_1555
= 1 << 18, /* xRGB16 - 1555 */
107 enum omap_dss_load_mode
{
108 OMAP_DSS_LOAD_CLUT_AND_FRAME
= 0,
109 OMAP_DSS_LOAD_CLUT_ONLY
= 1,
110 OMAP_DSS_LOAD_FRAME_ONLY
= 2,
111 OMAP_DSS_LOAD_CLUT_ONCE_FRAME
= 3,
114 enum omap_dss_trans_key_type
{
115 OMAP_DSS_COLOR_KEY_GFX_DST
= 0,
116 OMAP_DSS_COLOR_KEY_VID_SRC
= 1,
119 enum omap_rfbi_te_mode
{
120 OMAP_DSS_RFBI_TE_MODE_1
= 1,
121 OMAP_DSS_RFBI_TE_MODE_2
= 2,
124 enum omap_dss_signal_level
{
125 OMAPDSS_SIG_ACTIVE_HIGH
= 0,
126 OMAPDSS_SIG_ACTIVE_LOW
= 1,
129 enum omap_dss_signal_edge
{
130 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES
,
131 OMAPDSS_DRIVE_SIG_RISING_EDGE
,
132 OMAPDSS_DRIVE_SIG_FALLING_EDGE
,
135 enum omap_dss_venc_type
{
136 OMAP_DSS_VENC_TYPE_COMPOSITE
,
137 OMAP_DSS_VENC_TYPE_SVIDEO
,
140 enum omap_dss_dsi_pixel_format
{
141 OMAP_DSS_DSI_FMT_RGB888
,
142 OMAP_DSS_DSI_FMT_RGB666
,
143 OMAP_DSS_DSI_FMT_RGB666_PACKED
,
144 OMAP_DSS_DSI_FMT_RGB565
,
147 enum omap_dss_dsi_mode
{
148 OMAP_DSS_DSI_CMD_MODE
= 0,
149 OMAP_DSS_DSI_VIDEO_MODE
,
152 enum omap_display_caps
{
153 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE
= 1 << 0,
154 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM
= 1 << 1,
157 enum omap_dss_display_state
{
158 OMAP_DSS_DISPLAY_DISABLED
= 0,
159 OMAP_DSS_DISPLAY_ACTIVE
,
160 OMAP_DSS_DISPLAY_SUSPENDED
,
163 enum omap_dss_audio_state
{
164 OMAP_DSS_AUDIO_DISABLED
= 0,
165 OMAP_DSS_AUDIO_ENABLED
,
166 OMAP_DSS_AUDIO_CONFIGURED
,
167 OMAP_DSS_AUDIO_PLAYING
,
170 enum omap_dss_rotation_type
{
171 OMAP_DSS_ROT_DMA
= 1 << 0,
172 OMAP_DSS_ROT_VRFB
= 1 << 1,
173 OMAP_DSS_ROT_TILER
= 1 << 2,
176 /* clockwise rotation angle */
177 enum omap_dss_rotation_angle
{
180 OMAP_DSS_ROT_180
= 2,
181 OMAP_DSS_ROT_270
= 3,
184 enum omap_overlay_caps
{
185 OMAP_DSS_OVL_CAP_SCALE
= 1 << 0,
186 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA
= 1 << 1,
187 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA
= 1 << 2,
188 OMAP_DSS_OVL_CAP_ZORDER
= 1 << 3,
191 enum omap_overlay_manager_caps
{
192 OMAP_DSS_DUMMY_VALUE
, /* add a dummy value to prevent compiler error */
195 enum omap_dss_clk_source
{
196 OMAP_DSS_CLK_SRC_FCK
= 0, /* OMAP2/3: DSS1_ALWON_FCLK
198 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
, /* OMAP3: DSI1_PLL_FCLK
199 * OMAP4: PLL1_CLK1 */
200 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI
, /* OMAP3: DSI2_PLL_FCLK
201 * OMAP4: PLL1_CLK2 */
202 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
, /* OMAP4: PLL2_CLK1 */
203 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI
, /* OMAP4: PLL2_CLK2 */
206 enum omap_hdmi_flags
{
207 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP
= 1 << 0,
212 struct rfbi_timings
{
226 u32 tim
[5]; /* set by rfbi_convert_timings() */
231 void omap_rfbi_write_command(const void *buf
, u32 len
);
232 void omap_rfbi_read_data(void *buf
, u32 len
);
233 void omap_rfbi_write_data(const void *buf
, u32 len
);
234 void omap_rfbi_write_pixels(const void __iomem
*buf
, int scr_width
,
237 int omap_rfbi_enable_te(bool enable
, unsigned line
);
238 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode
,
239 unsigned hs_pulse_time
, unsigned vs_pulse_time
,
240 int hs_pol_inv
, int vs_pol_inv
, int extif_div
);
241 void rfbi_bus_lock(void);
242 void rfbi_bus_unlock(void);
246 struct omap_dss_dsi_videomode_data
{
247 /* DSI video mode blanking data */
248 /* Unit: byte clock cycles */
252 /* Unit: line clocks */
257 /* DSI blanking modes */
259 int hsa_blanking_mode
;
260 int hbp_blanking_mode
;
261 int hfp_blanking_mode
;
263 /* Video port sync events */
267 bool ddr_clk_always_on
;
271 void dsi_bus_lock(struct omap_dss_device
*dssdev
);
272 void dsi_bus_unlock(struct omap_dss_device
*dssdev
);
273 int dsi_vc_dcs_write(struct omap_dss_device
*dssdev
, int channel
, u8
*data
,
275 int dsi_vc_generic_write(struct omap_dss_device
*dssdev
, int channel
, u8
*data
,
277 int dsi_vc_dcs_write_0(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
);
278 int dsi_vc_generic_write_0(struct omap_dss_device
*dssdev
, int channel
);
279 int dsi_vc_dcs_write_1(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
,
281 int dsi_vc_generic_write_1(struct omap_dss_device
*dssdev
, int channel
,
283 int dsi_vc_generic_write_2(struct omap_dss_device
*dssdev
, int channel
,
284 u8 param1
, u8 param2
);
285 int dsi_vc_dcs_write_nosync(struct omap_dss_device
*dssdev
, int channel
,
287 int dsi_vc_generic_write_nosync(struct omap_dss_device
*dssdev
, int channel
,
289 int dsi_vc_dcs_read(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
,
290 u8
*buf
, int buflen
);
291 int dsi_vc_generic_read_0(struct omap_dss_device
*dssdev
, int channel
, u8
*buf
,
293 int dsi_vc_generic_read_1(struct omap_dss_device
*dssdev
, int channel
, u8 param
,
294 u8
*buf
, int buflen
);
295 int dsi_vc_generic_read_2(struct omap_dss_device
*dssdev
, int channel
,
296 u8 param1
, u8 param2
, u8
*buf
, int buflen
);
297 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device
*dssdev
, int channel
,
299 int dsi_vc_send_null(struct omap_dss_device
*dssdev
, int channel
);
300 int dsi_vc_send_bta_sync(struct omap_dss_device
*dssdev
, int channel
);
301 int dsi_enable_video_output(struct omap_dss_device
*dssdev
, int channel
);
302 void dsi_disable_video_output(struct omap_dss_device
*dssdev
, int channel
);
304 /* Board specific data */
305 struct omap_dss_board_info
{
306 int (*get_context_loss_count
)(struct device
*dev
);
308 struct omap_dss_device
**devices
;
309 struct omap_dss_device
*default_device
;
310 int (*dsi_enable_pads
)(int dsi_id
, unsigned lane_mask
);
311 void (*dsi_disable_pads
)(int dsi_id
, unsigned lane_mask
);
312 int (*set_min_bus_tput
)(struct device
*dev
, unsigned long r
);
315 /* Init with the board info */
316 extern int omap_display_init(struct omap_dss_board_info
*board_data
);
318 extern int omap_hdmi_init(enum omap_hdmi_flags flags
);
320 struct omap_video_timings
{
327 /* Unit: pixel clocks */
328 u16 hsw
; /* Horizontal synchronization pulse width */
329 /* Unit: pixel clocks */
330 u16 hfp
; /* Horizontal front porch */
331 /* Unit: pixel clocks */
332 u16 hbp
; /* Horizontal back porch */
333 /* Unit: line clocks */
334 u16 vsw
; /* Vertical synchronization pulse width */
335 /* Unit: line clocks */
336 u16 vfp
; /* Vertical front porch */
337 /* Unit: line clocks */
338 u16 vbp
; /* Vertical back porch */
340 /* Vsync logic level */
341 enum omap_dss_signal_level vsync_level
;
342 /* Hsync logic level */
343 enum omap_dss_signal_level hsync_level
;
344 /* Interlaced or Progressive timings */
346 /* Pixel clock edge to drive LCD data */
347 enum omap_dss_signal_edge data_pclk_edge
;
348 /* Data enable logic level */
349 enum omap_dss_signal_level de_level
;
350 /* Pixel clock edges to drive HSYNC and VSYNC signals */
351 enum omap_dss_signal_edge sync_pclk_edge
;
354 #ifdef CONFIG_OMAP2_DSS_VENC
355 /* Hardcoded timings for tv modes. Venc only uses these to
356 * identify the mode, and does not actually use the configs
357 * itself. However, the configs should be something that
358 * a normal monitor can also show */
359 extern const struct omap_video_timings omap_dss_pal_timings
;
360 extern const struct omap_video_timings omap_dss_ntsc_timings
;
363 struct omap_dss_cpr_coefs
{
369 struct omap_overlay_info
{
371 u32 p_uv_addr
; /* for NV12 format */
375 enum omap_color_mode color_mode
;
377 enum omap_dss_rotation_type rotation_type
;
382 u16 out_width
; /* if 0, out_width == width */
383 u16 out_height
; /* if 0, out_height == height */
389 struct omap_overlay
{
391 struct list_head list
;
396 enum omap_color_mode supported_modes
;
397 enum omap_overlay_caps caps
;
400 struct omap_overlay_manager
*manager
;
403 * The following functions do not block:
409 * The rest of the functions may block and cannot be called from
413 int (*enable
)(struct omap_overlay
*ovl
);
414 int (*disable
)(struct omap_overlay
*ovl
);
415 bool (*is_enabled
)(struct omap_overlay
*ovl
);
417 int (*set_manager
)(struct omap_overlay
*ovl
,
418 struct omap_overlay_manager
*mgr
);
419 int (*unset_manager
)(struct omap_overlay
*ovl
);
421 int (*set_overlay_info
)(struct omap_overlay
*ovl
,
422 struct omap_overlay_info
*info
);
423 void (*get_overlay_info
)(struct omap_overlay
*ovl
,
424 struct omap_overlay_info
*info
);
426 int (*wait_for_go
)(struct omap_overlay
*ovl
);
429 struct omap_overlay_manager_info
{
432 enum omap_dss_trans_key_type trans_key_type
;
436 bool partial_alpha_enabled
;
439 struct omap_dss_cpr_coefs cpr_coefs
;
442 struct omap_overlay_manager
{
447 enum omap_channel id
;
448 enum omap_overlay_manager_caps caps
;
449 struct list_head overlays
;
450 enum omap_display_type supported_displays
;
453 struct omap_dss_device
*device
;
456 * The following functions do not block:
462 * The rest of the functions may block and cannot be called from
466 int (*set_device
)(struct omap_overlay_manager
*mgr
,
467 struct omap_dss_device
*dssdev
);
468 int (*unset_device
)(struct omap_overlay_manager
*mgr
);
470 int (*set_manager_info
)(struct omap_overlay_manager
*mgr
,
471 struct omap_overlay_manager_info
*info
);
472 void (*get_manager_info
)(struct omap_overlay_manager
*mgr
,
473 struct omap_overlay_manager_info
*info
);
475 int (*apply
)(struct omap_overlay_manager
*mgr
);
476 int (*wait_for_go
)(struct omap_overlay_manager
*mgr
);
477 int (*wait_for_vsync
)(struct omap_overlay_manager
*mgr
);
480 /* 22 pins means 1 clk lane and 10 data lanes */
481 #define OMAP_DSS_MAX_DSI_PINS 22
483 struct omap_dsi_pin_config
{
486 * pin numbers in the following order:
492 int pins
[OMAP_DSS_MAX_DSI_PINS
];
495 struct omap_dss_device
{
498 enum omap_display_type type
;
500 enum omap_channel channel
;
524 enum omap_dss_venc_type type
;
525 bool invert_polarity
;
534 enum omap_dss_clk_source lcd_clk_src
;
537 enum omap_dss_clk_source dispc_fclk_src
;
541 /* regn is one greater than TRM's REGN value */
548 enum omap_dss_clk_source dsi_fclk_src
;
552 /* regn is one greater than TRM's REGN value */
559 struct omap_video_timings timings
;
561 int acbi
; /* ac-bias pin transitions per interrupt */
562 /* Unit: line clocks */
563 int acb
; /* ac-bias pin frequency */
565 enum omap_dss_dsi_pixel_format dsi_pix_fmt
;
566 enum omap_dss_dsi_mode dsi_mode
;
567 struct omap_dss_dsi_videomode_data dsi_vm_data
;
572 struct rfbi_timings rfbi_timings
;
577 int max_backlight_level
;
581 /* used to match device to driver */
582 const char *driver_name
;
586 struct omap_dss_driver
*driver
;
588 /* helper variable for driver suspend/resume */
589 bool activate_after_resume
;
591 enum omap_display_caps caps
;
593 struct omap_overlay_manager
*manager
;
595 enum omap_dss_display_state state
;
597 enum omap_dss_audio_state audio_state
;
599 /* platform specific */
600 int (*platform_enable
)(struct omap_dss_device
*dssdev
);
601 void (*platform_disable
)(struct omap_dss_device
*dssdev
);
602 int (*set_backlight
)(struct omap_dss_device
*dssdev
, int level
);
603 int (*get_backlight
)(struct omap_dss_device
*dssdev
);
606 struct omap_dss_hdmi_data
611 struct omap_dss_audio
{
612 struct snd_aes_iec958
*iec
;
613 struct snd_cea_861_aud_if
*cea
;
616 struct omap_dss_driver
{
617 struct device_driver driver
;
619 int (*probe
)(struct omap_dss_device
*);
620 void (*remove
)(struct omap_dss_device
*);
622 int (*enable
)(struct omap_dss_device
*display
);
623 void (*disable
)(struct omap_dss_device
*display
);
624 int (*suspend
)(struct omap_dss_device
*display
);
625 int (*resume
)(struct omap_dss_device
*display
);
626 int (*run_test
)(struct omap_dss_device
*display
, int test
);
628 int (*update
)(struct omap_dss_device
*dssdev
,
629 u16 x
, u16 y
, u16 w
, u16 h
);
630 int (*sync
)(struct omap_dss_device
*dssdev
);
632 int (*enable_te
)(struct omap_dss_device
*dssdev
, bool enable
);
633 int (*get_te
)(struct omap_dss_device
*dssdev
);
635 u8 (*get_rotate
)(struct omap_dss_device
*dssdev
);
636 int (*set_rotate
)(struct omap_dss_device
*dssdev
, u8 rotate
);
638 bool (*get_mirror
)(struct omap_dss_device
*dssdev
);
639 int (*set_mirror
)(struct omap_dss_device
*dssdev
, bool enable
);
641 int (*memory_read
)(struct omap_dss_device
*dssdev
,
642 void *buf
, size_t size
,
643 u16 x
, u16 y
, u16 w
, u16 h
);
645 void (*get_resolution
)(struct omap_dss_device
*dssdev
,
646 u16
*xres
, u16
*yres
);
647 void (*get_dimensions
)(struct omap_dss_device
*dssdev
,
648 u32
*width
, u32
*height
);
649 int (*get_recommended_bpp
)(struct omap_dss_device
*dssdev
);
651 int (*check_timings
)(struct omap_dss_device
*dssdev
,
652 struct omap_video_timings
*timings
);
653 void (*set_timings
)(struct omap_dss_device
*dssdev
,
654 struct omap_video_timings
*timings
);
655 void (*get_timings
)(struct omap_dss_device
*dssdev
,
656 struct omap_video_timings
*timings
);
658 int (*set_wss
)(struct omap_dss_device
*dssdev
, u32 wss
);
659 u32 (*get_wss
)(struct omap_dss_device
*dssdev
);
661 int (*read_edid
)(struct omap_dss_device
*dssdev
, u8
*buf
, int len
);
662 bool (*detect
)(struct omap_dss_device
*dssdev
);
665 * For display drivers that support audio. This encompasses
666 * HDMI and DisplayPort at the moment.
669 * Note: These functions might sleep. Do not call while
670 * holding a spinlock/readlock.
672 int (*audio_enable
)(struct omap_dss_device
*dssdev
);
673 void (*audio_disable
)(struct omap_dss_device
*dssdev
);
674 bool (*audio_supported
)(struct omap_dss_device
*dssdev
);
675 int (*audio_config
)(struct omap_dss_device
*dssdev
,
676 struct omap_dss_audio
*audio
);
677 /* Note: These functions may not sleep */
678 int (*audio_start
)(struct omap_dss_device
*dssdev
);
679 void (*audio_stop
)(struct omap_dss_device
*dssdev
);
683 int omap_dss_register_driver(struct omap_dss_driver
*);
684 void omap_dss_unregister_driver(struct omap_dss_driver
*);
686 void omap_dss_get_device(struct omap_dss_device
*dssdev
);
687 void omap_dss_put_device(struct omap_dss_device
*dssdev
);
688 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
689 struct omap_dss_device
*omap_dss_get_next_device(struct omap_dss_device
*from
);
690 struct omap_dss_device
*omap_dss_find_device(void *data
,
691 int (*match
)(struct omap_dss_device
*dssdev
, void *data
));
693 int omap_dss_start_device(struct omap_dss_device
*dssdev
);
694 void omap_dss_stop_device(struct omap_dss_device
*dssdev
);
696 int omap_dss_get_num_overlay_managers(void);
697 struct omap_overlay_manager
*omap_dss_get_overlay_manager(int num
);
699 int omap_dss_get_num_overlays(void);
700 struct omap_overlay
*omap_dss_get_overlay(int num
);
702 void omapdss_default_get_resolution(struct omap_dss_device
*dssdev
,
703 u16
*xres
, u16
*yres
);
704 int omapdss_default_get_recommended_bpp(struct omap_dss_device
*dssdev
);
705 void omapdss_default_get_timings(struct omap_dss_device
*dssdev
,
706 struct omap_video_timings
*timings
);
708 typedef void (*omap_dispc_isr_t
) (void *arg
, u32 mask
);
709 int omap_dispc_register_isr(omap_dispc_isr_t isr
, void *arg
, u32 mask
);
710 int omap_dispc_unregister_isr(omap_dispc_isr_t isr
, void *arg
, u32 mask
);
712 int omap_dispc_wait_for_irq_timeout(u32 irqmask
, unsigned long timeout
);
713 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask
,
714 unsigned long timeout
);
716 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
717 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
719 void omapdss_dsi_vc_enable_hs(struct omap_dss_device
*dssdev
, int channel
,
721 int omapdss_dsi_enable_te(struct omap_dss_device
*dssdev
, bool enable
);
723 int omap_dsi_update(struct omap_dss_device
*dssdev
, int channel
,
724 void (*callback
)(int, void *), void *data
);
725 int omap_dsi_request_vc(struct omap_dss_device
*dssdev
, int *channel
);
726 int omap_dsi_set_vc_id(struct omap_dss_device
*dssdev
, int channel
, int vc_id
);
727 void omap_dsi_release_vc(struct omap_dss_device
*dssdev
, int channel
);
728 int omapdss_dsi_configure_pins(struct omap_dss_device
*dssdev
,
729 const struct omap_dsi_pin_config
*pin_cfg
);
731 int omapdss_dsi_display_enable(struct omap_dss_device
*dssdev
);
732 void omapdss_dsi_display_disable(struct omap_dss_device
*dssdev
,
733 bool disconnect_lanes
, bool enter_ulps
);
735 int omapdss_dpi_display_enable(struct omap_dss_device
*dssdev
);
736 void omapdss_dpi_display_disable(struct omap_dss_device
*dssdev
);
737 void dpi_set_timings(struct omap_dss_device
*dssdev
,
738 struct omap_video_timings
*timings
);
739 int dpi_check_timings(struct omap_dss_device
*dssdev
,
740 struct omap_video_timings
*timings
);
742 int omapdss_sdi_display_enable(struct omap_dss_device
*dssdev
);
743 void omapdss_sdi_display_disable(struct omap_dss_device
*dssdev
);
745 int omapdss_rfbi_display_enable(struct omap_dss_device
*dssdev
);
746 void omapdss_rfbi_display_disable(struct omap_dss_device
*dssdev
);
747 int omap_rfbi_prepare_update(struct omap_dss_device
*dssdev
,
748 u16
*x
, u16
*y
, u16
*w
, u16
*h
);
749 int omap_rfbi_update(struct omap_dss_device
*dssdev
,
750 u16 x
, u16 y
, u16 w
, u16 h
,
751 void (*callback
)(void *), void *data
);
752 int omap_rfbi_configure(struct omap_dss_device
*dssdev
, int pixel_size
,