Remove restriction on skipping some linker tests because their default image base...
[deliverable/binutils-gdb.git] / ld / testsuite / ld-mips-elf / compressed-plt-1-o32-mips16-only.od
1
2 .* file format .*
3
4
5 Disassembly of section \.plt:
6
7 # Only _dc (direct call from compressed code) functions should have a
8 # MIPS16 PLT. Note that indirect calls do not influence the choice,
9 # so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10 10100000 <_PROCEDURE_LINKAGE_TABLE_>:
11 .*: 3c1c1020 lui \$28,0x1020
12 .*: 8f990000 lw \$25,0\(\$28\)
13 .*: 279c0000 addiu \$28,\$28,0
14 .*: 031cc023 subu \$24,\$24,\$28
15 .*: 03e07825 move \$15,\$31
16 .*: 0018c082 srl \$24,\$24,0x2
17 .*: 0320f809 jalr \$25
18 .*: 2718fffe addiu \$24,\$24,-2
19
20 10100020 <f_lo_ic@plt>:
21 .*: 3c0f1020 lui \$15,0x1020
22 .*: 8df90008 lw \$25,8\(\$15\)
23 .*: 03200008 jr \$25
24 .*: 25f80008 addiu \$24,\$15,8
25
26 10100030 <f_lo@plt>:
27 .*: 3c0f1020 lui \$15,0x1020
28 .*: 8df9001c lw \$25,28\(\$15\)
29 .*: 03200008 jr \$25
30 .*: 25f8001c addiu \$24,\$15,28
31
32 10100040 <f_lo_dc@mips16plt>:
33 .*: b203 lw \$2,1010004c <f_lo_dc@mips16plt\+0xc>
34 .*: 9a60 lw \$3,0\(\$2\)
35 .*: 651a move \$24,\$2
36 .*: eb00 jr \$3
37 .*: 653b move \$25,\$3
38 .*: 6500 nop
39 .*: .... .... \.word 0x1020000c
40
41 10100050 <f_dc@mips16plt>:
42 .*: b203 lw \$2,1010005c <f_dc@mips16plt\+0xc>
43 .*: 9a60 lw \$3,0\(\$2\)
44 .*: 651a move \$24,\$2
45 .*: eb00 jr \$3
46 .*: 653b move \$25,\$3
47 .*: 6500 nop
48 .*: .... .... \.word 0x10200010
49
50 10100060 <f_ic_dc@mips16plt>:
51 .*: b203 lw \$2,1010006c <f_ic_dc@mips16plt\+0xc>
52 .*: 9a60 lw \$3,0\(\$2\)
53 .*: 651a move \$24,\$2
54 .*: eb00 jr \$3
55 .*: 653b move \$25,\$3
56 .*: 6500 nop
57 .*: .... .... \.word 0x10200014
58
59 10100070 <f_lo_ic_dc@mips16plt>:
60 .*: b203 lw \$2,1010007c <f_lo_ic_dc@mips16plt\+0xc>
61 .*: 9a60 lw \$3,0\(\$2\)
62 .*: 651a move \$24,\$2
63 .*: eb00 jr \$3
64 .*: 653b move \$25,\$3
65 .*: 6500 nop
66 .*: .... .... \.word 0x10200018
67
68 Disassembly of section \.MIPS\.stubs:
69
70 10101000 <_MIPS_STUBS_>:
71 # Lazy-binding stub for f_ic.
72 .*: 8f998010 lw \$25,-32752\(\$28\)
73 .*: 03e07825 move \$15,\$31
74 .*: 0320f809 jalr \$25
75 .*: 24180009 li \$24,9
76 \.\.\.
77
78 Disassembly of section \.text\.a:
79
80 10102000 <testc>:
81 .*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
82 .*: 6500 nop
83 .*: f030 9b44 lw \$2,-32732\(\$3\)
84 # ^ global GOT entry for f_ic
85 .*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
86 .*: 6500 nop
87 .*: f010 9b58 lw \$2,-32744\(\$3\)
88 # ^ local GOT entry for f_ic_dc@mips16plt
89 .*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
90 .*: 6500 nop
91 .*: f010 9b5c lw \$2,-32740\(\$3\)
92 # ^ local GOT entry for f_lo_ic@plt
93 .*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
94 .*: 6500 nop
95 .*: f030 9b40 lw \$2,-32736\(\$3\)
96 # ^ local GOT entry for f_lo_ic_dc@mips16plt
97 .*: e820 jr \$31
98
99 Disassembly of section \.text\.c:
100
101 10103000 <testlo>:
102 .*: 24020030 li \$2,48
103 # ^ low 16 bits of f_lo@plt
104 .*: 24020041 li \$2,65
105 # ^ low 16 bits of f_lo_dc@mips16plt
106 .*: 24020020 li \$2,32
107 # ^ low 16 bits of f_lo_ic@plt
108 .*: 24020071 li \$2,113
109 # ^ low 16 bits of f_lo_ic_dc@mips16plt
110
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