ld/testsuite/ld-powerpc/tlsie.d

   1 #source: tlsie.s
   2 #as: -a64 -mpower10
   3 #ld: -melf64ppc
   4 #objdump: -dr -Mpower10
   5
   6 .*:     file format .*
   7
   8 Disassembly of section \.text:
   9
  10 .*:
  11 .*:     (60 00 00 00|00 00 00 60)       nop
  12 .*:     (39 4d 90 08|08 90 4d 39)       addi    r10,r13,-28664
  13 .*:     (60 00 00 00|00 00 00 60)       nop
  14 .*:     (60 00 00 00|00 00 00 60)       nop
  15 .*:     (38 6d 90 10|10 90 6d 38)       addi    r3,r13,-28656
  16 .*:     (06 03 ff ff|ff ff 03 06)       paddi   r4,r13,-28648
  17 .*:     (38 8d 90 18|18 90 8d 38)
  18 .*:     (60 00 00 00|00 00 00 60)       nop
  19 .*:     (60 00 00 00|00 00 00 60)       nop
  20 .*:     (60 00 00 00|00 00 00 60)       nop
  21 .*:     (39 4d 90 20|20 90 4d 39)       addi    r10,r13,-28640
  22 .*:     (60 00 00 00|00 00 00 60)       nop
  23 .*:     (60 00 00 00|00 00 00 60)       nop
  24 .*:     (38 6d 90 20|20 90 6d 38)       addi    r3,r13,-28640
  25 .*:     (06 03 ff ff|ff ff 03 06)       paddi   r30,r13,-28640
  26 .*:     (3b cd 90 20|20 90 cd 3b)
  27 .*:     (7f c3 f3 78|78 f3 c3 7f)       mr      r3,r30
  28 .*:     (80 9e 00 00|00 00 9e 80)       lwz     r4,0\(r30\)
  29 .*:     (84 9e 00 00|00 00 9e 84)       lwzu    r4,0\(r30\)
  30 .*:     (88 be 00 00|00 00 be 88)       lbz     r5,0\(r30\)
  31 .*:     (8c be 00 00|00 00 be 8c)       lbzu    r5,0\(r30\)
  32 .*:     (90 de 00 00|00 00 de 90)       stw     r6,0\(r30\)
  33 .*:     (94 de 00 00|00 00 de 94)       stwu    r6,0\(r30\)
  34 .*:     (98 fe 00 00|00 00 fe 98)       stb     r7,0\(r30\)
  35 .*:     (9c fe 00 00|00 00 fe 9c)       stbu    r7,0\(r30\)
  36 .*:     (a1 1e 00 00|00 00 1e a1)       lhz     r8,0\(r30\)
  37 .*:     (a5 1e 00 00|00 00 1e a5)       lhzu    r8,0\(r30\)
  38 .*:     (a9 3e 00 00|00 00 3e a9)       lha     r9,0\(r30\)
  39 .*:     (ad 3e 00 00|00 00 3e ad)       lhau    r9,0\(r30\)
  40 .*:     (b1 5e 00 00|00 00 5e b1)       sth     r10,0\(r30\)
  41 .*:     (b5 5e 00 00|00 00 5e b5)       sthu    r10,0\(r30\)
  42 .*:     (c1 7e 00 00|00 00 7e c1)       lfs     f11,0\(r30\)
  43 .*:     (c5 7e 00 00|00 00 7e c5)       lfsu    f11,0\(r30\)
  44 .*:     (c9 9e 00 00|00 00 9e c9)       lfd     f12,0\(r30\)
  45 .*:     (cd 9e 00 00|00 00 9e cd)       lfdu    f12,0\(r30\)
  46 .*:     (d1 be 00 00|00 00 be d1)       stfs    f13,0\(r30\)
  47 .*:     (d5 be 00 00|00 00 be d5)       stfsu   f13,0\(r30\)
  48 .*:     (d9 de 00 00|00 00 de d9)       stfd    f14,0\(r30\)
  49 .*:     (dd de 00 00|00 00 de dd)       stfdu   f14,0\(r30\)
  50 .*:     (e9 fe 00 00|00 00 fe e9)       ld      r15,0\(r30\)
  51 .*:     (e9 fe 00 01|01 00 fe e9)       ldu     r15,0\(r30\)
  52 .*:     (fa 1e 00 00|00 00 1e fa)       std     r16,0\(r30\)
  53 .*:     (fa 1e 00 01|01 00 1e fa)       stdu    r16,0\(r30\)
  54 .*:     (ea 3e 00 02|02 00 3e ea)       lwa     r17,0\(r30\)