ld/testsuite/ld-spu/icache1.d

   1 #source: icache1.s
   2 #ld: --soft-icache --num-lines=4 --non-ia-text --auto-overlay=tmpdir/icache1.lnk --auto-relink
   3 #objdump: -D
   4
   5 .* elf32-spu
   6
   7
   8 Disassembly of section .ovl.init:
   9 00000000 <__icache_fileoff>:
  10 .*      00 00 00 00.*
  11 .*      00 00 02 00.*
  12         \.\.\.
  13
  14 Disassembly of section \.ovly1:
  15
  16 00000000 <\.ovly1>:
  17 .*      ai      \$1,\$1,64      # 40
  18 .*      lqd     \$0,16\(\$1\)
  19 .*      bi      \$0
  20         \.\.\.
  21
  22 Disassembly of section \.ovly2:
  23
  24 00000400 <f1>:
  25 .*      40 20 00 00     nop     \$0
  26 .*      24 00 40 80     stqd    \$0,16\(\$1\)
  27 .*      1c f0 00 81     ai      \$1,\$1,-64
  28 .*      24 00 00 81     stqd    \$1,0\(\$1\)
  29 .*      33 00 73 80     brsl    \$0,7ac .*
  30 .*      33 00 77 00     brsl    \$0,7cc .*
  31         \.\.\.
  32 .*      32 00 16 80     br      7ec .*
  33         \.\.\.
  34  7a0:   00 00 00 02.*
  35  7a4:   00 04 09 04.*
  36  7a8:   a0 00 04 10.*
  37  7ac:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
  38  7b0:   00 00 ed 00.*
  39         \.\.\.
  40  7c0:   00 00 00 02.*
  41  7c4:   00 04 08 00.*
  42  7c8:   a0 00 04 14.*
  43  7cc:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
  44  7d0:   00 00 00 00.*
  45  7d4:   00 00 0a 80.*
  46         \.\.\.
  47  7e4:   00 04 00 00.*
  48  7e8:   20 00 07 38.*
  49  7ec:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
  50         \.\.\.
  51  7f8:   00 7f 0f 80.*
  52  7fc:   00 00 00 00.*
  53
  54 Disassembly of section \.ovly3:
  55
  56 00000800 <f3>:
  57         \.\.\.
  58 .*      35 00 00 00     bi      \$0
  59
  60 00000904 <f2>:
  61 .*      1c e0 00 81     ai      \$1,\$1,-128
  62 .*      24 00 00 81     stqd    \$1,0\(\$1\)
  63         \.\.\.
  64 .*      1c 20 00 81     ai      \$1,\$1,128     # 80
  65 .*      35 00 00 00     bi      \$0
  66         \.\.\.
  67
  68 Disassembly of section \.ovly4:
  69
  70 00000c00 <f5>:
  71 .*      24 00 40 80     stqd    \$0,16\(\$1\)
  72 .*      24 f8 00 81     stqd    \$1,-512\(\$1\)
  73 .*      1c 80 00 81     ai      \$1,\$1,-512
  74 .*      33 7f fe 80     brsl    \$0,c00 <f5>    # c00
  75         \.\.\.
  76 .*      42 01 00 03     ila     \$3,200.*
  77 .*      18 00 c0 81     a       \$1,\$1,\$3
  78 .*      34 00 40 80     lqd     \$0,16\(\$1\)
  79 .*      35 00 00 00     bi      \$0
  80         \.\.\.
  81
  82 Disassembly of section \.ovly5:
  83
  84 00000000 <\.ovly5>:
  85         \.\.\.
  86 .*      42 01 00 03     ila     \$3,200 .*
  87 .*      18 00 c0 81     a       \$1,\$1,\$3
  88 .*      34 00 40 80     lqd     \$0,16\(\$1\)
  89 .*      30 00 7d 80     bra     3ec .*
  90         \.\.\.
  91  3e0:   00 00 00 03.*
  92  3e4:   00 04 0c 00.*
  93  3e8:   a0 00 03 2c.*
  94  3ec:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
  95         \.\.\.
  96  3fc:   00 01 fd 80.*
  97
  98 Disassembly of section \.ovly6:
  99
 100 00000400 <\.ovly6>:
 101 .*      31 00 f5 80     brasl   \$0,7ac .*
 102 .*      33 00 79 00     brsl    \$0,7cc .*
 103         \.\.\.
 104 .*      32 00 18 80     br      7ec .*
 105         \.\.\.
 106  7a0:   00 00 00 07.*
 107  7a4:   00 08 0c 00.*
 108  7a8:   a0 00 04 00.*
 109  7ac:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 110  7b0:   00 01 75 80.*
 111         \.\.\.
 112  7c0:   00 00 00 07.*
 113  7c4:   00 08 0c 00.*
 114  7c8:   a0 00 04 04.*
 115  7cc:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 116  7d0:   00 00 00 00.*
 117  7d4:   00 00 86 80.*
 118         \.\.\.
 119  7e0:   00 00 00 04.*
 120  7e4:   00 08 00 00.*
 121  7e8:   20 00 07 28.*
 122  7ec:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 123         \.\.\.
 124  7f8:   00 7f 03 80.*
 125  7fc:   00 00 00 00.*
 126
 127 Disassembly of section \.ovly7:
 128
 129 00000800 <\.ovly7>:
 130 .*      41 7f ff 83     ilhu    \$3,65535       # ffff
 131 .*      60 f8 30 03     iohl    \$3,61536       # f060
 132 .*      18 00 c0 84     a       \$4,\$1,\$3
 133 .*      00 20 00 00     lnop
 134 .*      04 00 02 01     ori     \$1,\$4,0
 135 .*      24 00 02 04     stqd    \$4,0\(\$4\)
 136 .*      33 00 72 80     brsl    \$0,bac .*
 137 .*      33 00 76 00     brsl    \$0,bcc .*
 138 .*      34 00 00 81     lqd     \$1,0\(\$1\)
 139         \.\.\.
 140 .*      32 00 15 00     br      bec .*
 141         \.\.\.
 142  ba0:   00 00 00 03.*
 143  ba4:   00 04 0c 00.*
 144  ba8:   a0 00 08 18.*
 145  bac:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 146         \.\.\.
 147  bb8:   00 00 0f 80.*
 148  bbc:   00 00 00 00.*
 149  bc0:   00 00 00 07.*
 150  bc4:   00 08 0c 00.*
 151  bc8:   a0 00 08 1c.*
 152  bcc:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 153         \.\.\.
 154  bdc:   00 00 0a 80.*
 155  be0:   00 00 00 05.*
 156  be4:   00 08 04 00.*
 157  be8:   20 00 0b 44.*
 158  bec:   31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 159  bf0:   00 00 00 00.*
 160  bf4:   00 7f 02 80.*
 161         \.\.\.
 162
 163 Disassembly of section \.ovly8:
 164
 165 00000c00 <f4>:
 166 .*      24 00 40 80     stqd    \$0,16\(\$1\)
 167 .*      24 f8 00 81     stqd    \$1,-512\(\$1\)
 168 .*      1c 80 00 81     ai      \$1,\$1,-512
 169 .*      31 01 f9 80     brasl   \$0,fcc .*
 170         \.\.\.
 171 .*      32 00 17 80     br      fec .*
 172         \.\.\.
 173      fc0:       00 00 00 02.*
 174      fc4:       00 04 09 04.*
 175      fc8:       a0 00 0c 0c.*
 176      fcc:       31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 177         \.\.\.
 178      fdc:       00 00 d9 00.*
 179      fe0:       00 00 00 06.*
 180      fe4:       00 08 08 00.*
 181      fe8:       20 00 0f 30.*
 182      fec:       31 02 01 cb     brasl   \$75,100c <__icache_br_handler>
 183      ff0:       00 7f 0d 80.*
 184         \.\.\.
 185
 186 Disassembly of section \.text:
 187
 188 00001000 <_start>:
 189 .*      41 00 02 03     ilhu    \$3,4
 190 .*      60 86 00 03     iohl    \$3,3072        # c00
 191 .*      32 00 04 80     br      102c.*
 192 0000100c <__icache_br_handler>:
 193     100c:       00 00 00 00     stop
 194 00001010 <__icache_call_handler>:
 195         \.\.\.
 196     1020:       00 00 00 01.*
 197     1024:       00 04 04 00.*
 198     1028:       a0 00 10 08.*
 199     102c:       31 02 02 4b     brasl   \$75,1010 <__icache_call_handler>
 200         \.\.\.
 201     1038:       00 7e 7b 80.*
 202         \.\.\.
 203
 204 #pass