x86: Support Intel IBT with IBT property and IBT-enable PLT
[deliverable/binutils-gdb.git] / ld / testsuite / ld-x86-64 / ibt-plt-3a-x32.d
1 #source: ibt-plt-3.s
2 #as: --x32
3 #ld: -shared -m elf32_x86_64 -z ibtplt
4 #objdump: -dw
5
6 .*: +file format .*
7
8
9 Disassembly of section .plt:
10
11 0+1a0 <.plt>:
12 +[a-f0-9]+: ff 35 52 01 20 00 pushq 0x200152\(%rip\) # 2002f8 <_GLOBAL_OFFSET_TABLE_\+0x8>
13 +[a-f0-9]+: ff 25 54 01 20 00 jmpq \*0x200154\(%rip\) # 200300 <_GLOBAL_OFFSET_TABLE_\+0x10>
14 +[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
15 +[a-f0-9]+: f3 0f 1e fa endbr64
16 +[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
17 +[a-f0-9]+: e9 e2 ff ff ff jmpq 1a0 <.plt>
18 +[a-f0-9]+: 66 90 xchg %ax,%ax
19 +[a-f0-9]+: f3 0f 1e fa endbr64
20 +[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
21 +[a-f0-9]+: e9 d2 ff ff ff jmpq 1a0 <.plt>
22 +[a-f0-9]+: 66 90 xchg %ax,%ax
23
24 Disassembly of section .plt.sec:
25
26 0+1d0 <bar1@plt>:
27 +[a-f0-9]+: f3 0f 1e fa endbr64
28 +[a-f0-9]+: ff 25 2e 01 20 00 jmpq \*0x20012e\(%rip\) # 200308 <bar1>
29 +[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
30
31 0+1e0 <bar2@plt>:
32 +[a-f0-9]+: f3 0f 1e fa endbr64
33 +[a-f0-9]+: ff 25 26 01 20 00 jmpq \*0x200126\(%rip\) # 200310 <bar2>
34 +[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
35
36 Disassembly of section .text:
37
38 0+1f0 <foo>:
39 +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp
40 +[a-f0-9]+: e8 e7 ff ff ff callq 1e0 <bar2@plt>
41 +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp
42 +[a-f0-9]+: e9 ce ff ff ff jmpq 1d0 <bar1@plt>
43 #pass
This page took 0.031663 seconds and 4 git commands to generate.