Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-2.6-nmw
[deliverable/linux.git] / lib / swiotlb.c
1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31
32 #include <asm/io.h>
33 #include <asm/dma.h>
34 #include <asm/scatterlist.h>
35
36 #include <linux/init.h>
37 #include <linux/bootmem.h>
38 #include <linux/iommu-helper.h>
39
40 #define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
42
43 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
44
45 /*
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
49 */
50 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
51
52 /*
53 * Enumeration for sync targets
54 */
55 enum dma_sync_target {
56 SYNC_FOR_CPU = 0,
57 SYNC_FOR_DEVICE = 1,
58 };
59
60 int swiotlb_force;
61
62 /*
63 * Used to do a quick range check in unmap_single and
64 * sync_single_*, to see if the memory was in fact allocated by this
65 * API.
66 */
67 static char *io_tlb_start, *io_tlb_end;
68
69 /*
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 */
73 static unsigned long io_tlb_nslabs;
74
75 /*
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 */
78 static unsigned long io_tlb_overflow = 32*1024;
79
80 void *io_tlb_overflow_buffer;
81
82 /*
83 * This is a free list describing the number of free entries available from
84 * each index
85 */
86 static unsigned int *io_tlb_list;
87 static unsigned int io_tlb_index;
88
89 /*
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
92 */
93 static phys_addr_t *io_tlb_orig_addr;
94
95 /*
96 * Protect the above data structures in the map and unmap calls
97 */
98 static DEFINE_SPINLOCK(io_tlb_lock);
99
100 static int __init
101 setup_io_tlb_npages(char *str)
102 {
103 if (isdigit(*str)) {
104 io_tlb_nslabs = simple_strtoul(str, &str, 0);
105 /* avoid tail segment of size < IO_TLB_SEGSIZE */
106 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
107 }
108 if (*str == ',')
109 ++str;
110 if (!strcmp(str, "force"))
111 swiotlb_force = 1;
112 return 1;
113 }
114 __setup("swiotlb=", setup_io_tlb_npages);
115 /* make io_tlb_overflow tunable too? */
116
117 void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
118 {
119 return alloc_bootmem_low_pages(size);
120 }
121
122 void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
123 {
124 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
125 }
126
127 dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
128 {
129 return paddr;
130 }
131
132 phys_addr_t __weak swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr)
133 {
134 return baddr;
135 }
136
137 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
139 {
140 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
141 }
142
143 void * __weak swiotlb_bus_to_virt(struct device *hwdev, dma_addr_t address)
144 {
145 return phys_to_virt(swiotlb_bus_to_phys(hwdev, address));
146 }
147
148 int __weak swiotlb_arch_address_needs_mapping(struct device *hwdev,
149 dma_addr_t addr, size_t size)
150 {
151 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
152 }
153
154 int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
155 {
156 return 0;
157 }
158
159 static void swiotlb_print_info(unsigned long bytes)
160 {
161 phys_addr_t pstart, pend;
162
163 pstart = virt_to_phys(io_tlb_start);
164 pend = virt_to_phys(io_tlb_end);
165
166 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
167 bytes >> 20, io_tlb_start, io_tlb_end);
168 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
169 (unsigned long long)pstart,
170 (unsigned long long)pend);
171 }
172
173 /*
174 * Statically reserve bounce buffer space and initialize bounce buffer data
175 * structures for the software IO TLB used to implement the DMA API.
176 */
177 void __init
178 swiotlb_init_with_default_size(size_t default_size)
179 {
180 unsigned long i, bytes;
181
182 if (!io_tlb_nslabs) {
183 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
184 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
185 }
186
187 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
188
189 /*
190 * Get IO TLB memory from the low pages
191 */
192 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
193 if (!io_tlb_start)
194 panic("Cannot allocate SWIOTLB buffer");
195 io_tlb_end = io_tlb_start + bytes;
196
197 /*
198 * Allocate and initialize the free list array. This array is used
199 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
200 * between io_tlb_start and io_tlb_end.
201 */
202 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
203 for (i = 0; i < io_tlb_nslabs; i++)
204 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
205 io_tlb_index = 0;
206 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
207
208 /*
209 * Get the overflow emergency buffer
210 */
211 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
212 if (!io_tlb_overflow_buffer)
213 panic("Cannot allocate SWIOTLB overflow buffer!\n");
214
215 swiotlb_print_info(bytes);
216 }
217
218 void __init
219 swiotlb_init(void)
220 {
221 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
222 }
223
224 /*
225 * Systems with larger DMA zones (those that don't support ISA) can
226 * initialize the swiotlb later using the slab allocator if needed.
227 * This should be just like above, but with some error catching.
228 */
229 int
230 swiotlb_late_init_with_default_size(size_t default_size)
231 {
232 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
233 unsigned int order;
234
235 if (!io_tlb_nslabs) {
236 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
237 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
238 }
239
240 /*
241 * Get IO TLB memory from the low pages
242 */
243 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
244 io_tlb_nslabs = SLABS_PER_PAGE << order;
245 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
246
247 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
248 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
249 if (io_tlb_start)
250 break;
251 order--;
252 }
253
254 if (!io_tlb_start)
255 goto cleanup1;
256
257 if (order != get_order(bytes)) {
258 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
259 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
260 io_tlb_nslabs = SLABS_PER_PAGE << order;
261 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
262 }
263 io_tlb_end = io_tlb_start + bytes;
264 memset(io_tlb_start, 0, bytes);
265
266 /*
267 * Allocate and initialize the free list array. This array is used
268 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
269 * between io_tlb_start and io_tlb_end.
270 */
271 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
272 get_order(io_tlb_nslabs * sizeof(int)));
273 if (!io_tlb_list)
274 goto cleanup2;
275
276 for (i = 0; i < io_tlb_nslabs; i++)
277 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
278 io_tlb_index = 0;
279
280 io_tlb_orig_addr = (phys_addr_t *)
281 __get_free_pages(GFP_KERNEL,
282 get_order(io_tlb_nslabs *
283 sizeof(phys_addr_t)));
284 if (!io_tlb_orig_addr)
285 goto cleanup3;
286
287 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
288
289 /*
290 * Get the overflow emergency buffer
291 */
292 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
293 get_order(io_tlb_overflow));
294 if (!io_tlb_overflow_buffer)
295 goto cleanup4;
296
297 swiotlb_print_info(bytes);
298
299 return 0;
300
301 cleanup4:
302 free_pages((unsigned long)io_tlb_orig_addr,
303 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
304 io_tlb_orig_addr = NULL;
305 cleanup3:
306 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
307 sizeof(int)));
308 io_tlb_list = NULL;
309 cleanup2:
310 io_tlb_end = NULL;
311 free_pages((unsigned long)io_tlb_start, order);
312 io_tlb_start = NULL;
313 cleanup1:
314 io_tlb_nslabs = req_nslabs;
315 return -ENOMEM;
316 }
317
318 static inline int
319 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
320 {
321 return swiotlb_arch_address_needs_mapping(hwdev, addr, size);
322 }
323
324 static inline int range_needs_mapping(phys_addr_t paddr, size_t size)
325 {
326 return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size);
327 }
328
329 static int is_swiotlb_buffer(char *addr)
330 {
331 return addr >= io_tlb_start && addr < io_tlb_end;
332 }
333
334 /*
335 * Bounce: copy the swiotlb buffer back to the original dma location
336 */
337 static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
338 enum dma_data_direction dir)
339 {
340 unsigned long pfn = PFN_DOWN(phys);
341
342 if (PageHighMem(pfn_to_page(pfn))) {
343 /* The buffer does not have a mapping. Map it in and copy */
344 unsigned int offset = phys & ~PAGE_MASK;
345 char *buffer;
346 unsigned int sz = 0;
347 unsigned long flags;
348
349 while (size) {
350 sz = min_t(size_t, PAGE_SIZE - offset, size);
351
352 local_irq_save(flags);
353 buffer = kmap_atomic(pfn_to_page(pfn),
354 KM_BOUNCE_READ);
355 if (dir == DMA_TO_DEVICE)
356 memcpy(dma_addr, buffer + offset, sz);
357 else
358 memcpy(buffer + offset, dma_addr, sz);
359 kunmap_atomic(buffer, KM_BOUNCE_READ);
360 local_irq_restore(flags);
361
362 size -= sz;
363 pfn++;
364 dma_addr += sz;
365 offset = 0;
366 }
367 } else {
368 if (dir == DMA_TO_DEVICE)
369 memcpy(dma_addr, phys_to_virt(phys), size);
370 else
371 memcpy(phys_to_virt(phys), dma_addr, size);
372 }
373 }
374
375 /*
376 * Allocates bounce buffer and returns its kernel virtual address.
377 */
378 static void *
379 map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
380 {
381 unsigned long flags;
382 char *dma_addr;
383 unsigned int nslots, stride, index, wrap;
384 int i;
385 unsigned long start_dma_addr;
386 unsigned long mask;
387 unsigned long offset_slots;
388 unsigned long max_slots;
389
390 mask = dma_get_seg_boundary(hwdev);
391 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
392
393 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
394
395 /*
396 * Carefully handle integer overflow which can occur when mask == ~0UL.
397 */
398 max_slots = mask + 1
399 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
400 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
401
402 /*
403 * For mappings greater than a page, we limit the stride (and
404 * hence alignment) to a page size.
405 */
406 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
407 if (size > PAGE_SIZE)
408 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
409 else
410 stride = 1;
411
412 BUG_ON(!nslots);
413
414 /*
415 * Find suitable number of IO TLB entries size that will fit this
416 * request and allocate a buffer from that IO TLB pool.
417 */
418 spin_lock_irqsave(&io_tlb_lock, flags);
419 index = ALIGN(io_tlb_index, stride);
420 if (index >= io_tlb_nslabs)
421 index = 0;
422 wrap = index;
423
424 do {
425 while (iommu_is_span_boundary(index, nslots, offset_slots,
426 max_slots)) {
427 index += stride;
428 if (index >= io_tlb_nslabs)
429 index = 0;
430 if (index == wrap)
431 goto not_found;
432 }
433
434 /*
435 * If we find a slot that indicates we have 'nslots' number of
436 * contiguous buffers, we allocate the buffers from that slot
437 * and mark the entries as '0' indicating unavailable.
438 */
439 if (io_tlb_list[index] >= nslots) {
440 int count = 0;
441
442 for (i = index; i < (int) (index + nslots); i++)
443 io_tlb_list[i] = 0;
444 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
445 io_tlb_list[i] = ++count;
446 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
447
448 /*
449 * Update the indices to avoid searching in the next
450 * round.
451 */
452 io_tlb_index = ((index + nslots) < io_tlb_nslabs
453 ? (index + nslots) : 0);
454
455 goto found;
456 }
457 index += stride;
458 if (index >= io_tlb_nslabs)
459 index = 0;
460 } while (index != wrap);
461
462 not_found:
463 spin_unlock_irqrestore(&io_tlb_lock, flags);
464 return NULL;
465 found:
466 spin_unlock_irqrestore(&io_tlb_lock, flags);
467
468 /*
469 * Save away the mapping from the original address to the DMA address.
470 * This is needed when we sync the memory. Then we sync the buffer if
471 * needed.
472 */
473 for (i = 0; i < nslots; i++)
474 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
475 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
476 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
477
478 return dma_addr;
479 }
480
481 /*
482 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
483 */
484 static void
485 do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
486 {
487 unsigned long flags;
488 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
489 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
490 phys_addr_t phys = io_tlb_orig_addr[index];
491
492 /*
493 * First, sync the memory before unmapping the entry
494 */
495 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
496 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
497
498 /*
499 * Return the buffer to the free list by setting the corresponding
500 * entries to indicate the number of contigous entries available.
501 * While returning the entries to the free list, we merge the entries
502 * with slots below and above the pool being returned.
503 */
504 spin_lock_irqsave(&io_tlb_lock, flags);
505 {
506 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
507 io_tlb_list[index + nslots] : 0);
508 /*
509 * Step 1: return the slots to the free list, merging the
510 * slots with superceeding slots
511 */
512 for (i = index + nslots - 1; i >= index; i--)
513 io_tlb_list[i] = ++count;
514 /*
515 * Step 2: merge the returned slots with the preceding slots,
516 * if available (non zero)
517 */
518 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
519 io_tlb_list[i] = ++count;
520 }
521 spin_unlock_irqrestore(&io_tlb_lock, flags);
522 }
523
524 static void
525 sync_single(struct device *hwdev, char *dma_addr, size_t size,
526 int dir, int target)
527 {
528 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
529 phys_addr_t phys = io_tlb_orig_addr[index];
530
531 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
532
533 switch (target) {
534 case SYNC_FOR_CPU:
535 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
536 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
537 else
538 BUG_ON(dir != DMA_TO_DEVICE);
539 break;
540 case SYNC_FOR_DEVICE:
541 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
542 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
543 else
544 BUG_ON(dir != DMA_FROM_DEVICE);
545 break;
546 default:
547 BUG();
548 }
549 }
550
551 void *
552 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
553 dma_addr_t *dma_handle, gfp_t flags)
554 {
555 dma_addr_t dev_addr;
556 void *ret;
557 int order = get_order(size);
558 u64 dma_mask = DMA_BIT_MASK(32);
559
560 if (hwdev && hwdev->coherent_dma_mask)
561 dma_mask = hwdev->coherent_dma_mask;
562
563 ret = (void *)__get_free_pages(flags, order);
564 if (ret &&
565 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
566 size)) {
567 /*
568 * The allocated memory isn't reachable by the device.
569 */
570 free_pages((unsigned long) ret, order);
571 ret = NULL;
572 }
573 if (!ret) {
574 /*
575 * We are either out of memory or the device can't DMA
576 * to GFP_DMA memory; fall back on map_single(), which
577 * will grab memory from the lowest available address range.
578 */
579 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
580 if (!ret)
581 return NULL;
582 }
583
584 memset(ret, 0, size);
585 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
586
587 /* Confirm address can be DMA'd by device */
588 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
589 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
590 (unsigned long long)dma_mask,
591 (unsigned long long)dev_addr);
592
593 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
594 do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
595 return NULL;
596 }
597 *dma_handle = dev_addr;
598 return ret;
599 }
600 EXPORT_SYMBOL(swiotlb_alloc_coherent);
601
602 void
603 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
604 dma_addr_t dma_handle)
605 {
606 WARN_ON(irqs_disabled());
607 if (!is_swiotlb_buffer(vaddr))
608 free_pages((unsigned long) vaddr, get_order(size));
609 else
610 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
611 do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
612 }
613 EXPORT_SYMBOL(swiotlb_free_coherent);
614
615 static void
616 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
617 {
618 /*
619 * Ran out of IOMMU space for this operation. This is very bad.
620 * Unfortunately the drivers cannot handle this operation properly.
621 * unless they check for dma_mapping_error (most don't)
622 * When the mapping is small enough return a static buffer to limit
623 * the damage, or panic when the transfer is too big.
624 */
625 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
626 "device %s\n", size, dev ? dev_name(dev) : "?");
627
628 if (size > io_tlb_overflow && do_panic) {
629 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
630 panic("DMA: Memory would be corrupted\n");
631 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
632 panic("DMA: Random memory would be DMAed\n");
633 }
634 }
635
636 /*
637 * Map a single buffer of the indicated size for DMA in streaming mode. The
638 * physical address to use is returned.
639 *
640 * Once the device is given the dma address, the device owns this memory until
641 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
642 */
643 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
644 unsigned long offset, size_t size,
645 enum dma_data_direction dir,
646 struct dma_attrs *attrs)
647 {
648 phys_addr_t phys = page_to_phys(page) + offset;
649 dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys);
650 void *map;
651
652 BUG_ON(dir == DMA_NONE);
653 /*
654 * If the address happens to be in the device's DMA window,
655 * we can safely return the device addr and not worry about bounce
656 * buffering it.
657 */
658 if (!address_needs_mapping(dev, dev_addr, size) &&
659 !range_needs_mapping(phys, size))
660 return dev_addr;
661
662 /*
663 * Oh well, have to allocate and map a bounce buffer.
664 */
665 map = map_single(dev, phys, size, dir);
666 if (!map) {
667 swiotlb_full(dev, size, dir, 1);
668 map = io_tlb_overflow_buffer;
669 }
670
671 dev_addr = swiotlb_virt_to_bus(dev, map);
672
673 /*
674 * Ensure that the address returned is DMA'ble
675 */
676 if (address_needs_mapping(dev, dev_addr, size))
677 panic("map_single: bounce buffer is not DMA'ble");
678
679 return dev_addr;
680 }
681 EXPORT_SYMBOL_GPL(swiotlb_map_page);
682
683 /*
684 * Unmap a single streaming mode DMA translation. The dma_addr and size must
685 * match what was provided for in a previous swiotlb_map_page call. All
686 * other usages are undefined.
687 *
688 * After this call, reads by the cpu to the buffer are guaranteed to see
689 * whatever the device wrote there.
690 */
691 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
692 size_t size, int dir)
693 {
694 char *dma_addr = swiotlb_bus_to_virt(hwdev, dev_addr);
695
696 BUG_ON(dir == DMA_NONE);
697
698 if (is_swiotlb_buffer(dma_addr)) {
699 do_unmap_single(hwdev, dma_addr, size, dir);
700 return;
701 }
702
703 if (dir != DMA_FROM_DEVICE)
704 return;
705
706 dma_mark_clean(dma_addr, size);
707 }
708
709 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
710 size_t size, enum dma_data_direction dir,
711 struct dma_attrs *attrs)
712 {
713 unmap_single(hwdev, dev_addr, size, dir);
714 }
715 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
716
717 /*
718 * Make physical memory consistent for a single streaming mode DMA translation
719 * after a transfer.
720 *
721 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
722 * using the cpu, yet do not wish to teardown the dma mapping, you must
723 * call this function before doing so. At the next point you give the dma
724 * address back to the card, you must first perform a
725 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
726 */
727 static void
728 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
729 size_t size, int dir, int target)
730 {
731 char *dma_addr = swiotlb_bus_to_virt(hwdev, dev_addr);
732
733 BUG_ON(dir == DMA_NONE);
734
735 if (is_swiotlb_buffer(dma_addr)) {
736 sync_single(hwdev, dma_addr, size, dir, target);
737 return;
738 }
739
740 if (dir != DMA_FROM_DEVICE)
741 return;
742
743 dma_mark_clean(dma_addr, size);
744 }
745
746 void
747 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
748 size_t size, enum dma_data_direction dir)
749 {
750 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
751 }
752 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
753
754 void
755 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
756 size_t size, enum dma_data_direction dir)
757 {
758 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
759 }
760 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
761
762 /*
763 * Same as above, but for a sub-range of the mapping.
764 */
765 static void
766 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
767 unsigned long offset, size_t size,
768 int dir, int target)
769 {
770 swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target);
771 }
772
773 void
774 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
775 unsigned long offset, size_t size,
776 enum dma_data_direction dir)
777 {
778 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
779 SYNC_FOR_CPU);
780 }
781 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
782
783 void
784 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
785 unsigned long offset, size_t size,
786 enum dma_data_direction dir)
787 {
788 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
789 SYNC_FOR_DEVICE);
790 }
791 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
792
793 /*
794 * Map a set of buffers described by scatterlist in streaming mode for DMA.
795 * This is the scatter-gather version of the above swiotlb_map_page
796 * interface. Here the scatter gather list elements are each tagged with the
797 * appropriate dma address and length. They are obtained via
798 * sg_dma_{address,length}(SG).
799 *
800 * NOTE: An implementation may be able to use a smaller number of
801 * DMA address/length pairs than there are SG table elements.
802 * (for example via virtual mapping capabilities)
803 * The routine returns the number of addr/length pairs actually
804 * used, at most nents.
805 *
806 * Device ownership issues as mentioned above for swiotlb_map_page are the
807 * same here.
808 */
809 int
810 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
811 enum dma_data_direction dir, struct dma_attrs *attrs)
812 {
813 struct scatterlist *sg;
814 int i;
815
816 BUG_ON(dir == DMA_NONE);
817
818 for_each_sg(sgl, sg, nelems, i) {
819 phys_addr_t paddr = sg_phys(sg);
820 dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr);
821
822 if (range_needs_mapping(paddr, sg->length) ||
823 address_needs_mapping(hwdev, dev_addr, sg->length)) {
824 void *map = map_single(hwdev, sg_phys(sg),
825 sg->length, dir);
826 if (!map) {
827 /* Don't panic here, we expect map_sg users
828 to do proper error handling. */
829 swiotlb_full(hwdev, sg->length, dir, 0);
830 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
831 attrs);
832 sgl[0].dma_length = 0;
833 return 0;
834 }
835 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
836 } else
837 sg->dma_address = dev_addr;
838 sg->dma_length = sg->length;
839 }
840 return nelems;
841 }
842 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
843
844 int
845 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
846 int dir)
847 {
848 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
849 }
850 EXPORT_SYMBOL(swiotlb_map_sg);
851
852 /*
853 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
854 * concerning calls here are the same as for swiotlb_unmap_page() above.
855 */
856 void
857 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
858 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
859 {
860 struct scatterlist *sg;
861 int i;
862
863 BUG_ON(dir == DMA_NONE);
864
865 for_each_sg(sgl, sg, nelems, i)
866 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
867
868 }
869 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
870
871 void
872 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
873 int dir)
874 {
875 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
876 }
877 EXPORT_SYMBOL(swiotlb_unmap_sg);
878
879 /*
880 * Make physical memory consistent for a set of streaming mode DMA translations
881 * after a transfer.
882 *
883 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
884 * and usage.
885 */
886 static void
887 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
888 int nelems, int dir, int target)
889 {
890 struct scatterlist *sg;
891 int i;
892
893 for_each_sg(sgl, sg, nelems, i)
894 swiotlb_sync_single(hwdev, sg->dma_address,
895 sg->dma_length, dir, target);
896 }
897
898 void
899 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
900 int nelems, enum dma_data_direction dir)
901 {
902 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
903 }
904 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
905
906 void
907 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
908 int nelems, enum dma_data_direction dir)
909 {
910 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
911 }
912 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
913
914 int
915 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
916 {
917 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
918 }
919 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
920
921 /*
922 * Return whether the given device DMA address mask can be supported
923 * properly. For example, if your device can only drive the low 24-bits
924 * during bus mastering, then you would pass 0x00ffffff as the mask to
925 * this function.
926 */
927 int
928 swiotlb_dma_supported(struct device *hwdev, u64 mask)
929 {
930 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
931 }
932 EXPORT_SYMBOL(swiotlb_dma_supported);
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