1 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
3 * bpf-opc.c: Regenerate.
5 2020-01-30 Jan Beulich <jbeulich@suse.com>
7 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
8 (dis386): Use them to replace C2/C3 table entries.
9 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
10 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
11 ones. Use Size64 instead of DefaultSize on Intel64 ones.
12 * i386-tbl.h: Re-generate.
14 2020-01-30 Jan Beulich <jbeulich@suse.com>
16 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
18 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
20 * i386-tbl.h: Re-generate.
22 2020-01-30 Alan Modra <amodra@gmail.com>
24 * tic4x-dis.c (tic4x_dp): Make unsigned.
26 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
27 Jan Beulich <jbeulich@suse.com>
30 * i386-dis.c (MOVSXD_Fixup): New function.
31 (movsxd_mode): New enum.
32 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
33 (intel_operand_size): Handle movsxd_mode.
34 (OP_E_register): Likewise.
36 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
37 register on movsxd. Add movsxd with 16-bit destination register
38 for AMD64 and Intel64 ISAs.
39 * i386-tbl.h: Regenerated.
41 2020-01-27 Tamar Christina <tamar.christina@arm.com>
44 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
45 * aarch64-asm-2.c: Regenerate
46 * aarch64-dis-2.c: Likewise.
47 * aarch64-opc-2.c: Likewise.
49 2020-01-21 Jan Beulich <jbeulich@suse.com>
51 * i386-opc.tbl (sysret): Drop DefaultSize.
52 * i386-tbl.h: Re-generate.
54 2020-01-21 Jan Beulich <jbeulich@suse.com>
56 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
58 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
59 * i386-tbl.h: Re-generate.
61 2020-01-20 Nick Clifton <nickc@redhat.com>
63 * po/de.po: Updated German translation.
64 * po/pt_BR.po: Updated Brazilian Portuguese translation.
65 * po/uk.po: Updated Ukranian translation.
67 2020-01-20 Alan Modra <amodra@gmail.com>
69 * hppa-dis.c (fput_const): Remove useless cast.
71 2020-01-20 Alan Modra <amodra@gmail.com>
73 * arm-dis.c (print_insn_arm): Wrap 'T' value.
75 2020-01-18 Nick Clifton <nickc@redhat.com>
77 * configure: Regenerate.
78 * po/opcodes.pot: Regenerate.
80 2020-01-18 Nick Clifton <nickc@redhat.com>
82 Binutils 2.34 branch created.
84 2020-01-17 Christian Biesinger <cbiesinger@google.com>
86 * opintl.h: Fix spelling error (seperate).
88 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
90 * i386-opc.tbl: Add {vex} pseudo prefix.
91 * i386-tbl.h: Regenerated.
93 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
96 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
97 (neon_opcodes): Likewise.
98 (select_arm_features): Make sure we enable MVE bits when selecting
99 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
102 2020-01-16 Jan Beulich <jbeulich@suse.com>
104 * i386-opc.tbl: Drop stale comment from XOP section.
106 2020-01-16 Jan Beulich <jbeulich@suse.com>
108 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
109 (extractps): Add VexWIG to SSE2AVX forms.
110 * i386-tbl.h: Re-generate.
112 2020-01-16 Jan Beulich <jbeulich@suse.com>
114 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
115 Size64 from and use VexW1 on SSE2AVX forms.
116 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
117 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
118 * i386-tbl.h: Re-generate.
120 2020-01-15 Alan Modra <amodra@gmail.com>
122 * tic4x-dis.c (tic4x_version): Make unsigned long.
123 (optab, optab_special, registernames): New file scope vars.
124 (tic4x_print_register): Set up registernames rather than
125 malloc'd registertable.
126 (tic4x_disassemble): Delete optable and optable_special. Use
127 optab and optab_special instead. Throw away old optab,
128 optab_special and registernames when info->mach changes.
130 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
133 * z80-dis.c (suffix): Use .db instruction to generate double
136 2020-01-14 Alan Modra <amodra@gmail.com>
138 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
139 values to unsigned before shifting.
141 2020-01-13 Thomas Troeger <tstroege@gmx.de>
143 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
145 (print_insn_thumb16, print_insn_thumb32): Likewise.
146 (print_insn): Initialize the insn info.
147 * i386-dis.c (print_insn): Initialize the insn info fields, and
150 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
152 * arc-opc.c (C_NE): Make it required.
154 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
156 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
157 reserved register name.
159 2020-01-13 Alan Modra <amodra@gmail.com>
161 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
162 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
164 2020-01-13 Alan Modra <amodra@gmail.com>
166 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
167 result of wasm_read_leb128 in a uint64_t and check that bits
168 are not lost when copying to other locals. Use uint32_t for
169 most locals. Use PRId64 when printing int64_t.
171 2020-01-13 Alan Modra <amodra@gmail.com>
173 * score-dis.c: Formatting.
174 * score7-dis.c: Formatting.
176 2020-01-13 Alan Modra <amodra@gmail.com>
178 * score-dis.c (print_insn_score48): Use unsigned variables for
179 unsigned values. Don't left shift negative values.
180 (print_insn_score32): Likewise.
181 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
183 2020-01-13 Alan Modra <amodra@gmail.com>
185 * tic4x-dis.c (tic4x_print_register): Remove dead code.
187 2020-01-13 Alan Modra <amodra@gmail.com>
189 * fr30-ibld.c: Regenerate.
191 2020-01-13 Alan Modra <amodra@gmail.com>
193 * xgate-dis.c (print_insn): Don't left shift signed value.
194 (ripBits): Formatting, use 1u.
196 2020-01-10 Alan Modra <amodra@gmail.com>
198 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
199 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
201 2020-01-10 Alan Modra <amodra@gmail.com>
203 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
204 and XRREG value earlier to avoid a shift with negative exponent.
205 * m10200-dis.c (disassemble): Similarly.
207 2020-01-09 Nick Clifton <nickc@redhat.com>
210 * z80-dis.c (ld_ii_ii): Use correct cast.
212 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
215 * z80-dis.c (ld_ii_ii): Use character constant when checking
218 2020-01-09 Jan Beulich <jbeulich@suse.com>
220 * i386-dis.c (SEP_Fixup): New.
222 (dis386_twobyte): Use it for sysenter/sysexit.
223 (enum x86_64_isa): Change amd64 enumerator to value 1.
224 (OP_J): Compare isa64 against intel64 instead of amd64.
225 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
227 * i386-tbl.h: Re-generate.
229 2020-01-08 Alan Modra <amodra@gmail.com>
231 * z8k-dis.c: Include libiberty.h
232 (instr_data_s): Make max_fetched unsigned.
233 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
234 Don't exceed byte_info bounds.
235 (output_instr): Make num_bytes unsigned.
236 (unpack_instr): Likewise for nibl_count and loop.
237 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
239 * z8k-opc.h: Regenerate.
241 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
243 * arc-tbl.h (llock): Use 'LLOCK' as class.
245 (scond): Use 'SCOND' as class.
247 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
250 2020-01-06 Alan Modra <amodra@gmail.com>
252 * m32c-ibld.c: Regenerate.
254 2020-01-06 Alan Modra <amodra@gmail.com>
257 * z80-dis.c (suffix): Don't use a local struct buffer copy.
258 Peek at next byte to prevent recursion on repeated prefix bytes.
259 Ensure uninitialised "mybuf" is not accessed.
260 (print_insn_z80): Don't zero n_fetch and n_used here,..
261 (print_insn_z80_buf): ..do it here instead.
263 2020-01-04 Alan Modra <amodra@gmail.com>
265 * m32r-ibld.c: Regenerate.
267 2020-01-04 Alan Modra <amodra@gmail.com>
269 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
271 2020-01-04 Alan Modra <amodra@gmail.com>
273 * crx-dis.c (match_opcode): Avoid shift left of signed value.
275 2020-01-04 Alan Modra <amodra@gmail.com>
277 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
279 2020-01-03 Jan Beulich <jbeulich@suse.com>
281 * aarch64-tbl.h (aarch64_opcode_table): Use
282 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
284 2020-01-03 Jan Beulich <jbeulich@suse.com>
286 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
287 forms of SUDOT and USDOT.
289 2020-01-03 Jan Beulich <jbeulich@suse.com>
291 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
293 * opcodes/aarch64-dis-2.c: Re-generate.
295 2020-01-03 Jan Beulich <jbeulich@suse.com>
297 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
299 * opcodes/aarch64-dis-2.c: Re-generate.
301 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
303 * z80-dis.c: Add support for eZ80 and Z80 instructions.
305 2020-01-01 Alan Modra <amodra@gmail.com>
307 Update year range in copyright notice of all files.
309 For older changes see ChangeLog-2019
311 Copyright (C) 2020 Free Software Foundation, Inc.
313 Copying and distribution of this file, with or without modification,
314 are permitted in any medium without royalty provided the copyright
315 notice and this notice are preserved.
321 version-control: never