179559f5aac66a1174a181762bb413c37020559e
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
2
3 PR binutils/14355
4 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
5 (VEX_LEN_0FXOP_08_CD): Likewise.
6 (VEX_LEN_0FXOP_08_CE): Likewise.
7 (VEX_LEN_0FXOP_08_CF): Likewise.
8 (VEX_LEN_0FXOP_08_EC): Likewise.
9 (VEX_LEN_0FXOP_08_ED): Likewise.
10 (VEX_LEN_0FXOP_08_EE): Likewise.
11 (VEX_LEN_0FXOP_08_EF): Likewise.
12 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
13 vpcomub, vpcomuw, vpcomud, vpcomuq.
14 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
15 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
16 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
17 VEX_LEN_0FXOP_08_EF.
18
19 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
20
21 * i386-dis.c (PREFIX_0F38F6): New.
22 (prefix_table): Add adcx, adox instructions.
23 (three_byte_table): Use PREFIX_0F38F6.
24 (mod_table): Add rdseed instruction.
25 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
26 (cpu_flags): Likewise.
27 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
28 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
29 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
30 prefetchw.
31 * i386-tbl.h: Regenerate.
32 * i386-init.h: Likewise.
33
34 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
35
36 * mips-dis.c: Remove gratuitous newline.
37
38 2012-07-02 Roland McGrath <mcgrathr@google.com>
39
40 * i386-opc.tbl: Add RepPrefixOk to nop.
41 * i386-tbl.h: Regenerate.
42
43 2012-06-28 Nick Clifton <nickc@redhat.com>
44
45 * po/vi.po: Updated Vietnamese translation.
46
47 2012-06-22 Roland McGrath <mcgrathr@google.com>
48
49 * i386-opc.tbl: Add RepPrefixOk to ret.
50 * i386-tbl.h: Regenerate.
51
52 * i386-opc.h (RepPrefixOk): New enum constant.
53 (i386_opcode_modifier): New bitfield 'repprefixok'.
54 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
55 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
56 instructions that have IsString.
57 * i386-tbl.h: Regenerate.
58
59 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
60
61 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
62 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
63 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
64 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
65 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
66 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
67 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
68 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
69 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
70
71 2012-05-19 Alan Modra <amodra@gmail.com>
72
73 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
74 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
75
76 2012-05-18 Alan Modra <amodra@gmail.com>
77
78 * ia64-opc.c: Remove #include "ansidecl.h".
79 * z8kgen.c: Include sysdep.h first.
80
81 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
82 * bfin-dis.c: Likewise.
83 * i860-dis.c: Likewise.
84 * ia64-dis.c: Likewise.
85 * ia64-gen.c: Likewise.
86 * m68hc11-dis.c: Likewise.
87 * mmix-dis.c: Likewise.
88 * msp430-dis.c: Likewise.
89 * or32-dis.c: Likewise.
90 * rl78-dis.c: Likewise.
91 * rx-dis.c: Likewise.
92 * tic4x-dis.c: Likewise.
93 * tilegx-opc.c: Likewise.
94 * tilepro-opc.c: Likewise.
95 * rx-decode.c: Regenerate.
96
97 2012-05-17 James Lemke <jwlemke@codesourcery.com>
98
99 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
100
101 2012-05-17 James Lemke <jwlemke@codesourcery.com>
102
103 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
104
105 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
106 Nick Clifton <nickc@redhat.com>
107
108 PR 14072
109 * configure.in: Add check that sysdep.h has been included before
110 any system header files.
111 * configure: Regenerate.
112 * config.in: Regenerate.
113 * sysdep.h: Generate an error if included before config.h.
114 * alpha-opc.c: Include sysdep.h before any other header file.
115 * alpha-dis.c: Likewise.
116 * avr-dis.c: Likewise.
117 * cgen-opc.c: Likewise.
118 * cr16-dis.c: Likewise.
119 * cris-dis.c: Likewise.
120 * crx-dis.c: Likewise.
121 * d10v-dis.c: Likewise.
122 * d10v-opc.c: Likewise.
123 * d30v-dis.c: Likewise.
124 * d30v-opc.c: Likewise.
125 * h8500-dis.c: Likewise.
126 * i370-dis.c: Likewise.
127 * i370-opc.c: Likewise.
128 * m10200-dis.c: Likewise.
129 * m10300-dis.c: Likewise.
130 * micromips-opc.c: Likewise.
131 * mips-opc.c: Likewise.
132 * mips61-opc.c: Likewise.
133 * moxie-dis.c: Likewise.
134 * or32-opc.c: Likewise.
135 * pj-dis.c: Likewise.
136 * ppc-dis.c: Likewise.
137 * ppc-opc.c: Likewise.
138 * s390-dis.c: Likewise.
139 * sh-dis.c: Likewise.
140 * sh64-dis.c: Likewise.
141 * sparc-dis.c: Likewise.
142 * sparc-opc.c: Likewise.
143 * spu-dis.c: Likewise.
144 * tic30-dis.c: Likewise.
145 * tic54x-dis.c: Likewise.
146 * tic80-dis.c: Likewise.
147 * tic80-opc.c: Likewise.
148 * tilegx-dis.c: Likewise.
149 * tilepro-dis.c: Likewise.
150 * v850-dis.c: Likewise.
151 * v850-opc.c: Likewise.
152 * vax-dis.c: Likewise.
153 * w65-dis.c: Likewise.
154 * xgate-dis.c: Likewise.
155 * xtensa-dis.c: Likewise.
156 * rl78-decode.opc: Likewise.
157 * rl78-decode.c: Regenerate.
158 * rx-decode.opc: Likewise.
159 * rx-decode.c: Regenerate.
160
161 2012-05-17 Alan Modra <amodra@gmail.com>
162
163 * ppc_dis.c: Don't include elf/ppc.h.
164
165 2012-05-16 Meador Inge <meadori@codesourcery.com>
166
167 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
168 to PUSH/POP {reg}.
169
170 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
171 Stephane Carrez <stcarrez@nerim.fr>
172
173 * configure.in: Add S12X and XGATE co-processor support to m68hc11
174 target.
175 * disassemble.c: Likewise.
176 * configure: Regenerate.
177 * m68hc11-dis.c: Make objdump output more consistent, use hex
178 instead of decimal and use 0x prefix for hex.
179 * m68hc11-opc.c: Add S12X and XGATE opcodes.
180
181 2012-05-14 James Lemke <jwlemke@codesourcery.com>
182
183 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
184 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
185 (vle_opcd_indices): New array.
186 (lookup_vle): New function.
187 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
188 (print_insn_powerpc): Likewise.
189 * ppc-opc.c: Likewise.
190
191 2012-05-14 Catherine Moore <clm@codesourcery.com>
192 Maciej W. Rozycki <macro@codesourcery.com>
193 Rhonda Wittels <rhonda@codesourcery.com>
194 Nathan Froyd <froydnj@codesourcery.com>
195
196 * ppc-opc.c (insert_arx, extract_arx): New functions.
197 (insert_ary, extract_ary): New functions.
198 (insert_li20, extract_li20): New functions.
199 (insert_rx, extract_rx): New functions.
200 (insert_ry, extract_ry): New functions.
201 (insert_sci8, extract_sci8): New functions.
202 (insert_sci8n, extract_sci8n): New functions.
203 (insert_sd4h, extract_sd4h): New functions.
204 (insert_sd4w, extract_sd4w): New functions.
205 (insert_vlesi, extract_vlesi): New functions.
206 (insert_vlensi, extract_vlensi): New functions.
207 (insert_vleui, extract_vleui): New functions.
208 (insert_vleil, extract_vleil): New functions.
209 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
210 (BI16, BI32, BO32, B8): New.
211 (B15, B24, CRD32, CRS): New.
212 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
213 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
214 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
215 (SH6_MASK): Use PPC_OPSHIFT_INV.
216 (SI8, UI5, OIMM5, UI7, BO16): New.
217 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
218 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
219 (ALLOW8_SPRG): New.
220 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
221 (OPVUP, OPVUP_MASK OPVUP): New
222 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
223 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
224 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
225 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
226 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
227 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
228 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
229 (SE_IM5, SE_IM5_MASK): New.
230 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
231 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
232 (BO32DNZ, BO32DZ): New.
233 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
234 (PPCVLE): New.
235 (powerpc_opcodes): Add new VLE instructions. Update existing
236 instruction to include PPCVLE if supported.
237 * ppc-dis.c (ppc_opts): Add vle entry.
238 (get_powerpc_dialect): New function.
239 (powerpc_init_dialect): VLE support.
240 (print_insn_big_powerpc): Call get_powerpc_dialect.
241 (print_insn_little_powerpc): Likewise.
242 (operand_value_powerpc): Handle negative shift counts.
243 (print_insn_powerpc): Handle 2-byte instruction lengths.
244
245 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
246
247 PR binutils/14028
248 * configure.in: Invoke ACX_HEADER_STRING.
249 * configure: Regenerate.
250 * config.in: Regenerate.
251 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
252 string.h and strings.h.
253
254 2012-05-11 Nick Clifton <nickc@redhat.com>
255
256 PR binutils/14006
257 * arm-dis.c (print_insn): Fix detection of instruction mode in
258 files containing multiple executable sections.
259
260 2012-05-03 Sean Keys <skeys@ipdatasys.com>
261
262 * Makefile.in, configure: regenerate
263 * disassemble.c (disassembler): Recognize ARCH_XGATE.
264 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
265 New functions.
266 * configure.in: Recognize xgate.
267 * xgate-dis.c, xgate-opc.c: New files for support of xgate
268 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
269 and opcode generation for xgate.
270
271 2012-04-30 DJ Delorie <dj@redhat.com>
272
273 * rx-decode.opc (MOV): Do not sign-extend immediates which are
274 already the maximum bit size.
275 * rx-decode.c: Regenerate.
276
277 2012-04-27 David S. Miller <davem@davemloft.net>
278
279 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
280 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
281
282 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
283 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
284
285 * sparc-opc.c (CBCOND): New define.
286 (CBCOND_XCC): Likewise.
287 (cbcond): New helper macro.
288 (sparc_opcodes): Add compare-and-branch instructions.
289
290 * sparc-dis.c (print_insn_sparc): Handle ')'.
291 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
292
293 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
294 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
295
296 2012-04-12 David S. Miller <davem@davemloft.net>
297
298 * sparc-dis.c (X_DISP10): Define.
299 (print_insn_sparc): Handle '='.
300
301 2012-04-01 Mike Frysinger <vapier@gentoo.org>
302
303 * bfin-dis.c (fmtconst): Replace decimal handling with a single
304 sprintf call and the '*' field width.
305
306 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
307
308 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
309
310 2012-03-16 Alan Modra <amodra@gmail.com>
311
312 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
313 (powerpc_opcd_indices): Bump array size.
314 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
315 corresponding to unused opcodes to following entry.
316 (lookup_powerpc): New function, extracted and optimised from..
317 (print_insn_powerpc): ..here.
318
319 2012-03-15 Alan Modra <amodra@gmail.com>
320 James Lemke <jwlemke@codesourcery.com>
321
322 * disassemble.c (disassemble_init_for_target): Handle ppc init.
323 * ppc-dis.c (private): New var.
324 (powerpc_init_dialect): Don't return calloc failure, instead use
325 private.
326 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
327 (powerpc_opcd_indices): New array.
328 (disassemble_init_powerpc): New function.
329 (print_insn_big_powerpc): Don't init dialect here.
330 (print_insn_little_powerpc): Likewise.
331 (print_insn_powerpc): Start search using powerpc_opcd_indices.
332
333 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
334
335 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
336 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
337 (PPCVEC2, PPCTMR, E6500): New short names.
338 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
339 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
340 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
341 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
342 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
343 optional operands on sync instruction for E6500 target.
344
345 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
346
347 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
348
349 2012-02-27 Alan Modra <amodra@gmail.com>
350
351 * mt-dis.c: Regenerate.
352
353 2012-02-27 Alan Modra <amodra@gmail.com>
354
355 * v850-opc.c (extract_v8): Rearrange to make it obvious this
356 is the inverse of corresponding insert function.
357 (extract_d22, extract_u9, extract_r4): Likewise.
358 (extract_d9): Correct sign extension.
359 (extract_d16_15): Don't assume "long" is 32 bits, and don't
360 rely on implementation defined behaviour for shift right of
361 signed types.
362 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
363 (extract_d23): Likewise, and correct mask.
364
365 2012-02-27 Alan Modra <amodra@gmail.com>
366
367 * crx-dis.c (print_arg): Mask constant to 32 bits.
368 * crx-opc.c (cst4_map): Use int array.
369
370 2012-02-27 Alan Modra <amodra@gmail.com>
371
372 * arc-dis.c (BITS): Don't use shifts to mask off bits.
373 (FIELDD): Sign extend with xor,sub.
374
375 2012-02-25 Walter Lee <walt@tilera.com>
376
377 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
378 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
379 TILEPRO_OPC_LW_TLS_SN.
380
381 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
382
383 * i386-opc.h (HLEPrefixNone): New.
384 (HLEPrefixLock): Likewise.
385 (HLEPrefixAny): Likewise.
386 (HLEPrefixRelease): Likewise.
387
388 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
389
390 * i386-dis.c (HLE_Fixup1): New.
391 (HLE_Fixup2): Likewise.
392 (HLE_Fixup3): Likewise.
393 (Ebh1): Likewise.
394 (Evh1): Likewise.
395 (Ebh2): Likewise.
396 (Evh2): Likewise.
397 (Ebh3): Likewise.
398 (Evh3): Likewise.
399 (MOD_C6_REG_7): Likewise.
400 (MOD_C7_REG_7): Likewise.
401 (RM_C6_REG_7): Likewise.
402 (RM_C7_REG_7): Likewise.
403 (XACQUIRE_PREFIX): Likewise.
404 (XRELEASE_PREFIX): Likewise.
405 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
406 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
407 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
408 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
409 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
410 MOD_C6_REG_7 and MOD_C7_REG_7.
411 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
412 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
413 xtest.
414 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
415 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
416
417 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
418 CPU_RTM_FLAGS.
419 (cpu_flags): Add CpuHLE and CpuRTM.
420 (opcode_modifiers): Add HLEPrefixOk.
421
422 * i386-opc.h (CpuHLE): New.
423 (CpuRTM): Likewise.
424 (HLEPrefixOk): Likewise.
425 (i386_cpu_flags): Add cpuhle and cpurtm.
426 (i386_opcode_modifier): Add hleprefixok.
427
428 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
429 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
430 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
431 operand. Add xacquire, xrelease, xabort, xbegin, xend and
432 xtest.
433 * i386-init.h: Regenerated.
434 * i386-tbl.h: Likewise.
435
436 2012-01-24 DJ Delorie <dj@redhat.com>
437
438 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
439 * rl78-decode.c: Regenerate.
440
441 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
442
443 PR binutils/10173
444 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
445
446 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
447
448 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
449 register and move them after pmove with PSR/PCSR register.
450
451 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
452
453 * i386-dis.c (mod_table): Add vmfunc.
454
455 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
456 (cpu_flags): CpuVMFUNC.
457
458 * i386-opc.h (CpuVMFUNC): New.
459 (i386_cpu_flags): Add cpuvmfunc.
460
461 * i386-opc.tbl: Add vmfunc.
462 * i386-init.h: Regenerated.
463 * i386-tbl.h: Likewise.
464
465 For older changes see ChangeLog-2011
466 \f
467 Local Variables:
468 mode: change-log
469 left-margin: 8
470 fill-column: 74
471 version-control: never
472 End:
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