opcodes/ChangeLog

   1 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
   2
   3         * configure: Regenerate.
   4
   5 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
   6
   7         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
   8         ppc_cpu_t typedef.
   9         (struct dis_private): New.
  10         (POWERPC_DIALECT): New define.
  11         (powerpc_dialect): Renamed to...
  12         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
  13         struct dis_private.
  14         (print_insn_big_powerpc): Update for using structure in
  15         info->private_data.
  16         (print_insn_little_powerpc): Likewise.
  17         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
  18         (skip_optional_operands): Likewise.
  19         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
  20         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
  21         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
  22         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
  23         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
  24         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
  25         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
  26         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
  27         param to be of type ppc_cpu_t.  Update prototype.
  28
  29 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
  30
  31         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
  32         +s, +S.
  33         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
  34         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
  35         syncw, syncws, vm3mulu, vm0 and vmulu.
  36
  37         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
  38         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
  39         seqi, sne and snei.
  40
  41 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * i386-opc.tbl: Add vmovd with 64bit operand.
  44         * i386-tbl.h: Regenerated.
  45
  46 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  47
  48         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
  49
  50 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  51
  52         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
  53         * i386-tbl.h: Regenerated.
  54
  55 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         PR gas/6517
  58         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
  59         into 32bit and 64bit.  Remove Reg64|Qword and add
  60         IgnoreSize|No_qSuf on 32bit version.
  61         * i386-tbl.h: Regenerated.
  62
  63 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
  64
  65         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
  66         * i386-tbl.h: Regenerated.
  67
  68 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  69
  70         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
  71
  72 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
  73
  74         * Makefile.am: Run "make dep-am".
  75         * Makefile.in: Regenerate.
  76
  77 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  78
  79         * i386-dis.c (MOVBE_Fixup): New.
  80         (Mo): Likewise.
  81         (PREFIX_0F3880): Likewise.
  82         (PREFIX_0F3881): Likewise.
  83         (PREFIX_0F38F0): Updated.
  84         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
  85         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
  86         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
  87
  88         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
  89         CPU_EPT_FLAGS.
  90         (cpu_flags): Add CpuMovbe and CpuEPT.
  91
  92         * i386-opc.h (CpuMovbe): New.
  93         (CpuEPT): Likewise.
  94         (CpuLM): Updated.
  95         (i386_cpu_flags): Add cpumovbe and cpuept.
  96
  97         * i386-opc.tbl: Add entries for movbe and EPT instructions.
  98         * i386-init.h: Regenerated.
  99         * i386-tbl.h: Likewise.
 100
 101 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 102
 103         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 104         the two drem and the two dremu macros.
 105
 106 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 107
 108         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 109         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 110         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 111         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 112
 113 2008-04-25  David S. Miller  <davem@davemloft.net>
 114
 115         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 116         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 117
 118 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 119
 120         * aclocal.m4: Regenerate.
 121         * configure: Regenerate.
 122
 123 2008-04-23  David S. Miller  <davem@davemloft.net>
 124
 125         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 126         extended values.
 127         (prefetch_table): Add missing values.
 128
 129 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         * i386-gen.c (opcode_modifiers): Add NoAVX.
 132
 133         * i386-opc.h (NoAVX): New.
 134         (OldGcc): Updated.
 135         (i386_opcode_modifier): Add noavx.
 136
 137         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 138         instructions which don't have AVX equivalent.
 139         * i386-tbl.h: Regenerated.
 140
 141 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 142
 143         * i386-dis.c (OP_VEX_FMA): New.
 144         (OP_EX_VexImmW): Likewise.
 145         (VexFMA): Likewise.
 146         (Vex128FMA): Likewise.
 147         (EXVexImmW): Likewise.
 148         (get_vex_imm8): Likewise.
 149         (OP_EX_VexReg): Likewise.
 150         (vex_i4_done): Renamed to ...
 151         (vex_w_done): This.
 152         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 153         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 154         FMA instructions.
 155         (print_insn): Updated.
 156         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 157         (OP_REG_VexI4): Check invalid high registers.
 158
 159 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 160             Michael Meissner  <michael.meissner@amd.com>
 161
 162         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 163         * i386-tbl.h: Regenerate from i386-opc.tbl.
 164
 165 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 166
 167         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 168         accept Power E500MC instructions.
 169         (print_ppc_disassembler_options): Document -Me500mc.
 170         * ppc-opc.c (DUIS, DUI, T): New.
 171         (XRT, XRTRA): Likewise.
 172         (E500MC): Likewise.
 173         (powerpc_opcodes): Add new Power E500MC instructions.
 174
 175 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 176
 177         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 178         (print_s390_disassembler_options): New function.
 179         * disassemble.c (disassembler_usage): Invoke
 180         print_s390_disassembler_options.
 181
 182 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 183
 184         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 185         of local variables used for mnemonic parsing: prefix, suffix and
 186         number.
 187
 188 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 189
 190         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 191         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 192         (s390_crb_extensions): New extensions table.
 193         (insertExpandedMnemonic): Handle '$' tag.
 194         * s390-opc.txt: Remove conditional jump variants which can now
 195         be expanded automatically.
 196         Replace '*' tag with '$' in the compare and branch instructions.
 197
 198 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 199
 200         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 201         (PREFIX_VEX_3AXX): Likewis.
 202
 203 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         * i386-opc.tbl: Remove 4 extra blank lines.
 206
 207 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 208
 209         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 210         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 211         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 212         * i386-opc.tbl: Likewise.
 213
 214         * i386-opc.h (CpuCLMUL): Renamed to ...
 215         (CpuPCLMUL): This.
 216         (CpuFMA): Updated.
 217         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 218
 219         * i386-init.h: Regenerated.
 220
 221 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 222
 223         * i386-dis.c (OP_E_register): New.
 224         (OP_E_memory): Likewise.
 225         (OP_VEX): Likewise.
 226         (OP_EX_Vex): Likewise.
 227         (OP_EX_VexW): Likewise.
 228         (OP_XMM_Vex): Likewise.
 229         (OP_XMM_VexW): Likewise.
 230         (OP_REG_VexI4): Likewise.
 231         (PCLMUL_Fixup): Likewise.
 232         (VEXI4_Fixup): Likewise.
 233         (VZERO_Fixup): Likewise.
 234         (VCMP_Fixup): Likewise.
 235         (VPERMIL2_Fixup): Likewise.
 236         (rex_original): Likewise.
 237         (rex_ignored): Likewise.
 238         (Mxmm): Likewise.
 239         (XMM): Likewise.
 240         (EXxmm): Likewise.
 241         (EXxmmq): Likewise.
 242         (EXymmq): Likewise.
 243         (Vex): Likewise.
 244         (Vex128): Likewise.
 245         (Vex256): Likewise.
 246         (VexI4): Likewise.
 247         (EXdVex): Likewise.
 248         (EXqVex): Likewise.
 249         (EXVexW): Likewise.
 250         (EXdVexW): Likewise.
 251         (EXqVexW): Likewise.
 252         (XMVex): Likewise.
 253         (XMVexW): Likewise.
 254         (XMVexI4): Likewise.
 255         (PCLMUL): Likewise.
 256         (VZERO): Likewise.
 257         (VCMP): Likewise.
 258         (VPERMIL2): Likewise.
 259         (xmm_mode): Likewise.
 260         (xmmq_mode): Likewise.
 261         (ymmq_mode): Likewise.
 262         (vex_mode): Likewise.
 263         (vex128_mode): Likewise.
 264         (vex256_mode): Likewise.
 265         (USE_VEX_C4_TABLE): Likewise.
 266         (USE_VEX_C5_TABLE): Likewise.
 267         (USE_VEX_LEN_TABLE): Likewise.
 268         (VEX_C4_TABLE): Likewise.
 269         (VEX_C5_TABLE): Likewise.
 270         (VEX_LEN_TABLE): Likewise.
 271         (REG_VEX_XX): Likewise.
 272         (MOD_VEX_XXX): Likewise.
 273         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 274         (PREFIX_0F3A44): Likewise.
 275         (PREFIX_0F3ADF): Likewise.
 276         (PREFIX_VEX_XXX): Likewise.
 277         (VEX_OF): Likewise.
 278         (VEX_OF38): Likewise.
 279         (VEX_OF3A): Likewise.
 280         (VEX_LEN_XXX): Likewise.
 281         (vex): Likewise.
 282         (need_vex): Likewise.
 283         (need_vex_reg): Likewise.
 284         (vex_i4_done): Likewise.
 285         (vex_table): Likewise.
 286         (vex_len_table): Likewise.
 287         (OP_REG_VexI4): Likewise.
 288         (vex_cmp_op): Likewise.
 289         (pclmul_op): Likewise.
 290         (vpermil2_op): Likewise.
 291         (m_mode): Updated.
 292         (es_reg): Likewise.
 293         (PREFIX_0F38F0): Likewise.
 294         (PREFIX_0F3A60): Likewise.
 295         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 296         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 297         and PREFIX_VEX_XXX entries.
 298         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 299         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 300         PREFIX_0F3ADF.
 301         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 302         Add MOD_VEX_XXX entries.
 303         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 304         REX byte in rex_original.
 305         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 306         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 307         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 308         calling get_valid_dis386.  Use rex_original and rex_ignored when
 309         printing out REX.
 310         (putop): Handle "XY".
 311         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 312         ymmq_mode.
 313         (OP_E_extended): Updated to use OP_E_register and
 314         OP_E_memory.
 315         (OP_XMM): Handle VEX.
 316         (OP_EX): Likewise.
 317         (XMM_Fixup): Likewise.
 318         (CMP_Fixup): Use ARRAY_SIZE.
 319
 320         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 321         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 322         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 323         OPERAND_TYPE_VEX_IMM4.
 324         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 325         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 326         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 327         VexImmExt and SSE2AVX.
 328         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 329
 330         * i386-opc.h (CpuAVX): New.
 331         (CpuAES): Likewise.
 332         (CpuCLMUL): Likewise.
 333         (CpuFMA): Likewise.
 334         (Vex): Likewise.
 335         (Vex256): Likewise.
 336         (VexNDS): Likewise.
 337         (VexNDD): Likewise.
 338         (VexW0): Likewise.
 339         (VexW1): Likewise.
 340         (Vex0F): Likewise.
 341         (Vex0F38): Likewise.
 342         (Vex0F3A): Likewise.
 343         (Vex3Sources): Likewise.
 344         (VexImmExt): Likewise.
 345         (SSE2AVX): Likewise.
 346         (RegYMM): Likewise.
 347         (Ymmword): Likewise.
 348         (Vex_Imm4): Likewise.
 349         (Implicit1stXmm0): Likewise.
 350         (CpuXsave): Updated.
 351         (CpuLM): Likewise.
 352         (ByteOkIntel): Likewise.
 353         (OldGcc): Likewise.
 354         (Control): Likewise.
 355         (Unspecified): Likewise.
 356         (OTMax): Likewise.
 357         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 358         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 359         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 360         vex3sources, veximmext and sse2avx.
 361         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 362
 363         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 364
 365         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 366
 367         * i386-init.h: Regenerated.
 368         * i386-tbl.h: Likewise.
 369
 370 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 371
 372         From  Robin Getz  <robin.getz@analog.com>
 373         * bfin-dis.c (bu32): Typedef.
 374         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 375         (constant_formats[]): Add uimm32 and huimm16.
 376         (fmtconst_val): New.
 377         (uimm32): Define.
 378         (huimm32): Define.
 379         (imm16_val): Define.
 380         (luimm16_val): Define.
 381         (struct saved_state): Define.
 382         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 383         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 384         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 385         (get_allreg): New.
 386         (decode_LDIMMhalf_0): Print out the whole register value.
 387
 388         From Jie Zhang  <jie.zhang@analog.com>
 389         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 390         multiply and multiply-accumulate to data register instruction.
 391
 392         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 393         c_imm32, c_huimm32e): Define.
 394         (constant_formats): Add flags for printing decimal, leading spaces, and
 395         exact symbols.
 396         (comment, parallel): Add global flags in all disassembly.
 397         (fmtconst): Take advantage of new flags, and print default in hex.
 398         (fmtconst_val): Likewise.
 399         (decode_macfunc): Be consistant with spaces, tabs, comments,
 400         capitalization in disassembly, fix minor coding style issues.
 401         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 402         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 403         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 404         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 405         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 406         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 407         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 408         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 409         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 410         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 411         _print_insn_bfin, print_insn_bfin): Likewise.
 412
 413 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 414
 415         * aclocal.m4: Regenerate.
 416         * configure: Likewise.
 417         * Makefile.in: Likewise.
 418
 419 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 420
 421         * Makefile.am: Run "make dep-am".
 422         * Makefile.in: Regenerate.
 423         * configure: Regenerate.
 424
 425 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 426
 427         * ppc-opc.c (powerpc_opcodes): Order and format.
 428
 429 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 430
 431         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 432         * i386-tbl.h: Regenerated.
 433
 434 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 435
 436         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 437         x86-64.
 438         * i386-tbl.h: Regenerated.
 439
 440 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 441
 442         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 443         and Fword for far indirect jmp. Allow Reg16 and Word for near
 444         indirect jmp on x86-64. Disallow Fword for lcall.
 445         * i386-tbl.h: Re-generate.
 446
 447 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 448
 449         * cr16-opc.c  (cr16_num_optab): Defined
 450
 451 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 452
 453         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 454         * i386-init.h: Regenerated.
 455
 456 2008-02-14  Nick Clifton  <nickc@redhat.com>
 457
 458         PR binutils/5524
 459         * configure.in (SHARED_LIBADD): Select the correct host specific
 460         file extension for shared libraries.
 461         * configure: Regenerate.
 462
 463 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 464
 465         * i386-opc.h (RegFlat): New.
 466         * i386-reg.tbl (flat): Add.
 467         * i386-tbl.h: Re-generate.
 468
 469 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 470
 471         * i386-dis.c (a_mode): New.
 472         (cond_jump_mode): Adjust.
 473         (Ma): Change to a_mode.
 474         (intel_operand_size): Handle a_mode.
 475         * i386-opc.tbl: Allow Dword and Qword for bound.
 476         * i386-tbl.h: Re-generate.
 477
 478 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 479
 480         * i386-gen.c (process_i386_registers): Process new fields.
 481         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 482         unsigned char. Add dw2_regnum and Dw2Inval.
 483         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 484         register names.
 485         * i386-tbl.h: Re-generate.
 486
 487 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 488
 489         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 490         * i386-init.h: Updated.
 491
 492 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 493
 494         * i386-gen.c (cpu_flags): Add CpuXsave.
 495
 496         * i386-opc.h (CpuXsave): New.
 497         (CpuLM): Updated.
 498         (i386_cpu_flags): Add cpuxsave.
 499
 500         * i386-dis.c (MOD_0FAE_REG_4): New.
 501         (RM_0F01_REG_2): Likewise.
 502         (MOD_0FAE_REG_5): Updated.
 503         (RM_0F01_REG_3): Likewise.
 504         (reg_table): Use MOD_0FAE_REG_4.
 505         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 506         for xrstor.
 507         (rm_table): Add RM_0F01_REG_2.
 508
 509         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 510         * i386-init.h: Regenerated.
 511         * i386-tbl.h: Likewise.
 512
 513 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 514
 515         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 516         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 517         * i386-tbl.h: Re-generate.
 518
 519 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 520
 521         PR 5715
 522         * configure: Regenerated.
 523
 524 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 525
 526         * mips-dis.c: Update copyright.
 527         (mips_arch_choices): Add Octeon.
 528         * mips-opc.c: Update copyright.
 529         (IOCT): New macro.
 530         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 531
 532 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 533
 534         * ppc-opc.c: Support optional L form mtmsr.
 535
 536 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 537
 538         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 539
 540 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 541
 542         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 543         * i386-init.h: Regenerated.
 544
 545 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 546
 547         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 548         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 549
 550 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 551
 552         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 553         (cpu_flags): Likewise.
 554
 555         * i386-opc.h (CpuMMX2): Removed.
 556         (CpuSSE): Updated.
 557
 558         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 559         * i386-init.h: Regenerated.
 560         * i386-tbl.h: Likewise.
 561
 562 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 563
 564         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 565         CPU_SMX_FLAGS.
 566         * i386-init.h: Regenerated.
 567
 568 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 569
 570         * i386-opc.tbl: Use Qword on movddup.
 571         * i386-tbl.h: Regenerated.
 572
 573 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 574
 575         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 576         * i386-tbl.h: Regenerated.
 577
 578 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-dis.c (Mx): New.
 581         (PREFIX_0FC3): Likewise.
 582         (PREFIX_0FC7_REG_6): Updated.
 583         (dis386_twobyte): Use PREFIX_0FC3.
 584         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 585         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 586         movntss.
 587
 588 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 589
 590         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 591         (operand_types): Add Mem.
 592
 593         * i386-opc.h (IntelSyntax): New.
 594         * i386-opc.h (Mem): New.
 595         (Byte): Updated.
 596         (Opcode_Modifier_Max): Updated.
 597         (i386_opcode_modifier): Add intelsyntax.
 598         (i386_operand_type): Add mem.
 599
 600         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 601         instructions.
 602
 603         * i386-reg.tbl: Add size for accumulator.
 604
 605         * i386-init.h: Regenerated.
 606         * i386-tbl.h: Likewise.
 607
 608 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 609
 610         * i386-opc.h (Byte): Fix a typo.
 611
 612 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 613
 614         PR gas/5534
 615         * i386-gen.c (operand_type_init): Add Dword to
 616         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 617         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 618         Qword and Xmmword.
 619         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 620         Xmmword, Unspecified and Anysize.
 621         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 622         an alias of Xmmword.
 623
 624         * i386-opc.h (CheckSize): Removed.
 625         (Byte): Updated.
 626         (Word): Likewise.
 627         (Dword): Likewise.
 628         (Qword): Likewise.
 629         (Xmmword): Likewise.
 630         (FWait): Updated.
 631         (OTMax): Likewise.
 632         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 633         qword and xmmword.
 634         (Fword): New.
 635         (TBYTE): Likewise.
 636         (Unspecified): Likewise.
 637         (Anysize): Likewise.
 638         (i386_operand_type): Add byte, word, dword, fword, qword,
 639         tbyte xmmword, unspecified and anysize.
 640
 641         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 642         Tbyte, Xmmword, Unspecified and Anysize.
 643
 644         * i386-reg.tbl: Add size for accumulator.
 645
 646         * i386-init.h: Regenerated.
 647         * i386-tbl.h: Likewise.
 648
 649 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 652         (REG_0F18): Updated.
 653         (reg_table): Updated.
 654         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 655         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 656
 657 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 658
 659         * i386-gen.c (set_bitfield): Use fail () on error.
 660
 661 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * i386-gen.c (lineno): New.
 664         (filename): Likewise.
 665         (set_bitfield): Report filename and line numer on error.
 666         (process_i386_opcodes): Set filename and update lineno.
 667         (process_i386_registers): Likewise.
 668
 669 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 672         ATTSyntax.
 673
 674         * i386-opc.h (IntelMnemonic): Renamed to ..
 675         (ATTSyntax): This
 676         (Opcode_Modifier_Max): Updated.
 677         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 678         and intelsyntax.
 679
 680         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 681         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 682         * i386-tbl.h: Regenerated.
 683
 684 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 685
 686         * i386-gen.c: Update copyright to 2008.
 687         * i386-opc.h: Likewise.
 688         * i386-opc.tbl: Likewise.
 689
 690         * i386-init.h: Regenerated.
 691         * i386-tbl.h: Likewise.
 692
 693 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 694
 695         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 696         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 697         * i386-tbl.h: Regenerated.
 698
 699 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 700
 701         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 702         CpuSSE4_2_Or_ABM.
 703         (cpu_flags): Likewise.
 704
 705         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 706         (CpuSSE4_2_Or_ABM): Likewise.
 707         (CpuLM): Updated.
 708         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 709
 710         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 711         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 712         and CpuPadLock, respectively.
 713         * i386-init.h: Regenerated.
 714         * i386-tbl.h: Likewise.
 715
 716 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 719
 720         * i386-opc.h (No_xSuf): Removed.
 721         (CheckSize): Updated.
 722
 723         * i386-tbl.h: Regenerated.
 724
 725 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 726
 727         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 728         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 729         CPU_SSE5_FLAGS.
 730         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 731
 732         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 733         (CpuLM): Updated.
 734         (i386_cpu_flags): Add cpusse4_2_or_abm.
 735
 736         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 737         CpuABM|CpuSSE4_2 on popcnt.
 738         * i386-init.h: Regenerated.
 739         * i386-tbl.h: Likewise.
 740
 741 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-opc.h: Update comments.
 744
 745 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 746
 747         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 748         * i386-opc.h: Likewise.
 749         * i386-opc.tbl: Likewise.
 750
 751 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 752
 753         PR gas/5534
 754         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 755         Byte, Word, Dword, QWord and Xmmword.
 756
 757         * i386-opc.h (No_xSuf): New.
 758         (CheckSize): Likewise.
 759         (Byte): Likewise.
 760         (Word): Likewise.
 761         (Dword): Likewise.
 762         (QWord): Likewise.
 763         (Xmmword): Likewise.
 764         (FWait): Updated.
 765         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 766         Dword, QWord and Xmmword.
 767
 768         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 769         used.
 770         * i386-tbl.h: Regenerated.
 771
 772 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 773
 774         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 775         From Miod Vallat.
 776
 777 For older changes see ChangeLog-2007
 778 \f
 779 Local Variables:
 780 mode: change-log
 781 left-margin: 8
 782 fill-column: 74
 783 version-control: never
 784 End: