1bb7b4293729796c996a50c0f074d191ba12b7e0
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com>
2
3 * arc-opc.c (UIMM6_20R): Define.
4 (SIMM12_20): Use above.
5 (SIMM12_20R): Define.
6 (SIMM3_5_S): Use above.
7 (UIMM7_A32_11R_S): Define.
8 (UIMM7_9_S): Use above.
9 (UIMM3_13R_S): Define.
10 (SIMM11_A32_7_S): Use above.
11 (SIMM9_8R): Define.
12 (UIMM10_A32_8_S): Use above.
13 (UIMM8_8R_S): Define.
14 (W6): Use above.
15 (arc_relax_opcodes): Use all above defines.
16
17 2017-02-15 Vineet Gupta <vgupta@synopsys.com>
18
19 * arc-regs.h: Distinguish some of the registers different on
20 ARC700 and HS38 cpus.
21
22 2017-02-14 Alan Modra <amodra@gmail.com>
23
24 PR 21118
25 * ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries
26 with PPC_OPERAND_SPR. Flag PSQ and PSQM with PPC_OPERAND_GQR.
27
28 2017-02-11 Stafford Horne <shorne@gmail.com>
29 Alan Modra <amodra@gmail.com>
30
31 * cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps.
32 Use insn_bytes_value and insn_int_value directly instead. Don't
33 free allocated memory until function exit.
34
35 2017-02-10 Nicholas Piggin <npiggin@gmail.com>
36
37 * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics.
38
39 2017-02-03 Nick Clifton <nickc@redhat.com>
40
41 PR 21096
42 * aarch64-opc.c (print_register_list): Ensure that the register
43 list index will fir into the tb buffer.
44 (print_register_offset_address): Likewise.
45 * tic6x-dis.c (print_insn_tic6x): Increase size of func_unit_buf.
46
47 2017-01-27 Alexis Deruell <alexis.deruelle@gmail.com>
48
49 PR 21056
50 * tic6x-dis.c (print_insn_tic6x): Correct displaying of parallel
51 instructions when the previous fetch packet ends with a 32-bit
52 instruction.
53
54 2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
55
56 * pru-opc.c: Remove vague reference to a future GDB port.
57
58 2017-01-20 Nick Clifton <nickc@redhat.com>
59
60 * po/ga.po: Updated Irish translation.
61
62 2017-01-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
63
64 * arm-dis.c (coprocessor_opcodes): Fix vcmla mask and disassembly.
65
66 2017-01-13 Yao Qi <yao.qi@linaro.org>
67
68 * m68k-dis.c (match_insn_m68k): Extend comments. Return -1
69 if FETCH_DATA returns 0.
70 (m68k_scan_mask): Likewise.
71 (print_insn_m68k): Update code to handle -1 return value.
72
73 2017-01-13 Yao Qi <yao.qi@linaro.org>
74
75 * m68k-dis.c (enum print_insn_arg_error): New.
76 (NEXTBYTE): Replace -3 with
77 PRINT_INSN_ARG_MEMORY_ERROR.
78 (NEXTULONG): Likewise.
79 (NEXTSINGLE): Likewise.
80 (NEXTDOUBLE): Likewise.
81 (NEXTDOUBLE): Likewise.
82 (NEXTPACKED): Likewise.
83 (FETCH_ARG): Likewise.
84 (FETCH_DATA): Update comments.
85 (print_insn_arg): Update comments. Replace magic numbers with
86 enum.
87 (match_insn_m68k): Likewise.
88
89 2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
90
91 * i386-dis.c (enum): Add PREFIX_EVEX_0F3855, EVEX_W_0F3855_P_2.
92 * i386-dis-evex.h (evex_table): Updated.
93 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VPOPCNTDQ_FLAGS,
94 CPU_ANY_AVX512_VPOPCNTDQ_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
95 (cpu_flags): Add CpuAVX512_VPOPCNTDQ.
96 * i386-opc.h (enum): (AVX512_VPOPCNTDQ): New.
97 (i386_cpu_flags): Add cpuavx512_vpopcntdq.
98 * i386-opc.tbl: Add Intel AVX512_VPOPCNTDQ instructions.
99 * i386-init.h: Regenerate.
100 * i386-tbl.h: Ditto.
101
102 2017-01-12 Yao Qi <yao.qi@linaro.org>
103
104 * msp430-dis.c (msp430_singleoperand): Return -1 if
105 msp430dis_opcode_signed returns false.
106 (msp430_doubleoperand): Likewise.
107 (msp430_branchinstr): Return -1 if
108 msp430dis_opcode_unsigned returns false.
109 (msp430x_calla_instr): Likewise.
110 (print_insn_msp430): Likewise.
111
112 2017-01-05 Nick Clifton <nickc@redhat.com>
113
114 PR 20946
115 * frv-desc.c (lookup_mach_via_bfd_name): Return NULL if the name
116 could not be matched.
117 (frv_cgen_cpu_open): Allow for lookup_mach_via_bfd_name returning
118 NULL.
119
120 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
121
122 * aarch64-tbl.h (RCPC, RCPC_INSN): Define.
123 (aarch64_opcode_table): Use RCPC_INSN.
124
125 2017-01-03 Kito Cheng <kito.cheng@gmail.com>
126
127 * riscv-opc.c (riscv-opcodes): Add support for the "q" ISA
128 extension.
129 * riscv-opcodes/all-opcodes: Likewise.
130
131 2017-01-03 Dilyan Palauzov <dilyan.palauzov@aegee.org>
132
133 * riscv-dis.c (print_insn_args): Add fall through comment.
134
135 2017-01-03 Nick Clifton <nickc@redhat.com>
136
137 * po/sr.po: New Serbian translation.
138 * configure.ac (ALL_LINGUAS): Add sr.
139 * configure: Regenerate.
140
141 2017-01-02 Alan Modra <amodra@gmail.com>
142
143 * epiphany-desc.h: Regenerate.
144 * epiphany-opc.h: Regenerate.
145 * fr30-desc.h: Regenerate.
146 * fr30-opc.h: Regenerate.
147 * frv-desc.h: Regenerate.
148 * frv-opc.h: Regenerate.
149 * ip2k-desc.h: Regenerate.
150 * ip2k-opc.h: Regenerate.
151 * iq2000-desc.h: Regenerate.
152 * iq2000-opc.h: Regenerate.
153 * lm32-desc.h: Regenerate.
154 * lm32-opc.h: Regenerate.
155 * m32c-desc.h: Regenerate.
156 * m32c-opc.h: Regenerate.
157 * m32r-desc.h: Regenerate.
158 * m32r-opc.h: Regenerate.
159 * mep-desc.h: Regenerate.
160 * mep-opc.h: Regenerate.
161 * mt-desc.h: Regenerate.
162 * mt-opc.h: Regenerate.
163 * or1k-desc.h: Regenerate.
164 * or1k-opc.h: Regenerate.
165 * xc16x-desc.h: Regenerate.
166 * xc16x-opc.h: Regenerate.
167 * xstormy16-desc.h: Regenerate.
168 * xstormy16-opc.h: Regenerate.
169
170 2017-01-02 Alan Modra <amodra@gmail.com>
171
172 Update year range in copyright notice of all files.
173
174 For older changes see ChangeLog-2016
175 \f
176 Copyright (C) 2017 Free Software Foundation, Inc.
177
178 Copying and distribution of this file, with or without modification,
179 are permitted in any medium without royalty provided the copyright
180 notice and this notice are preserved.
181
182 Local Variables:
183 mode: change-log
184 left-margin: 8
185 fill-column: 74
186 version-control: never
187 End:
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