1 2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
3 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
5 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
7 * i386-dis.c (REG_VEX_38F3): New.
8 (PREFIX_0FBC): Likewise.
9 (PREFIX_VEX_38F2): Likewise.
10 (PREFIX_VEX_38F3_REG_1): Likewise.
11 (PREFIX_VEX_38F3_REG_2): Likewise.
12 (PREFIX_VEX_38F3_REG_3): Likewise.
13 (PREFIX_VEX_38F7): Likewise.
14 (VEX_LEN_38F2_P_0): Likewise.
15 (VEX_LEN_38F3_R_1_P_0): Likewise.
16 (VEX_LEN_38F3_R_2_P_0): Likewise.
17 (VEX_LEN_38F3_R_3_P_0): Likewise.
18 (VEX_LEN_38F7_P_0): Likewise.
19 (dis386_twobyte): Use PREFIX_0FBC.
20 (reg_table): Add REG_VEX_38F3.
21 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
22 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
23 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
24 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
26 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
27 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
30 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
31 (cpu_flags): Add CpuBMI.
33 * i386-opc.h (CpuBMI): New.
34 (i386_cpu_flags): Add cpubmi.
36 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
37 * i386-init.h: Regenerated.
38 * i386-tbl.h: Likewise.
40 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
42 * i386-dis.c (VexGdq): New.
43 (OP_VEX): Handle dq_mode.
45 2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
47 * i386-gen.c (process_copyright): Update copyright to 2011.
49 For older changes see ChangeLog-2010
55 version-control: never