opcodes/ChangeLog

   1 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
   2
   3         * configure.in: Add target architecture bfd_arch_z80.
   4         * configure: Regenerated.
   5         * disassemble.c (disassembler)<ARCH_z80>: Add case
   6         bfd_arch_z80.
   7         * z80-dis.c: New file.
   8
   9 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  10
  11         * po/POTFILES.in: Regenerate.
  12         * po/opcodes.pot: Regenerate.
  13
  14 2005-10-24  Jan Beulich  <jbeulich@novell.com>
  15
  16         * ia64-asmtab.c: Regenerate.
  17
  18 2005-10-21  DJ Delorie  <dj@redhat.com>
  19
  20         * m32c-asm.c: Regenerate.
  21         * m32c-desc.c: Regenerate.
  22         * m32c-desc.h: Regenerate.
  23         * m32c-dis.c: Regenerate.
  24         * m32c-ibld.c: Regenerate.
  25         * m32c-opc.c: Regenerate.
  26         * m32c-opc.h: Regenerate.
  27
  28 2005-10-21  Nick Clifton  <nickc@redhat.com>
  29
  30         * bfin-dis.c: Tidy up code, removing redundant constructs.
  31
  32 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  33
  34         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
  35         instructions.
  36
  37 2005-10-18  Nick Clifton  <nickc@redhat.com>
  38
  39         * m32r-asm.c: Regenerate after updating m32r.opc.
  40
  41 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
  42
  43         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
  44         reading instruction from memory.
  45
  46 2005-10-18  Nick Clifton  <nickc@redhat.com>
  47
  48         * m32r-asm.c: Regenerate after updating m32r.opc.
  49
  50 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  51
  52         * m32r-asm.c: Regenerate after updating m32r.opc.
  53
  54 2005-10-08  James Lemke  <jim@wasabisystems.com>
  55
  56         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  57         operations.
  58
  59 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  60
  61         * ppc-dis.c (struct dis_private): Remove.
  62         (powerpc_dialect): Avoid aliasing warnings.
  63         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  64
  65 2005-09-30  Nick Clifton  <nickc@redhat.com>
  66
  67         * po/ga.po: New Irish translation.
  68         * configure.in (ALL_LINGUAS): Add "ga".
  69         * configure: Regenerate.
  70
  71 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         * Makefile.am: Run "make dep-am".
  74         * Makefile.in: Regenerated.
  75         * aclocal.m4: Likewise.
  76         * configure: Likewise.
  77
  78 2005-09-30  Catherine Moore  <clm@cm00re.com>
  79
  80         * Makefile.am: Bfin support.
  81         * Makefile.in: Regenerated.
  82         * aclocal.m4: Regenerated.
  83         * bfin-dis.c: New file.
  84         * configure.in: Bfin support.
  85         * configure: Regenerated.
  86         * disassemble.c (ARCH_bfin): Define.
  87         (disassembler): Add case for bfd_arch_bfin.
  88
  89 2005-09-28  Jan Beulich  <jbeulich@novell.com>
  90
  91         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
  92         (indirEv): Use it.
  93         (stackEv): New.
  94         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
  95         (dis386): Document and use new 'V' meta character. Use it for
  96         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
  97         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
  98         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
  99         data prefix as used whenever DFLAG was examined. Handle 'V'.
 100         (intel_operand_size): Use stack_v_mode.
 101         (OP_E): Use stack_v_mode, but handle only the special case of
 102         64-bit mode without operand size override here; fall through to
 103         v_mode case otherwise.
 104         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 105         and no operand size override is present.
 106         (OP_J): Use get32s for obtaining the displacement also when rex64
 107         is present.
 108
 109 2005-09-08  Paul Brook  <paul@codesourcery.com>
 110
 111         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 112
 113 2005-09-06  Chao-ying Fu  <fu@mips.com>
 114
 115         * mips-opc.c (MT32): New define.
 116         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 117         bottom to avoid opcode collision with "mftr" and "mttr".
 118         Add MT instructions.
 119         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 120         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 121         formats.
 122
 123 2005-09-02  Paul Brook  <paul@codesourcery.com>
 124
 125         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 126
 127 2005-09-02  Paul Brook  <paul@codesourcery.com>
 128
 129         * arm-dis.c (coprocessor_opcodes): New.
 130         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 131         (print_insn_coprocessor): New function.
 132         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 133         format characters.
 134         (print_insn_thumb32): Use print_insn_coprocessor.
 135
 136 2005-08-30  Paul Brook  <paul@codesourcery.com>
 137
 138         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 139
 140 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 141
 142         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 143         re-use.
 144         (OP_E): Call intel_operand_size, move call site out of mode
 145         dependent code.
 146         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 147         ATTRIBUTE_UNUSED from parameters.
 148         (OP_OFF64): Likewise.
 149         (OP_ESreg): Call intel_operand_size.
 150         (OP_DSreg): Likewise.
 151         (OP_DIR): Use colon rather than semicolon as separator of far
 152         jump/call operands.
 153
 154 2005-08-25  Chao-ying Fu  <fu@mips.com>
 155
 156         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 157         (mips_builtin_opcodes): Add DSP instructions.
 158         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 159         mips64, mips64r2.
 160         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 161         operand formats.
 162
 163 2005-08-23  David Ung  <davidu@mips.com>
 164
 165         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 166         instructions to the table.
 167
 168 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 169
 170         * a29k-dis.c: Delete.
 171         * Makefile.am: Remove a29k support.
 172         * configure.in: Likewise.
 173         * disassemble.c: Likewise.
 174         * Makefile.in: Regenerate.
 175         * configure: Regenerate.
 176         * po/POTFILES.in: Regenerate.
 177
 178 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 179
 180         * ppc-dis.c (powerpc_dialect): Handle e300.
 181         (print_ppc_disassembler_options): Likewise.
 182         * ppc-opc.c (PPCE300): Define.
 183         (powerpc_opcodes): Mark icbt as available for the e300.
 184
 185 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 186
 187         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 188         Use "rp" instead of "%r2" in "b,l" insns.
 189
 190 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 191
 192         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 193         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 194         (main): Likewise.
 195         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 196         and 4 bit optional masks.
 197         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 198         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 199         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 200         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 201         (s390_opformats): Likewise.
 202         * s390-opc.txt: Add new instructions for cpu type z9-109.
 203
 204 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 205
 206         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 207
 208 2005-07-29  Paul Brook  <paul@codesourcery.com>
 209
 210         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 211
 212 2005-07-29  Paul Brook  <paul@codesourcery.com>
 213
 214         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 215         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 216
 217 2005-07-25  DJ Delorie  <dj@redhat.com>
 218
 219         * m32c-asm.c Regenerate.
 220         * m32c-dis.c Regenerate.
 221
 222 2005-07-20  DJ Delorie  <dj@redhat.com>
 223
 224         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 225         enums, so convert them to bit masks, which attributes are.
 226
 227 2005-07-18  Nick Clifton  <nickc@redhat.com>
 228
 229         * configure.in: Restore alpha ordering to list of arches.
 230         * configure: Regenerate.
 231         * disassemble.c: Restore alpha ordering to list of arches.
 232
 233 2005-07-18  Nick Clifton  <nickc@redhat.com>
 234
 235         * m32c-asm.c: Regenerate.
 236         * m32c-desc.c: Regenerate.
 237         * m32c-desc.h: Regenerate.
 238         * m32c-dis.c: Regenerate.
 239         * m32c-ibld.h: Regenerate.
 240         * m32c-opc.c: Regenerate.
 241         * m32c-opc.h: Regenerate.
 242
 243 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 244
 245         * i386-dis.c (PNI_Fixup): Update comment.
 246         (VMX_Fixup): Properly handle the suffix check.
 247
 248 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 249
 250         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 251         mfctl disassembly.
 252
 253 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 254
 255         * Makefile.am: Run "make dep-am".
 256         (stamp-m32c): Fix cpu dependencies.
 257         * Makefile.in: Regenerate.
 258         * ip2k-dis.c: Regenerate.
 259
 260 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 261
 262         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 263         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 264         (Em): New.
 265         (Gm): New.
 266         (VM): New.
 267         (dis386_twobyte): Updated entries 0x78 and 0x79.
 268         (twobyte_has_modrm): Likewise.
 269         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 270         (OP_G): Handle m_mode.
 271
 272 2005-07-14  Jim Blandy  <jimb@redhat.com>
 273
 274         Add support for the Renesas M32C and M16C.
 275         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 276         * m32c-desc.h, m32c-opc.h: New.
 277         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 278         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 279         m32c-opc.c.
 280         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 281         m32c-ibld.lo, m32c-opc.lo.
 282         (CLEANFILES): List stamp-m32c.
 283         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 284         (CGEN_CPUS): Add m32c.
 285         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 286         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 287         (m32c_opc_h): New variable.
 288         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 289         (m32c-opc.lo): New rules.
 290         * Makefile.in: Regenerated.
 291         * configure.in: Add case for bfd_m32c_arch.
 292         * configure: Regenerated.
 293         * disassemble.c (ARCH_m32c): New.
 294         [ARCH_m32c]: #include "m32c-desc.h".
 295         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 296         (disassemble_init_for_target) [ARCH_m32c]: Same.
 297
 298         * cgen-ops.h, cgen-types.h: New files.
 299         * Makefile.am (HFILES): List them.
 300         * Makefile.in: Regenerated.
 301
 302 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 303
 304         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 305         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 306         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 307         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 308         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 309         v850-dis.c: Fix format bugs.
 310         * ia64-gen.c (fail, warn): Add format attribute.
 311         * or32-opc.c (debug): Likewise.
 312
 313 2005-07-07  Khem Raj  <kraj@mvista.com>
 314
 315         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 316         disassembly pattern.
 317
 318 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 319
 320         * Makefile.am (stamp-m32r): Fix path to cpu files.
 321         (stamp-m32r, stamp-iq2000): Likewise.
 322         * Makefile.in: Regenerate.
 323         * m32r-asm.c: Regenerate.
 324         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 325         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 326
 327 2005-07-05  Nick Clifton  <nickc@redhat.com>
 328
 329         * iq2000-asm.c: Regenerate.
 330         * ms1-asm.c: Regenerate.
 331
 332 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 333
 334         * i386-dis.c (SVME_Fixup): New.
 335         (grps): Use it for the lidt entry.
 336         (PNI_Fixup): Call OP_M rather than OP_E.
 337         (INVLPG_Fixup): Likewise.
 338
 339 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 342
 343 2005-07-01  Nick Clifton  <nickc@redhat.com>
 344
 345         * a29k-dis.c: Update to ISO C90 style function declarations and
 346         fix formatting.
 347         * alpha-opc.c: Likewise.
 348         * arc-dis.c: Likewise.
 349         * arc-opc.c: Likewise.
 350         * avr-dis.c: Likewise.
 351         * cgen-asm.in: Likewise.
 352         * cgen-dis.in: Likewise.
 353         * cgen-ibld.in: Likewise.
 354         * cgen-opc.c: Likewise.
 355         * cris-dis.c: Likewise.
 356         * d10v-dis.c: Likewise.
 357         * d30v-dis.c: Likewise.
 358         * d30v-opc.c: Likewise.
 359         * dis-buf.c: Likewise.
 360         * dlx-dis.c: Likewise.
 361         * h8300-dis.c: Likewise.
 362         * h8500-dis.c: Likewise.
 363         * hppa-dis.c: Likewise.
 364         * i370-dis.c: Likewise.
 365         * i370-opc.c: Likewise.
 366         * m10200-dis.c: Likewise.
 367         * m10300-dis.c: Likewise.
 368         * m68k-dis.c: Likewise.
 369         * m88k-dis.c: Likewise.
 370         * mips-dis.c: Likewise.
 371         * mmix-dis.c: Likewise.
 372         * msp430-dis.c: Likewise.
 373         * ns32k-dis.c: Likewise.
 374         * or32-dis.c: Likewise.
 375         * or32-opc.c: Likewise.
 376         * pdp11-dis.c: Likewise.
 377         * pj-dis.c: Likewise.
 378         * s390-dis.c: Likewise.
 379         * sh-dis.c: Likewise.
 380         * sh64-dis.c: Likewise.
 381         * sparc-dis.c: Likewise.
 382         * sparc-opc.c: Likewise.
 383         * sysdep.h: Likewise.
 384         * tic30-dis.c: Likewise.
 385         * tic4x-dis.c: Likewise.
 386         * tic80-dis.c: Likewise.
 387         * v850-dis.c: Likewise.
 388         * v850-opc.c: Likewise.
 389         * vax-dis.c: Likewise.
 390         * w65-dis.c: Likewise.
 391         * z8kgen.c: Likewise.
 392
 393         * fr30-*: Regenerate.
 394         * frv-*: Regenerate.
 395         * ip2k-*: Regenerate.
 396         * iq2000-*: Regenerate.
 397         * m32r-*: Regenerate.
 398         * ms1-*: Regenerate.
 399         * openrisc-*: Regenerate.
 400         * xstormy16-*: Regenerate.
 401
 402 2005-06-23  Ben Elliston  <bje@gnu.org>
 403
 404         * m68k-dis.c: Use ISC C90.
 405         * m68k-opc.c: Formatting fixes.
 406
 407 2005-06-16  David Ung  <davidu@mips.com>
 408
 409         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 410         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 411
 412 2005-06-15  Dave Brolley  <brolley@redhat.com>
 413
 414         Contribute Morpho ms1 on behalf of Red Hat
 415         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 416         ms1-opc.h: New files, Morpho ms1 target.
 417
 418         2004-05-14  Stan Cox  <scox@redhat.com>
 419
 420         * disassemble.c (ARCH_ms1): Define.
 421         (disassembler): Handle bfd_arch_ms1
 422
 423         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 424
 425         * Makefile.am, Makefile.in: Add ms1 target.
 426         * configure.in: Ditto.
 427
 428 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 429
 430         * arm-opc.h: Delete; fold contents into ...
 431         * arm-dis.c: ... here.  Move includes of internal COFF headers
 432         next to includes of internal ELF headers.
 433         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 434         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 435         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 436         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 437         (iwmmxt_wwnames, iwmmxt_wwssnames):
 438         Make const.
 439         (regnames): Remove iWMMXt coprocessor register sets.
 440         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 441         (get_arm_regnames): Adjust fourth argument to match above changes.
 442         (set_iwmmxt_regnames): Delete.
 443         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 444         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 445         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 446         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 447         ISO syntax for function pointer calls.
 448
 449 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 450
 451         * arm-dis.c: Split up the comments describing the format codes, so
 452         that the ARM and 16-bit Thumb opcode tables each have comments
 453         preceding them that describe all the codes, and only the codes,
 454         valid in those tables.  (32-bit Thumb table is already like this.)
 455         Reorder the lists in all three comments to match the order in
 456         which the codes are implemented.
 457         Remove all forward declarations of static functions.  Convert all
 458         function definitions to ISO C format.
 459         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 460         Return nothing.
 461         (print_insn_thumb16): Remove unused case 'I'.
 462         (print_insn): Update for changed calling convention of subroutines.
 463
 464 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 465
 466         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 467         hex (but retain it being displayed as signed). Remove redundant
 468         checks. Add handling of displacements for 16-bit addressing in Intel
 469         mode.
 470
 471 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 472
 473         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 474         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 475         masking of 'rm' in 16-bit memory address handling.
 476
 477 2005-05-19  Anton Blanchard  <anton@samba.org>
 478
 479         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 480         (print_ppc_disassembler_options): Document it.
 481         * ppc-opc.c (SVC_LEV): Define.
 482         (LEV): Allow optional operand.
 483         (POWER5): Define.
 484         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 485         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 486
 487 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 488
 489         * Makefile.in:  Regenerate.
 490
 491 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 492
 493         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 494         instructions.  Adjust disassembly of some opcodes to match
 495         unified syntax.
 496         (thumb32_opcodes): New table.
 497         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 498         two-halfword branches here.
 499         (print_insn_thumb32): New function.
 500         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 501         and print_insn_thumb32.  Be consistent about order of
 502         halfwords when printing 32-bit instructions.
 503
 504 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         PR 843
 507         * i386-dis.c (branch_v_mode): New.
 508         (indirEv): Use branch_v_mode instead of v_mode.
 509         (OP_E): Handle branch_v_mode.
 510
 511 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * d10v-dis.c (dis_2_short): Support 64bit host.
 514
 515 2005-05-07  Nick Clifton  <nickc@redhat.com>
 516
 517         * po/nl.po: Updated translation.
 518
 519 2005-05-07  Nick Clifton  <nickc@redhat.com>
 520
 521         * Update the address and phone number of the FSF organization in
 522         the GPL notices in the following files:
 523         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 524         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 525         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 526         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 527         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 528         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 529         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 530         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 531         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 532         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 533         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 534         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 535         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 536         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 537         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 538         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 539         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 540         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 541         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 542         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 543         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 544         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 545         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 546         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 547         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 548         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 549         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 550         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 551         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 552         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 553         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 554         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 555         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 556
 557 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 558
 559         * ia64-opc.c: Include sysdep.h before libiberty.h.
 560
 561 2005-05-05  Nick Clifton  <nickc@redhat.com>
 562
 563         * configure.in (ALL_LINGUAS): Add vi.
 564         * configure: Regenerate.
 565         * po/vi.po: New.
 566
 567 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 568
 569         * configure.in: Fix the check for basename declaration.
 570         * configure: Regenerate.
 571
 572 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 573
 574         * ppc-opc.c (RTO): Define.
 575         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 576         entries to suit PPC440.
 577
 578 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 579
 580         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 581         Add xcrypt-ctr.
 582
 583 2005-04-14  Nick Clifton  <nickc@redhat.com>
 584
 585         * po/fi.po: New translation: Finnish.
 586         * configure.in (ALL_LINGUAS): Add fi.
 587         * configure: Regenerate.
 588
 589 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 590
 591         * Makefile.am (NO_WERROR): Define.
 592         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 593         * Makefile.in: Regenerate.
 594         * aclocal.m4: Regenerate.
 595         * configure: Regenerate.
 596
 597 2005-04-04  Nick Clifton  <nickc@redhat.com>
 598
 599         * fr30-asm.c: Regenerate.
 600         * frv-asm.c: Regenerate.
 601         * iq2000-asm.c: Regenerate.
 602         * m32r-asm.c: Regenerate.
 603         * openrisc-asm.c: Regenerate.
 604
 605 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 606
 607         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 608         visible operands in Intel mode. The first operand of monitor is
 609         %rax in 64-bit mode.
 610
 611 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 612
 613         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 614         easier future additions.
 615
 616 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 617
 618         * configure.in: Check for basename.
 619         * configure: Regenerate.
 620         * config.in: Ditto.
 621
 622 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 623
 624         * i386-dis.c (SEG_Fixup): New.
 625         (Sv): New.
 626         (dis386): Use "Sv" for 0x8c and 0x8e.
 627
 628 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 629             Nick Clifton  <nickc@redhat.com>
 630
 631         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 632         function entry mask addresses.
 633         (entry_addr_occupied_slots): New variable: The number of occupied
 634         elements in entry_addr.
 635         (entry_addr_total_slots): New variable: The total number of
 636         elements in entry_addr.
 637         (parse_disassembler_options): New function.  Fills in the entry_addr
 638         array.
 639         (free_entry_array): New function.  Release the memory used by the
 640         entry addr array.  Suppressed because there is no way to call it.
 641         (is_function_entry): Check if a given address is a function's
 642         start address by looking at supplied entry mask addresses and
 643         symbol information, if available.
 644         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 645
 646 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 647
 648         * cris-dis.c (print_with_operands): Use ~31L for long instead
 649         of ~31.
 650
 651 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 652
 653         * mmix-opc.c (O): Revert the last change.
 654         (Z): Likewise.
 655
 656 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 657
 658         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 659         (Z): Likewise.
 660
 661 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 662
 663         * mmix-opc.c (O, Z): Force expression as unsigned long.
 664
 665 2005-03-18  Nick Clifton  <nickc@redhat.com>
 666
 667         * ip2k-asm.c: Regenerate.
 668         * op/opcodes.pot: Regenerate.
 669
 670 2005-03-16  Nick Clifton  <nickc@redhat.com>
 671             Ben Elliston  <bje@au.ibm.com>
 672
 673         * configure.in (werror): New switch: Add -Werror to the
 674         compiler command line.  Enabled by default.  Disable via
 675         --disable-werror.
 676         * configure: Regenerate.
 677
 678 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 679
 680         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 681         BOOKE.
 682
 683 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 684
 685         * po/es.po: Commit new Spanish translation.
 686
 687         * po/fr.po: Commit new French translation.
 688
 689 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 690
 691         * vax-dis.c: Fix spelling error
 692         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 693         of just "Entry mask: < r1 ... >"
 694
 695 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 696
 697         * arm-dis.c (arm_opcodes): Document %E and %V.
 698         Add entries for v6T2 ARM instructions:
 699         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 700         (print_insn_arm): Add support for %E and %V.
 701         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 702
 703 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 704             Alan Modra  <amodra@bigpond.net.au>
 705
 706         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 707         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 708         (SPRG_MASK): Delete.
 709         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 710         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 711         mfsprg4..7 after msprg and consolidate.
 712
 713 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 714
 715         * vax-dis.c (entry_mask_bit): New array.
 716         (print_insn_vax): Decode function entry mask.
 717
 718 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 719
 720         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 721
 722 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 723
 724         * po/opcodes.pot: Regenerate.
 725
 726 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 727
 728         * arc-dis.c (a4_decoding_class): New enum.
 729         (dsmOneArcInst): Use the enum values for the decoding class.
 730         Remove redundant case in the switch for decodingClass value 11.
 731
 732 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 733
 734         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 735         accesses.
 736         (OP_C): Consider lock prefix in non-64-bit modes.
 737
 738 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 739
 740         * cris-dis.c (format_hex): Remove ineffective warning fix.
 741         * crx-dis.c (make_instruction): Warning fix.
 742         * frv-asm.c: Regenerate.
 743
 744 2005-02-23  Nick Clifton  <nickc@redhat.com>
 745
 746         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 747         read_memory.
 748
 749         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 750
 751         * crx-dis.c (make_instruction): Move argument structure into inner
 752         scope and ensure that all of its fields are initialised before
 753         they are used.
 754
 755         * fr30-asm.c: Regenerate.
 756         * fr30-dis.c: Regenerate.
 757         * frv-asm.c: Regenerate.
 758         * frv-dis.c: Regenerate.
 759         * ip2k-asm.c: Regenerate.
 760         * ip2k-dis.c: Regenerate.
 761         * iq2000-asm.c: Regenerate.
 762         * iq2000-dis.c: Regenerate.
 763         * m32r-asm.c: Regenerate.
 764         * m32r-dis.c: Regenerate.
 765         * openrisc-asm.c: Regenerate.
 766         * openrisc-dis.c: Regenerate.
 767         * xstormy16-asm.c: Regenerate.
 768         * xstormy16-dis.c: Regenerate.
 769
 770 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 771
 772         * arc-ext.c: Warning fixes.
 773         * arc-ext.h: Likewise.
 774         * cgen-opc.c: Likewise.
 775         * ia64-gen.c: Likewise.
 776         * maxq-dis.c: Likewise.
 777         * ns32k-dis.c: Likewise.
 778         * w65-dis.c: Likewise.
 779         * ia64-asmtab.c: Regenerate.
 780
 781 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 782
 783         * fr30-desc.c: Regenerate.
 784         * fr30-desc.h: Regenerate.
 785         * fr30-opc.c: Regenerate.
 786         * fr30-opc.h: Regenerate.
 787         * frv-desc.c: Regenerate.
 788         * frv-desc.h: Regenerate.
 789         * frv-opc.c: Regenerate.
 790         * frv-opc.h: Regenerate.
 791         * ip2k-desc.c: Regenerate.
 792         * ip2k-desc.h: Regenerate.
 793         * ip2k-opc.c: Regenerate.
 794         * ip2k-opc.h: Regenerate.
 795         * iq2000-desc.c: Regenerate.
 796         * iq2000-desc.h: Regenerate.
 797         * iq2000-opc.c: Regenerate.
 798         * iq2000-opc.h: Regenerate.
 799         * m32r-desc.c: Regenerate.
 800         * m32r-desc.h: Regenerate.
 801         * m32r-opc.c: Regenerate.
 802         * m32r-opc.h: Regenerate.
 803         * m32r-opinst.c: Regenerate.
 804         * openrisc-desc.c: Regenerate.
 805         * openrisc-desc.h: Regenerate.
 806         * openrisc-opc.c: Regenerate.
 807         * openrisc-opc.h: Regenerate.
 808         * xstormy16-desc.c: Regenerate.
 809         * xstormy16-desc.h: Regenerate.
 810         * xstormy16-opc.c: Regenerate.
 811         * xstormy16-opc.h: Regenerate.
 812
 813 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 814
 815         * Makefile.am: Run "make dep-am"
 816         * Makefile.in: Regenerate.
 817
 818 2005-02-15  Nick Clifton  <nickc@redhat.com>
 819
 820         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 821         compile time warnings.
 822         (print_keyword): Likewise.
 823         (default_print_insn): Likewise.
 824
 825         * fr30-desc.c: Regenerated.
 826         * fr30-desc.h: Regenerated.
 827         * fr30-dis.c: Regenerated.
 828         * fr30-opc.c: Regenerated.
 829         * fr30-opc.h: Regenerated.
 830         * frv-desc.c: Regenerated.
 831         * frv-dis.c: Regenerated.
 832         * frv-opc.c: Regenerated.
 833         * ip2k-asm.c: Regenerated.
 834         * ip2k-desc.c: Regenerated.
 835         * ip2k-desc.h: Regenerated.
 836         * ip2k-dis.c: Regenerated.
 837         * ip2k-opc.c: Regenerated.
 838         * ip2k-opc.h: Regenerated.
 839         * iq2000-desc.c: Regenerated.
 840         * iq2000-dis.c: Regenerated.
 841         * iq2000-opc.c: Regenerated.
 842         * m32r-asm.c: Regenerated.
 843         * m32r-desc.c: Regenerated.
 844         * m32r-desc.h: Regenerated.
 845         * m32r-dis.c: Regenerated.
 846         * m32r-opc.c: Regenerated.
 847         * m32r-opc.h: Regenerated.
 848         * m32r-opinst.c: Regenerated.
 849         * openrisc-desc.c: Regenerated.
 850         * openrisc-desc.h: Regenerated.
 851         * openrisc-dis.c: Regenerated.
 852         * openrisc-opc.c: Regenerated.
 853         * openrisc-opc.h: Regenerated.
 854         * xstormy16-desc.c: Regenerated.
 855         * xstormy16-desc.h: Regenerated.
 856         * xstormy16-dis.c: Regenerated.
 857         * xstormy16-opc.c: Regenerated.
 858         * xstormy16-opc.h: Regenerated.
 859
 860 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 861
 862         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 863         address.
 864
 865 2005-02-11  Nick Clifton  <nickc@redhat.com>
 866
 867         * iq2000-asm.c: Regenerate.
 868
 869         * frv-dis.c: Regenerate.
 870
 871 2005-02-07  Jim Blandy  <jimb@redhat.com>
 872
 873         * Makefile.am (CGEN): Load guile.scm before calling the main
 874         application script.
 875         * Makefile.in: Regenerated.
 876         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 877         Simply pass the cgen-opc.scm path to ${cgen} as its first
 878         argument; ${cgen} itself now contains the '-s', or whatever is
 879         appropriate for the Scheme being used.
 880
 881 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 882
 883         * configure: Regenerate to track ../gettext.m4.
 884
 885 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 886
 887         * ia64-gen.c (NELEMS): Define.
 888         (shrink): Generate alias with missing second predicate register when
 889         opcode has two outputs and these are both predicates.
 890         * ia64-opc-i.c (FULL17): Define.
 891         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 892         here to generate output template.
 893         (TBITCM, TNATCM): Undefine after use.
 894         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 895         first input. Add ld16 aliases without ar.csd as second output. Add
 896         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 897         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 898         ar.ccv as third/fourth inputs. Consolidate through...
 899         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 900         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 901         * ia64-asmtab.c: Regenerate.
 902
 903 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 904
 905         * configure: Regenerate to track ../gettext.m4 change.
 906
 907 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 908
 909         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 910         * frv-asm.c: Rebuilt.
 911         * frv-desc.c: Rebuilt.
 912         * frv-desc.h: Rebuilt.
 913         * frv-dis.c: Rebuilt.
 914         * frv-ibld.c: Rebuilt.
 915         * frv-opc.c: Rebuilt.
 916         * frv-opc.h: Rebuilt.
 917
 918 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 919
 920         * configure: Regenerate, ../gettext.m4 was updated.
 921
 922 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 923
 924         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 925         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 926         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 927         * mips-dis.c: Ditto.
 928
 929 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 930
 931         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 932
 933 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 934
 935         * mips-dis.c (no_aliases): New disassembly option flag.
 936         (set_default_mips_dis_options): Init no_aliases to zero.
 937         (parse_mips_dis_option): Handle no-aliases option.
 938         (print_insn_mips): Ignore table entries that are aliases
 939         if no_aliases is set.
 940         (print_insn_mips16): Ditto.
 941         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 942         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 943         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 944         * mips16-opc.c (mips16_opcodes): Ditto.
 945
 946 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 947
 948         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 949         (inheritance diagram): Add missing edge.
 950         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 951         easier for the testsuite.
 952         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 953         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 954         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 955         arch_sh2a_or_sh4_up child.
 956         (sh_table): Do renaming as above.
 957         Correct comment for ldc.l for gas testsuite to read.
 958         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 959         Correct comments for movy.w and movy.l for gas testsuite to read.
 960         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 961
 962 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 963
 964         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 965
 966 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 967
 968         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 969
 970 2005-01-10  Andreas Schwab  <schwab@suse.de>
 971
 972         * disassemble.c (disassemble_init_for_target) <case
 973         bfd_arch_ia64>: Set skip_zeroes to 16.
 974         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 975
 976 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 977
 978         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 979
 980 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 981
 982         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 983         memory references. Convert avr_operand() to C90 formatting.
 984
 985 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 986
 987         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 988
 989 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 990
 991         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 992         (no_op_insn): Initialize array with instructions that have no
 993         operands.
 994         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 995
 996 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 997
 998         * arm-dis.c: Correct top-level comment.
 999
1000 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1001
1002         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1003         architecuture defining the insn.
1004         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1005         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1006         field.
1007         Also include opcode/arm.h.
1008         * Makefile.am (arm-dis.lo): Update dependency list.
1009         * Makefile.in: Regenerate.
1010
1011 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1012
1013         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1014         reflect the change to the short immediate syntax.
1015
1016 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1017
1018         * or32-opc.c (debug): Warning fix.
1019         * po/POTFILES.in: Regenerate.
1020
1021         * maxq-dis.c: Formatting.
1022         (print_insn): Warning fix.
1023
1024 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1025
1026         * arm-dis.c (WORD_ADDRESS): Define.
1027         (print_insn): Use it.  Correct big-endian end-of-section handling.
1028
1029 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1030             Vineet Sharma      <vineets@noida.hcltech.com>
1031
1032         * maxq-dis.c: New file.
1033         * disassemble.c (ARCH_maxq): Define.
1034         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1035         instructions..
1036         * configure.in: Add case for bfd_maxq_arch.
1037         * configure: Regenerate.
1038         * Makefile.am: Add support for maxq-dis.c
1039         * Makefile.in: Regenerate.
1040         * aclocal.m4: Regenerate.
1041
1042 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1043
1044         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1045         mode.
1046         * crx-dis.c: Likewise.
1047
1048 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1049
1050         Generally, handle CRISv32.
1051         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1052         (struct cris_disasm_data): New type.
1053         (format_reg, format_hex, cris_constraint, print_flags)
1054         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1055         callers changed.
1056         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1057         (print_insn_crisv32_without_register_prefix)
1058         (print_insn_crisv10_v32_with_register_prefix)
1059         (print_insn_crisv10_v32_without_register_prefix)
1060         (cris_parse_disassembler_options): New functions.
1061         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1062         parameter.  All callers changed.
1063         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1064         failure.
1065         (cris_constraint) <case 'Y', 'U'>: New cases.
1066         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1067         for constraint 'n'.
1068         (print_with_operands) <case 'Y'>: New case.
1069         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1070         <case 'N', 'Y', 'Q'>: New cases.
1071         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1072         (print_insn_cris_with_register_prefix)
1073         (print_insn_cris_without_register_prefix): Call
1074         cris_parse_disassembler_options.
1075         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1076         for CRISv32 and the size of immediate operands.  New v32-only
1077         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1078         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1079         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1080         Change brp to be v3..v10.
1081         (cris_support_regs): New vector.
1082         (cris_opcodes): Update head comment.  New format characters '[',
1083         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1084         Add new opcodes for v32 and adjust existing opcodes to accommodate
1085         differences to earlier variants.
1086         (cris_cond15s): New vector.
1087
1088 2004-11-04 Jan Beulich <jbeulich@novell.com>
1089
1090         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1091         (indirEb): Remove.
1092         (Mp): Use f_mode rather than none at all.
1093         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1094         replaces what previously was x_mode; x_mode now means 128-bit SSE
1095         operands.
1096         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1097         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1098         pinsrw's second operand is Edqw.
1099         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1100         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1101         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1102         mode when an operand size override is present or always suffixing.
1103         More instructions will need to be added to this group.
1104         (putop): Handle new macro chars 'C' (short/long suffix selector),
1105         'I' (Intel mode override for following macro char), and 'J' (for
1106         adding the 'l' prefix to far branches in AT&T mode). When an
1107         alternative was specified in the template, honor macro character when
1108         specified for Intel mode.
1109         (OP_E): Handle new *_mode values. Correct pointer specifications for
1110         memory operands. Consolidate output of index register.
1111         (OP_G): Handle new *_mode values.
1112         (OP_I): Handle const_1_mode.
1113         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1114         respective opcode prefix bits have been consumed.
1115         (OP_EM, OP_EX): Provide some default handling for generating pointer
1116         specifications.
1117
1118 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1119
1120         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1121         COP_INST macro.
1122
1123 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1124
1125         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1126         (getregliststring): Support HI/LO and user registers.
1127         * crx-opc.c (crx_instruction): Update data structure according to the
1128         rearrangement done in CRX opcode header file.
1129         (crx_regtab):  Likewise.
1130         (crx_optab):  Likewise.
1131         (crx_instruction): Reorder load/stor instructions, remove unsupported
1132         formats.
1133         support new Co-Processor instruction 'cpi'.
1134
1135 2004-10-27  Nick Clifton  <nickc@redhat.com>
1136
1137         * opcodes/iq2000-asm.c: Regenerate.
1138         * opcodes/iq2000-desc.c: Regenerate.
1139         * opcodes/iq2000-desc.h: Regenerate.
1140         * opcodes/iq2000-dis.c: Regenerate.
1141         * opcodes/iq2000-ibld.c: Regenerate.
1142         * opcodes/iq2000-opc.c: Regenerate.
1143         * opcodes/iq2000-opc.h: Regenerate.
1144
1145 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1146
1147         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1148         us4, us5 (respectively).
1149         Remove unsupported 'popa' instruction.
1150         Reverse operands order in store co-processor instructions.
1151
1152 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1153
1154         * Makefile.am: Run "make dep-am"
1155         * Makefile.in: Regenerate.
1156
1157 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1158
1159         * xtensa-dis.c: Use ISO C90 formatting.
1160
1161 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1162
1163         * ppc-opc.c: Revert 2004-09-09 change.
1164
1165 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1166
1167         * xtensa-dis.c (state_names): Delete.
1168         (fetch_data): Use xtensa_isa_maxlength.
1169         (print_xtensa_operand): Replace operand parameter with opcode/operand
1170         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1171         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1172         instruction bundles.  Use xmalloc instead of malloc.
1173
1174 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1175
1176         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1177         initializers.
1178
1179 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1180
1181         * crx-opc.c (crx_instruction): Support Co-processor insns.
1182         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1183         (getregliststring): Change function to use the above enum.
1184         (print_arg): Handle CO-Processor insns.
1185         (crx_cinvs): Add 'b' option to invalidate the branch-target
1186         cache.
1187
1188 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1189
1190         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1191         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1192         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1193         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1194         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1195
1196 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1197
1198         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1199         rather than add it.
1200
1201 2004-09-30  Paul Brook  <paul@codesourcery.com>
1202
1203         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1204         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1205
1206 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1207
1208         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1209         (CONFIG_STATUS_DEPENDENCIES): New.
1210         (Makefile): Removed.
1211         (config.status): Likewise.
1212         * Makefile.in: Regenerated.
1213
1214 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1215
1216         * Makefile.am: Run "make dep-am".
1217         * Makefile.in: Regenerate.
1218         * aclocal.m4: Regenerate.
1219         * configure: Regenerate.
1220         * po/POTFILES.in: Regenerate.
1221         * po/opcodes.pot: Regenerate.
1222
1223 2004-09-11  Andreas Schwab  <schwab@suse.de>
1224
1225         * configure: Rebuild.
1226
1227 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1228
1229         * ppc-opc.c (L): Make this field not optional.
1230
1231 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1232
1233         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1234         Fix parameter to 'm[t|f]csr' insns.
1235
1236 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1237
1238         * configure.in: Autoupdate to autoconf 2.59.
1239         * aclocal.m4: Rebuild with aclocal 1.4p6.
1240         * configure: Rebuild with autoconf 2.59.
1241         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1242         bfd changes for autoconf 2.59 on the way).
1243         * config.in: Rebuild with autoheader 2.59.
1244
1245 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1246
1247         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1248
1249 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1250
1251         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1252         (GRPPADLCK2): New define.
1253         (twobyte_has_modrm): True for 0xA6.
1254         (grps): GRPPADLCK2 for opcode 0xA6.
1255
1256 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1257
1258         Introduce SH2a support.
1259         * sh-opc.h (arch_sh2a_base): Renumber.
1260         (arch_sh2a_nofpu_base): Remove.
1261         (arch_sh_base_mask): Adjust.
1262         (arch_opann_mask): New.
1263         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1264         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1265         (sh_table): Adjust whitespace.
1266         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1267         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1268         instruction list throughout.
1269         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1270         of arch_sh2a in instruction list throughout.
1271         (arch_sh2e_up): Accomodate above changes.
1272         (arch_sh2_up): Ditto.
1273         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1274         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1275         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1276         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1277         * sh-opc.h (arch_sh2a_nofpu): New.
1278         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1279         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1280         instruction.
1281         2004-01-20  DJ Delorie  <dj@redhat.com>
1282         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1283         2003-12-29  DJ Delorie  <dj@redhat.com>
1284         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1285         sh_opcode_info, sh_table): Add sh2a support.
1286         (arch_op32): New, to tag 32-bit opcodes.
1287         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1288         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1289         * sh-opc.h (arch_sh2a): Add.
1290         * sh-dis.c (arch_sh2a): Handle.
1291         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1292
1293 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1294
1295         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1296
1297 2004-07-22  Nick Clifton  <nickc@redhat.com>
1298
1299         PR/280
1300         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1301         insns - this is done by objdump itself.
1302         * h8500-dis.c (print_insn_h8500): Likewise.
1303
1304 2004-07-21  Jan Beulich <jbeulich@novell.com>
1305
1306         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1307         regardless of address size prefix in effect.
1308         (ptr_reg): Size or address registers does not depend on rex64, but
1309         on the presence of an address size override.
1310         (OP_MMX): Use rex.x only for xmm registers.
1311         (OP_EM): Use rex.z only for xmm registers.
1312
1313 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1314
1315         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1316         move/branch operations to the bottom so that VR5400 multimedia
1317         instructions take precedence in disassembly.
1318
1319 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1320
1321         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1322         ISA-specific "break" encoding.
1323
1324 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1325
1326         * arm-opc.h: Fix typo in comment.
1327
1328 2004-07-11  Andreas Schwab  <schwab@suse.de>
1329
1330         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1331
1332 2004-07-09  Andreas Schwab  <schwab@suse.de>
1333
1334         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1335
1336 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1337
1338         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1339         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1340         (crx-dis.lo): New target.
1341         (crx-opc.lo): Likewise.
1342         * Makefile.in: Regenerate.
1343         * configure.in: Handle bfd_crx_arch.
1344         * configure: Regenerate.
1345         * crx-dis.c: New file.
1346         * crx-opc.c: New file.
1347         * disassemble.c (ARCH_crx): Define.
1348         (disassembler): Handle ARCH_crx.
1349
1350 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1351
1352         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1353         * ia64-asmtab.c: Regnerate.
1354
1355 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1356
1357         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1358         (extract_fxm): Don't test dialect.
1359         (XFXFXM_MASK): Include the power4 bit.
1360         (XFXM): Add p4 param.
1361         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1362
1363 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1364
1365         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1366         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1367
1368 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1369
1370         * ppc-opc.c (BH, XLBH_MASK): Define.
1371         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1372
1373 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1374
1375         * i386-dis.c (x_mode): Comment.
1376         (two_source_ops): File scope.
1377         (float_mem): Correct fisttpll and fistpll.
1378         (float_mem_mode): New table.
1379         (dofloat): Use it.
1380         (OP_E): Correct intel mode PTR output.
1381         (ptr_reg): Use open_char and close_char.
1382         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1383         operands.  Set two_source_ops.
1384
1385 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1386
1387         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1388         instead of _raw_size.
1389
1390 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1391
1392         * ia64-gen.c (in_iclass): Handle more postinc st
1393         and ld variants.
1394         * ia64-asmtab.c: Rebuilt.
1395
1396 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1397
1398         * s390-opc.txt: Correct architecture mask for some opcodes.
1399         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1400         in the esa mode as well.
1401
1402 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1403
1404         * sh-dis.c (target_arch): Make unsigned.
1405         (print_insn_sh): Replace (most of) switch with a call to
1406         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1407         * sh-opc.h: Redefine architecture flags values.
1408         Add sh3-nommu architecture.
1409         Reorganise <arch>_up macros so they make more visual sense.
1410         (SH_MERGE_ARCH_SET): Define new macro.
1411         (SH_VALID_BASE_ARCH_SET): Likewise.
1412         (SH_VALID_MMU_ARCH_SET): Likewise.
1413         (SH_VALID_CO_ARCH_SET): Likewise.
1414         (SH_VALID_ARCH_SET): Likewise.
1415         (SH_MERGE_ARCH_SET_VALID): Likewise.
1416         (SH_ARCH_SET_HAS_FPU): Likewise.
1417         (SH_ARCH_SET_HAS_DSP): Likewise.
1418         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1419         (sh_get_arch_from_bfd_mach): Add prototype.
1420         (sh_get_arch_up_from_bfd_mach): Likewise.
1421         (sh_get_bfd_mach_from_arch_set): Likewise.
1422         (sh_merge_bfd_arc): Likewise.
1423
1424 2004-05-24  Peter Barada  <peter@the-baradas.com>
1425
1426         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1427         into new match_insn_m68k function.  Loop over canidate
1428         matches and select first that completely matches.
1429         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1430         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1431         to verify addressing for MAC/EMAC.
1432         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1433         reigster halves since 'fpu' and 'spl' look misleading.
1434         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1435         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1436         first, tighten up match masks.
1437         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1438         'size' from special case code in print_insn_m68k to
1439         determine decode size of insns.
1440
1441 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1442
1443         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1444         well as when -mpower4.
1445
1446 2004-05-13  Nick Clifton  <nickc@redhat.com>
1447
1448         * po/fr.po: Updated French translation.
1449
1450 2004-05-05  Peter Barada  <peter@the-baradas.com>
1451
1452         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1453         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1454         * m68k-op.c: Switch from ColdFire chips to core variants.
1455
1456 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1457
1458         PR 147.
1459         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1460
1461 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1462
1463         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1464         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1465
1466 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1467
1468         * sh-dis.c (print_insn_sh): Print the value in constant pool
1469         as a symbol if it looks like a symbol.
1470
1471 2004-04-22  Peter Barada <peter@the-baradas.com>
1472
1473         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1474         appropriate ColdFire architectures.
1475         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1476         mask addressing.
1477         Add EMAC instructions, fix MAC instructions. Remove
1478         macmw/macml/msacmw/msacml instructions since mask addressing now
1479         supported.
1480
1481 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1482
1483         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1484         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1485         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1486         macro.  Adjust all users.
1487
1488 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1489
1490         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1491         separately.
1492
1493 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1494
1495         * m32r-asm.c: Regenerate.
1496
1497 2004-03-29  Stan Shebs  <shebs@apple.com>
1498
1499         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1500         used.
1501
1502 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1503
1504         * aclocal.m4: Regenerate.
1505         * config.in: Regenerate.
1506         * configure: Regenerate.
1507         * po/POTFILES.in: Regenerate.
1508         * po/opcodes.pot: Regenerate.
1509
1510 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1511
1512         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1513         PPC_OPERANDS_GPR_0.
1514         * ppc-opc.c (RA0): Define.
1515         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1516         (RAOPT): Rename from RAO.  Update all uses.
1517         (powerpc_opcodes): Use RA0 as appropriate.
1518
1519 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1520
1521         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1522
1523 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1524
1525         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1526
1527 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1528
1529         * i386-dis.c (GRPPLOCK): Delete.
1530         (grps): Delete GRPPLOCK entry.
1531
1532 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1533
1534         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1535         (M, Mp): Use OP_M.
1536         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1537         (GRPPADLCK): Define.
1538         (dis386): Use NOP_Fixup on "nop".
1539         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1540         (twobyte_has_modrm): Set for 0xa7.
1541         (padlock_table): Delete.  Move to..
1542         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1543         and clflush.
1544         (print_insn): Revert PADLOCK_SPECIAL code.
1545         (OP_E): Delete sfence, lfence, mfence checks.
1546
1547 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1548
1549         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1550         (INVLPG_Fixup): New function.
1551         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1552
1553 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1554
1555         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1556         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1557         (padlock_table): New struct with PadLock instructions.
1558         (print_insn): Handle PADLOCK_SPECIAL.
1559
1560 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1561
1562         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1563         (OP_E): Twiddle clflush to sfence here.
1564
1565 2004-03-08  Nick Clifton  <nickc@redhat.com>
1566
1567         * po/de.po: Updated German translation.
1568
1569 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1570
1571         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1572         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1573         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1574         accordingly.
1575
1576 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1577
1578         * frv-asm.c: Regenerate.
1579         * frv-desc.c: Regenerate.
1580         * frv-desc.h: Regenerate.
1581         * frv-dis.c: Regenerate.
1582         * frv-ibld.c: Regenerate.
1583         * frv-opc.c: Regenerate.
1584         * frv-opc.h: Regenerate.
1585
1586 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1587
1588         * frv-desc.c, frv-opc.c: Regenerate.
1589
1590 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1591
1592         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1593
1594 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1595
1596         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1597         Also correct mistake in the comment.
1598
1599 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1600
1601         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1602         ensure that double registers have even numbers.
1603         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1604         that reserved instruction 0xfffd does not decode the same
1605         as 0xfdfd (ftrv).
1606         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1607         REG_N refers to a double register.
1608         Add REG_N_B01 nibble type and use it instead of REG_NM
1609         in ftrv.
1610         Adjust the bit patterns in a few comments.
1611
1612 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1613
1614         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1615
1616 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1617
1618         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1619
1620 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1621
1622         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1623
1624 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1625
1626         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1627         mtivor32, mtivor33, mtivor34.
1628
1629 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1630
1631         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1632
1633 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1634
1635         * arm-opc.h Maverick accumulator register opcode fixes.
1636
1637 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1638
1639         * m32r-dis.c: Regenerate.
1640
1641 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1642
1643         * sh-opc.h (sh_table): "fsrra", not "fssra".
1644
1645 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1646
1647         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1648         contraints.
1649
1650 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1651
1652         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1653
1654 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1655
1656         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1657         1.  Don't print scale factor on AT&T mode when index missing.
1658
1659 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1660
1661         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1662         when loaded into XR registers.
1663
1664 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1665
1666         * frv-desc.h: Regenerate.
1667         * frv-desc.c: Regenerate.
1668         * frv-opc.c: Regenerate.
1669
1670 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1671
1672         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1673
1674 2004-01-09  Paul Brook  <paul@codesourcery.com>
1675
1676         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1677         specific opcodes.
1678
1679 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1680
1681         * Makefile.am (libopcodes_la_DEPENDENCIES)
1682         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1683         comment about the problem.
1684         * Makefile.in: Regenerate.
1685
1686 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1687
1688         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1689         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1690         cut&paste errors in shifting/truncating numerical operands.
1691         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1692         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1693         (parse_uslo16): Likewise.
1694         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1695         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1696         (parse_s12): Likewise.
1697         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1698         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1699         (parse_uslo16): Likewise.
1700         (parse_uhi16): Parse gothi and gotfuncdeschi.
1701         (parse_d12): Parse got12 and gotfuncdesc12.
1702         (parse_s12): Likewise.
1703
1704 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1705
1706         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1707         instruction which looks similar to an 'rla' instruction.
1708
1709 For older changes see ChangeLog-0203
1710 \f
1711 Local Variables:
1712 mode: change-log
1713 left-margin: 8
1714 fill-column: 74
1715 version-control: never
1716 End: