1 2005-07-01 Nick Clifton <nickc@redhat.com>
3 * a29k-dis.c: Update to ISO C90 style function declarations and
5 * alpha-opc.c: Likewise.
9 * cgen-asm.in: Likewise.
10 * cgen-dis.in: Likewise.
11 * cgen-ibld.in: Likewise.
12 * cgen-opc.c: Likewise.
13 * cris-dis.c: Likewise.
14 * d10v-dis.c: Likewise.
15 * d30v-dis.c: Likewise.
16 * d30v-opc.c: Likewise.
17 * dis-buf.c: Likewise.
18 * dlx-dis.c: Likewise.
19 * h8300-dis.c: Likewise.
20 * h8500-dis.c: Likewise.
21 * hppa-dis.c: Likewise.
22 * i370-dis.c: Likewise.
23 * i370-opc.c: Likewise.
24 * m10200-dis.c: Likewise.
25 * m10300-dis.c: Likewise.
26 * m68k-dis.c: Likewise.
27 * m88k-dis.c: Likewise.
28 * mips-dis.c: Likewise.
29 * mmix-dis.c: Likewise.
30 * msp430-dis.c: Likewise.
31 * ns32k-dis.c: Likewise.
32 * or32-dis.c: Likewise.
33 * or32-opc.c: Likewise.
34 * pdp11-dis.c: Likewise.
36 * s390-dis.c: Likewise.
38 * sh64-dis.c: Likewise.
39 * sparc-dis.c: Likewise.
40 * sparc-opc.c: Likewise.
42 * tic30-dis.c: Likewise.
43 * tic4x-dis.c: Likewise.
44 * tic80-dis.c: Likewise.
45 * v850-dis.c: Likewise.
46 * v850-opc.c: Likewise.
47 * vax-dis.c: Likewise.
48 * w65-dis.c: Likewise.
54 * iq2000-*: Regenerate.
57 * openrisc-*: Regenerate.
58 * xstormy16-*: Regenerate.
60 2005-06-23 Ben Elliston <bje@gnu.org>
62 * m68k-dis.c: Use ISC C90.
63 * m68k-opc.c: Formatting fixes.
65 2005-06-16 David Ung <davidu@mips.com>
67 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
68 instructions to the table; seb/seh/sew/zeb/zeh/zew.
70 2005-06-15 Dave Brolley <brolley@redhat.com>
72 Contribute Morpho ms1 on behalf of Red Hat
73 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
74 ms1-opc.h: New files, Morpho ms1 target.
76 2004-05-14 Stan Cox <scox@redhat.com>
78 * disassemble.c (ARCH_ms1): Define.
79 (disassembler): Handle bfd_arch_ms1
81 2004-05-13 Michael Snyder <msnyder@redhat.com>
83 * Makefile.am, Makefile.in: Add ms1 target.
84 * configure.in: Ditto.
86 2005-06-08 Zack Weinberg <zack@codesourcery.com>
88 * arm-opc.h: Delete; fold contents into ...
89 * arm-dis.c: ... here. Move includes of internal COFF headers
90 next to includes of internal ELF headers.
91 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
92 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
93 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
94 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
95 (iwmmxt_wwnames, iwmmxt_wwssnames):
97 (regnames): Remove iWMMXt coprocessor register sets.
98 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
99 (get_arm_regnames): Adjust fourth argument to match above changes.
100 (set_iwmmxt_regnames): Delete.
101 (print_insn_arm): Constify 'c'. Use ISO syntax for function
102 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
103 and iwmmxt_cregnames, not set_iwmmxt_regnames.
104 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
105 ISO syntax for function pointer calls.
107 2005-06-07 Zack Weinberg <zack@codesourcery.com>
109 * arm-dis.c: Split up the comments describing the format codes, so
110 that the ARM and 16-bit Thumb opcode tables each have comments
111 preceding them that describe all the codes, and only the codes,
112 valid in those tables. (32-bit Thumb table is already like this.)
113 Reorder the lists in all three comments to match the order in
114 which the codes are implemented.
115 Remove all forward declarations of static functions. Convert all
116 function definitions to ISO C format.
117 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
119 (print_insn_thumb16): Remove unused case 'I'.
120 (print_insn): Update for changed calling convention of subroutines.
122 2005-05-25 Jan Beulich <jbeulich@novell.com>
124 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
125 hex (but retain it being displayed as signed). Remove redundant
126 checks. Add handling of displacements for 16-bit addressing in Intel
129 2005-05-25 Jan Beulich <jbeulich@novell.com>
131 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
132 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
133 masking of 'rm' in 16-bit memory address handling.
135 2005-05-19 Anton Blanchard <anton@samba.org>
137 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
138 (print_ppc_disassembler_options): Document it.
139 * ppc-opc.c (SVC_LEV): Define.
140 (LEV): Allow optional operand.
142 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
143 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
145 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
147 * Makefile.in: Regenerate.
149 2005-05-17 Zack Weinberg <zack@codesourcery.com>
151 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
152 instructions. Adjust disassembly of some opcodes to match
154 (thumb32_opcodes): New table.
155 (print_insn_thumb): Rename print_insn_thumb16; don't handle
156 two-halfword branches here.
157 (print_insn_thumb32): New function.
158 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
159 and print_insn_thumb32. Be consistent about order of
160 halfwords when printing 32-bit instructions.
162 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
165 * i386-dis.c (branch_v_mode): New.
166 (indirEv): Use branch_v_mode instead of v_mode.
167 (OP_E): Handle branch_v_mode.
169 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
171 * d10v-dis.c (dis_2_short): Support 64bit host.
173 2005-05-07 Nick Clifton <nickc@redhat.com>
175 * po/nl.po: Updated translation.
177 2005-05-07 Nick Clifton <nickc@redhat.com>
179 * Update the address and phone number of the FSF organization in
180 the GPL notices in the following files:
181 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
182 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
183 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
184 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
185 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
186 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
187 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
188 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
189 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
190 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
191 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
192 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
193 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
194 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
195 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
196 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
197 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
198 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
199 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
200 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
201 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
202 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
203 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
204 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
205 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
206 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
207 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
208 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
209 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
210 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
211 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
212 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
213 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
215 2005-05-05 James E Wilson <wilson@specifixinc.com>
217 * ia64-opc.c: Include sysdep.h before libiberty.h.
219 2005-05-05 Nick Clifton <nickc@redhat.com>
221 * configure.in (ALL_LINGUAS): Add vi.
222 * configure: Regenerate.
225 2005-04-26 Jerome Guitton <guitton@gnat.com>
227 * configure.in: Fix the check for basename declaration.
228 * configure: Regenerate.
230 2005-04-19 Alan Modra <amodra@bigpond.net.au>
232 * ppc-opc.c (RTO): Define.
233 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
234 entries to suit PPC440.
236 2005-04-18 Mark Kettenis <kettenis@gnu.org>
238 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
241 2005-04-14 Nick Clifton <nickc@redhat.com>
243 * po/fi.po: New translation: Finnish.
244 * configure.in (ALL_LINGUAS): Add fi.
245 * configure: Regenerate.
247 2005-04-14 Alan Modra <amodra@bigpond.net.au>
249 * Makefile.am (NO_WERROR): Define.
250 * configure.in: Invoke AM_BINUTILS_WARNINGS.
251 * Makefile.in: Regenerate.
252 * aclocal.m4: Regenerate.
253 * configure: Regenerate.
255 2005-04-04 Nick Clifton <nickc@redhat.com>
257 * fr30-asm.c: Regenerate.
258 * frv-asm.c: Regenerate.
259 * iq2000-asm.c: Regenerate.
260 * m32r-asm.c: Regenerate.
261 * openrisc-asm.c: Regenerate.
263 2005-04-01 Jan Beulich <jbeulich@novell.com>
265 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
266 visible operands in Intel mode. The first operand of monitor is
269 2005-04-01 Jan Beulich <jbeulich@novell.com>
271 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
272 easier future additions.
274 2005-03-31 Jerome Guitton <guitton@gnat.com>
276 * configure.in: Check for basename.
277 * configure: Regenerate.
280 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
282 * i386-dis.c (SEG_Fixup): New.
284 (dis386): Use "Sv" for 0x8c and 0x8e.
286 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
287 Nick Clifton <nickc@redhat.com>
289 * vax-dis.c: (entry_addr): New varible: An array of user supplied
290 function entry mask addresses.
291 (entry_addr_occupied_slots): New variable: The number of occupied
292 elements in entry_addr.
293 (entry_addr_total_slots): New variable: The total number of
294 elements in entry_addr.
295 (parse_disassembler_options): New function. Fills in the entry_addr
297 (free_entry_array): New function. Release the memory used by the
298 entry addr array. Suppressed because there is no way to call it.
299 (is_function_entry): Check if a given address is a function's
300 start address by looking at supplied entry mask addresses and
301 symbol information, if available.
302 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
304 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
306 * cris-dis.c (print_with_operands): Use ~31L for long instead
309 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
311 * mmix-opc.c (O): Revert the last change.
314 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
316 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
319 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
321 * mmix-opc.c (O, Z): Force expression as unsigned long.
323 2005-03-18 Nick Clifton <nickc@redhat.com>
325 * ip2k-asm.c: Regenerate.
326 * op/opcodes.pot: Regenerate.
328 2005-03-16 Nick Clifton <nickc@redhat.com>
329 Ben Elliston <bje@au.ibm.com>
331 * configure.in (werror): New switch: Add -Werror to the
332 compiler command line. Enabled by default. Disable via
334 * configure: Regenerate.
336 2005-03-16 Alan Modra <amodra@bigpond.net.au>
338 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
341 2005-03-15 Alan Modra <amodra@bigpond.net.au>
343 * po/es.po: Commit new Spanish translation.
345 * po/fr.po: Commit new French translation.
347 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
349 * vax-dis.c: Fix spelling error
350 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
351 of just "Entry mask: < r1 ... >"
353 2005-03-12 Zack Weinberg <zack@codesourcery.com>
355 * arm-dis.c (arm_opcodes): Document %E and %V.
356 Add entries for v6T2 ARM instructions:
357 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
358 (print_insn_arm): Add support for %E and %V.
359 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
361 2005-03-10 Jeff Baker <jbaker@qnx.com>
362 Alan Modra <amodra@bigpond.net.au>
364 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
365 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
367 (XSPRG_MASK): Mask off extra bits now part of sprg field.
368 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
369 mfsprg4..7 after msprg and consolidate.
371 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
373 * vax-dis.c (entry_mask_bit): New array.
374 (print_insn_vax): Decode function entry mask.
376 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
378 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
380 2005-03-05 Alan Modra <amodra@bigpond.net.au>
382 * po/opcodes.pot: Regenerate.
384 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
386 * arc-dis.c (a4_decoding_class): New enum.
387 (dsmOneArcInst): Use the enum values for the decoding class.
388 Remove redundant case in the switch for decodingClass value 11.
390 2005-03-02 Jan Beulich <jbeulich@novell.com>
392 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
394 (OP_C): Consider lock prefix in non-64-bit modes.
396 2005-02-24 Alan Modra <amodra@bigpond.net.au>
398 * cris-dis.c (format_hex): Remove ineffective warning fix.
399 * crx-dis.c (make_instruction): Warning fix.
400 * frv-asm.c: Regenerate.
402 2005-02-23 Nick Clifton <nickc@redhat.com>
404 * cgen-dis.in: Use bfd_byte for buffers that are passed to
407 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
409 * crx-dis.c (make_instruction): Move argument structure into inner
410 scope and ensure that all of its fields are initialised before
413 * fr30-asm.c: Regenerate.
414 * fr30-dis.c: Regenerate.
415 * frv-asm.c: Regenerate.
416 * frv-dis.c: Regenerate.
417 * ip2k-asm.c: Regenerate.
418 * ip2k-dis.c: Regenerate.
419 * iq2000-asm.c: Regenerate.
420 * iq2000-dis.c: Regenerate.
421 * m32r-asm.c: Regenerate.
422 * m32r-dis.c: Regenerate.
423 * openrisc-asm.c: Regenerate.
424 * openrisc-dis.c: Regenerate.
425 * xstormy16-asm.c: Regenerate.
426 * xstormy16-dis.c: Regenerate.
428 2005-02-22 Alan Modra <amodra@bigpond.net.au>
430 * arc-ext.c: Warning fixes.
431 * arc-ext.h: Likewise.
432 * cgen-opc.c: Likewise.
433 * ia64-gen.c: Likewise.
434 * maxq-dis.c: Likewise.
435 * ns32k-dis.c: Likewise.
436 * w65-dis.c: Likewise.
437 * ia64-asmtab.c: Regenerate.
439 2005-02-22 Alan Modra <amodra@bigpond.net.au>
441 * fr30-desc.c: Regenerate.
442 * fr30-desc.h: Regenerate.
443 * fr30-opc.c: Regenerate.
444 * fr30-opc.h: Regenerate.
445 * frv-desc.c: Regenerate.
446 * frv-desc.h: Regenerate.
447 * frv-opc.c: Regenerate.
448 * frv-opc.h: Regenerate.
449 * ip2k-desc.c: Regenerate.
450 * ip2k-desc.h: Regenerate.
451 * ip2k-opc.c: Regenerate.
452 * ip2k-opc.h: Regenerate.
453 * iq2000-desc.c: Regenerate.
454 * iq2000-desc.h: Regenerate.
455 * iq2000-opc.c: Regenerate.
456 * iq2000-opc.h: Regenerate.
457 * m32r-desc.c: Regenerate.
458 * m32r-desc.h: Regenerate.
459 * m32r-opc.c: Regenerate.
460 * m32r-opc.h: Regenerate.
461 * m32r-opinst.c: Regenerate.
462 * openrisc-desc.c: Regenerate.
463 * openrisc-desc.h: Regenerate.
464 * openrisc-opc.c: Regenerate.
465 * openrisc-opc.h: Regenerate.
466 * xstormy16-desc.c: Regenerate.
467 * xstormy16-desc.h: Regenerate.
468 * xstormy16-opc.c: Regenerate.
469 * xstormy16-opc.h: Regenerate.
471 2005-02-21 Alan Modra <amodra@bigpond.net.au>
473 * Makefile.am: Run "make dep-am"
474 * Makefile.in: Regenerate.
476 2005-02-15 Nick Clifton <nickc@redhat.com>
478 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
479 compile time warnings.
480 (print_keyword): Likewise.
481 (default_print_insn): Likewise.
483 * fr30-desc.c: Regenerated.
484 * fr30-desc.h: Regenerated.
485 * fr30-dis.c: Regenerated.
486 * fr30-opc.c: Regenerated.
487 * fr30-opc.h: Regenerated.
488 * frv-desc.c: Regenerated.
489 * frv-dis.c: Regenerated.
490 * frv-opc.c: Regenerated.
491 * ip2k-asm.c: Regenerated.
492 * ip2k-desc.c: Regenerated.
493 * ip2k-desc.h: Regenerated.
494 * ip2k-dis.c: Regenerated.
495 * ip2k-opc.c: Regenerated.
496 * ip2k-opc.h: Regenerated.
497 * iq2000-desc.c: Regenerated.
498 * iq2000-dis.c: Regenerated.
499 * iq2000-opc.c: Regenerated.
500 * m32r-asm.c: Regenerated.
501 * m32r-desc.c: Regenerated.
502 * m32r-desc.h: Regenerated.
503 * m32r-dis.c: Regenerated.
504 * m32r-opc.c: Regenerated.
505 * m32r-opc.h: Regenerated.
506 * m32r-opinst.c: Regenerated.
507 * openrisc-desc.c: Regenerated.
508 * openrisc-desc.h: Regenerated.
509 * openrisc-dis.c: Regenerated.
510 * openrisc-opc.c: Regenerated.
511 * openrisc-opc.h: Regenerated.
512 * xstormy16-desc.c: Regenerated.
513 * xstormy16-desc.h: Regenerated.
514 * xstormy16-dis.c: Regenerated.
515 * xstormy16-opc.c: Regenerated.
516 * xstormy16-opc.h: Regenerated.
518 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
520 * dis-buf.c (perror_memory): Use sprintf_vma to print out
523 2005-02-11 Nick Clifton <nickc@redhat.com>
525 * iq2000-asm.c: Regenerate.
527 * frv-dis.c: Regenerate.
529 2005-02-07 Jim Blandy <jimb@redhat.com>
531 * Makefile.am (CGEN): Load guile.scm before calling the main
533 * Makefile.in: Regenerated.
534 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
535 Simply pass the cgen-opc.scm path to ${cgen} as its first
536 argument; ${cgen} itself now contains the '-s', or whatever is
537 appropriate for the Scheme being used.
539 2005-01-31 Andrew Cagney <cagney@gnu.org>
541 * configure: Regenerate to track ../gettext.m4.
543 2005-01-31 Jan Beulich <jbeulich@novell.com>
545 * ia64-gen.c (NELEMS): Define.
546 (shrink): Generate alias with missing second predicate register when
547 opcode has two outputs and these are both predicates.
548 * ia64-opc-i.c (FULL17): Define.
549 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
550 here to generate output template.
551 (TBITCM, TNATCM): Undefine after use.
552 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
553 first input. Add ld16 aliases without ar.csd as second output. Add
554 st16 aliases without ar.csd as second input. Add cmpxchg aliases
555 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
556 ar.ccv as third/fourth inputs. Consolidate through...
557 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
558 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
559 * ia64-asmtab.c: Regenerate.
561 2005-01-27 Andrew Cagney <cagney@gnu.org>
563 * configure: Regenerate to track ../gettext.m4 change.
565 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
567 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
568 * frv-asm.c: Rebuilt.
569 * frv-desc.c: Rebuilt.
570 * frv-desc.h: Rebuilt.
571 * frv-dis.c: Rebuilt.
572 * frv-ibld.c: Rebuilt.
573 * frv-opc.c: Rebuilt.
574 * frv-opc.h: Rebuilt.
576 2005-01-24 Andrew Cagney <cagney@gnu.org>
578 * configure: Regenerate, ../gettext.m4 was updated.
580 2005-01-21 Fred Fish <fnf@specifixinc.com>
582 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
583 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
584 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
587 2005-01-20 Alan Modra <amodra@bigpond.net.au>
589 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
591 2005-01-19 Fred Fish <fnf@specifixinc.com>
593 * mips-dis.c (no_aliases): New disassembly option flag.
594 (set_default_mips_dis_options): Init no_aliases to zero.
595 (parse_mips_dis_option): Handle no-aliases option.
596 (print_insn_mips): Ignore table entries that are aliases
597 if no_aliases is set.
598 (print_insn_mips16): Ditto.
599 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
600 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
601 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
602 * mips16-opc.c (mips16_opcodes): Ditto.
604 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
606 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
607 (inheritance diagram): Add missing edge.
608 (arch_sh1_up): Rename arch_sh_up to match external name to make life
609 easier for the testsuite.
610 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
611 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
612 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
613 arch_sh2a_or_sh4_up child.
614 (sh_table): Do renaming as above.
615 Correct comment for ldc.l for gas testsuite to read.
616 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
617 Correct comments for movy.w and movy.l for gas testsuite to read.
618 Correct comments for fmov.d and fmov.s for gas testsuite to read.
620 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
622 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
624 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
626 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
628 2005-01-10 Andreas Schwab <schwab@suse.de>
630 * disassemble.c (disassemble_init_for_target) <case
631 bfd_arch_ia64>: Set skip_zeroes to 16.
632 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
634 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
636 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
638 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
640 * avr-dis.c: Prettyprint. Added printing of symbol names in all
641 memory references. Convert avr_operand() to C90 formatting.
643 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
645 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
647 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
649 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
650 (no_op_insn): Initialize array with instructions that have no
652 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
654 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
656 * arm-dis.c: Correct top-level comment.
658 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
660 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
661 architecuture defining the insn.
662 (arm_opcodes, thumb_opcodes): Delete. Move to ...
663 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
665 Also include opcode/arm.h.
666 * Makefile.am (arm-dis.lo): Update dependency list.
667 * Makefile.in: Regenerate.
669 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
671 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
672 reflect the change to the short immediate syntax.
674 2004-11-19 Alan Modra <amodra@bigpond.net.au>
676 * or32-opc.c (debug): Warning fix.
677 * po/POTFILES.in: Regenerate.
679 * maxq-dis.c: Formatting.
680 (print_insn): Warning fix.
682 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
684 * arm-dis.c (WORD_ADDRESS): Define.
685 (print_insn): Use it. Correct big-endian end-of-section handling.
687 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
688 Vineet Sharma <vineets@noida.hcltech.com>
690 * maxq-dis.c: New file.
691 * disassemble.c (ARCH_maxq): Define.
692 (disassembler): Add 'print_insn_maxq_little' for handling maxq
694 * configure.in: Add case for bfd_maxq_arch.
695 * configure: Regenerate.
696 * Makefile.am: Add support for maxq-dis.c
697 * Makefile.in: Regenerate.
698 * aclocal.m4: Regenerate.
700 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
702 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
704 * crx-dis.c: Likewise.
706 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
708 Generally, handle CRISv32.
709 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
710 (struct cris_disasm_data): New type.
711 (format_reg, format_hex, cris_constraint, print_flags)
712 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
714 (format_sup_reg, print_insn_crisv32_with_register_prefix)
715 (print_insn_crisv32_without_register_prefix)
716 (print_insn_crisv10_v32_with_register_prefix)
717 (print_insn_crisv10_v32_without_register_prefix)
718 (cris_parse_disassembler_options): New functions.
719 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
720 parameter. All callers changed.
721 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
723 (cris_constraint) <case 'Y', 'U'>: New cases.
724 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
726 (print_with_operands) <case 'Y'>: New case.
727 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
728 <case 'N', 'Y', 'Q'>: New cases.
729 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
730 (print_insn_cris_with_register_prefix)
731 (print_insn_cris_without_register_prefix): Call
732 cris_parse_disassembler_options.
733 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
734 for CRISv32 and the size of immediate operands. New v32-only
735 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
736 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
737 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
738 Change brp to be v3..v10.
739 (cris_support_regs): New vector.
740 (cris_opcodes): Update head comment. New format characters '[',
741 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
742 Add new opcodes for v32 and adjust existing opcodes to accommodate
743 differences to earlier variants.
744 (cris_cond15s): New vector.
746 2004-11-04 Jan Beulich <jbeulich@novell.com>
748 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
750 (Mp): Use f_mode rather than none at all.
751 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
752 replaces what previously was x_mode; x_mode now means 128-bit SSE
754 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
755 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
756 pinsrw's second operand is Edqw.
757 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
758 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
759 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
760 mode when an operand size override is present or always suffixing.
761 More instructions will need to be added to this group.
762 (putop): Handle new macro chars 'C' (short/long suffix selector),
763 'I' (Intel mode override for following macro char), and 'J' (for
764 adding the 'l' prefix to far branches in AT&T mode). When an
765 alternative was specified in the template, honor macro character when
766 specified for Intel mode.
767 (OP_E): Handle new *_mode values. Correct pointer specifications for
768 memory operands. Consolidate output of index register.
769 (OP_G): Handle new *_mode values.
770 (OP_I): Handle const_1_mode.
771 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
772 respective opcode prefix bits have been consumed.
773 (OP_EM, OP_EX): Provide some default handling for generating pointer
776 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
778 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
781 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
783 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
784 (getregliststring): Support HI/LO and user registers.
785 * crx-opc.c (crx_instruction): Update data structure according to the
786 rearrangement done in CRX opcode header file.
787 (crx_regtab): Likewise.
788 (crx_optab): Likewise.
789 (crx_instruction): Reorder load/stor instructions, remove unsupported
791 support new Co-Processor instruction 'cpi'.
793 2004-10-27 Nick Clifton <nickc@redhat.com>
795 * opcodes/iq2000-asm.c: Regenerate.
796 * opcodes/iq2000-desc.c: Regenerate.
797 * opcodes/iq2000-desc.h: Regenerate.
798 * opcodes/iq2000-dis.c: Regenerate.
799 * opcodes/iq2000-ibld.c: Regenerate.
800 * opcodes/iq2000-opc.c: Regenerate.
801 * opcodes/iq2000-opc.h: Regenerate.
803 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
805 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
806 us4, us5 (respectively).
807 Remove unsupported 'popa' instruction.
808 Reverse operands order in store co-processor instructions.
810 2004-10-15 Alan Modra <amodra@bigpond.net.au>
812 * Makefile.am: Run "make dep-am"
813 * Makefile.in: Regenerate.
815 2004-10-12 Bob Wilson <bob.wilson@acm.org>
817 * xtensa-dis.c: Use ISO C90 formatting.
819 2004-10-09 Alan Modra <amodra@bigpond.net.au>
821 * ppc-opc.c: Revert 2004-09-09 change.
823 2004-10-07 Bob Wilson <bob.wilson@acm.org>
825 * xtensa-dis.c (state_names): Delete.
826 (fetch_data): Use xtensa_isa_maxlength.
827 (print_xtensa_operand): Replace operand parameter with opcode/operand
828 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
829 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
830 instruction bundles. Use xmalloc instead of malloc.
832 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
834 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
837 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
839 * crx-opc.c (crx_instruction): Support Co-processor insns.
840 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
841 (getregliststring): Change function to use the above enum.
842 (print_arg): Handle CO-Processor insns.
843 (crx_cinvs): Add 'b' option to invalidate the branch-target
846 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
848 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
849 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
850 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
851 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
852 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
854 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
856 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
859 2004-09-30 Paul Brook <paul@codesourcery.com>
861 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
862 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
864 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
866 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
867 (CONFIG_STATUS_DEPENDENCIES): New.
869 (config.status): Likewise.
870 * Makefile.in: Regenerated.
872 2004-09-17 Alan Modra <amodra@bigpond.net.au>
874 * Makefile.am: Run "make dep-am".
875 * Makefile.in: Regenerate.
876 * aclocal.m4: Regenerate.
877 * configure: Regenerate.
878 * po/POTFILES.in: Regenerate.
879 * po/opcodes.pot: Regenerate.
881 2004-09-11 Andreas Schwab <schwab@suse.de>
883 * configure: Rebuild.
885 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
887 * ppc-opc.c (L): Make this field not optional.
889 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
891 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
892 Fix parameter to 'm[t|f]csr' insns.
894 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
896 * configure.in: Autoupdate to autoconf 2.59.
897 * aclocal.m4: Rebuild with aclocal 1.4p6.
898 * configure: Rebuild with autoconf 2.59.
899 * Makefile.in: Rebuild with automake 1.4p6 (picking up
900 bfd changes for autoconf 2.59 on the way).
901 * config.in: Rebuild with autoheader 2.59.
903 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
905 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
907 2004-07-30 Michal Ludvig <mludvig@suse.cz>
909 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
910 (GRPPADLCK2): New define.
911 (twobyte_has_modrm): True for 0xA6.
912 (grps): GRPPADLCK2 for opcode 0xA6.
914 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
916 Introduce SH2a support.
917 * sh-opc.h (arch_sh2a_base): Renumber.
918 (arch_sh2a_nofpu_base): Remove.
919 (arch_sh_base_mask): Adjust.
920 (arch_opann_mask): New.
921 (arch_sh2a, arch_sh2a_nofpu): Adjust.
922 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
923 (sh_table): Adjust whitespace.
924 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
925 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
926 instruction list throughout.
927 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
928 of arch_sh2a in instruction list throughout.
929 (arch_sh2e_up): Accomodate above changes.
930 (arch_sh2_up): Ditto.
931 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
932 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
933 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
934 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
935 * sh-opc.h (arch_sh2a_nofpu): New.
936 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
937 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
939 2004-01-20 DJ Delorie <dj@redhat.com>
940 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
941 2003-12-29 DJ Delorie <dj@redhat.com>
942 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
943 sh_opcode_info, sh_table): Add sh2a support.
944 (arch_op32): New, to tag 32-bit opcodes.
945 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
946 2003-12-02 Michael Snyder <msnyder@redhat.com>
947 * sh-opc.h (arch_sh2a): Add.
948 * sh-dis.c (arch_sh2a): Handle.
949 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
951 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
953 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
955 2004-07-22 Nick Clifton <nickc@redhat.com>
958 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
959 insns - this is done by objdump itself.
960 * h8500-dis.c (print_insn_h8500): Likewise.
962 2004-07-21 Jan Beulich <jbeulich@novell.com>
964 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
965 regardless of address size prefix in effect.
966 (ptr_reg): Size or address registers does not depend on rex64, but
967 on the presence of an address size override.
968 (OP_MMX): Use rex.x only for xmm registers.
969 (OP_EM): Use rex.z only for xmm registers.
971 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
973 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
974 move/branch operations to the bottom so that VR5400 multimedia
975 instructions take precedence in disassembly.
977 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
979 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
980 ISA-specific "break" encoding.
982 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
984 * arm-opc.h: Fix typo in comment.
986 2004-07-11 Andreas Schwab <schwab@suse.de>
988 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
990 2004-07-09 Andreas Schwab <schwab@suse.de>
992 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
994 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
996 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
997 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
998 (crx-dis.lo): New target.
999 (crx-opc.lo): Likewise.
1000 * Makefile.in: Regenerate.
1001 * configure.in: Handle bfd_crx_arch.
1002 * configure: Regenerate.
1003 * crx-dis.c: New file.
1004 * crx-opc.c: New file.
1005 * disassemble.c (ARCH_crx): Define.
1006 (disassembler): Handle ARCH_crx.
1008 2004-06-29 James E Wilson <wilson@specifixinc.com>
1010 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1011 * ia64-asmtab.c: Regnerate.
1013 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1015 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1016 (extract_fxm): Don't test dialect.
1017 (XFXFXM_MASK): Include the power4 bit.
1018 (XFXM): Add p4 param.
1019 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1021 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1023 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1024 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1026 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1028 * ppc-opc.c (BH, XLBH_MASK): Define.
1029 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1031 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1033 * i386-dis.c (x_mode): Comment.
1034 (two_source_ops): File scope.
1035 (float_mem): Correct fisttpll and fistpll.
1036 (float_mem_mode): New table.
1038 (OP_E): Correct intel mode PTR output.
1039 (ptr_reg): Use open_char and close_char.
1040 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1041 operands. Set two_source_ops.
1043 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1045 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1046 instead of _raw_size.
1048 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1050 * ia64-gen.c (in_iclass): Handle more postinc st
1052 * ia64-asmtab.c: Rebuilt.
1054 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1056 * s390-opc.txt: Correct architecture mask for some opcodes.
1057 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1058 in the esa mode as well.
1060 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1062 * sh-dis.c (target_arch): Make unsigned.
1063 (print_insn_sh): Replace (most of) switch with a call to
1064 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1065 * sh-opc.h: Redefine architecture flags values.
1066 Add sh3-nommu architecture.
1067 Reorganise <arch>_up macros so they make more visual sense.
1068 (SH_MERGE_ARCH_SET): Define new macro.
1069 (SH_VALID_BASE_ARCH_SET): Likewise.
1070 (SH_VALID_MMU_ARCH_SET): Likewise.
1071 (SH_VALID_CO_ARCH_SET): Likewise.
1072 (SH_VALID_ARCH_SET): Likewise.
1073 (SH_MERGE_ARCH_SET_VALID): Likewise.
1074 (SH_ARCH_SET_HAS_FPU): Likewise.
1075 (SH_ARCH_SET_HAS_DSP): Likewise.
1076 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1077 (sh_get_arch_from_bfd_mach): Add prototype.
1078 (sh_get_arch_up_from_bfd_mach): Likewise.
1079 (sh_get_bfd_mach_from_arch_set): Likewise.
1080 (sh_merge_bfd_arc): Likewise.
1082 2004-05-24 Peter Barada <peter@the-baradas.com>
1084 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1085 into new match_insn_m68k function. Loop over canidate
1086 matches and select first that completely matches.
1087 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1088 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1089 to verify addressing for MAC/EMAC.
1090 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1091 reigster halves since 'fpu' and 'spl' look misleading.
1092 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1093 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1094 first, tighten up match masks.
1095 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1096 'size' from special case code in print_insn_m68k to
1097 determine decode size of insns.
1099 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1101 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1102 well as when -mpower4.
1104 2004-05-13 Nick Clifton <nickc@redhat.com>
1106 * po/fr.po: Updated French translation.
1108 2004-05-05 Peter Barada <peter@the-baradas.com>
1110 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1111 variants in arch_mask. Only set m68881/68851 for 68k chips.
1112 * m68k-op.c: Switch from ColdFire chips to core variants.
1114 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1117 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1119 2004-04-29 Ben Elliston <bje@au.ibm.com>
1121 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1122 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1124 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1126 * sh-dis.c (print_insn_sh): Print the value in constant pool
1127 as a symbol if it looks like a symbol.
1129 2004-04-22 Peter Barada <peter@the-baradas.com>
1131 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1132 appropriate ColdFire architectures.
1133 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1135 Add EMAC instructions, fix MAC instructions. Remove
1136 macmw/macml/msacmw/msacml instructions since mask addressing now
1139 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1141 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1142 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1143 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1144 macro. Adjust all users.
1146 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1148 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1151 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1153 * m32r-asm.c: Regenerate.
1155 2004-03-29 Stan Shebs <shebs@apple.com>
1157 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1160 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1162 * aclocal.m4: Regenerate.
1163 * config.in: Regenerate.
1164 * configure: Regenerate.
1165 * po/POTFILES.in: Regenerate.
1166 * po/opcodes.pot: Regenerate.
1168 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1170 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1172 * ppc-opc.c (RA0): Define.
1173 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1174 (RAOPT): Rename from RAO. Update all uses.
1175 (powerpc_opcodes): Use RA0 as appropriate.
1177 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1179 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1181 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1183 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1185 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1187 * i386-dis.c (GRPPLOCK): Delete.
1188 (grps): Delete GRPPLOCK entry.
1190 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1192 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1194 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1195 (GRPPADLCK): Define.
1196 (dis386): Use NOP_Fixup on "nop".
1197 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1198 (twobyte_has_modrm): Set for 0xa7.
1199 (padlock_table): Delete. Move to..
1200 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1202 (print_insn): Revert PADLOCK_SPECIAL code.
1203 (OP_E): Delete sfence, lfence, mfence checks.
1205 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1207 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1208 (INVLPG_Fixup): New function.
1209 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1211 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1213 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1214 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1215 (padlock_table): New struct with PadLock instructions.
1216 (print_insn): Handle PADLOCK_SPECIAL.
1218 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1220 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1221 (OP_E): Twiddle clflush to sfence here.
1223 2004-03-08 Nick Clifton <nickc@redhat.com>
1225 * po/de.po: Updated German translation.
1227 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1229 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1230 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1231 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1234 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1236 * frv-asm.c: Regenerate.
1237 * frv-desc.c: Regenerate.
1238 * frv-desc.h: Regenerate.
1239 * frv-dis.c: Regenerate.
1240 * frv-ibld.c: Regenerate.
1241 * frv-opc.c: Regenerate.
1242 * frv-opc.h: Regenerate.
1244 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1246 * frv-desc.c, frv-opc.c: Regenerate.
1248 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1250 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1252 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1254 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1255 Also correct mistake in the comment.
1257 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1259 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1260 ensure that double registers have even numbers.
1261 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1262 that reserved instruction 0xfffd does not decode the same
1264 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1265 REG_N refers to a double register.
1266 Add REG_N_B01 nibble type and use it instead of REG_NM
1268 Adjust the bit patterns in a few comments.
1270 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1272 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1274 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1276 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1278 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1280 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1282 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1284 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1285 mtivor32, mtivor33, mtivor34.
1287 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1289 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1291 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1293 * arm-opc.h Maverick accumulator register opcode fixes.
1295 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1297 * m32r-dis.c: Regenerate.
1299 2004-01-27 Michael Snyder <msnyder@redhat.com>
1301 * sh-opc.h (sh_table): "fsrra", not "fssra".
1303 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1305 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1308 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1310 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1312 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1314 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1315 1. Don't print scale factor on AT&T mode when index missing.
1317 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1319 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1320 when loaded into XR registers.
1322 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1324 * frv-desc.h: Regenerate.
1325 * frv-desc.c: Regenerate.
1326 * frv-opc.c: Regenerate.
1328 2004-01-13 Michael Snyder <msnyder@redhat.com>
1330 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1332 2004-01-09 Paul Brook <paul@codesourcery.com>
1334 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1337 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1339 * Makefile.am (libopcodes_la_DEPENDENCIES)
1340 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1341 comment about the problem.
1342 * Makefile.in: Regenerate.
1344 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1346 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1347 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1348 cut&paste errors in shifting/truncating numerical operands.
1349 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1350 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1351 (parse_uslo16): Likewise.
1352 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1353 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1354 (parse_s12): Likewise.
1355 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1356 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1357 (parse_uslo16): Likewise.
1358 (parse_uhi16): Parse gothi and gotfuncdeschi.
1359 (parse_d12): Parse got12 and gotfuncdesc12.
1360 (parse_s12): Likewise.
1362 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1364 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1365 instruction which looks similar to an 'rla' instruction.
1367 For older changes see ChangeLog-0203
1373 version-control: never