(s_app_line): Accept a line number of 0 for compatibility with gcc's output
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
2
3 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
4
5 2005-07-29 Paul Brook <paul@codesourcery.com>
6
7 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
8
9 2005-07-29 Paul Brook <paul@codesourcery.com>
10
11 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
12 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
13
14 2005-07-25 DJ Delorie <dj@redhat.com>
15
16 * m32c-asm.c Regenerate.
17 * m32c-dis.c Regenerate.
18
19 2005-07-20 DJ Delorie <dj@redhat.com>
20
21 * disassemble.c (disassemble_init_for_target): M32C ISAs are
22 enums, so convert them to bit masks, which attributes are.
23
24 2005-07-18 Nick Clifton <nickc@redhat.com>
25
26 * configure.in: Restore alpha ordering to list of arches.
27 * configure: Regenerate.
28 * disassemble.c: Restore alpha ordering to list of arches.
29
30 2005-07-18 Nick Clifton <nickc@redhat.com>
31
32 * m32c-asm.c: Regenerate.
33 * m32c-desc.c: Regenerate.
34 * m32c-desc.h: Regenerate.
35 * m32c-dis.c: Regenerate.
36 * m32c-ibld.h: Regenerate.
37 * m32c-opc.c: Regenerate.
38 * m32c-opc.h: Regenerate.
39
40 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
41
42 * i386-dis.c (PNI_Fixup): Update comment.
43 (VMX_Fixup): Properly handle the suffix check.
44
45 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
46
47 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
48 mfctl disassembly.
49
50 2005-07-16 Alan Modra <amodra@bigpond.net.au>
51
52 * Makefile.am: Run "make dep-am".
53 (stamp-m32c): Fix cpu dependencies.
54 * Makefile.in: Regenerate.
55 * ip2k-dis.c: Regenerate.
56
57 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
58
59 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
60 (VMX_Fixup): New. Fix up Intel VMX Instructions.
61 (Em): New.
62 (Gm): New.
63 (VM): New.
64 (dis386_twobyte): Updated entries 0x78 and 0x79.
65 (twobyte_has_modrm): Likewise.
66 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
67 (OP_G): Handle m_mode.
68
69 2005-07-14 Jim Blandy <jimb@redhat.com>
70
71 Add support for the Renesas M32C and M16C.
72 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
73 * m32c-desc.h, m32c-opc.h: New.
74 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
75 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
76 m32c-opc.c.
77 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
78 m32c-ibld.lo, m32c-opc.lo.
79 (CLEANFILES): List stamp-m32c.
80 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
81 (CGEN_CPUS): Add m32c.
82 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
83 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
84 (m32c_opc_h): New variable.
85 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
86 (m32c-opc.lo): New rules.
87 * Makefile.in: Regenerated.
88 * configure.in: Add case for bfd_m32c_arch.
89 * configure: Regenerated.
90 * disassemble.c (ARCH_m32c): New.
91 [ARCH_m32c]: #include "m32c-desc.h".
92 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
93 (disassemble_init_for_target) [ARCH_m32c]: Same.
94
95 * cgen-ops.h, cgen-types.h: New files.
96 * Makefile.am (HFILES): List them.
97 * Makefile.in: Regenerated.
98
99 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
100
101 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
102 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
103 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
104 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
105 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
106 v850-dis.c: Fix format bugs.
107 * ia64-gen.c (fail, warn): Add format attribute.
108 * or32-opc.c (debug): Likewise.
109
110 2005-07-07 Khem Raj <kraj@mvista.com>
111
112 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
113 disassembly pattern.
114
115 2005-07-06 Alan Modra <amodra@bigpond.net.au>
116
117 * Makefile.am (stamp-m32r): Fix path to cpu files.
118 (stamp-m32r, stamp-iq2000): Likewise.
119 * Makefile.in: Regenerate.
120 * m32r-asm.c: Regenerate.
121 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
122 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
123
124 2005-07-05 Nick Clifton <nickc@redhat.com>
125
126 * iq2000-asm.c: Regenerate.
127 * ms1-asm.c: Regenerate.
128
129 2005-07-05 Jan Beulich <jbeulich@novell.com>
130
131 * i386-dis.c (SVME_Fixup): New.
132 (grps): Use it for the lidt entry.
133 (PNI_Fixup): Call OP_M rather than OP_E.
134 (INVLPG_Fixup): Likewise.
135
136 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
137
138 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
139
140 2005-07-01 Nick Clifton <nickc@redhat.com>
141
142 * a29k-dis.c: Update to ISO C90 style function declarations and
143 fix formatting.
144 * alpha-opc.c: Likewise.
145 * arc-dis.c: Likewise.
146 * arc-opc.c: Likewise.
147 * avr-dis.c: Likewise.
148 * cgen-asm.in: Likewise.
149 * cgen-dis.in: Likewise.
150 * cgen-ibld.in: Likewise.
151 * cgen-opc.c: Likewise.
152 * cris-dis.c: Likewise.
153 * d10v-dis.c: Likewise.
154 * d30v-dis.c: Likewise.
155 * d30v-opc.c: Likewise.
156 * dis-buf.c: Likewise.
157 * dlx-dis.c: Likewise.
158 * h8300-dis.c: Likewise.
159 * h8500-dis.c: Likewise.
160 * hppa-dis.c: Likewise.
161 * i370-dis.c: Likewise.
162 * i370-opc.c: Likewise.
163 * m10200-dis.c: Likewise.
164 * m10300-dis.c: Likewise.
165 * m68k-dis.c: Likewise.
166 * m88k-dis.c: Likewise.
167 * mips-dis.c: Likewise.
168 * mmix-dis.c: Likewise.
169 * msp430-dis.c: Likewise.
170 * ns32k-dis.c: Likewise.
171 * or32-dis.c: Likewise.
172 * or32-opc.c: Likewise.
173 * pdp11-dis.c: Likewise.
174 * pj-dis.c: Likewise.
175 * s390-dis.c: Likewise.
176 * sh-dis.c: Likewise.
177 * sh64-dis.c: Likewise.
178 * sparc-dis.c: Likewise.
179 * sparc-opc.c: Likewise.
180 * sysdep.h: Likewise.
181 * tic30-dis.c: Likewise.
182 * tic4x-dis.c: Likewise.
183 * tic80-dis.c: Likewise.
184 * v850-dis.c: Likewise.
185 * v850-opc.c: Likewise.
186 * vax-dis.c: Likewise.
187 * w65-dis.c: Likewise.
188 * z8kgen.c: Likewise.
189
190 * fr30-*: Regenerate.
191 * frv-*: Regenerate.
192 * ip2k-*: Regenerate.
193 * iq2000-*: Regenerate.
194 * m32r-*: Regenerate.
195 * ms1-*: Regenerate.
196 * openrisc-*: Regenerate.
197 * xstormy16-*: Regenerate.
198
199 2005-06-23 Ben Elliston <bje@gnu.org>
200
201 * m68k-dis.c: Use ISC C90.
202 * m68k-opc.c: Formatting fixes.
203
204 2005-06-16 David Ung <davidu@mips.com>
205
206 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
207 instructions to the table; seb/seh/sew/zeb/zeh/zew.
208
209 2005-06-15 Dave Brolley <brolley@redhat.com>
210
211 Contribute Morpho ms1 on behalf of Red Hat
212 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
213 ms1-opc.h: New files, Morpho ms1 target.
214
215 2004-05-14 Stan Cox <scox@redhat.com>
216
217 * disassemble.c (ARCH_ms1): Define.
218 (disassembler): Handle bfd_arch_ms1
219
220 2004-05-13 Michael Snyder <msnyder@redhat.com>
221
222 * Makefile.am, Makefile.in: Add ms1 target.
223 * configure.in: Ditto.
224
225 2005-06-08 Zack Weinberg <zack@codesourcery.com>
226
227 * arm-opc.h: Delete; fold contents into ...
228 * arm-dis.c: ... here. Move includes of internal COFF headers
229 next to includes of internal ELF headers.
230 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
231 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
232 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
233 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
234 (iwmmxt_wwnames, iwmmxt_wwssnames):
235 Make const.
236 (regnames): Remove iWMMXt coprocessor register sets.
237 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
238 (get_arm_regnames): Adjust fourth argument to match above changes.
239 (set_iwmmxt_regnames): Delete.
240 (print_insn_arm): Constify 'c'. Use ISO syntax for function
241 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
242 and iwmmxt_cregnames, not set_iwmmxt_regnames.
243 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
244 ISO syntax for function pointer calls.
245
246 2005-06-07 Zack Weinberg <zack@codesourcery.com>
247
248 * arm-dis.c: Split up the comments describing the format codes, so
249 that the ARM and 16-bit Thumb opcode tables each have comments
250 preceding them that describe all the codes, and only the codes,
251 valid in those tables. (32-bit Thumb table is already like this.)
252 Reorder the lists in all three comments to match the order in
253 which the codes are implemented.
254 Remove all forward declarations of static functions. Convert all
255 function definitions to ISO C format.
256 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
257 Return nothing.
258 (print_insn_thumb16): Remove unused case 'I'.
259 (print_insn): Update for changed calling convention of subroutines.
260
261 2005-05-25 Jan Beulich <jbeulich@novell.com>
262
263 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
264 hex (but retain it being displayed as signed). Remove redundant
265 checks. Add handling of displacements for 16-bit addressing in Intel
266 mode.
267
268 2005-05-25 Jan Beulich <jbeulich@novell.com>
269
270 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
271 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
272 masking of 'rm' in 16-bit memory address handling.
273
274 2005-05-19 Anton Blanchard <anton@samba.org>
275
276 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
277 (print_ppc_disassembler_options): Document it.
278 * ppc-opc.c (SVC_LEV): Define.
279 (LEV): Allow optional operand.
280 (POWER5): Define.
281 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
282 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
283
284 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
285
286 * Makefile.in: Regenerate.
287
288 2005-05-17 Zack Weinberg <zack@codesourcery.com>
289
290 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
291 instructions. Adjust disassembly of some opcodes to match
292 unified syntax.
293 (thumb32_opcodes): New table.
294 (print_insn_thumb): Rename print_insn_thumb16; don't handle
295 two-halfword branches here.
296 (print_insn_thumb32): New function.
297 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
298 and print_insn_thumb32. Be consistent about order of
299 halfwords when printing 32-bit instructions.
300
301 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
302
303 PR 843
304 * i386-dis.c (branch_v_mode): New.
305 (indirEv): Use branch_v_mode instead of v_mode.
306 (OP_E): Handle branch_v_mode.
307
308 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
309
310 * d10v-dis.c (dis_2_short): Support 64bit host.
311
312 2005-05-07 Nick Clifton <nickc@redhat.com>
313
314 * po/nl.po: Updated translation.
315
316 2005-05-07 Nick Clifton <nickc@redhat.com>
317
318 * Update the address and phone number of the FSF organization in
319 the GPL notices in the following files:
320 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
321 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
322 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
323 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
324 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
325 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
326 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
327 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
328 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
329 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
330 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
331 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
332 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
333 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
334 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
335 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
336 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
337 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
338 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
339 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
340 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
341 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
342 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
343 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
344 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
345 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
346 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
347 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
348 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
349 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
350 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
351 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
352 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
353
354 2005-05-05 James E Wilson <wilson@specifixinc.com>
355
356 * ia64-opc.c: Include sysdep.h before libiberty.h.
357
358 2005-05-05 Nick Clifton <nickc@redhat.com>
359
360 * configure.in (ALL_LINGUAS): Add vi.
361 * configure: Regenerate.
362 * po/vi.po: New.
363
364 2005-04-26 Jerome Guitton <guitton@gnat.com>
365
366 * configure.in: Fix the check for basename declaration.
367 * configure: Regenerate.
368
369 2005-04-19 Alan Modra <amodra@bigpond.net.au>
370
371 * ppc-opc.c (RTO): Define.
372 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
373 entries to suit PPC440.
374
375 2005-04-18 Mark Kettenis <kettenis@gnu.org>
376
377 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
378 Add xcrypt-ctr.
379
380 2005-04-14 Nick Clifton <nickc@redhat.com>
381
382 * po/fi.po: New translation: Finnish.
383 * configure.in (ALL_LINGUAS): Add fi.
384 * configure: Regenerate.
385
386 2005-04-14 Alan Modra <amodra@bigpond.net.au>
387
388 * Makefile.am (NO_WERROR): Define.
389 * configure.in: Invoke AM_BINUTILS_WARNINGS.
390 * Makefile.in: Regenerate.
391 * aclocal.m4: Regenerate.
392 * configure: Regenerate.
393
394 2005-04-04 Nick Clifton <nickc@redhat.com>
395
396 * fr30-asm.c: Regenerate.
397 * frv-asm.c: Regenerate.
398 * iq2000-asm.c: Regenerate.
399 * m32r-asm.c: Regenerate.
400 * openrisc-asm.c: Regenerate.
401
402 2005-04-01 Jan Beulich <jbeulich@novell.com>
403
404 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
405 visible operands in Intel mode. The first operand of monitor is
406 %rax in 64-bit mode.
407
408 2005-04-01 Jan Beulich <jbeulich@novell.com>
409
410 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
411 easier future additions.
412
413 2005-03-31 Jerome Guitton <guitton@gnat.com>
414
415 * configure.in: Check for basename.
416 * configure: Regenerate.
417 * config.in: Ditto.
418
419 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
420
421 * i386-dis.c (SEG_Fixup): New.
422 (Sv): New.
423 (dis386): Use "Sv" for 0x8c and 0x8e.
424
425 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
426 Nick Clifton <nickc@redhat.com>
427
428 * vax-dis.c: (entry_addr): New varible: An array of user supplied
429 function entry mask addresses.
430 (entry_addr_occupied_slots): New variable: The number of occupied
431 elements in entry_addr.
432 (entry_addr_total_slots): New variable: The total number of
433 elements in entry_addr.
434 (parse_disassembler_options): New function. Fills in the entry_addr
435 array.
436 (free_entry_array): New function. Release the memory used by the
437 entry addr array. Suppressed because there is no way to call it.
438 (is_function_entry): Check if a given address is a function's
439 start address by looking at supplied entry mask addresses and
440 symbol information, if available.
441 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
442
443 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
444
445 * cris-dis.c (print_with_operands): Use ~31L for long instead
446 of ~31.
447
448 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
449
450 * mmix-opc.c (O): Revert the last change.
451 (Z): Likewise.
452
453 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
454
455 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
456 (Z): Likewise.
457
458 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
459
460 * mmix-opc.c (O, Z): Force expression as unsigned long.
461
462 2005-03-18 Nick Clifton <nickc@redhat.com>
463
464 * ip2k-asm.c: Regenerate.
465 * op/opcodes.pot: Regenerate.
466
467 2005-03-16 Nick Clifton <nickc@redhat.com>
468 Ben Elliston <bje@au.ibm.com>
469
470 * configure.in (werror): New switch: Add -Werror to the
471 compiler command line. Enabled by default. Disable via
472 --disable-werror.
473 * configure: Regenerate.
474
475 2005-03-16 Alan Modra <amodra@bigpond.net.au>
476
477 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
478 BOOKE.
479
480 2005-03-15 Alan Modra <amodra@bigpond.net.au>
481
482 * po/es.po: Commit new Spanish translation.
483
484 * po/fr.po: Commit new French translation.
485
486 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
487
488 * vax-dis.c: Fix spelling error
489 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
490 of just "Entry mask: < r1 ... >"
491
492 2005-03-12 Zack Weinberg <zack@codesourcery.com>
493
494 * arm-dis.c (arm_opcodes): Document %E and %V.
495 Add entries for v6T2 ARM instructions:
496 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
497 (print_insn_arm): Add support for %E and %V.
498 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
499
500 2005-03-10 Jeff Baker <jbaker@qnx.com>
501 Alan Modra <amodra@bigpond.net.au>
502
503 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
504 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
505 (SPRG_MASK): Delete.
506 (XSPRG_MASK): Mask off extra bits now part of sprg field.
507 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
508 mfsprg4..7 after msprg and consolidate.
509
510 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
511
512 * vax-dis.c (entry_mask_bit): New array.
513 (print_insn_vax): Decode function entry mask.
514
515 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
516
517 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
518
519 2005-03-05 Alan Modra <amodra@bigpond.net.au>
520
521 * po/opcodes.pot: Regenerate.
522
523 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
524
525 * arc-dis.c (a4_decoding_class): New enum.
526 (dsmOneArcInst): Use the enum values for the decoding class.
527 Remove redundant case in the switch for decodingClass value 11.
528
529 2005-03-02 Jan Beulich <jbeulich@novell.com>
530
531 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
532 accesses.
533 (OP_C): Consider lock prefix in non-64-bit modes.
534
535 2005-02-24 Alan Modra <amodra@bigpond.net.au>
536
537 * cris-dis.c (format_hex): Remove ineffective warning fix.
538 * crx-dis.c (make_instruction): Warning fix.
539 * frv-asm.c: Regenerate.
540
541 2005-02-23 Nick Clifton <nickc@redhat.com>
542
543 * cgen-dis.in: Use bfd_byte for buffers that are passed to
544 read_memory.
545
546 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
547
548 * crx-dis.c (make_instruction): Move argument structure into inner
549 scope and ensure that all of its fields are initialised before
550 they are used.
551
552 * fr30-asm.c: Regenerate.
553 * fr30-dis.c: Regenerate.
554 * frv-asm.c: Regenerate.
555 * frv-dis.c: Regenerate.
556 * ip2k-asm.c: Regenerate.
557 * ip2k-dis.c: Regenerate.
558 * iq2000-asm.c: Regenerate.
559 * iq2000-dis.c: Regenerate.
560 * m32r-asm.c: Regenerate.
561 * m32r-dis.c: Regenerate.
562 * openrisc-asm.c: Regenerate.
563 * openrisc-dis.c: Regenerate.
564 * xstormy16-asm.c: Regenerate.
565 * xstormy16-dis.c: Regenerate.
566
567 2005-02-22 Alan Modra <amodra@bigpond.net.au>
568
569 * arc-ext.c: Warning fixes.
570 * arc-ext.h: Likewise.
571 * cgen-opc.c: Likewise.
572 * ia64-gen.c: Likewise.
573 * maxq-dis.c: Likewise.
574 * ns32k-dis.c: Likewise.
575 * w65-dis.c: Likewise.
576 * ia64-asmtab.c: Regenerate.
577
578 2005-02-22 Alan Modra <amodra@bigpond.net.au>
579
580 * fr30-desc.c: Regenerate.
581 * fr30-desc.h: Regenerate.
582 * fr30-opc.c: Regenerate.
583 * fr30-opc.h: Regenerate.
584 * frv-desc.c: Regenerate.
585 * frv-desc.h: Regenerate.
586 * frv-opc.c: Regenerate.
587 * frv-opc.h: Regenerate.
588 * ip2k-desc.c: Regenerate.
589 * ip2k-desc.h: Regenerate.
590 * ip2k-opc.c: Regenerate.
591 * ip2k-opc.h: Regenerate.
592 * iq2000-desc.c: Regenerate.
593 * iq2000-desc.h: Regenerate.
594 * iq2000-opc.c: Regenerate.
595 * iq2000-opc.h: Regenerate.
596 * m32r-desc.c: Regenerate.
597 * m32r-desc.h: Regenerate.
598 * m32r-opc.c: Regenerate.
599 * m32r-opc.h: Regenerate.
600 * m32r-opinst.c: Regenerate.
601 * openrisc-desc.c: Regenerate.
602 * openrisc-desc.h: Regenerate.
603 * openrisc-opc.c: Regenerate.
604 * openrisc-opc.h: Regenerate.
605 * xstormy16-desc.c: Regenerate.
606 * xstormy16-desc.h: Regenerate.
607 * xstormy16-opc.c: Regenerate.
608 * xstormy16-opc.h: Regenerate.
609
610 2005-02-21 Alan Modra <amodra@bigpond.net.au>
611
612 * Makefile.am: Run "make dep-am"
613 * Makefile.in: Regenerate.
614
615 2005-02-15 Nick Clifton <nickc@redhat.com>
616
617 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
618 compile time warnings.
619 (print_keyword): Likewise.
620 (default_print_insn): Likewise.
621
622 * fr30-desc.c: Regenerated.
623 * fr30-desc.h: Regenerated.
624 * fr30-dis.c: Regenerated.
625 * fr30-opc.c: Regenerated.
626 * fr30-opc.h: Regenerated.
627 * frv-desc.c: Regenerated.
628 * frv-dis.c: Regenerated.
629 * frv-opc.c: Regenerated.
630 * ip2k-asm.c: Regenerated.
631 * ip2k-desc.c: Regenerated.
632 * ip2k-desc.h: Regenerated.
633 * ip2k-dis.c: Regenerated.
634 * ip2k-opc.c: Regenerated.
635 * ip2k-opc.h: Regenerated.
636 * iq2000-desc.c: Regenerated.
637 * iq2000-dis.c: Regenerated.
638 * iq2000-opc.c: Regenerated.
639 * m32r-asm.c: Regenerated.
640 * m32r-desc.c: Regenerated.
641 * m32r-desc.h: Regenerated.
642 * m32r-dis.c: Regenerated.
643 * m32r-opc.c: Regenerated.
644 * m32r-opc.h: Regenerated.
645 * m32r-opinst.c: Regenerated.
646 * openrisc-desc.c: Regenerated.
647 * openrisc-desc.h: Regenerated.
648 * openrisc-dis.c: Regenerated.
649 * openrisc-opc.c: Regenerated.
650 * openrisc-opc.h: Regenerated.
651 * xstormy16-desc.c: Regenerated.
652 * xstormy16-desc.h: Regenerated.
653 * xstormy16-dis.c: Regenerated.
654 * xstormy16-opc.c: Regenerated.
655 * xstormy16-opc.h: Regenerated.
656
657 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
658
659 * dis-buf.c (perror_memory): Use sprintf_vma to print out
660 address.
661
662 2005-02-11 Nick Clifton <nickc@redhat.com>
663
664 * iq2000-asm.c: Regenerate.
665
666 * frv-dis.c: Regenerate.
667
668 2005-02-07 Jim Blandy <jimb@redhat.com>
669
670 * Makefile.am (CGEN): Load guile.scm before calling the main
671 application script.
672 * Makefile.in: Regenerated.
673 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
674 Simply pass the cgen-opc.scm path to ${cgen} as its first
675 argument; ${cgen} itself now contains the '-s', or whatever is
676 appropriate for the Scheme being used.
677
678 2005-01-31 Andrew Cagney <cagney@gnu.org>
679
680 * configure: Regenerate to track ../gettext.m4.
681
682 2005-01-31 Jan Beulich <jbeulich@novell.com>
683
684 * ia64-gen.c (NELEMS): Define.
685 (shrink): Generate alias with missing second predicate register when
686 opcode has two outputs and these are both predicates.
687 * ia64-opc-i.c (FULL17): Define.
688 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
689 here to generate output template.
690 (TBITCM, TNATCM): Undefine after use.
691 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
692 first input. Add ld16 aliases without ar.csd as second output. Add
693 st16 aliases without ar.csd as second input. Add cmpxchg aliases
694 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
695 ar.ccv as third/fourth inputs. Consolidate through...
696 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
697 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
698 * ia64-asmtab.c: Regenerate.
699
700 2005-01-27 Andrew Cagney <cagney@gnu.org>
701
702 * configure: Regenerate to track ../gettext.m4 change.
703
704 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
705
706 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
707 * frv-asm.c: Rebuilt.
708 * frv-desc.c: Rebuilt.
709 * frv-desc.h: Rebuilt.
710 * frv-dis.c: Rebuilt.
711 * frv-ibld.c: Rebuilt.
712 * frv-opc.c: Rebuilt.
713 * frv-opc.h: Rebuilt.
714
715 2005-01-24 Andrew Cagney <cagney@gnu.org>
716
717 * configure: Regenerate, ../gettext.m4 was updated.
718
719 2005-01-21 Fred Fish <fnf@specifixinc.com>
720
721 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
722 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
723 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
724 * mips-dis.c: Ditto.
725
726 2005-01-20 Alan Modra <amodra@bigpond.net.au>
727
728 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
729
730 2005-01-19 Fred Fish <fnf@specifixinc.com>
731
732 * mips-dis.c (no_aliases): New disassembly option flag.
733 (set_default_mips_dis_options): Init no_aliases to zero.
734 (parse_mips_dis_option): Handle no-aliases option.
735 (print_insn_mips): Ignore table entries that are aliases
736 if no_aliases is set.
737 (print_insn_mips16): Ditto.
738 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
739 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
740 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
741 * mips16-opc.c (mips16_opcodes): Ditto.
742
743 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
744
745 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
746 (inheritance diagram): Add missing edge.
747 (arch_sh1_up): Rename arch_sh_up to match external name to make life
748 easier for the testsuite.
749 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
750 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
751 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
752 arch_sh2a_or_sh4_up child.
753 (sh_table): Do renaming as above.
754 Correct comment for ldc.l for gas testsuite to read.
755 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
756 Correct comments for movy.w and movy.l for gas testsuite to read.
757 Correct comments for fmov.d and fmov.s for gas testsuite to read.
758
759 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
760
761 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
762
763 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
764
765 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
766
767 2005-01-10 Andreas Schwab <schwab@suse.de>
768
769 * disassemble.c (disassemble_init_for_target) <case
770 bfd_arch_ia64>: Set skip_zeroes to 16.
771 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
772
773 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
774
775 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
776
777 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
778
779 * avr-dis.c: Prettyprint. Added printing of symbol names in all
780 memory references. Convert avr_operand() to C90 formatting.
781
782 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
783
784 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
785
786 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
787
788 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
789 (no_op_insn): Initialize array with instructions that have no
790 operands.
791 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
792
793 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
794
795 * arm-dis.c: Correct top-level comment.
796
797 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
798
799 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
800 architecuture defining the insn.
801 (arm_opcodes, thumb_opcodes): Delete. Move to ...
802 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
803 field.
804 Also include opcode/arm.h.
805 * Makefile.am (arm-dis.lo): Update dependency list.
806 * Makefile.in: Regenerate.
807
808 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
809
810 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
811 reflect the change to the short immediate syntax.
812
813 2004-11-19 Alan Modra <amodra@bigpond.net.au>
814
815 * or32-opc.c (debug): Warning fix.
816 * po/POTFILES.in: Regenerate.
817
818 * maxq-dis.c: Formatting.
819 (print_insn): Warning fix.
820
821 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
822
823 * arm-dis.c (WORD_ADDRESS): Define.
824 (print_insn): Use it. Correct big-endian end-of-section handling.
825
826 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
827 Vineet Sharma <vineets@noida.hcltech.com>
828
829 * maxq-dis.c: New file.
830 * disassemble.c (ARCH_maxq): Define.
831 (disassembler): Add 'print_insn_maxq_little' for handling maxq
832 instructions..
833 * configure.in: Add case for bfd_maxq_arch.
834 * configure: Regenerate.
835 * Makefile.am: Add support for maxq-dis.c
836 * Makefile.in: Regenerate.
837 * aclocal.m4: Regenerate.
838
839 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
840
841 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
842 mode.
843 * crx-dis.c: Likewise.
844
845 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
846
847 Generally, handle CRISv32.
848 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
849 (struct cris_disasm_data): New type.
850 (format_reg, format_hex, cris_constraint, print_flags)
851 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
852 callers changed.
853 (format_sup_reg, print_insn_crisv32_with_register_prefix)
854 (print_insn_crisv32_without_register_prefix)
855 (print_insn_crisv10_v32_with_register_prefix)
856 (print_insn_crisv10_v32_without_register_prefix)
857 (cris_parse_disassembler_options): New functions.
858 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
859 parameter. All callers changed.
860 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
861 failure.
862 (cris_constraint) <case 'Y', 'U'>: New cases.
863 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
864 for constraint 'n'.
865 (print_with_operands) <case 'Y'>: New case.
866 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
867 <case 'N', 'Y', 'Q'>: New cases.
868 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
869 (print_insn_cris_with_register_prefix)
870 (print_insn_cris_without_register_prefix): Call
871 cris_parse_disassembler_options.
872 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
873 for CRISv32 and the size of immediate operands. New v32-only
874 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
875 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
876 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
877 Change brp to be v3..v10.
878 (cris_support_regs): New vector.
879 (cris_opcodes): Update head comment. New format characters '[',
880 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
881 Add new opcodes for v32 and adjust existing opcodes to accommodate
882 differences to earlier variants.
883 (cris_cond15s): New vector.
884
885 2004-11-04 Jan Beulich <jbeulich@novell.com>
886
887 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
888 (indirEb): Remove.
889 (Mp): Use f_mode rather than none at all.
890 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
891 replaces what previously was x_mode; x_mode now means 128-bit SSE
892 operands.
893 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
894 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
895 pinsrw's second operand is Edqw.
896 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
897 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
898 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
899 mode when an operand size override is present or always suffixing.
900 More instructions will need to be added to this group.
901 (putop): Handle new macro chars 'C' (short/long suffix selector),
902 'I' (Intel mode override for following macro char), and 'J' (for
903 adding the 'l' prefix to far branches in AT&T mode). When an
904 alternative was specified in the template, honor macro character when
905 specified for Intel mode.
906 (OP_E): Handle new *_mode values. Correct pointer specifications for
907 memory operands. Consolidate output of index register.
908 (OP_G): Handle new *_mode values.
909 (OP_I): Handle const_1_mode.
910 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
911 respective opcode prefix bits have been consumed.
912 (OP_EM, OP_EX): Provide some default handling for generating pointer
913 specifications.
914
915 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
916
917 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
918 COP_INST macro.
919
920 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
921
922 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
923 (getregliststring): Support HI/LO and user registers.
924 * crx-opc.c (crx_instruction): Update data structure according to the
925 rearrangement done in CRX opcode header file.
926 (crx_regtab): Likewise.
927 (crx_optab): Likewise.
928 (crx_instruction): Reorder load/stor instructions, remove unsupported
929 formats.
930 support new Co-Processor instruction 'cpi'.
931
932 2004-10-27 Nick Clifton <nickc@redhat.com>
933
934 * opcodes/iq2000-asm.c: Regenerate.
935 * opcodes/iq2000-desc.c: Regenerate.
936 * opcodes/iq2000-desc.h: Regenerate.
937 * opcodes/iq2000-dis.c: Regenerate.
938 * opcodes/iq2000-ibld.c: Regenerate.
939 * opcodes/iq2000-opc.c: Regenerate.
940 * opcodes/iq2000-opc.h: Regenerate.
941
942 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
943
944 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
945 us4, us5 (respectively).
946 Remove unsupported 'popa' instruction.
947 Reverse operands order in store co-processor instructions.
948
949 2004-10-15 Alan Modra <amodra@bigpond.net.au>
950
951 * Makefile.am: Run "make dep-am"
952 * Makefile.in: Regenerate.
953
954 2004-10-12 Bob Wilson <bob.wilson@acm.org>
955
956 * xtensa-dis.c: Use ISO C90 formatting.
957
958 2004-10-09 Alan Modra <amodra@bigpond.net.au>
959
960 * ppc-opc.c: Revert 2004-09-09 change.
961
962 2004-10-07 Bob Wilson <bob.wilson@acm.org>
963
964 * xtensa-dis.c (state_names): Delete.
965 (fetch_data): Use xtensa_isa_maxlength.
966 (print_xtensa_operand): Replace operand parameter with opcode/operand
967 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
968 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
969 instruction bundles. Use xmalloc instead of malloc.
970
971 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
972
973 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
974 initializers.
975
976 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
977
978 * crx-opc.c (crx_instruction): Support Co-processor insns.
979 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
980 (getregliststring): Change function to use the above enum.
981 (print_arg): Handle CO-Processor insns.
982 (crx_cinvs): Add 'b' option to invalidate the branch-target
983 cache.
984
985 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
986
987 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
988 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
989 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
990 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
991 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
992
993 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
994
995 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
996 rather than add it.
997
998 2004-09-30 Paul Brook <paul@codesourcery.com>
999
1000 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1001 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1002
1003 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1004
1005 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1006 (CONFIG_STATUS_DEPENDENCIES): New.
1007 (Makefile): Removed.
1008 (config.status): Likewise.
1009 * Makefile.in: Regenerated.
1010
1011 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1012
1013 * Makefile.am: Run "make dep-am".
1014 * Makefile.in: Regenerate.
1015 * aclocal.m4: Regenerate.
1016 * configure: Regenerate.
1017 * po/POTFILES.in: Regenerate.
1018 * po/opcodes.pot: Regenerate.
1019
1020 2004-09-11 Andreas Schwab <schwab@suse.de>
1021
1022 * configure: Rebuild.
1023
1024 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1025
1026 * ppc-opc.c (L): Make this field not optional.
1027
1028 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1029
1030 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1031 Fix parameter to 'm[t|f]csr' insns.
1032
1033 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1034
1035 * configure.in: Autoupdate to autoconf 2.59.
1036 * aclocal.m4: Rebuild with aclocal 1.4p6.
1037 * configure: Rebuild with autoconf 2.59.
1038 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1039 bfd changes for autoconf 2.59 on the way).
1040 * config.in: Rebuild with autoheader 2.59.
1041
1042 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1043
1044 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1045
1046 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1047
1048 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1049 (GRPPADLCK2): New define.
1050 (twobyte_has_modrm): True for 0xA6.
1051 (grps): GRPPADLCK2 for opcode 0xA6.
1052
1053 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1054
1055 Introduce SH2a support.
1056 * sh-opc.h (arch_sh2a_base): Renumber.
1057 (arch_sh2a_nofpu_base): Remove.
1058 (arch_sh_base_mask): Adjust.
1059 (arch_opann_mask): New.
1060 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1061 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1062 (sh_table): Adjust whitespace.
1063 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1064 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1065 instruction list throughout.
1066 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1067 of arch_sh2a in instruction list throughout.
1068 (arch_sh2e_up): Accomodate above changes.
1069 (arch_sh2_up): Ditto.
1070 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1071 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1072 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1073 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1074 * sh-opc.h (arch_sh2a_nofpu): New.
1075 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1076 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1077 instruction.
1078 2004-01-20 DJ Delorie <dj@redhat.com>
1079 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1080 2003-12-29 DJ Delorie <dj@redhat.com>
1081 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1082 sh_opcode_info, sh_table): Add sh2a support.
1083 (arch_op32): New, to tag 32-bit opcodes.
1084 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1085 2003-12-02 Michael Snyder <msnyder@redhat.com>
1086 * sh-opc.h (arch_sh2a): Add.
1087 * sh-dis.c (arch_sh2a): Handle.
1088 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1089
1090 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1091
1092 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1093
1094 2004-07-22 Nick Clifton <nickc@redhat.com>
1095
1096 PR/280
1097 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1098 insns - this is done by objdump itself.
1099 * h8500-dis.c (print_insn_h8500): Likewise.
1100
1101 2004-07-21 Jan Beulich <jbeulich@novell.com>
1102
1103 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1104 regardless of address size prefix in effect.
1105 (ptr_reg): Size or address registers does not depend on rex64, but
1106 on the presence of an address size override.
1107 (OP_MMX): Use rex.x only for xmm registers.
1108 (OP_EM): Use rex.z only for xmm registers.
1109
1110 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1111
1112 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1113 move/branch operations to the bottom so that VR5400 multimedia
1114 instructions take precedence in disassembly.
1115
1116 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1117
1118 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1119 ISA-specific "break" encoding.
1120
1121 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1122
1123 * arm-opc.h: Fix typo in comment.
1124
1125 2004-07-11 Andreas Schwab <schwab@suse.de>
1126
1127 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1128
1129 2004-07-09 Andreas Schwab <schwab@suse.de>
1130
1131 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1132
1133 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1134
1135 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1136 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1137 (crx-dis.lo): New target.
1138 (crx-opc.lo): Likewise.
1139 * Makefile.in: Regenerate.
1140 * configure.in: Handle bfd_crx_arch.
1141 * configure: Regenerate.
1142 * crx-dis.c: New file.
1143 * crx-opc.c: New file.
1144 * disassemble.c (ARCH_crx): Define.
1145 (disassembler): Handle ARCH_crx.
1146
1147 2004-06-29 James E Wilson <wilson@specifixinc.com>
1148
1149 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1150 * ia64-asmtab.c: Regnerate.
1151
1152 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1153
1154 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1155 (extract_fxm): Don't test dialect.
1156 (XFXFXM_MASK): Include the power4 bit.
1157 (XFXM): Add p4 param.
1158 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1159
1160 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1161
1162 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1163 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1164
1165 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1166
1167 * ppc-opc.c (BH, XLBH_MASK): Define.
1168 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1169
1170 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1171
1172 * i386-dis.c (x_mode): Comment.
1173 (two_source_ops): File scope.
1174 (float_mem): Correct fisttpll and fistpll.
1175 (float_mem_mode): New table.
1176 (dofloat): Use it.
1177 (OP_E): Correct intel mode PTR output.
1178 (ptr_reg): Use open_char and close_char.
1179 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1180 operands. Set two_source_ops.
1181
1182 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1183
1184 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1185 instead of _raw_size.
1186
1187 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1188
1189 * ia64-gen.c (in_iclass): Handle more postinc st
1190 and ld variants.
1191 * ia64-asmtab.c: Rebuilt.
1192
1193 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1194
1195 * s390-opc.txt: Correct architecture mask for some opcodes.
1196 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1197 in the esa mode as well.
1198
1199 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1200
1201 * sh-dis.c (target_arch): Make unsigned.
1202 (print_insn_sh): Replace (most of) switch with a call to
1203 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1204 * sh-opc.h: Redefine architecture flags values.
1205 Add sh3-nommu architecture.
1206 Reorganise <arch>_up macros so they make more visual sense.
1207 (SH_MERGE_ARCH_SET): Define new macro.
1208 (SH_VALID_BASE_ARCH_SET): Likewise.
1209 (SH_VALID_MMU_ARCH_SET): Likewise.
1210 (SH_VALID_CO_ARCH_SET): Likewise.
1211 (SH_VALID_ARCH_SET): Likewise.
1212 (SH_MERGE_ARCH_SET_VALID): Likewise.
1213 (SH_ARCH_SET_HAS_FPU): Likewise.
1214 (SH_ARCH_SET_HAS_DSP): Likewise.
1215 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1216 (sh_get_arch_from_bfd_mach): Add prototype.
1217 (sh_get_arch_up_from_bfd_mach): Likewise.
1218 (sh_get_bfd_mach_from_arch_set): Likewise.
1219 (sh_merge_bfd_arc): Likewise.
1220
1221 2004-05-24 Peter Barada <peter@the-baradas.com>
1222
1223 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1224 into new match_insn_m68k function. Loop over canidate
1225 matches and select first that completely matches.
1226 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1227 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1228 to verify addressing for MAC/EMAC.
1229 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1230 reigster halves since 'fpu' and 'spl' look misleading.
1231 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1232 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1233 first, tighten up match masks.
1234 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1235 'size' from special case code in print_insn_m68k to
1236 determine decode size of insns.
1237
1238 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1239
1240 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1241 well as when -mpower4.
1242
1243 2004-05-13 Nick Clifton <nickc@redhat.com>
1244
1245 * po/fr.po: Updated French translation.
1246
1247 2004-05-05 Peter Barada <peter@the-baradas.com>
1248
1249 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1250 variants in arch_mask. Only set m68881/68851 for 68k chips.
1251 * m68k-op.c: Switch from ColdFire chips to core variants.
1252
1253 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1254
1255 PR 147.
1256 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1257
1258 2004-04-29 Ben Elliston <bje@au.ibm.com>
1259
1260 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1261 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1262
1263 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1264
1265 * sh-dis.c (print_insn_sh): Print the value in constant pool
1266 as a symbol if it looks like a symbol.
1267
1268 2004-04-22 Peter Barada <peter@the-baradas.com>
1269
1270 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1271 appropriate ColdFire architectures.
1272 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1273 mask addressing.
1274 Add EMAC instructions, fix MAC instructions. Remove
1275 macmw/macml/msacmw/msacml instructions since mask addressing now
1276 supported.
1277
1278 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1279
1280 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1281 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1282 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1283 macro. Adjust all users.
1284
1285 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1286
1287 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1288 separately.
1289
1290 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1291
1292 * m32r-asm.c: Regenerate.
1293
1294 2004-03-29 Stan Shebs <shebs@apple.com>
1295
1296 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1297 used.
1298
1299 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1300
1301 * aclocal.m4: Regenerate.
1302 * config.in: Regenerate.
1303 * configure: Regenerate.
1304 * po/POTFILES.in: Regenerate.
1305 * po/opcodes.pot: Regenerate.
1306
1307 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1308
1309 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1310 PPC_OPERANDS_GPR_0.
1311 * ppc-opc.c (RA0): Define.
1312 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1313 (RAOPT): Rename from RAO. Update all uses.
1314 (powerpc_opcodes): Use RA0 as appropriate.
1315
1316 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1317
1318 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1319
1320 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1321
1322 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1323
1324 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1325
1326 * i386-dis.c (GRPPLOCK): Delete.
1327 (grps): Delete GRPPLOCK entry.
1328
1329 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1330
1331 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1332 (M, Mp): Use OP_M.
1333 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1334 (GRPPADLCK): Define.
1335 (dis386): Use NOP_Fixup on "nop".
1336 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1337 (twobyte_has_modrm): Set for 0xa7.
1338 (padlock_table): Delete. Move to..
1339 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1340 and clflush.
1341 (print_insn): Revert PADLOCK_SPECIAL code.
1342 (OP_E): Delete sfence, lfence, mfence checks.
1343
1344 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1345
1346 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1347 (INVLPG_Fixup): New function.
1348 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1349
1350 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1351
1352 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1353 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1354 (padlock_table): New struct with PadLock instructions.
1355 (print_insn): Handle PADLOCK_SPECIAL.
1356
1357 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1358
1359 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1360 (OP_E): Twiddle clflush to sfence here.
1361
1362 2004-03-08 Nick Clifton <nickc@redhat.com>
1363
1364 * po/de.po: Updated German translation.
1365
1366 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1367
1368 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1369 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1370 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1371 accordingly.
1372
1373 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1374
1375 * frv-asm.c: Regenerate.
1376 * frv-desc.c: Regenerate.
1377 * frv-desc.h: Regenerate.
1378 * frv-dis.c: Regenerate.
1379 * frv-ibld.c: Regenerate.
1380 * frv-opc.c: Regenerate.
1381 * frv-opc.h: Regenerate.
1382
1383 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1384
1385 * frv-desc.c, frv-opc.c: Regenerate.
1386
1387 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1388
1389 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1390
1391 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1392
1393 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1394 Also correct mistake in the comment.
1395
1396 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1397
1398 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1399 ensure that double registers have even numbers.
1400 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1401 that reserved instruction 0xfffd does not decode the same
1402 as 0xfdfd (ftrv).
1403 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1404 REG_N refers to a double register.
1405 Add REG_N_B01 nibble type and use it instead of REG_NM
1406 in ftrv.
1407 Adjust the bit patterns in a few comments.
1408
1409 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1410
1411 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1412
1413 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1414
1415 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1416
1417 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1418
1419 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1420
1421 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1422
1423 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1424 mtivor32, mtivor33, mtivor34.
1425
1426 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1427
1428 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1429
1430 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1431
1432 * arm-opc.h Maverick accumulator register opcode fixes.
1433
1434 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1435
1436 * m32r-dis.c: Regenerate.
1437
1438 2004-01-27 Michael Snyder <msnyder@redhat.com>
1439
1440 * sh-opc.h (sh_table): "fsrra", not "fssra".
1441
1442 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1443
1444 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1445 contraints.
1446
1447 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1448
1449 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1450
1451 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1452
1453 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1454 1. Don't print scale factor on AT&T mode when index missing.
1455
1456 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1457
1458 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1459 when loaded into XR registers.
1460
1461 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1462
1463 * frv-desc.h: Regenerate.
1464 * frv-desc.c: Regenerate.
1465 * frv-opc.c: Regenerate.
1466
1467 2004-01-13 Michael Snyder <msnyder@redhat.com>
1468
1469 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1470
1471 2004-01-09 Paul Brook <paul@codesourcery.com>
1472
1473 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1474 specific opcodes.
1475
1476 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1477
1478 * Makefile.am (libopcodes_la_DEPENDENCIES)
1479 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1480 comment about the problem.
1481 * Makefile.in: Regenerate.
1482
1483 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1484
1485 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1486 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1487 cut&paste errors in shifting/truncating numerical operands.
1488 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1489 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1490 (parse_uslo16): Likewise.
1491 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1492 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1493 (parse_s12): Likewise.
1494 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1495 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1496 (parse_uslo16): Likewise.
1497 (parse_uhi16): Parse gothi and gotfuncdeschi.
1498 (parse_d12): Parse got12 and gotfuncdesc12.
1499 (parse_s12): Likewise.
1500
1501 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1502
1503 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1504 instruction which looks similar to an 'rla' instruction.
1505
1506 For older changes see ChangeLog-0203
1507 \f
1508 Local Variables:
1509 mode: change-log
1510 left-margin: 8
1511 fill-column: 74
1512 version-control: never
1513 End:
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